From patchwork Mon Dec 10 17:35:36 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 153316 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp3819151ljp; Mon, 10 Dec 2018 09:36:14 -0800 (PST) X-Google-Smtp-Source: AFSGD/VQLZhZXptbXWIUbVJsoxWFtpndvUEuBvc3BOP8Qdm2siByrPaBoZ9CS42zuvSTvdKPOaR+ X-Received: by 2002:a62:1d4c:: with SMTP id d73mr13291234pfd.90.1544463374370; Mon, 10 Dec 2018 09:36:14 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1544463374; cv=none; d=google.com; s=arc-20160816; b=emIf61gYZlD+EnVPxtxjmlzdq245W5VgqB/VAFwyE0N9xAXRaOK87JAsrGd/80tw23 UIUKVLAbTjzu8diC+K8sNhfr7ORZerdV3URNVDXsrpnMfMYwUyc3TYK46BhTTDjRbN4R H/9eWxzypjNuzoUjGn0OmmYR5ZjTz5g87OK+dgsly0WVyV0Lm2IM2K18f3s8QxH3w+gP mxC0p7P/IfqWAzpcm/SMYvjGm5GM0WDqGL0xMC32Ie6PMPO06X0VlwRPhoe7vjagFiJU O4sM4GQqNxc6xJwmYPV/t8IuJ7ZQWhLpjDu5dtokfcsdzes9i3H4Lkfy8Le5SAhZ9xET XnNw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=OZbNRq4vPh2tMrFA0qvMX9547LZd+ov7go0ZcVd3YcY=; b=opTney7QBVBbqxzJVXotj6zQxwD5bKcZ9qy+npVxYzw+eUmVdXPM9uHHlm+cM1uex0 6fwy30TZbs2/VGYtGdS0myxcOv2D1HMeivGDN5u7nMTGS7alKxmd5A3G7Z9dquaOwSbj dJV33utjVvduiDYODWRJO/ixI3li3K0kxyt6GJvvR7ylhWTUeCTCexjmiPwrT9416Nyl uW0n9yyNJkA2xBP8mC6f5U1jYr5lh8C4IN6fr8/GfZz7L/QB/ALusLFWXUG4TC1kQ/7C kzcg6sEz884vCCYTx8PEp9phbuF6uXTBdMz5ikkDlQ7QCpSwkoRzVYqeMJ8J0Ju2CAoH 5LrQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=OOTdJMoV; spf=pass (google.com: best guess record for domain of linux-serial-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-serial-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id x16si9575971pga.407.2018.12.10.09.36.14; Mon, 10 Dec 2018 09:36:14 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-serial-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=OOTdJMoV; spf=pass (google.com: best guess record for domain of linux-serial-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-serial-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727769AbeLJRgN (ORCPT + 2 others); Mon, 10 Dec 2018 12:36:13 -0500 Received: from mail-pl1-f194.google.com ([209.85.214.194]:34542 "EHLO mail-pl1-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727222AbeLJRgN (ORCPT ); Mon, 10 Dec 2018 12:36:13 -0500 Received: by mail-pl1-f194.google.com with SMTP id w4so5579178plz.1 for ; Mon, 10 Dec 2018 09:36:13 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=OZbNRq4vPh2tMrFA0qvMX9547LZd+ov7go0ZcVd3YcY=; b=OOTdJMoV28QZwKWig2beKcjaiyzW73Jrx6asTLjc3u2QteieCIsaKh6NfWFd62n5OH yqZiwkKmuZQImMFk4aJ1wCiwmGvUcl90vDFqhepLwmubv2sdJLrbpU8MmcF4NOgTzdre 0XpAVEptPwRU4K+RO/n8lLKNjsmYAgxlvfs5U= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=OZbNRq4vPh2tMrFA0qvMX9547LZd+ov7go0ZcVd3YcY=; b=bz1+Lxi+6agB9ryMJYkEbqOj6LEMLDqCd33HyddnTO4qlD1y9g7mFAzTXtB1lmiH8B HE8Qx2rIgIwlqv27zwiQCZVWxaznfQhQOgR4tDpsL1ZE7kQaU/SJACEKTry5PNBcZULG XMB+X7FK5/CUDl2QSijUzPeKI3kgfCoVU/NWziNxihIzkUCcSmKrkWE/WV0Z00B7BAPP XylnBO5uc92DR9TB9tBXcyawKzaqlUNXp3ky4Dx5VK89HefRPLRcdl5Wzn7ZUfefj4z4 S4pLSEfs981Khi9+AGEs4F3aXXkzoBj/1OLZ8Adphw22jtRjOlxMEvSTd4roMej9zy/i zV3w== X-Gm-Message-State: AA+aEWbzpw1MF4H1sVWepI2UtJEZ+YXmh/sLFTsaz7S2l6MvXnkQ2Bya ZsRXg37jUdnTiB0NukOF4mY/ X-Received: by 2002:a17:902:a9c4:: with SMTP id b4mr12922734plr.298.1544463372718; Mon, 10 Dec 2018 09:36:12 -0800 (PST) Received: from localhost.localdomain ([2409:4072:91e:2c01:40e1:a028:b090:9e12]) by smtp.gmail.com with ESMTPSA id q1sm15998396pfb.96.2018.12.10.09.36.04 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 10 Dec 2018 09:36:12 -0800 (PST) From: Manivannan Sadhasivam To: olof@lixom.net, arnd@arndb.de, robh+dt@kernel.org, tglx@linutronix.de, jason@lakedaemon.net, marc.zyngier@arm.com, daniel.lezcano@linaro.org, gregkh@linuxfoundation.org, jslaby@suse.com Cc: linux-unisoc@lists.infradead.org, afaerber@suse.de, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-serial@vger.kernel.org, amit.kucheria@linaro.org, linus.walleij@linaro.org, zhao_steven@263.net, Manivannan Sadhasivam Subject: [PATCH v4 01/15] dt-bindings: Add RDA Micro vendor prefix Date: Mon, 10 Dec 2018 23:05:36 +0530 Message-Id: <20181210173550.29643-2-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20181210173550.29643-1-manivannan.sadhasivam@linaro.org> References: <20181210173550.29643-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 Sender: linux-serial-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-serial@vger.kernel.org From: Andreas Färber Add vendor prefix for RDA Micro which now merged into Unisoc Communications Inc. Signed-off-by: Andreas Färber Signed-off-by: Manivannan Sadhasivam Reviewed-by: Rob Herring --- Documentation/devicetree/bindings/vendor-prefixes.txt | 1 + 1 file changed, 1 insertion(+) -- 2.17.1 diff --git a/Documentation/devicetree/bindings/vendor-prefixes.txt b/Documentation/devicetree/bindings/vendor-prefixes.txt index 4b1a2a8fcc16..37826fac7684 100644 --- a/Documentation/devicetree/bindings/vendor-prefixes.txt +++ b/Documentation/devicetree/bindings/vendor-prefixes.txt @@ -320,6 +320,7 @@ ralink Mediatek/Ralink Technology Corp. ramtron Ramtron International raspberrypi Raspberry Pi Foundation raydium Raydium Semiconductor Corp. +rda Unisoc Communications, Inc. realtek Realtek Semiconductor Corp. renesas Renesas Electronics Corporation richtek Richtek Technology Corporation From patchwork Mon Dec 10 17:35:37 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 153317 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp3819297ljp; Mon, 10 Dec 2018 09:36:23 -0800 (PST) X-Google-Smtp-Source: AFSGD/VMXuFfdBZzCDr6XoQ3AD3Ixp9p4i93LQROs+CMEj4HVriPTaVF7u3ZuJi9diqxifsLB5ms X-Received: by 2002:a63:4b60:: with SMTP id k32mr11524627pgl.186.1544463383632; Mon, 10 Dec 2018 09:36:23 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1544463383; cv=none; d=google.com; s=arc-20160816; b=gRxNKHoxrNt5raEvtcHdQMyzeIxRnu5nXQco8myuYwBTeTjijLuKdHtwRlFYB9wZ50 VgavLfE8p8PRlMRh0yZBaNDXNlC4kO1rY/S1ZcVIJy+qBz4C5X48z++H8iKJYtOkif80 x/A1lRZ7u4zr9WftD1tuRSIFpRCP0z9C9A0dHPRxYVAudApwHoDpX7CG929nyRhHsSEb pIUP0uafgeABx2uOC9Jmh3Az2dV8lMNg11xZBBpLzr54uffR4jsO5b4M8k0bKyrJNv6b eTXrrsgpd3SoKYcg3t1LuGnhMAAGysLyfYl5p3lolxIysD9bhWdO6P5UcYxavq2BFqwW tUFw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=Cmd8SlBcQNfIa1nb8LLATghfQmGnWfI4U+QKliynNZE=; b=zk+QWyxJtIln5qhh+QjtTwa+F7qQqIXtDkw0oyj43jy3ydQ7feoIH0c+HGSw1AKfJ3 nX0jXNVhItf0nCCwKjDNzqw7Xk9edfLoUvqkVwqsjwzABvtoN9Mb7OhrrzGzhjiuVgJp knxm8yP+TM3VJYTYen3cFCye6qUjoMU/6ipWnRNRwsWxBPe//wGZhUjMGlEI4+lWhOxV 3ZaVqPSEN9S0VShCKLKuh+dfOnOhNIyYW2HCMqs4KQIFlGqE4WjiA5deKWYqy/IIevr2 YNFABkSk20Dqi0fFJNDtriScsZMam9ZbvHYYpvOyr9LcDpKSIOITrLAe2hg/5EyJmxUS xAng== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=YAXuJ8+R; spf=pass (google.com: best guess record for domain of linux-serial-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-serial-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id w19si9792732pgc.96.2018.12.10.09.36.23; Mon, 10 Dec 2018 09:36:23 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-serial-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=YAXuJ8+R; spf=pass (google.com: best guess record for domain of linux-serial-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-serial-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728017AbeLJRgX (ORCPT + 2 others); Mon, 10 Dec 2018 12:36:23 -0500 Received: from mail-pl1-f193.google.com ([209.85.214.193]:37196 "EHLO mail-pl1-f193.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727405AbeLJRgW (ORCPT ); Mon, 10 Dec 2018 12:36:22 -0500 Received: by mail-pl1-f193.google.com with SMTP id b5so5570281plr.4 for ; Mon, 10 Dec 2018 09:36:22 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=Cmd8SlBcQNfIa1nb8LLATghfQmGnWfI4U+QKliynNZE=; b=YAXuJ8+RB2DXLXlJjsmBYxPGPKn8PUw3SYbKrETOx3OzVKs/4hNH2LDxhRL4bx/nAL I6Xeb0BnrvGPC+hEni1mM32Et0Yddd6GVEjV5hUcftlvTlQuf3cb3uOxl+8o8i9a17/G YWGO2AKH/r+d/60k6/pO5d7gsNDwZaRjiMoA4= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=Cmd8SlBcQNfIa1nb8LLATghfQmGnWfI4U+QKliynNZE=; b=c+VAz+E6UwWx6sQ3z4jWj/OD5qORucXvGG3Anr5zwn4w9w33zWzaKjSEn5UoYnpUXm HYPTdZ91Elz0UFVN+pVva5aB7EQsVQ4LBRLM3xhBJZjdBh++mUf65L3WPIsuiDidL5xs fiImppQcpAtJzGhUbMIBnOIf9Vq7eIFCd4wIVwNCE43cnfeq4rnGgXpvKPlg2lqK6Kw5 9STA4DPKVhMQXZMxLEQC92AjF8rogeydTnN3whLzvpQt5CnD3xTNe0i4AwF9m0TT1AbL CfMZW5YRmYO1qvO9M2smFBDLT6zstYem11B4/pFaaThuQdhPPnqqGAo/OAwNd+T6oFu+ RUXw== X-Gm-Message-State: AA+aEWazi14+Fgfe0fHxK1JJTDnVsysBQPu4fqoNMHJNvpHZtu+vtruO 1d7ckrOL1tPZqO45bAXNZ6Sp X-Received: by 2002:a17:902:33c2:: with SMTP id b60mr12863201plc.211.1544463381821; Mon, 10 Dec 2018 09:36:21 -0800 (PST) Received: from localhost.localdomain ([2409:4072:91e:2c01:40e1:a028:b090:9e12]) by smtp.gmail.com with ESMTPSA id q1sm15998396pfb.96.2018.12.10.09.36.12 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 10 Dec 2018 09:36:21 -0800 (PST) From: Manivannan Sadhasivam To: olof@lixom.net, arnd@arndb.de, robh+dt@kernel.org, tglx@linutronix.de, jason@lakedaemon.net, marc.zyngier@arm.com, daniel.lezcano@linaro.org, gregkh@linuxfoundation.org, jslaby@suse.com Cc: linux-unisoc@lists.infradead.org, afaerber@suse.de, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-serial@vger.kernel.org, amit.kucheria@linaro.org, linus.walleij@linaro.org, zhao_steven@263.net, Manivannan Sadhasivam Subject: [PATCH v4 02/15] dt-bindings: arm: Document RDA8810PL and reference boards Date: Mon, 10 Dec 2018 23:05:37 +0530 Message-Id: <20181210173550.29643-3-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20181210173550.29643-1-manivannan.sadhasivam@linaro.org> References: <20181210173550.29643-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 Sender: linux-serial-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-serial@vger.kernel.org From: Andreas Färber Add bindings for RDA Micro RDA8810PL SoC and below reference boards: 1. Orange Pi 2G-IoT - http://www.orangepi.org/OrangePi2GIOT/ 2. Orange Pi i96 - https://www.96boards.org/product/orangepi-i96/ Cc: zhao_steven@263.net Signed-off-by: Andreas Färber Signed-off-by: Manivannan Sadhasivam Reviewed-by: Rob Herring --- Documentation/devicetree/bindings/arm/rda.txt | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) create mode 100644 Documentation/devicetree/bindings/arm/rda.txt -- 2.17.1 diff --git a/Documentation/devicetree/bindings/arm/rda.txt b/Documentation/devicetree/bindings/arm/rda.txt new file mode 100644 index 000000000000..43c80762c428 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/rda.txt @@ -0,0 +1,17 @@ +RDA Micro platforms device tree bindings +---------------------------------------- + +RDA8810PL SoC +============= + +Required root node properties: + + - compatible : must contain "rda,8810pl" + + +Boards: + +Root node property compatible must contain, depending on board: + + - Orange Pi 2G-IoT: "xunlong,orangepi-2g-iot" + - Orange Pi i96: "xunlong,orangepi-i96" From patchwork Mon Dec 10 17:35:39 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 153319 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp3819578ljp; Mon, 10 Dec 2018 09:36:40 -0800 (PST) X-Google-Smtp-Source: AFSGD/UsNR5x1CDccEc8qvFx4cScmXfVGGkpGz++eFel7MN38IiecKXEGv5Yi94brEBzX7eQved8 X-Received: by 2002:a62:f54f:: with SMTP id n76mr13160811pfh.59.1544463400606; Mon, 10 Dec 2018 09:36:40 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1544463400; cv=none; d=google.com; s=arc-20160816; b=bjDUzLxxVX/l2kxq6yagdGeuqjsq0aCBkBxRX6y6V7n1/yMMsrUJD3P3yT38RJ7xw4 TSguFJnTWeyc8ASzyL3EUA19Fw3iDjbaev7k3Fv74puMJUqvbS9L12zI+vjlkW40TXrk /MAVAiVvnQKXPd6zJFiJ+vwQ+PBSoa42jnY8SD726Py64LpCOyrrfESNNwIhd7Wnli39 Y8EeNJejJioAnXpi6jJA9fizwlsENzXQFF24V4Rj8YmLrrEanc/BWg7PIgxkcoQmgVDr gf/bTFwgiZHiD1Fm0+jh8Y6JTOf/yi/PrB/GmB1vCpfht9Pixk+zKOVieE/iPjqJDvMx IrXw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature; bh=FUp8E+CGlwLSF4T3S4rK0JomvyH9YIEf7Nh63jsMMN0=; b=BLZdsKJw5gdIwZIQz+sNxmHpHfF1lG+f+Ll2Y04AoThRdZuW2dwVwhne2DS+m3pNWC GoaU3If5pOz0U7L5ZqNM12eKx0KI/BDdOL+ajUjYqO9/m1p0obDdx7/B7gWNtcbetJl4 rG6mfogK3o6Q1UpRcNrpI5pD1IHSQWqZx33fIE57YqL23sClB1swbgwRce+cs3uEt4dw jo8oXwHgUd15BL0bEpvk/2fWCkkNyCO3+Ndj/WmEqG6KDSnu64KDNARtPCQKmWDaZwBz oa/1srh9VAyN0CWoQXdmK0eUE905JQHDTfvZ1dLTjrSwbJZLwuLhh4rI0N0nbgiV6k18 K55w== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=YniCNrr3; spf=pass (google.com: best guess record for domain of linux-serial-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-serial-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id b12si10309494plx.159.2018.12.10.09.36.40; Mon, 10 Dec 2018 09:36:40 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-serial-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=YniCNrr3; spf=pass (google.com: best guess record for domain of linux-serial-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-serial-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728225AbeLJRgk (ORCPT + 2 others); Mon, 10 Dec 2018 12:36:40 -0500 Received: from mail-pf1-f194.google.com ([209.85.210.194]:44728 "EHLO mail-pf1-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727335AbeLJRgj (ORCPT ); Mon, 10 Dec 2018 12:36:39 -0500 Received: by mail-pf1-f194.google.com with SMTP id u6so5713674pfh.11 for ; Mon, 10 Dec 2018 09:36:39 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=FUp8E+CGlwLSF4T3S4rK0JomvyH9YIEf7Nh63jsMMN0=; b=YniCNrr3AFiAc9wcGv6ZuUDdPSCcJKWLJ0BjQ23qA5T2fdfJdWtkDXfmFJD4Rqls5L GAUXoZA5BvyuH36Wtn8Oz+dUU045BE49wofRDchzZkLEmKT573wD+3naAQsizLPIQewg WwwRWmURRZrKfr6xX+FqT1RtgfyeMbyw9Dv4o= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=FUp8E+CGlwLSF4T3S4rK0JomvyH9YIEf7Nh63jsMMN0=; b=dXZMrsaom3MNQIFsuWO0fb7T8vHonbhFMvW/KfS1Cq3XCBxdwRCsQ9KCp0Wg3D+3S0 2HtVDar97ilacT+NMvAIkdtxOXloQTfbCFDTnSjr5eLLxYJNlDu+AI/u+3g0hZb8pXXf S12UG76It2nIMBbNmt+HyIBSoflcW2Se5+b2EnWq33u5bEnez2tYjWt+y6kks6hJuEph 9CGzoooqf2YcUPE9FEu1DJgfU9r2p9VOIZsRvUJRgeFKkRqvVVNeV2Suj9oslNrvwtPB OyDv8m9fP8u7iI3XpYpTfimrH1HID+KOCXABBcyz+n6tTOa3k338ZplQPqPFFWkTEFOm Ad1Q== X-Gm-Message-State: AA+aEWbkXMKxR8deJrsI8IpgT+Lfvhw7cHhFD25kvB3veX5dnNr8Q5fs rKNAdUlymNb3HdFdnK7BGb5Y X-Received: by 2002:a62:6cc8:: with SMTP id h191mr13752965pfc.89.1544463398965; Mon, 10 Dec 2018 09:36:38 -0800 (PST) Received: from localhost.localdomain ([2409:4072:91e:2c01:40e1:a028:b090:9e12]) by smtp.gmail.com with ESMTPSA id q1sm15998396pfb.96.2018.12.10.09.36.31 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 10 Dec 2018 09:36:38 -0800 (PST) From: Manivannan Sadhasivam To: olof@lixom.net, arnd@arndb.de, robh+dt@kernel.org, tglx@linutronix.de, jason@lakedaemon.net, marc.zyngier@arm.com, daniel.lezcano@linaro.org, gregkh@linuxfoundation.org, jslaby@suse.com Cc: linux-unisoc@lists.infradead.org, afaerber@suse.de, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-serial@vger.kernel.org, amit.kucheria@linaro.org, linus.walleij@linaro.org, zhao_steven@263.net, Manivannan Sadhasivam Subject: [PATCH v4 04/15] dt-bindings: interrupt-controller: Document RDA8810PL intc Date: Mon, 10 Dec 2018 23:05:39 +0530 Message-Id: <20181210173550.29643-5-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20181210173550.29643-1-manivannan.sadhasivam@linaro.org> References: <20181210173550.29643-1-manivannan.sadhasivam@linaro.org> Sender: linux-serial-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-serial@vger.kernel.org Document interrupt controller in RDA Micro RDA8810PL SoC. Signed-off-by: Manivannan Sadhasivam Reviewed-by: Rob Herring --- .../interrupt-controller/rda,8810pl-intc.txt | 61 +++++++++++++++++++ 1 file changed, 61 insertions(+) create mode 100644 Documentation/devicetree/bindings/interrupt-controller/rda,8810pl-intc.txt -- 2.17.1 diff --git a/Documentation/devicetree/bindings/interrupt-controller/rda,8810pl-intc.txt b/Documentation/devicetree/bindings/interrupt-controller/rda,8810pl-intc.txt new file mode 100644 index 000000000000..e0062aebf025 --- /dev/null +++ b/Documentation/devicetree/bindings/interrupt-controller/rda,8810pl-intc.txt @@ -0,0 +1,61 @@ +RDA Micro RDA8810PL Interrupt Controller + +The interrupt controller in RDA8810PL SoC is a custom interrupt controller +which supports up to 32 interrupts. + +Required properties: + +- compatible: Should be "rda,8810pl-intc". +- reg: Specifies base physical address of the registers set. +- interrupt-controller: Identifies the node as an interrupt controller. +- #interrupt-cells: Specifies the number of cells needed to encode an + interrupt source. The value shall be 2. + +The interrupt sources are as follows: + +ID Name +------------ +0: PULSE_DUMMY +1: I2C +2: NAND_NFSC +3: SDMMC1 +4: SDMMC2 +5: SDMMC3 +6: SPI1 +7: SPI2 +8: SPI3 +9: UART1 +10: UART2 +11: UART3 +12: GPIO1 +13: GPIO2 +14: GPIO3 +15: KEYPAD +16: TIMER +17: TIMEROS +18: COMREG0 +19: COMREG1 +20: USB +21: DMC +22: DMA +23: CAMERA +24: GOUDA +25: GPU +26: VPU_JPG +27: VPU_HOST +28: VOC +29: AUIFC0 +30: AUIFC1 +31: L2CC + +Example: + apb@20800000 { + compatible = "simple-bus"; + ... + intc: interrupt-controller@0 { + compatible = "rda,8810pl-intc"; + reg = <0x0 0x1000>; + interrupt-controller; + #interrupt-cells = <2>; + }; + }; From patchwork Mon Dec 10 17:35:40 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 153320 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp3819719ljp; Mon, 10 Dec 2018 09:36:49 -0800 (PST) X-Google-Smtp-Source: AFSGD/WXBIFqzIKiLqAlY/QYEEZHwrgVsp+3PRBnVUJKbToKFq/xaav1qq1bevID2f/28uqHw47y X-Received: by 2002:a62:5c1:: with SMTP id 184mr13048612pff.165.1544463409159; Mon, 10 Dec 2018 09:36:49 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1544463409; cv=none; d=google.com; s=arc-20160816; b=fR/bPDAfr3T/gE9IxXaSGWWSDrxXZ36DZ+NbTsaQtYR+iKUtNG042XvNLam+ocgzWf Hv01yVuLr5LsZUT5hckL7DBNIf+KoZ70OsXTYCHcUMOsKNpvw7gddrNeIbltzVhKw5bx wjF2j/Bu/ZLhKNW70senXOch7K/OMKBjASHrI+X7rh6wEF93SyAE6MJgxcVxiphVg8/U mNfPd9+hFH3oirHSlmucABwloPBD83IfeUC7QoWhr+N+uEKR8u3wPC+8rwjRGBfAI0De jXooZEsKZ2rmwR1aYVB9En4ZvlT9jFxpbiF+iy6kJXhC4RsCzIuD7BJcZrg3h3TOltqL 8l6Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=Wp3BZDgoaFaJmF6UrFqd9p3SyvZQREQyZwNsYyp7Sws=; b=SuHtE+9h9UbPZtWYdu9KtfueSFmeWUk02pOWbLu+1ncPXm4gaVYroTgsFrnLW2h146 wxdFArm+IvEoiSMiTipxRN3QLPlx/0AoDMJjyfTYzeIchjYi263nOiEZNFTvqJwUhMbr rZhyzm+xC1O08N7broxrdfainWUK/cYU8FWX1vXNfqZRk86QkqwnucbHgzBrvXOMSy/+ f+rZeWjdmoh7oXxoB51Rj8tq3OaDZCwnddgKpuCz7ylZR6qgHHi011iwUIrTmi58VSbZ K3WPxA1cx2lKf/p9gSLTxLl7HHUuo0RbLgukANJqjQbB97s9AgaC48GI5MEFquIvluWk FbXg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=BYhxXpgZ; spf=pass (google.com: best guess record for domain of linux-serial-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-serial-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id z3si7629935pln.430.2018.12.10.09.36.48; Mon, 10 Dec 2018 09:36:49 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-serial-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=BYhxXpgZ; spf=pass (google.com: best guess record for domain of linux-serial-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-serial-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728308AbeLJRgs (ORCPT + 2 others); Mon, 10 Dec 2018 12:36:48 -0500 Received: from mail-pf1-f193.google.com ([209.85.210.193]:36512 "EHLO mail-pf1-f193.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727771AbeLJRgs (ORCPT ); Mon, 10 Dec 2018 12:36:48 -0500 Received: by mail-pf1-f193.google.com with SMTP id b85so5734360pfc.3 for ; Mon, 10 Dec 2018 09:36:47 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=Wp3BZDgoaFaJmF6UrFqd9p3SyvZQREQyZwNsYyp7Sws=; b=BYhxXpgZnvOoilqOg2dayJqLZC1bmtGK3F2m/wNmGOGFtRhrUO1j0+G9GcXeWcGJGw +5tIYrt1xyJk1HXfsyRp7GA5/4DMSuqRQ5GqObVoPgRIzlF1IFKeOFegeGNHzckLkDz4 729cKzaTqTJm0iGqUCr/jC90aHtSEx7YnVO8I= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=Wp3BZDgoaFaJmF6UrFqd9p3SyvZQREQyZwNsYyp7Sws=; b=EBVlQJs3MYeyfqZvBiirSyVz3wDhxOwiHAYZagvkA6sAgp5qbkOOiG1e8azSkUN/Ny IMnqzeAcWhJRzrpke5CENghe05ZSfePlz4nSkdHNs3As69i5RSBXlgOje47R65Oi0Hmr yWEqUOsMXPIGdpDGxXzFD8NcMEdqGgDvFC+bZaSyBxeAR0+ltp42rjdeJcP3CIzOvwK4 Z4Wk/bobIN9VJW++r8yt1oMy3+0+62cIQ10xMP/g/Ke9WzrMIdWXAEZT4UeDA5fzlrHh fPME2K1Hh4r1xCfBbtGrmMMD/0f7rNT9jo9MFISO28Zlryd/LrospUxIvKuXa+5cU7Co BJ1A== X-Gm-Message-State: AA+aEWYy/oEcEq2gMJPSXSRWprFG5OLETqlPhZxkMIOYgEm08tIykCN4 Yk2H+LDojrAJLHOIy6XDmLDt X-Received: by 2002:a62:ab0d:: with SMTP id p13mr13160505pff.211.1544463407381; Mon, 10 Dec 2018 09:36:47 -0800 (PST) Received: from localhost.localdomain ([2409:4072:91e:2c01:40e1:a028:b090:9e12]) by smtp.gmail.com with ESMTPSA id q1sm15998396pfb.96.2018.12.10.09.36.39 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 10 Dec 2018 09:36:46 -0800 (PST) From: Manivannan Sadhasivam To: olof@lixom.net, arnd@arndb.de, robh+dt@kernel.org, tglx@linutronix.de, jason@lakedaemon.net, marc.zyngier@arm.com, daniel.lezcano@linaro.org, gregkh@linuxfoundation.org, jslaby@suse.com Cc: linux-unisoc@lists.infradead.org, afaerber@suse.de, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-serial@vger.kernel.org, amit.kucheria@linaro.org, linus.walleij@linaro.org, zhao_steven@263.net, Manivannan Sadhasivam Subject: [PATCH v4 05/15] ARM: dts: Add devicetree for RDA8810PL SoC Date: Mon, 10 Dec 2018 23:05:40 +0530 Message-Id: <20181210173550.29643-6-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20181210173550.29643-1-manivannan.sadhasivam@linaro.org> References: <20181210173550.29643-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 Sender: linux-serial-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-serial@vger.kernel.org Add initial device tree for RDA8810PL SoC from RDA Microelectronics. Signed-off-by: Andreas Färber Signed-off-by: Manivannan Sadhasivam --- arch/arm/boot/dts/rda8810pl.dtsi | 86 ++++++++++++++++++++++++++++++++ 1 file changed, 86 insertions(+) create mode 100644 arch/arm/boot/dts/rda8810pl.dtsi -- 2.17.1 diff --git a/arch/arm/boot/dts/rda8810pl.dtsi b/arch/arm/boot/dts/rda8810pl.dtsi new file mode 100644 index 000000000000..15547b138977 --- /dev/null +++ b/arch/arm/boot/dts/rda8810pl.dtsi @@ -0,0 +1,86 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * RDA8810PL SoC + * + * Copyright (c) 2017 Andreas Färber + * Copyright (c) 2018 Manivannan Sadhasivam + */ + +/ { + compatible = "rda,8810pl"; + interrupt-parent = <&intc>; + #address-cells = <1>; + #size-cells = <1>; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a5"; + reg = <0x0>; + }; + }; + + sram@100000 { + compatible = "mmio-sram"; + reg = <0x100000 0x10000>; + #address-cells = <1>; + #size-cells = <1>; + ranges; + }; + + apb@20800000 { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x20800000 0x100000>; + + intc: interrupt-controller@0 { + compatible = "rda,8810pl-intc"; + reg = <0x0 0x1000>; + interrupt-controller; + #interrupt-cells = <2>; + }; + }; + + apb@20900000 { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x20900000 0x100000>; + }; + + apb@20a00000 { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x20a00000 0x100000>; + + uart1: serial@0 { + compatible = "rda,8810pl-uart"; + reg = <0x0 0x1000>; + status = "disabled"; + }; + + uart2: serial@10000 { + compatible = "rda,8810pl-uart"; + reg = <0x10000 0x1000>; + status = "disabled"; + }; + + uart3: serial@90000 { + compatible = "rda,8810pl-uart"; + reg = <0x90000 0x1000>; + status = "disabled"; + }; + }; + + l2: cache-controller@21100000 { + compatible = "arm,pl310-cache"; + reg = <0x21100000 0x1000>; + cache-unified; + cache-level = <2>; + }; +}; From patchwork Mon Dec 10 17:35:42 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 153322 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp3819965ljp; Mon, 10 Dec 2018 09:37:05 -0800 (PST) X-Google-Smtp-Source: AFSGD/XEn8xhT1Jxiwybd8v3yTw0Tak9MNwiE/wMvPhapNdG+HlEPzWmwJNM0+peaDx4YlGYWIKM X-Received: by 2002:a62:ab0d:: with SMTP id p13mr13161271pff.211.1544463425173; Mon, 10 Dec 2018 09:37:05 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1544463425; cv=none; d=google.com; s=arc-20160816; b=chS7zKJ13lroYMfgLN1NbNShW2d6D6h/3E0To0BCKylBFijTWLIonyVavnt4LsXTZb 6z8g8pUY186MqnObQCRh9J0nsfnsBQjHUYzss+Jv3Zu1EMPNFZpedeuXl9xKLhb/bvUZ 7U1+DabKBzGMMzhv14RYupgVETJtE2Ajc/PqDkdHfIcgr4ezgaidn+Yd9ufZ1bNJMqzZ R6bBslal8JUqg3kwcOgfMQcBV7H39OitDk8DkLBy2v2FQ9af5tCjVNyQBEhN+J/7fLvb EI2CTyPcv7VNKq5yyTVD+x8eKfbUgSpEkHxc/7NI/UFVNKy2ztuPw0eb2r175f5oAW40 kEaA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=KIbCrv6kxd+jKuB+Z655EDqVYRNgXku8ohIbZgJ20mM=; b=UkG6xfw6MKveqSSnGCxSrcj8uJye9OOrRlO4Ifl7JXW+84+e68S9pD3Aqu+ropSrcx a9mMm7ZR8I+I6UrHbA6SToPvgZ7UKHBSy2vcSDldIlh65MdofLM//CnaHHmguq2JoRmJ 961Cjy3QY2lHZ4mF6jjWTcOXw02RbdJtS9TABheFpDBw3bjsg59P5FI+SIuL6mf68dRE GN1pUKFazu5WB9Tn2MNtXYjtN9OMlB5OCrFrZ/+67PRSMwdtrMSGjYr01Tq77cTCqqrc vyzJQErKuM20aAgZYn2f4hAX18NzSdP3lV6zChanet111V8Hlp9KwBeZSLdvt3av9dYS feoA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=ZRPxyo2z; spf=pass (google.com: best guess record for domain of linux-serial-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-serial-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id g184si11036001pfb.288.2018.12.10.09.37.04; Mon, 10 Dec 2018 09:37:05 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-serial-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=ZRPxyo2z; spf=pass (google.com: best guess record for domain of linux-serial-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-serial-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728302AbeLJRhE (ORCPT + 2 others); Mon, 10 Dec 2018 12:37:04 -0500 Received: from mail-pf1-f195.google.com ([209.85.210.195]:39060 "EHLO mail-pf1-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727225AbeLJRhE (ORCPT ); Mon, 10 Dec 2018 12:37:04 -0500 Received: by mail-pf1-f195.google.com with SMTP id c72so5728000pfc.6 for ; Mon, 10 Dec 2018 09:37:04 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=KIbCrv6kxd+jKuB+Z655EDqVYRNgXku8ohIbZgJ20mM=; b=ZRPxyo2zGSkOcBSGXrLTPsyinQ6P17sQYCJvUWjiXwmwT74RFHgz7X57daD7YmwgzX ZtexgVCNfkVxz82UizIMCUz/1zzmbIC9wGECCFVSwIvAPLwUKhjsFKbWqKkArHL6FgoI sYTSI6gLwi8oMawAa4OIfsFh/Jb24VFHbaxAE= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=KIbCrv6kxd+jKuB+Z655EDqVYRNgXku8ohIbZgJ20mM=; b=fIwxIM0ehtGy+4vjEPKoRLyuJyrk8OLFYr4uic/IFecQJD2nM7QAw2h9seX7hhoQrP +dHWPfQfNdHrXpOC4ZyNNfC5EVkPjaEQzqMW5KOBm0fUV0kV+d6yNUU7iJnE7q7yb5iV NMDdOJUWmujLb+mkrYYJczrIaxdBFc1z7TSS1tP9fowUuAdZx/TcBPN7vQS1lD8tYum+ aaHDJeKQofF7G2J99myMQzo0PVvQaXCmco7xpFXVloEla+GI+0VFj2jArruAW/jXx7on THGE6pSiCPLNTX1cdcr/G2C/eZvWlGJsfoXH2Lj4XscrMKgnWVLNwYaOcntrb+H6n29l zvUQ== X-Gm-Message-State: AA+aEWbGMS3VYRxq0ObSIZW1kpY/XEyRqgbjz17oJKfv/SExRleVpFEc fMzDKfg9wAQ78APiTCHqy/Tv X-Received: by 2002:a63:4b60:: with SMTP id k32mr11526285pgl.186.1544463423895; Mon, 10 Dec 2018 09:37:03 -0800 (PST) Received: from localhost.localdomain ([2409:4072:91e:2c01:40e1:a028:b090:9e12]) by smtp.gmail.com with ESMTPSA id q1sm15998396pfb.96.2018.12.10.09.36.55 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 10 Dec 2018 09:37:03 -0800 (PST) From: Manivannan Sadhasivam To: olof@lixom.net, arnd@arndb.de, robh+dt@kernel.org, tglx@linutronix.de, jason@lakedaemon.net, marc.zyngier@arm.com, daniel.lezcano@linaro.org, gregkh@linuxfoundation.org, jslaby@suse.com Cc: linux-unisoc@lists.infradead.org, afaerber@suse.de, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-serial@vger.kernel.org, amit.kucheria@linaro.org, linus.walleij@linaro.org, zhao_steven@263.net, Manivannan Sadhasivam Subject: [PATCH v4 07/15] ARM: dts: Add devicetree for OrangePi i96 board Date: Mon, 10 Dec 2018 23:05:42 +0530 Message-Id: <20181210173550.29643-8-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20181210173550.29643-1-manivannan.sadhasivam@linaro.org> References: <20181210173550.29643-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 Sender: linux-serial-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-serial@vger.kernel.org Add initial devicetree for Orange Pi i96 board from Xunlong. It is one of the 96Boards IoT Edition board. Signed-off-by: Andreas Färber Signed-off-by: Manivannan Sadhasivam --- arch/arm/boot/dts/Makefile | 3 +- arch/arm/boot/dts/rda8810pl-orangepi-i96.dts | 50 ++++++++++++++++++++ 2 files changed, 52 insertions(+), 1 deletion(-) create mode 100644 arch/arm/boot/dts/rda8810pl-orangepi-i96.dts -- 2.17.1 diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index a0fdad8f10dd..cfb08ea33872 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -807,7 +807,8 @@ dtb-$(CONFIG_ARCH_QCOM) += \ qcom-msm8974-sony-xperia-honami.dtb \ qcom-mdm9615-wp8548-mangoh-green.dtb dtb-$(CONFIG_ARCH_RDA) += \ - rda8810pl-orangepi-2g-iot.dtb + rda8810pl-orangepi-2g-iot.dtb \ + rda8810pl-orangepi-i96.dtb dtb-$(CONFIG_ARCH_REALVIEW) += \ arm-realview-pb1176.dtb \ arm-realview-pb11mp.dtb \ diff --git a/arch/arm/boot/dts/rda8810pl-orangepi-i96.dts b/arch/arm/boot/dts/rda8810pl-orangepi-i96.dts new file mode 100644 index 000000000000..728f76931b99 --- /dev/null +++ b/arch/arm/boot/dts/rda8810pl-orangepi-i96.dts @@ -0,0 +1,50 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2017 Andreas Färber + * Copyright (c) 2018 Manivannan Sadhasivam + */ + +/dts-v1/; + +#include "rda8810pl.dtsi" + +/ { + compatible = "xunlong,orangepi-i96", "rda,8810pl"; + model = "Orange Pi i96"; + + aliases { + serial0 = &uart2; + serial1 = &uart1; + serial2 = &uart3; + }; + + chosen { + stdout-path = "serial2:921600n8"; + }; + + memory@80000000 { + device_type = "memory"; + reg = <0x80000000 0x10000000>; + }; + + uart_clk: uart-clk { + compatible = "fixed-clock"; + clock-frequency = <921600>; + #clock-cells = <0>; + }; +}; + +&uart1 { + status = "okay"; + clocks = <&uart_clk>; +}; + +&uart2 { + status = "okay"; + clocks = <&uart_clk>; +}; + +&uart3 { + status = "okay"; + clocks = <&uart_clk>; +}; From patchwork Mon Dec 10 17:35:45 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 153325 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp3820362ljp; Mon, 10 Dec 2018 09:37:31 -0800 (PST) X-Google-Smtp-Source: AFSGD/Wy9rBlkiHX1C/Dxvv8B45tnLXnmsY1RR4yHNN+fe3w73ht246urFyltJl2q+TKjAF3IXDW X-Received: by 2002:a62:4e49:: with SMTP id c70mr13004859pfb.167.1544463451431; Mon, 10 Dec 2018 09:37:31 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1544463451; cv=none; d=google.com; s=arc-20160816; b=s5bB7tdtfyErCpyj5r5/lQEEdkavOD6BPAQi0XWpemBOPvYqxiToSRtl3wNIuwv67h 92rHMvvZ4fgizzfifFgz72xj/jBtYX/qlIdasg+AmSugRslKHyRyDy0/TKf+OBGBRKA4 ff4dM79ID+4rCWu/zb2qcO2mniL2UJJuNdEtKCOQae5COs+bVccc8op4Y+14rakjK8J0 BvMC0StZvRxSmLAnAAxJ1Prx29vmrdXMuOWqIFXvAeMhSeIQ9yUjTN/KLGzo/meEMd/v TmuUygzBBx43OPQO/NXgOpeF+T6z7cqYb/th/F9Rfq0FR5ava9wnibGPRrWIAuHeACxG +BBg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=M9evsXiKq/f6/hJaxP4dc1I6TBIm55n2snnXtgBmQsE=; b=lDqqLGT8gxgCMZyV1eR2kQtocJJ4tGuhUYioJvsw1hfOL4JcDLey4jKhRexU9T6ViD JFhI6qVnL+8rLn0jHBhzAGD9OM5aD1U9kEarUwMnuZsP+6CMNFlIEuPeFBhi+5XyGCm9 9yY0sDbRZzpfzzZYFPmVek6rv1pqk12lKzUMGteGyMGW4OZXvgWOkk6sHSk6l32Qzk0X ZpnD9+UnVHyrkS4dgWdckNBbl0fT336WWTZsoPciOgifHkGICJW45jNFIq3lECoi7S3x Sde2iH8G/gcq2r5dspinn+/MT1WR8wV7IKxSdEAz8j1y0x47ukEKdVWbDXfcliyzE1yb tSUA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=aiFQWEIj; spf=pass (google.com: best guess record for domain of linux-serial-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-serial-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id a24si9938439pgd.248.2018.12.10.09.37.31; Mon, 10 Dec 2018 09:37:31 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-serial-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=aiFQWEIj; spf=pass (google.com: best guess record for domain of linux-serial-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-serial-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727434AbeLJRha (ORCPT + 2 others); Mon, 10 Dec 2018 12:37:30 -0500 Received: from mail-pf1-f194.google.com ([209.85.210.194]:39094 "EHLO mail-pf1-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726982AbeLJRha (ORCPT ); Mon, 10 Dec 2018 12:37:30 -0500 Received: by mail-pf1-f194.google.com with SMTP id c72so5728555pfc.6 for ; Mon, 10 Dec 2018 09:37:29 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=M9evsXiKq/f6/hJaxP4dc1I6TBIm55n2snnXtgBmQsE=; b=aiFQWEIjTJqW5cD7Yifwd/cRFPWpT7tiaTUq+kaUIWFy0HwQMtOX3GpS2TY6QncD83 xIyp2/KlBjj2fU2RhRTaDkGyXH8y2luxRHobxBqsFr94fCG5abwR0KIzT6MfTa6dCUF4 8qL0zmJxxdTS2bElMGhenfLNz1A8igc9c2RFc= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=M9evsXiKq/f6/hJaxP4dc1I6TBIm55n2snnXtgBmQsE=; b=CHg78aTpzGCwIHdEbwEpP7VgYPBGw277b/zlATVdxja4yXyiFVACTDLK7/sYLt5y5U SRC56sXS8xqGBMUXdWHBn0gBuN2HSthk9Ar/gHCQxzhF8XrrWHw2oN5A0AhAVW+oOihP NeufHxoWpwMcgdfJVtdqfvCpY8XuI580hW1G9HhtSMzx0g0dagFqP3UqI81Vy1aGQZu/ XwPoHeA8W4mfDiQaXEduhNF4QTif5ebWBr4BAn5jTLKu71qVUzdu1lsXNHsCHpyTS038 pSgb3vkmeLKOL88N6FGm3RXyERVEgI6r80hHBCq4I2ZdB8bojl6ONuQbKNanGUC5qMGR /bmA== X-Gm-Message-State: AA+aEWYea+YO9a+TpZ35fOIq7vbctCp6zcsLsatdVqaEooOemxB/0aN9 gMXUmztSYQ2z4hnyd20E8Sdg X-Received: by 2002:a62:f907:: with SMTP id o7mr12906043pfh.244.1544463449240; Mon, 10 Dec 2018 09:37:29 -0800 (PST) Received: from localhost.localdomain ([2409:4072:91e:2c01:40e1:a028:b090:9e12]) by smtp.gmail.com with ESMTPSA id q1sm15998396pfb.96.2018.12.10.09.37.21 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 10 Dec 2018 09:37:28 -0800 (PST) From: Manivannan Sadhasivam To: olof@lixom.net, arnd@arndb.de, robh+dt@kernel.org, tglx@linutronix.de, jason@lakedaemon.net, marc.zyngier@arm.com, daniel.lezcano@linaro.org, gregkh@linuxfoundation.org, jslaby@suse.com Cc: linux-unisoc@lists.infradead.org, afaerber@suse.de, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-serial@vger.kernel.org, amit.kucheria@linaro.org, linus.walleij@linaro.org, zhao_steven@263.net, Manivannan Sadhasivam Subject: [PATCH v4 10/15] ARM: dts: rda8810pl: Add timer support Date: Mon, 10 Dec 2018 23:05:45 +0530 Message-Id: <20181210173550.29643-11-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20181210173550.29643-1-manivannan.sadhasivam@linaro.org> References: <20181210173550.29643-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 Sender: linux-serial-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-serial@vger.kernel.org Add timer support for RDA Micro RDA8810PL SoC. Signed-off-by: Andreas Färber Signed-off-by: Manivannan Sadhasivam --- arch/arm/boot/dts/rda8810pl.dtsi | 10 ++++++++++ 1 file changed, 10 insertions(+) -- 2.17.1 diff --git a/arch/arm/boot/dts/rda8810pl.dtsi b/arch/arm/boot/dts/rda8810pl.dtsi index 15547b138977..84baa4c0a14c 100644 --- a/arch/arm/boot/dts/rda8810pl.dtsi +++ b/arch/arm/boot/dts/rda8810pl.dtsi @@ -6,6 +6,8 @@ * Copyright (c) 2018 Manivannan Sadhasivam */ +#include + / { compatible = "rda,8810pl"; interrupt-parent = <&intc>; @@ -50,6 +52,14 @@ #address-cells = <1>; #size-cells = <1>; ranges = <0x0 0x20900000 0x100000>; + + timer@10000 { + compatible = "rda,8810pl-timer"; + reg = <0x10000 0x1000>; + interrupts = <16 IRQ_TYPE_LEVEL_HIGH>, + <17 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "hwtimer", "ostimer"; + }; }; apb@20a00000 { From patchwork Mon Dec 10 17:35:47 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 153327 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp3820636ljp; Mon, 10 Dec 2018 09:37:50 -0800 (PST) X-Google-Smtp-Source: AFSGD/XYv9g7JBBL1U5w2W5BmZHNA2nlQ2RbwM7El19mMYafxngcXG1l5pIpL2ZdFay06QCgbG4K X-Received: by 2002:a63:4d66:: with SMTP id n38mr11662892pgl.270.1544463470041; Mon, 10 Dec 2018 09:37:50 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1544463470; cv=none; d=google.com; s=arc-20160816; b=ePpyHJ8OeB2HaOKZL4rcdKd8qLg56C5fB5kKHw+oTZEIJ4MCRZGtj4zsPlr+v7Hg9U ZNtn5JTX6677uittoi7ET2FNqgjDUFaA3thk2f8OVtzXXrbJ0u46NbHzWEO7EfZvHbN2 y5OfvYR93Zl0rO+lG9e7XO/ZOlOxm1X4nZWYqkMRIqRUHLAqwVyqHX3syN2f1bCJm9Cy v9t1qiL8vXXwDBKY7SjlgR9StY5lhhSOv0+H4evUafnRNY+i+mGytCQTacidiolnkX5s VD9xoRJ7Wf3F+hIK3UGK9j7Ae7S1cw8sNUQbprVM4vH/ZL8iJ7kYB35Fiz//8HURl78M xbhA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=p8+PRll/69hpVBI8tPhWaAoQEyS3IrjnhvvEZdMVHBc=; b=DMBdF/c9lalx5Z/0BnXp7UJy83NMvhV81xAMcDs8H3ZOaQ8Eg2LLRLOpoumENotP5G TIlrz3ekZSQIUD8K/0nEYa1wOePy2mmycPvRb6hzIv13wv5V4QM3CAqQ7wHBgiSi/LFG UFsU9IOUUOBJMimm+ACf7pIeBrN31+cTh6X/Xl/G/+AVoTL/iggwg3GKurBvcyWRLyTs 49+Hxj+wnT/+AKN7w9uzpucJVyZuffpXmoGPYzkP+H9zFlu5OryN+SDw+hDK3+jBHkuR KecQQjRz6U8px7Fq/iB3G09mjtNHqyn/6YopEVXbXzZHpDTYd5h7shnjogACrfE1qoQv R5jw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=AGlkSDyV; spf=pass (google.com: best guess record for domain of linux-serial-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-serial-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id u6si11977171pfb.92.2018.12.10.09.37.49; Mon, 10 Dec 2018 09:37:50 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-serial-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=AGlkSDyV; spf=pass (google.com: best guess record for domain of linux-serial-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-serial-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728690AbeLJRht (ORCPT + 2 others); Mon, 10 Dec 2018 12:37:49 -0500 Received: from mail-pl1-f195.google.com ([209.85.214.195]:40494 "EHLO mail-pl1-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727330AbeLJRht (ORCPT ); Mon, 10 Dec 2018 12:37:49 -0500 Received: by mail-pl1-f195.google.com with SMTP id u18so5559515plq.7 for ; Mon, 10 Dec 2018 09:37:48 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=p8+PRll/69hpVBI8tPhWaAoQEyS3IrjnhvvEZdMVHBc=; b=AGlkSDyV4ns2334v1ZYiu7kNpDVrFQ/E4gZNcudTBLEdt/j5qpg80n1QN50gmZCoGT 6Mhrh3Idbbo8Ejsd0j0YaZPbv/mrJNZEITnTtH4I41xIWXdrs9vTs1J2IvlX/msycokX QzVrI3Tq0JI1wEiLhRDaju+cvhKGOHzEC/1kg= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=p8+PRll/69hpVBI8tPhWaAoQEyS3IrjnhvvEZdMVHBc=; b=mPA40rJph4wSUEAyDAGpIy5SdopFIfnKNMW4KxUbtjYo5dUdkmlMgqfGtrRhwe/LL2 vHc1KscCmHEGCmq3ICLn+Ih33vGYs6L8HxUhmt4Ef2I8tvc9uVxqoB8h/oKVxIvz2ICZ ELqQTMlln6e+tiJmSEgoJJVF+6JrCsFHM/NGf3cTXLLZmuV4jZEXmROKB6sRJg4iwloC VCUW/hlZsbQTie+6xEgAedKJ2MfFDIja9d0G1yq6AHay0nPQgWxnCCcwGbHJbmGWlZTb OnCIvbpYkucfFj8M+uMMPAygLaj4ufHcC7BDqSuUPithLt7r3wks8SdWcsc+c3zt1MIm /UzA== X-Gm-Message-State: AA+aEWYe5WOILg6lcrV/nGe4imPf2PxzkpoT6W7+R7p3VBJV0zDEsW8e +Sbti6ViA7y77pAT4vduOVvE X-Received: by 2002:a17:902:bf44:: with SMTP id u4mr12940556pls.5.1544463468534; Mon, 10 Dec 2018 09:37:48 -0800 (PST) Received: from localhost.localdomain ([2409:4072:91e:2c01:40e1:a028:b090:9e12]) by smtp.gmail.com with ESMTPSA id q1sm15998396pfb.96.2018.12.10.09.37.39 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 10 Dec 2018 09:37:47 -0800 (PST) From: Manivannan Sadhasivam To: olof@lixom.net, arnd@arndb.de, robh+dt@kernel.org, tglx@linutronix.de, jason@lakedaemon.net, marc.zyngier@arm.com, daniel.lezcano@linaro.org, gregkh@linuxfoundation.org, jslaby@suse.com Cc: linux-unisoc@lists.infradead.org, afaerber@suse.de, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-serial@vger.kernel.org, amit.kucheria@linaro.org, linus.walleij@linaro.org, zhao_steven@263.net, Manivannan Sadhasivam Subject: [PATCH v4 12/15] dt-bindings: serial: Document RDA Micro UART Date: Mon, 10 Dec 2018 23:05:47 +0530 Message-Id: <20181210173550.29643-13-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20181210173550.29643-1-manivannan.sadhasivam@linaro.org> References: <20181210173550.29643-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 Sender: linux-serial-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-serial@vger.kernel.org From: Andreas Färber Add an initial binding for the UART in RDA Micro RDA8810PL SoC. Signed-off-by: Andreas Färber Signed-off-by: Manivannan Sadhasivam --- .../bindings/serial/rda,8810pl-uart.txt | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) create mode 100644 Documentation/devicetree/bindings/serial/rda,8810pl-uart.txt -- 2.17.1 Reviewed-by: Rob Herring diff --git a/Documentation/devicetree/bindings/serial/rda,8810pl-uart.txt b/Documentation/devicetree/bindings/serial/rda,8810pl-uart.txt new file mode 100644 index 000000000000..a08df97a69e6 --- /dev/null +++ b/Documentation/devicetree/bindings/serial/rda,8810pl-uart.txt @@ -0,0 +1,17 @@ +RDA Micro UART + +Required properties: +- compatible : "rda,8810pl-uart" for RDA8810PL SoCs. +- reg : Offset and length of the register set for the device. +- interrupts : Should contain UART interrupt. +- clocks : Phandle to the input clock. + + +Example: + + uart2: serial@20a90000 { + compatible = "rda,8810pl-uart"; + reg = <0x20a90000 0x1000>; + interrupts = <11 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&uart_clk>; + }; From patchwork Mon Dec 10 17:35:49 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 153330 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp3820905ljp; Mon, 10 Dec 2018 09:38:09 -0800 (PST) X-Google-Smtp-Source: AFSGD/UrkU98oYo3IIL4l626Ikdf+AwJ26skoUQ1ux8CouI0BNZmQErheU/TQGD+AqVj+wnCZ0rB X-Received: by 2002:a62:5793:: with SMTP id i19mr13309310pfj.49.1544463488928; Mon, 10 Dec 2018 09:38:08 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1544463488; cv=none; d=google.com; s=arc-20160816; b=HBro6qnwzVpZYP2SRbsL0ZY2sCPxpegr2mFIZ6YmRS+ZEVJKfRRRX95mPPnCCcglfR ALlnIqlU9Cw21NxZ5mDH5OyyEdesIL6VN39gqJh2XQTs/EJZxvhWH3swR4TNwLAvQRxr wii4TIuYQvbkFoIg35oNkpjy5z06Q6qIdutIAAZc3uKuHrNH9tpIrYnld6pcX/2RDegl uxhpol4kkR6xU0Nri6iu5bSFtUaTttZopnVuA3Z5GWRfORul0DRx09+IW5RSXjssMTlc 5i6FWfjg6QbIcJ8EA/kneKzSv1wnj/ia7f+8UDNmaUZnxJrsm3veeXnnu/L/LwDFu6+z NAOA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=bpa0I/YhnzBcdzs3JkVMyNimUM8qKGedLIepD8045n0=; b=XfBs2KUmWxrygdor09QMtX5qlIeyqTIvn3TsXgD5BYLnc5y4HpKI+8DK6NsHftP9NI yvlF9/GwlpUzgIwp2wHbPh7fQ2ApUj4oMk+mdjOsd9IoBJXqVHI4EJPUMqFd3CJrKwcG FRyI8XrCMuK+aoL5q4HZUWfK9Vq4rpJlr6RMOSQ7jx2Y8zwfSixsaRlUJUD37GPoD1X1 jYBxaXUfCbO6o0TWlEBbjw0L0pVqBoTqYjvrfx3PEBVh17EkpPvdNK60sef5pYTVpvxo TK91kbo/CFQh6xyR+0Ndink3ouqHqLF9wjM7cYJPk/IY5sSIE+CQYzwrw4Moex+AQgRd j0ig== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=CKLGL2w9; spf=pass (google.com: best guess record for domain of linux-serial-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-serial-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id e33si10736997pld.397.2018.12.10.09.38.08; Mon, 10 Dec 2018 09:38:08 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-serial-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=CKLGL2w9; spf=pass (google.com: best guess record for domain of linux-serial-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-serial-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728789AbeLJRiI (ORCPT + 2 others); Mon, 10 Dec 2018 12:38:08 -0500 Received: from mail-pl1-f195.google.com ([209.85.214.195]:38769 "EHLO mail-pl1-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727038AbeLJRiI (ORCPT ); Mon, 10 Dec 2018 12:38:08 -0500 Received: by mail-pl1-f195.google.com with SMTP id e5so5574265plb.5 for ; Mon, 10 Dec 2018 09:38:07 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=bpa0I/YhnzBcdzs3JkVMyNimUM8qKGedLIepD8045n0=; b=CKLGL2w9gwm4Fkl6sSL/WHiQIkx1ihr1zir2OENCgV+afRMaZGKac41oc+MWtOL4sS k/lF1sgRO+0B6i5b0hxy91mh5x6jWcJ+nDNdZa635vrT9Q/xTHoaSy6EJrZYtgwu8wV6 KaM+PP5Ls3r67qPIfBWqIAH1oqPYK508SbTVs= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=bpa0I/YhnzBcdzs3JkVMyNimUM8qKGedLIepD8045n0=; b=WgXzoLdfDiY2PukpXVUZRJ/cvPFXiSK9cNIAKXGnDxoSc/mHRtOEDQ/YF24MNfIh+N uqWj4leDzcFIRzAN03w7TiGl769YPPR6o53NukNX+2Se7NGliC1JiYXiDduZRtjsGPNr mpQQBgZlr6C1XXNGoJixenRe315ZvkB6N01yXUt6NP8ACdPuVhqYql5VyEJF4yA+edGn 19RARe06FpoCoGBQXsuF2LRdZuIU+ChhrUThWnK6xJcZDOTpkt8XTjNqMhlzgMPsTCCX 1XeOsNgnI9FtlqrS9Roklrd9RzJCABYwpiLtDR3XXfJeWFzOyGzwvLB7ZzB6TRo7Au0O RoZA== X-Gm-Message-State: AA+aEWY7xP70Qhziyi3I2y3hcIrY0BISURlWfZzpYsVfXEMzL0JfuRxm jmj0YLTq2VUbnAyHgDaANPeU X-Received: by 2002:a17:902:298a:: with SMTP id h10mr13056513plb.312.1544463486628; Mon, 10 Dec 2018 09:38:06 -0800 (PST) Received: from localhost.localdomain ([2409:4072:91e:2c01:40e1:a028:b090:9e12]) by smtp.gmail.com with ESMTPSA id q1sm15998396pfb.96.2018.12.10.09.37.58 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 10 Dec 2018 09:38:05 -0800 (PST) From: Manivannan Sadhasivam To: olof@lixom.net, arnd@arndb.de, robh+dt@kernel.org, tglx@linutronix.de, jason@lakedaemon.net, marc.zyngier@arm.com, daniel.lezcano@linaro.org, gregkh@linuxfoundation.org, jslaby@suse.com Cc: linux-unisoc@lists.infradead.org, afaerber@suse.de, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-serial@vger.kernel.org, amit.kucheria@linaro.org, linus.walleij@linaro.org, zhao_steven@263.net, Manivannan Sadhasivam Subject: [PATCH v4 14/15] tty: serial: Add RDA8810PL UART driver Date: Mon, 10 Dec 2018 23:05:49 +0530 Message-Id: <20181210173550.29643-15-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20181210173550.29643-1-manivannan.sadhasivam@linaro.org> References: <20181210173550.29643-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 Sender: linux-serial-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-serial@vger.kernel.org Add UART driver for RDA Micro RDA8810PL SoC. Signed-off-by: Andreas Färber Signed-off-by: Manivannan Sadhasivam Reviewed-by: Greg Kroah-Hartman --- .../admin-guide/kernel-parameters.txt | 6 + drivers/tty/serial/Kconfig | 19 + drivers/tty/serial/Makefile | 1 + drivers/tty/serial/rda-uart.c | 831 ++++++++++++++++++ include/uapi/linux/serial_core.h | 3 + 5 files changed, 860 insertions(+) create mode 100644 drivers/tty/serial/rda-uart.c -- 2.17.1 diff --git a/Documentation/admin-guide/kernel-parameters.txt b/Documentation/admin-guide/kernel-parameters.txt index 81d1d5a74728..07078880f7fd 100644 --- a/Documentation/admin-guide/kernel-parameters.txt +++ b/Documentation/admin-guide/kernel-parameters.txt @@ -1020,6 +1020,12 @@ specified address. The serial port must already be setup and configured. Options are not yet supported. + rda, + Start an early, polled-mode console on a serial port + of an RDA Micro SoC, such as RDA8810PL, at the + specified address. The serial port must already be + setup and configured. Options are not yet supported. + smh Use ARM semihosting calls for early console. s3c2410, diff --git a/drivers/tty/serial/Kconfig b/drivers/tty/serial/Kconfig index 32886c304641..67b9bf3b500e 100644 --- a/drivers/tty/serial/Kconfig +++ b/drivers/tty/serial/Kconfig @@ -1529,6 +1529,25 @@ config SERIAL_OWL_CONSOLE Say 'Y' here if you wish to use Actions Semiconductor S500/S900 UART as the system console. +config SERIAL_RDA + bool "RDA Micro serial port support" + depends on ARCH_RDA || COMPILE_TEST + select SERIAL_CORE + help + This driver is for RDA8810PL SoC's UART. + Say 'Y' here if you wish to use the on-board serial port. + Otherwise, say 'N'. + +config SERIAL_RDA_CONSOLE + bool "Console on RDA Micro serial port" + depends on SERIAL_RDA=y + select SERIAL_CORE_CONSOLE + select SERIAL_EARLYCON + default y + help + Say 'Y' here if you wish to use the RDA8810PL UART as the system + console. Only earlycon is implemented currently. + endmenu config SERIAL_MCTRL_GPIO diff --git a/drivers/tty/serial/Makefile b/drivers/tty/serial/Makefile index daac675612df..8c303736b7e8 100644 --- a/drivers/tty/serial/Makefile +++ b/drivers/tty/serial/Makefile @@ -89,6 +89,7 @@ obj-$(CONFIG_SERIAL_MVEBU_UART) += mvebu-uart.o obj-$(CONFIG_SERIAL_PIC32) += pic32_uart.o obj-$(CONFIG_SERIAL_MPS2_UART) += mps2-uart.o obj-$(CONFIG_SERIAL_OWL) += owl-uart.o +obj-$(CONFIG_SERIAL_RDA) += rda-uart.o # GPIOLIB helpers for modem control lines obj-$(CONFIG_SERIAL_MCTRL_GPIO) += serial_mctrl_gpio.o diff --git a/drivers/tty/serial/rda-uart.c b/drivers/tty/serial/rda-uart.c new file mode 100644 index 000000000000..284623eefaeb --- /dev/null +++ b/drivers/tty/serial/rda-uart.c @@ -0,0 +1,831 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * RDA8810PL serial device driver + * + * Copyright RDA Microelectronics Company Limited + * Copyright (c) 2017 Andreas Färber + * Copyright (c) 2018 Manivannan Sadhasivam + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define RDA_UART_PORT_NUM 3 +#define RDA_UART_DEV_NAME "ttyRDA" + +#define RDA_UART_CTRL 0x00 +#define RDA_UART_STATUS 0x04 +#define RDA_UART_RXTX_BUFFER 0x08 +#define RDA_UART_IRQ_MASK 0x0c +#define RDA_UART_IRQ_CAUSE 0x10 +#define RDA_UART_IRQ_TRIGGERS 0x14 +#define RDA_UART_CMD_SET 0x18 +#define RDA_UART_CMD_CLR 0x1c + +/* UART_CTRL Bits */ +#define RDA_UART_ENABLE BIT(0) +#define RDA_UART_DBITS_8 BIT(1) +#define RDA_UART_TX_SBITS_2 BIT(2) +#define RDA_UART_PARITY_EN BIT(3) +#define RDA_UART_PARITY(x) (((x) & 0x3) << 4) +#define RDA_UART_PARITY_ODD RDA_UART_PARITY(0) +#define RDA_UART_PARITY_EVEN RDA_UART_PARITY(1) +#define RDA_UART_PARITY_SPACE RDA_UART_PARITY(2) +#define RDA_UART_PARITY_MARK RDA_UART_PARITY(3) +#define RDA_UART_DIV_MODE BIT(20) +#define RDA_UART_IRDA_EN BIT(21) +#define RDA_UART_DMA_EN BIT(22) +#define RDA_UART_FLOW_CNT_EN BIT(23) +#define RDA_UART_LOOP_BACK_EN BIT(24) +#define RDA_UART_RX_LOCK_ERR BIT(25) +#define RDA_UART_RX_BREAK_LEN(x) (((x) & 0xf) << 28) + +/* UART_STATUS Bits */ +#define RDA_UART_RX_FIFO(x) (((x) & 0x7f) << 0) +#define RDA_UART_RX_FIFO_MASK (0x7f << 0) +#define RDA_UART_TX_FIFO(x) (((x) & 0x1f) << 8) +#define RDA_UART_TX_FIFO_MASK (0x1f << 8) +#define RDA_UART_TX_ACTIVE BIT(14) +#define RDA_UART_RX_ACTIVE BIT(15) +#define RDA_UART_RX_OVERFLOW_ERR BIT(16) +#define RDA_UART_TX_OVERFLOW_ERR BIT(17) +#define RDA_UART_RX_PARITY_ERR BIT(18) +#define RDA_UART_RX_FRAMING_ERR BIT(19) +#define RDA_UART_RX_BREAK_INT BIT(20) +#define RDA_UART_DCTS BIT(24) +#define RDA_UART_CTS BIT(25) +#define RDA_UART_DTR BIT(28) +#define RDA_UART_CLK_ENABLED BIT(31) + +/* UART_RXTX_BUFFER Bits */ +#define RDA_UART_RX_DATA(x) (((x) & 0xff) << 0) +#define RDA_UART_TX_DATA(x) (((x) & 0xff) << 0) + +/* UART_IRQ_MASK Bits */ +#define RDA_UART_TX_MODEM_STATUS BIT(0) +#define RDA_UART_RX_DATA_AVAILABLE BIT(1) +#define RDA_UART_TX_DATA_NEEDED BIT(2) +#define RDA_UART_RX_TIMEOUT BIT(3) +#define RDA_UART_RX_LINE_ERR BIT(4) +#define RDA_UART_TX_DMA_DONE BIT(5) +#define RDA_UART_RX_DMA_DONE BIT(6) +#define RDA_UART_RX_DMA_TIMEOUT BIT(7) +#define RDA_UART_DTR_RISE BIT(8) +#define RDA_UART_DTR_FALL BIT(9) + +/* UART_IRQ_CAUSE Bits */ +#define RDA_UART_TX_MODEM_STATUS_U BIT(16) +#define RDA_UART_RX_DATA_AVAILABLE_U BIT(17) +#define RDA_UART_TX_DATA_NEEDED_U BIT(18) +#define RDA_UART_RX_TIMEOUT_U BIT(19) +#define RDA_UART_RX_LINE_ERR_U BIT(20) +#define RDA_UART_TX_DMA_DONE_U BIT(21) +#define RDA_UART_RX_DMA_DONE_U BIT(22) +#define RDA_UART_RX_DMA_TIMEOUT_U BIT(23) +#define RDA_UART_DTR_RISE_U BIT(24) +#define RDA_UART_DTR_FALL_U BIT(25) + +/* UART_TRIGGERS Bits */ +#define RDA_UART_RX_TRIGGER(x) (((x) & 0x1f) << 0) +#define RDA_UART_TX_TRIGGER(x) (((x) & 0xf) << 8) +#define RDA_UART_AFC_LEVEL(x) (((x) & 0x1f) << 16) + +/* UART_CMD_SET Bits */ +#define RDA_UART_RI BIT(0) +#define RDA_UART_DCD BIT(1) +#define RDA_UART_DSR BIT(2) +#define RDA_UART_TX_BREAK_CONTROL BIT(3) +#define RDA_UART_TX_FINISH_N_WAIT BIT(4) +#define RDA_UART_RTS BIT(5) +#define RDA_UART_RX_FIFO_RESET BIT(6) +#define RDA_UART_TX_FIFO_RESET BIT(7) + +#define RDA_UART_TX_FIFO_SIZE 16 + +static struct uart_driver rda_uart_driver; + +struct rda_uart_port { + struct uart_port port; + struct clk *clk; +}; + +#define to_rda_uart_port(port) container_of(port, struct rda_uart_port, port) + +static struct rda_uart_port *rda_uart_ports[RDA_UART_PORT_NUM]; + +static inline void rda_uart_write(struct uart_port *port, u32 val, + unsigned int off) +{ + writel(val, port->membase + off); +} + +static inline u32 rda_uart_read(struct uart_port *port, unsigned int off) +{ + return readl(port->membase + off); +} + +static unsigned int rda_uart_tx_empty(struct uart_port *port) +{ + unsigned long flags; + unsigned int ret; + u32 val; + + spin_lock_irqsave(&port->lock, flags); + + val = rda_uart_read(port, RDA_UART_STATUS); + ret = (val & RDA_UART_TX_FIFO_MASK) ? TIOCSER_TEMT : 0; + + spin_unlock_irqrestore(&port->lock, flags); + + return ret; +} + +static unsigned int rda_uart_get_mctrl(struct uart_port *port) +{ + unsigned int mctrl = 0; + u32 cmd_set, status; + + cmd_set = rda_uart_read(port, RDA_UART_CMD_SET); + status = rda_uart_read(port, RDA_UART_STATUS); + if (cmd_set & RDA_UART_RTS) + mctrl |= TIOCM_RTS; + if (!(status & RDA_UART_CTS)) + mctrl |= TIOCM_CTS; + + return mctrl; +} + +static void rda_uart_set_mctrl(struct uart_port *port, unsigned int mctrl) +{ + u32 val; + + if (mctrl & TIOCM_RTS) { + val = rda_uart_read(port, RDA_UART_CMD_SET); + rda_uart_write(port, (val | RDA_UART_RTS), RDA_UART_CMD_SET); + } else { + /* Clear RTS to stop to receive. */ + val = rda_uart_read(port, RDA_UART_CMD_CLR); + rda_uart_write(port, (val | RDA_UART_RTS), RDA_UART_CMD_CLR); + } + + val = rda_uart_read(port, RDA_UART_CTRL); + + if (mctrl & TIOCM_LOOP) + val |= RDA_UART_LOOP_BACK_EN; + else + val &= ~RDA_UART_LOOP_BACK_EN; + + rda_uart_write(port, val, RDA_UART_CTRL); +} + +static void rda_uart_stop_tx(struct uart_port *port) +{ + u32 val; + + val = rda_uart_read(port, RDA_UART_IRQ_MASK); + val &= ~RDA_UART_TX_DATA_NEEDED; + rda_uart_write(port, val, RDA_UART_IRQ_MASK); + + val = rda_uart_read(port, RDA_UART_CMD_SET); + val |= RDA_UART_TX_FIFO_RESET; + rda_uart_write(port, val, RDA_UART_CMD_SET); +} + +static void rda_uart_stop_rx(struct uart_port *port) +{ + u32 val; + + val = rda_uart_read(port, RDA_UART_IRQ_MASK); + val &= ~(RDA_UART_RX_DATA_AVAILABLE | RDA_UART_RX_TIMEOUT); + rda_uart_write(port, val, RDA_UART_IRQ_MASK); + + /* Read Rx buffer before reset to avoid Rx timeout interrupt */ + val = rda_uart_read(port, RDA_UART_RXTX_BUFFER); + + val = rda_uart_read(port, RDA_UART_CMD_SET); + val |= RDA_UART_RX_FIFO_RESET; + rda_uart_write(port, val, RDA_UART_CMD_SET); +} + +static void rda_uart_start_tx(struct uart_port *port) +{ + u32 val; + + if (uart_tx_stopped(port)) { + rda_uart_stop_tx(port); + return; + } + + val = rda_uart_read(port, RDA_UART_IRQ_MASK); + val |= RDA_UART_TX_DATA_NEEDED; + rda_uart_write(port, val, RDA_UART_IRQ_MASK); +} + +static void rda_uart_change_baudrate(struct rda_uart_port *rda_port, + unsigned long baud) +{ + clk_set_rate(rda_port->clk, baud * 8); +} + +static void rda_uart_set_termios(struct uart_port *port, + struct ktermios *termios, + struct ktermios *old) +{ + struct rda_uart_port *rda_port = to_rda_uart_port(port); + unsigned long flags; + unsigned int ctrl, cmd_set, cmd_clr, triggers; + unsigned int baud; + u32 irq_mask; + + spin_lock_irqsave(&port->lock, flags); + + baud = uart_get_baud_rate(port, termios, old, 9600, port->uartclk / 4); + rda_uart_change_baudrate(rda_port, baud); + + ctrl = rda_uart_read(port, RDA_UART_CTRL); + cmd_set = rda_uart_read(port, RDA_UART_CMD_SET); + cmd_clr = rda_uart_read(port, RDA_UART_CMD_CLR); + + switch (termios->c_cflag & CSIZE) { + case CS5: + case CS6: + dev_warn(port->dev, "bit size not supported, using 7 bits\n"); + /* Fall through */ + case CS7: + ctrl &= ~RDA_UART_DBITS_8; + break; + default: + ctrl |= RDA_UART_DBITS_8; + break; + } + + /* stop bits */ + if (termios->c_cflag & CSTOPB) + ctrl |= RDA_UART_TX_SBITS_2; + else + ctrl &= ~RDA_UART_TX_SBITS_2; + + /* parity check */ + if (termios->c_cflag & PARENB) { + ctrl |= RDA_UART_PARITY_EN; + + /* Mark or Space parity */ + if (termios->c_cflag & CMSPAR) { + if (termios->c_cflag & PARODD) + ctrl |= RDA_UART_PARITY_MARK; + else + ctrl |= RDA_UART_PARITY_SPACE; + } else if (termios->c_cflag & PARODD) { + ctrl |= RDA_UART_PARITY_ODD; + } else { + ctrl |= RDA_UART_PARITY_EVEN; + } + } else { + ctrl &= ~RDA_UART_PARITY_EN; + } + + /* Hardware handshake (RTS/CTS) */ + if (termios->c_cflag & CRTSCTS) { + ctrl |= RDA_UART_FLOW_CNT_EN; + cmd_set |= RDA_UART_RTS; + } else { + ctrl &= ~RDA_UART_FLOW_CNT_EN; + cmd_clr |= RDA_UART_RTS; + } + + ctrl |= RDA_UART_ENABLE; + ctrl &= ~RDA_UART_DMA_EN; + + triggers = (RDA_UART_AFC_LEVEL(20) | RDA_UART_RX_TRIGGER(16)); + irq_mask = rda_uart_read(port, RDA_UART_IRQ_MASK); + rda_uart_write(port, 0, RDA_UART_IRQ_MASK); + + rda_uart_write(port, triggers, RDA_UART_IRQ_TRIGGERS); + rda_uart_write(port, ctrl, RDA_UART_CTRL); + rda_uart_write(port, cmd_set, RDA_UART_CMD_SET); + rda_uart_write(port, cmd_clr, RDA_UART_CMD_CLR); + + rda_uart_write(port, irq_mask, RDA_UART_IRQ_MASK); + + /* Don't rewrite B0 */ + if (tty_termios_baud_rate(termios)) + tty_termios_encode_baud_rate(termios, baud, baud); + + /* update the per-port timeout */ + uart_update_timeout(port, termios->c_cflag, baud); + + spin_unlock_irqrestore(&port->lock, flags); +} + +static void rda_uart_send_chars(struct uart_port *port) +{ + struct circ_buf *xmit = &port->state->xmit; + unsigned int ch; + u32 val; + + if (uart_tx_stopped(port)) + return; + + if (port->x_char) { + while (!(rda_uart_read(port, RDA_UART_STATUS) & + RDA_UART_TX_FIFO_MASK)) + cpu_relax(); + + rda_uart_write(port, port->x_char, RDA_UART_RXTX_BUFFER); + port->icount.tx++; + port->x_char = 0; + } + + while (rda_uart_read(port, RDA_UART_STATUS) & RDA_UART_TX_FIFO_MASK) { + if (uart_circ_empty(xmit)) + break; + + ch = xmit->buf[xmit->tail]; + rda_uart_write(port, ch, RDA_UART_RXTX_BUFFER); + xmit->tail = (xmit->tail + 1) & (SERIAL_XMIT_SIZE - 1); + port->icount.tx++; + } + + if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) + uart_write_wakeup(port); + + if (!uart_circ_empty(xmit)) { + /* Re-enable Tx FIFO interrupt */ + val = rda_uart_read(port, RDA_UART_IRQ_MASK); + val |= RDA_UART_TX_DATA_NEEDED; + rda_uart_write(port, val, RDA_UART_IRQ_MASK); + } +} + +static void rda_uart_receive_chars(struct uart_port *port) +{ + u32 status, val; + + status = rda_uart_read(port, RDA_UART_STATUS); + while ((status & RDA_UART_RX_FIFO_MASK)) { + char flag = TTY_NORMAL; + + if (status & RDA_UART_RX_PARITY_ERR) { + port->icount.parity++; + flag = TTY_PARITY; + } + + if (status & RDA_UART_RX_FRAMING_ERR) { + port->icount.frame++; + flag = TTY_FRAME; + } + + if (status & RDA_UART_RX_OVERFLOW_ERR) { + port->icount.overrun++; + flag = TTY_OVERRUN; + } + + val = rda_uart_read(port, RDA_UART_RXTX_BUFFER); + val &= 0xff; + + port->icount.rx++; + tty_insert_flip_char(&port->state->port, val, flag); + + status = rda_uart_read(port, RDA_UART_STATUS); + } + + spin_unlock(&port->lock); + tty_flip_buffer_push(&port->state->port); + spin_lock(&port->lock); +} + +static irqreturn_t rda_interrupt(int irq, void *dev_id) +{ + struct uart_port *port = dev_id; + unsigned long flags; + u32 val, irq_mask; + + spin_lock_irqsave(&port->lock, flags); + + /* Clear IRQ cause */ + val = rda_uart_read(port, RDA_UART_IRQ_CAUSE); + rda_uart_write(port, val, RDA_UART_IRQ_CAUSE); + + if (val & (RDA_UART_RX_DATA_AVAILABLE | RDA_UART_RX_TIMEOUT)) + rda_uart_receive_chars(port); + + if (val & (RDA_UART_TX_DATA_NEEDED)) { + irq_mask = rda_uart_read(port, RDA_UART_IRQ_MASK); + irq_mask &= ~RDA_UART_TX_DATA_NEEDED; + rda_uart_write(port, irq_mask, RDA_UART_IRQ_MASK); + + rda_uart_send_chars(port); + } + + spin_unlock_irqrestore(&port->lock, flags); + + return IRQ_HANDLED; +} + +static int rda_uart_startup(struct uart_port *port) +{ + unsigned long flags; + int ret; + u32 val; + + spin_lock_irqsave(&port->lock, flags); + rda_uart_write(port, 0, RDA_UART_IRQ_MASK); + spin_unlock_irqrestore(&port->lock, flags); + + ret = request_irq(port->irq, rda_interrupt, IRQF_NO_SUSPEND, + "rda-uart", port); + if (ret) + return ret; + + spin_lock_irqsave(&port->lock, flags); + + val = rda_uart_read(port, RDA_UART_CTRL); + val |= RDA_UART_ENABLE; + rda_uart_write(port, val, RDA_UART_CTRL); + + /* enable rx interrupt */ + val = rda_uart_read(port, RDA_UART_IRQ_MASK); + val |= (RDA_UART_RX_DATA_AVAILABLE | RDA_UART_RX_TIMEOUT); + rda_uart_write(port, val, RDA_UART_IRQ_MASK); + + spin_unlock_irqrestore(&port->lock, flags); + + return 0; +} + +static void rda_uart_shutdown(struct uart_port *port) +{ + unsigned long flags; + u32 val; + + spin_lock_irqsave(&port->lock, flags); + + rda_uart_stop_tx(port); + rda_uart_stop_rx(port); + + val = rda_uart_read(port, RDA_UART_CTRL); + val &= ~RDA_UART_ENABLE; + rda_uart_write(port, val, RDA_UART_CTRL); + + spin_unlock_irqrestore(&port->lock, flags); +} + +static const char *rda_uart_type(struct uart_port *port) +{ + return (port->type == PORT_RDA) ? "rda-uart" : NULL; +} + +static int rda_uart_request_port(struct uart_port *port) +{ + struct platform_device *pdev = to_platform_device(port->dev); + struct resource *res; + + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + if (!res) + return -ENXIO; + + if (!devm_request_mem_region(port->dev, port->mapbase, + resource_size(res), dev_name(port->dev))) + return -EBUSY; + + if (port->flags & UPF_IOREMAP) { + port->membase = devm_ioremap_nocache(port->dev, port->mapbase, + resource_size(res)); + if (!port->membase) + return -EBUSY; + } + + return 0; +} + +static void rda_uart_config_port(struct uart_port *port, int flags) +{ + unsigned long irq_flags; + + if (flags & UART_CONFIG_TYPE) { + port->type = PORT_RDA; + rda_uart_request_port(port); + } + + spin_lock_irqsave(&port->lock, irq_flags); + + /* Clear mask, so no surprise interrupts. */ + rda_uart_write(port, 0, RDA_UART_IRQ_MASK); + + /* Clear status register */ + rda_uart_write(port, 0, RDA_UART_STATUS); + + spin_unlock_irqrestore(&port->lock, irq_flags); +} + +static void rda_uart_release_port(struct uart_port *port) +{ + struct platform_device *pdev = to_platform_device(port->dev); + struct resource *res; + + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + if (!res) + return; + + if (port->flags & UPF_IOREMAP) { + devm_release_mem_region(port->dev, port->mapbase, + resource_size(res)); + devm_iounmap(port->dev, port->membase); + port->membase = NULL; + } +} + +static int rda_uart_verify_port(struct uart_port *port, + struct serial_struct *ser) +{ + if (port->type != PORT_RDA) + return -EINVAL; + + if (port->irq != ser->irq) + return -EINVAL; + + return 0; +} + +static const struct uart_ops rda_uart_ops = { + .tx_empty = rda_uart_tx_empty, + .get_mctrl = rda_uart_get_mctrl, + .set_mctrl = rda_uart_set_mctrl, + .start_tx = rda_uart_start_tx, + .stop_tx = rda_uart_stop_tx, + .stop_rx = rda_uart_stop_rx, + .startup = rda_uart_startup, + .shutdown = rda_uart_shutdown, + .set_termios = rda_uart_set_termios, + .type = rda_uart_type, + .request_port = rda_uart_request_port, + .release_port = rda_uart_release_port, + .config_port = rda_uart_config_port, + .verify_port = rda_uart_verify_port, +}; + +#ifdef CONFIG_SERIAL_RDA_CONSOLE + +static void rda_console_putchar(struct uart_port *port, int ch) +{ + if (!port->membase) + return; + + while (!(rda_uart_read(port, RDA_UART_STATUS) & RDA_UART_TX_FIFO_MASK)) + cpu_relax(); + + rda_uart_write(port, ch, RDA_UART_RXTX_BUFFER); +} + +static void rda_uart_port_write(struct uart_port *port, const char *s, + u_int count) +{ + u32 old_irq_mask; + unsigned long flags; + int locked; + + local_irq_save(flags); + + if (port->sysrq) { + locked = 0; + } else if (oops_in_progress) { + locked = spin_trylock(&port->lock); + } else { + spin_lock(&port->lock); + locked = 1; + } + + old_irq_mask = rda_uart_read(port, RDA_UART_IRQ_MASK); + rda_uart_write(port, 0, RDA_UART_IRQ_MASK); + + uart_console_write(port, s, count, rda_console_putchar); + + /* wait until all contents have been sent out */ + while (!(rda_uart_read(port, RDA_UART_STATUS) & RDA_UART_TX_FIFO_MASK)) + cpu_relax(); + + rda_uart_write(port, old_irq_mask, RDA_UART_IRQ_MASK); + + if (locked) + spin_unlock(&port->lock); + + local_irq_restore(flags); +} + +static void rda_uart_console_write(struct console *co, const char *s, + u_int count) +{ + struct rda_uart_port *rda_port; + + rda_port = rda_uart_ports[co->index]; + if (!rda_port) + return; + + rda_uart_port_write(&rda_port->port, s, count); +} + +static int rda_uart_console_setup(struct console *co, char *options) +{ + struct rda_uart_port *rda_port; + int baud = 921600; + int bits = 8; + int parity = 'n'; + int flow = 'n'; + + if (co->index < 0 || co->index >= RDA_UART_PORT_NUM) + return -EINVAL; + + rda_port = rda_uart_ports[co->index]; + if (!rda_port || !rda_port->port.membase) + return -ENODEV; + + if (options) + uart_parse_options(options, &baud, &parity, &bits, &flow); + + return uart_set_options(&rda_port->port, co, baud, parity, bits, flow); +} + +static struct console rda_uart_console = { + .name = RDA_UART_DEV_NAME, + .write = rda_uart_console_write, + .device = uart_console_device, + .setup = rda_uart_console_setup, + .flags = CON_PRINTBUFFER, + .index = -1, + .data = &rda_uart_driver, +}; + +static int __init rda_uart_console_init(void) +{ + register_console(&rda_uart_console); + + return 0; +} +console_initcall(rda_uart_console_init); + +static void rda_uart_early_console_write(struct console *co, + const char *s, + u_int count) +{ + struct earlycon_device *dev = co->data; + + rda_uart_port_write(&dev->port, s, count); +} + +static int __init +rda_uart_early_console_setup(struct earlycon_device *device, const char *opt) +{ + if (!device->port.membase) + return -ENODEV; + + device->con->write = rda_uart_early_console_write; + + return 0; +} + +OF_EARLYCON_DECLARE(rda, "rda,8810pl-uart", + rda_uart_early_console_setup); + +#define RDA_UART_CONSOLE (&rda_uart_console) +#else +#define RDA_UART_CONSOLE NULL +#endif /* CONFIG_SERIAL_RDA_CONSOLE */ + +static struct uart_driver rda_uart_driver = { + .owner = THIS_MODULE, + .driver_name = "rda-uart", + .dev_name = RDA_UART_DEV_NAME, + .nr = RDA_UART_PORT_NUM, + .cons = RDA_UART_CONSOLE, +}; + +static const struct of_device_id rda_uart_dt_matches[] = { + { .compatible = "rda,8810pl-uart" }, + { } +}; +MODULE_DEVICE_TABLE(of, rda_uart_dt_matches); + +static int rda_uart_probe(struct platform_device *pdev) +{ + struct resource *res_mem; + struct rda_uart_port *rda_port; + int ret, irq; + + if (pdev->dev.of_node) + pdev->id = of_alias_get_id(pdev->dev.of_node, "serial"); + + if (pdev->id < 0 || pdev->id >= RDA_UART_PORT_NUM) { + dev_err(&pdev->dev, "id %d out of range\n", pdev->id); + return -EINVAL; + } + + res_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); + if (!res_mem) { + dev_err(&pdev->dev, "could not get mem\n"); + return -ENODEV; + } + + irq = platform_get_irq(pdev, 0); + if (irq < 0) { + dev_err(&pdev->dev, "could not get irq\n"); + return irq; + } + + if (rda_uart_ports[pdev->id]) { + dev_err(&pdev->dev, "port %d already allocated\n", pdev->id); + return -EBUSY; + } + + rda_port = devm_kzalloc(&pdev->dev, sizeof(*rda_port), GFP_KERNEL); + if (!rda_port) + return -ENOMEM; + + rda_port->clk = devm_clk_get(&pdev->dev, NULL); + if (IS_ERR(rda_port->clk)) { + dev_err(&pdev->dev, "could not get clk\n"); + return PTR_ERR(rda_port->clk); + } + + rda_port->port.dev = &pdev->dev; + rda_port->port.regshift = 0; + rda_port->port.line = pdev->id; + rda_port->port.type = PORT_RDA; + rda_port->port.iotype = UPIO_MEM; + rda_port->port.mapbase = res_mem->start; + rda_port->port.irq = irq; + rda_port->port.uartclk = clk_get_rate(rda_port->clk); + if (rda_port->port.uartclk == 0) { + dev_err(&pdev->dev, "clock rate is zero\n"); + return -EINVAL; + } + rda_port->port.flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP | + UPF_LOW_LATENCY; + rda_port->port.x_char = 0; + rda_port->port.fifosize = RDA_UART_TX_FIFO_SIZE; + rda_port->port.ops = &rda_uart_ops; + + rda_uart_ports[pdev->id] = rda_port; + platform_set_drvdata(pdev, rda_port); + + ret = uart_add_one_port(&rda_uart_driver, &rda_port->port); + if (ret) + rda_uart_ports[pdev->id] = NULL; + + return ret; +} + +static int rda_uart_remove(struct platform_device *pdev) +{ + struct rda_uart_port *rda_port = platform_get_drvdata(pdev); + + uart_remove_one_port(&rda_uart_driver, &rda_port->port); + rda_uart_ports[pdev->id] = NULL; + + return 0; +} + +static struct platform_driver rda_uart_platform_driver = { + .probe = rda_uart_probe, + .remove = rda_uart_remove, + .driver = { + .name = "rda-uart", + .of_match_table = rda_uart_dt_matches, + }, +}; + +static int __init rda_uart_init(void) +{ + int ret; + + ret = uart_register_driver(&rda_uart_driver); + if (ret) + return ret; + + ret = platform_driver_register(&rda_uart_platform_driver); + if (ret) + uart_unregister_driver(&rda_uart_driver); + + return ret; +} + +static void __init rda_uart_exit(void) +{ + platform_driver_unregister(&rda_uart_platform_driver); + uart_unregister_driver(&rda_uart_driver); +} + +module_init(rda_uart_init); +module_exit(rda_uart_exit); + +MODULE_AUTHOR("Manivannan Sadhasivam "); +MODULE_DESCRIPTION("RDA8810PL serial device driver"); +MODULE_LICENSE("GPL"); diff --git a/include/uapi/linux/serial_core.h b/include/uapi/linux/serial_core.h index dce5f9dae121..df4a7534e239 100644 --- a/include/uapi/linux/serial_core.h +++ b/include/uapi/linux/serial_core.h @@ -281,4 +281,7 @@ /* MediaTek BTIF */ #define PORT_MTK_BTIF 117 +/* RDA UART */ +#define PORT_RDA 118 + #endif /* _UAPILINUX_SERIAL_CORE_H */ From patchwork Mon Dec 10 17:35:50 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 153331 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp3821046ljp; Mon, 10 Dec 2018 09:38:19 -0800 (PST) X-Google-Smtp-Source: AFSGD/WjhvbwOomq7dsJLq0NXbGsEATmsG93dSWxwkdMYZNlo2lPITyEE8/yKNOsAMHHnQTE/ks4 X-Received: by 2002:a17:902:2867:: with SMTP id e94mr13055282plb.264.1544463499082; Mon, 10 Dec 2018 09:38:19 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1544463499; cv=none; d=google.com; s=arc-20160816; b=uD9HnyCAp01CQ0D+9ZermpFsSt9HoQnFYk5MLOBZPuemAZME3mVUdDya53Og2beff6 QKbVMC1kJzVL0lSD/qMEgVxFvK1VuFSL0TysMuL/sAEXelM6L78geF7nTyfuu7mkG3zR GlXT1Vs9pcvJKdKdUpBgonQtOc2OBkNneDLfTQEgCPD8N4kwkeHR4Q1RQ5GcBVZMWClr iOBsb6V/qG6t2NrR8i/jXBF/44makyvWGIDxb06cL7QRZOCxvssqJAgJjnZd6/YNmmM2 GqmnQif7nJq9DmQ3ZVT2uKv3EHsGpQUcG+UZM5ovcVdE1WI3JUAWsq2wlte+kAk6E1hs 4B0w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=L2eV2hqdutu4ir5j3LLCjolH3gJjyj+3j8k2gdmQdYQ=; b=KEAhe6XKXF0is0WuRp+EVu/FpPOaUEOMWFEStrZrSXa8lX8MdGylGNQyyufkLTmWSc 20pclX3Amv/4B7acaj1D+nOrCybTQOi297zMcvRaHWL7NnPXb5rKiWHI1ObzOFO4kSnv MzuyhXkOu+jBmG/lyJENHQa8QnLq3njwFJoqTmxelgOFZkUyBNouyjDR12J6ghKlbPYp 1ob52U9g5v2O2jwFv1O8xFU9610nxgF9fx2oPs6gMjmj5Kepqkqv1wq6BosUIxejBnru xSAmTnOuO3Wt40ihKJTvt3MJwR3qrSyCL21mYogOd15Srh1HpHG1HyJAY2OB1W+FwMl0 I91Q== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=U3bOoblA; spf=pass (google.com: best guess record for domain of linux-serial-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-serial-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id o31si10249590pgb.273.2018.12.10.09.38.18; Mon, 10 Dec 2018 09:38:19 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-serial-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=U3bOoblA; spf=pass (google.com: best guess record for domain of linux-serial-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-serial-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728844AbeLJRiS (ORCPT + 2 others); Mon, 10 Dec 2018 12:38:18 -0500 Received: from mail-pg1-f193.google.com ([209.85.215.193]:36993 "EHLO mail-pg1-f193.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728372AbeLJRiS (ORCPT ); Mon, 10 Dec 2018 12:38:18 -0500 Received: by mail-pg1-f193.google.com with SMTP id 80so5289670pge.4 for ; Mon, 10 Dec 2018 09:38:17 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=L2eV2hqdutu4ir5j3LLCjolH3gJjyj+3j8k2gdmQdYQ=; b=U3bOoblAbInzfGegDoqhu/9kzokD3qYrXQEvRqPoXjgdQbBSoVsM6t8qPvVWWB6d1e clFu4aY8URJegm/tiF/A5fS0ktOg9ojkNK/CJhdqLWmIHnO/bQxGidPqezZ5lq9g8kZ2 phoYjERqhnlslQijiijN9QmD/PuLX2NhDcfsY= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=L2eV2hqdutu4ir5j3LLCjolH3gJjyj+3j8k2gdmQdYQ=; b=O96SuQCH4WykrKlde1Rvy3RD/pUeRIUV2mylZxbDx7HPT9v+UL18QdS80yQsiBWxlP vLN6sQJNV2tbCMI1noaogq7Eb3AI9Gkxm1x+pEi6oqRU+UVEJm0s6NyOZsNP4xpusNKH 472efl5Ut3dTtbOFUANiZ6yAi5ZGhLOWJvkmBtqLXKlhgvncJry2nhDDqyDEkzBsNyc3 bVAwyIaPOg26YX8+K51SSlX6hXjslK+hSazp1RBSv0H8+ROj02Jd1Iog0jCINEUp5FBw HJELj0QKICYYmdPuguXcjT1aw7JCKIpXZwUcBmAETFNtKN6gpqXvas10OcxG2XmjiGEV W8ow== X-Gm-Message-State: AA+aEWZYr3u0nDoBmvlj1drIw+aUPJkW9m5rQeHFBNjpXhSnE3TlHaKD XZ8bVe9fdz19nvA3kuMD2KQkOqhhtw== X-Received: by 2002:a62:a99:: with SMTP id 25mr12973568pfk.121.1544463497072; Mon, 10 Dec 2018 09:38:17 -0800 (PST) Received: from localhost.localdomain ([2409:4072:91e:2c01:40e1:a028:b090:9e12]) by smtp.gmail.com with ESMTPSA id q1sm15998396pfb.96.2018.12.10.09.38.07 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 10 Dec 2018 09:38:16 -0800 (PST) From: Manivannan Sadhasivam To: olof@lixom.net, arnd@arndb.de, robh+dt@kernel.org, tglx@linutronix.de, jason@lakedaemon.net, marc.zyngier@arm.com, daniel.lezcano@linaro.org, gregkh@linuxfoundation.org, jslaby@suse.com Cc: linux-unisoc@lists.infradead.org, afaerber@suse.de, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-serial@vger.kernel.org, amit.kucheria@linaro.org, linus.walleij@linaro.org, zhao_steven@263.net, Manivannan Sadhasivam Subject: [PATCH v4 15/15] MAINTAINERS: Add entry for RDA Micro SoC architecture Date: Mon, 10 Dec 2018 23:05:50 +0530 Message-Id: <20181210173550.29643-16-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20181210173550.29643-1-manivannan.sadhasivam@linaro.org> References: <20181210173550.29643-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 Sender: linux-serial-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-serial@vger.kernel.org Add MAINTAINERS entry for RDA Micro SoC architecture with myself and Andreas Färber as the maintainers. Signed-off-by: Manivannan Sadhasivam --- MAINTAINERS | 15 +++++++++++++++ 1 file changed, 15 insertions(+) -- 2.17.1 diff --git a/MAINTAINERS b/MAINTAINERS index 6c3fbbb361f8..6411fb222590 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -1945,6 +1945,21 @@ M: Lennert Buytenhek L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) S: Maintained +ARM/RDA MICRO ARCHITECTURE +M: Andreas Färber +M: Manivannan Sadhasivam +L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) +L: linux-unisoc@lists.infradead.org (moderated for non-subscribers) +S: Maintained +F: arch/arm/boot/dts/rda8810pl-* +F: drivers/clocksource/timer-rda.c +F: drivers/irqchip/irq-rda-intc.c +F: drivers/tty/serial/rda-uart.c +F: Documentation/devicetree/bindings/arm/rda.txt +F: Documentation/devicetree/bindings/interrupt-controller/rda,8810pl-intc.txt +F: Documentation/devicetree/bindings/serial/rda,8810pl-uart.txt +F: Documentation/devicetree/bindings/timer/rda,8810pl-timer.txt + ARM/REALTEK ARCHITECTURE M: Andreas Färber L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)