From patchwork Wed Mar 30 13:20:30 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Miquel Raynal X-Patchwork-Id: 555246 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id F0ECBC433EF for ; Wed, 30 Mar 2022 13:20:52 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1345831AbiC3NWg (ORCPT ); Wed, 30 Mar 2022 09:22:36 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35582 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S245017AbiC3NWb (ORCPT ); Wed, 30 Mar 2022 09:22:31 -0400 Received: from relay1-d.mail.gandi.net (relay1-d.mail.gandi.net [217.70.183.193]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3A4F448E6C; Wed, 30 Mar 2022 06:20:45 -0700 (PDT) Received: (Authenticated sender: miquel.raynal@bootlin.com) by mail.gandi.net (Postfix) with ESMTPSA id EC70C240002; Wed, 30 Mar 2022 13:20:41 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1648646443; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=BLHdExM09A+T20vX3rDvNlQ+wzydq9g3Zy0CHyU/0CA=; b=LNVP9eXYKIRvf997Gu4a4ohunaTQ7/y5Kslg766VCJ3VvEKKEVZXj0m+q3oPRIr1pzx73B DeVb6MouD/4nQljG5qde61e1N9sh1ECG2EqIl4QwoKaujW+KzA6oGd3BLub+AMxrTH4Wda hfvE1TQuF7emMCFt+gSpy36/sNjV/8LsPFz1Ek4d+px5maQl77pP431HfPrPxdbPmiZALw FId+m/6jaDDlX5EBJS6Az1vJ+uaYUXnFmeC+9EhwQ0wIRQf8asNOT8qZb5rEeG9O+Ckwy6 9lpiEkG2gbSlskbeVaXdjYa/dm2oQTQFtyPrf++HUBSzOzqhelF/6BDefYV6cQ== From: Miquel Raynal To: Geert Uytterhoeven , Magnus Damm , Greg Kroah-Hartman , Jiri Slaby Cc: Miquel Raynal , Andy Shevchenko , linux-renesas-soc@vger.kernel.org, linux-serial@vger.kernel.org, Milan Stevanovic , Jimmy Lalande , Pascal Eberhard , Thomas Petazzoni , Herve Codina , Clement Leger , Phil Edworthy Subject: [PATCH v4 1/9] serial: 8250: dw: Move definitions to the shared header Date: Wed, 30 Mar 2022 15:20:30 +0200 Message-Id: <20220330132038.808679-2-miquel.raynal@bootlin.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20220330132038.808679-1-miquel.raynal@bootlin.com> References: <20220330132038.808679-1-miquel.raynal@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-serial@vger.kernel.org From: Phil Edworthy Move the per-device structure and a helper out of the main .c file, into a shared header as they will both be reused from another .c file. There is no functional change. Signed-off-by: Phil Edworthy [miquel.raynal@bootlin.com: Extracted from a bigger change] Signed-off-by: Miquel Raynal --- drivers/tty/serial/8250/8250_dw.c | 21 --------------------- drivers/tty/serial/8250/8250_dwlib.h | 26 ++++++++++++++++++++++++++ 2 files changed, 26 insertions(+), 21 deletions(-) diff --git a/drivers/tty/serial/8250/8250_dw.c b/drivers/tty/serial/8250/8250_dw.c index 96a62e95726b..1666041513a5 100644 --- a/drivers/tty/serial/8250/8250_dw.c +++ b/drivers/tty/serial/8250/8250_dw.c @@ -42,27 +42,6 @@ #define DW_UART_QUIRK_ARMADA_38X BIT(1) #define DW_UART_QUIRK_SKIP_SET_RATE BIT(2) -struct dw8250_data { - struct dw8250_port_data data; - - u8 usr_reg; - int msr_mask_on; - int msr_mask_off; - struct clk *clk; - struct clk *pclk; - struct notifier_block clk_notifier; - struct work_struct clk_work; - struct reset_control *rst; - - unsigned int skip_autocfg:1; - unsigned int uart_16550_compatible:1; -}; - -static inline struct dw8250_data *to_dw8250_data(struct dw8250_port_data *data) -{ - return container_of(data, struct dw8250_data, data); -} - static inline struct dw8250_data *clk_to_dw8250_data(struct notifier_block *nb) { return container_of(nb, struct dw8250_data, clk_notifier); diff --git a/drivers/tty/serial/8250/8250_dwlib.h b/drivers/tty/serial/8250/8250_dwlib.h index 83d528e5cc21..72e7dbcccad0 100644 --- a/drivers/tty/serial/8250/8250_dwlib.h +++ b/drivers/tty/serial/8250/8250_dwlib.h @@ -1,10 +1,15 @@ /* SPDX-License-Identifier: GPL-2.0+ */ /* Synopsys DesignWare 8250 library header file. */ +#include #include +#include #include "8250.h" +struct clk; +struct reset_control; + struct dw8250_port_data { /* Port properties */ int line; @@ -16,5 +21,26 @@ struct dw8250_port_data { u8 dlf_size; }; +struct dw8250_data { + struct dw8250_port_data data; + + u8 usr_reg; + int msr_mask_on; + int msr_mask_off; + struct clk *clk; + struct clk *pclk; + struct notifier_block clk_notifier; + struct work_struct clk_work; + struct reset_control *rst; + + unsigned int skip_autocfg:1; + unsigned int uart_16550_compatible:1; +}; + void dw8250_do_set_termios(struct uart_port *p, struct ktermios *termios, struct ktermios *old); void dw8250_setup_port(struct uart_port *p); + +static inline struct dw8250_data *to_dw8250_data(struct dw8250_port_data *data) +{ + return container_of(data, struct dw8250_data, data); +} From patchwork Wed Mar 30 13:20:32 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Miquel Raynal X-Patchwork-Id: 555245 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id DD07FC43217 for ; Wed, 30 Mar 2022 13:20:54 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1345860AbiC3NWh (ORCPT ); Wed, 30 Mar 2022 09:22:37 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35870 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1345832AbiC3NWf (ORCPT ); Wed, 30 Mar 2022 09:22:35 -0400 Received: from relay1-d.mail.gandi.net (relay1-d.mail.gandi.net [IPv6:2001:4b98:dc4:8::221]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1DE3C4924A; Wed, 30 Mar 2022 06:20:48 -0700 (PDT) Received: (Authenticated sender: miquel.raynal@bootlin.com) by mail.gandi.net (Postfix) with ESMTPSA id 8D0C0240004; Wed, 30 Mar 2022 13:20:45 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1648646447; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=pMj+oO2q20LyAWcRvEIJN80ZhA+kbhS1vge1cPjT3Bo=; b=R9e5vhCDRQDOpNC8OFSlubJrqtsyEiyOp8rZIHR+ZyqGT2jmTSr5kbLxlPdjI6XD1JvP88 cpcFO805sgBU1a0ou4UG1FWQB1D8GR72IYh2nfo7aTCkJOCmGCNlkbhSFveZfQIhHUL+VG XSevyM4ovC0S2QWjbxpcaMMeKoau4/+sEZS6slfRSEwO/LTDeIIGEcuVZo8dlczT9zH50j z1pkNn0zpggu3LbBWQFmPv6hdQCb5+qQDq0ep+UfovTkm/9jSiWc4vo27AqPt6bEltMyAp 9xLMvFb2RE8eyYTnJS0seBCtEgkhmtcChaJLksq81miksrlWIqnKtzJd8ripPQ== From: Miquel Raynal To: Geert Uytterhoeven , Magnus Damm , Greg Kroah-Hartman , Jiri Slaby Cc: Miquel Raynal , Andy Shevchenko , linux-renesas-soc@vger.kernel.org, linux-serial@vger.kernel.org, Milan Stevanovic , Jimmy Lalande , Pascal Eberhard , Thomas Petazzoni , Herve Codina , Clement Leger , Emil Renner Berthing Subject: [PATCH v4 3/9] serial: 8250: dw: Create a more generic platform data structure Date: Wed, 30 Mar 2022 15:20:32 +0200 Message-Id: <20220330132038.808679-4-miquel.raynal@bootlin.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20220330132038.808679-1-miquel.raynal@bootlin.com> References: <20220330132038.808679-1-miquel.raynal@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-serial@vger.kernel.org Before adding more platform data information, let's turn the quirks information as being a member of a wider structure. More fields will be added later. At the same time, change the quirks type to unsigned int, as its size won't change between setups and we don't really need this variable to be more than a few bits wide anyway. Provide a stub to the compatibles without quirks to simplify handling. Keep two different empty structure for the base DW compatible and the Renesas one because the latter will soon be fulfilled anyway. Cc: Emil Renner Berthing Suggested-by: Andy Shevchenko Signed-off-by: Miquel Raynal Reviewed-by: Geert Uytterhoeven --- drivers/tty/serial/8250/8250_dw.c | 32 ++++++++++++++++++++++------ drivers/tty/serial/8250/8250_dwlib.h | 5 +++++ 2 files changed, 30 insertions(+), 7 deletions(-) diff --git a/drivers/tty/serial/8250/8250_dw.c b/drivers/tty/serial/8250/8250_dw.c index b6238b9bf0b2..70a843e31ffd 100644 --- a/drivers/tty/serial/8250/8250_dw.c +++ b/drivers/tty/serial/8250/8250_dw.c @@ -19,6 +19,7 @@ #include #include #include +#include #include #include #include @@ -371,7 +372,7 @@ static bool dw8250_idma_filter(struct dma_chan *chan, void *param) static void dw8250_quirks(struct uart_port *p, struct dw8250_data *data) { struct device_node *np = p->dev->of_node; - unsigned long quirks = (unsigned long)device_get_match_data(p->dev); + unsigned int quirks = data->pdata->quirks; if (np) { int id; @@ -462,6 +463,7 @@ static int dw8250_probe(struct platform_device *pdev) data->data.dma.fn = dw8250_fallback_dma_filter; data->usr_reg = DW_UART_USR; + data->pdata = device_get_match_data(p->dev); p->private_data = &data->data; data->uart_16550_compatible = device_property_read_bool(dev, @@ -678,13 +680,29 @@ static const struct dev_pm_ops dw8250_pm_ops = { SET_RUNTIME_PM_OPS(dw8250_runtime_suspend, dw8250_runtime_resume, NULL) }; +static const struct dw8250_platform_data dw8250_dw_apb = {}; + +static const struct dw8250_platform_data dw8250_octeon_3860_data = { + .quirks = DW_UART_QUIRK_OCTEON, +}; + +static const struct dw8250_platform_data dw8250_armada_38x_data = { + .quirks = DW_UART_QUIRK_ARMADA_38X, +}; + +static const struct dw8250_platform_data dw8250_renesas_rzn1_data = {}; + +static const struct dw8250_platform_data dw8250_starfive_jh7100_data = { + .quirks = DW_UART_QUIRK_SKIP_SET_RATE, +}; + static const struct of_device_id dw8250_of_match[] = { - { .compatible = "snps,dw-apb-uart" }, - { .compatible = "cavium,octeon-3860-uart", .data = (void *)DW_UART_QUIRK_OCTEON }, - { .compatible = "marvell,armada-38x-uart", .data = (void *)DW_UART_QUIRK_ARMADA_38X }, - { .compatible = "renesas,rzn1-uart" }, - { .compatible = "starfive,jh7100-hsuart", .data = (void *)DW_UART_QUIRK_SKIP_SET_RATE }, - { .compatible = "starfive,jh7100-uart", .data = (void *)DW_UART_QUIRK_SKIP_SET_RATE }, + { .compatible = "snps,dw-apb-uart", .data = &dw8250_dw_apb }, + { .compatible = "cavium,octeon-3860-uart", .data = &dw8250_octeon_3860_data }, + { .compatible = "marvell,armada-38x-uart", .data = &dw8250_armada_38x_data }, + { .compatible = "renesas,rzn1-uart", .data = &dw8250_renesas_rzn1_data }, + { .compatible = "starfive,jh7100-hsuart", .data = &dw8250_starfive_jh7100_data }, + { .compatible = "starfive,jh7100-uart", .data = &dw8250_starfive_jh7100_data }, { /* Sentinel */ } }; MODULE_DEVICE_TABLE(of, dw8250_of_match); diff --git a/drivers/tty/serial/8250/8250_dwlib.h b/drivers/tty/serial/8250/8250_dwlib.h index 72e7dbcccad0..68bb81bee660 100644 --- a/drivers/tty/serial/8250/8250_dwlib.h +++ b/drivers/tty/serial/8250/8250_dwlib.h @@ -21,8 +21,13 @@ struct dw8250_port_data { u8 dlf_size; }; +struct dw8250_platform_data { + unsigned int quirks; +}; + struct dw8250_data { struct dw8250_port_data data; + const struct dw8250_platform_data *pdata; u8 usr_reg; int msr_mask_on; From patchwork Wed Mar 30 13:20:34 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Miquel Raynal X-Patchwork-Id: 555244 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E7D22C433FE for ; Wed, 30 Mar 2022 13:20:56 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1345870AbiC3NWj (ORCPT ); Wed, 30 Mar 2022 09:22:39 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36050 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1345864AbiC3NWi (ORCPT ); Wed, 30 Mar 2022 09:22:38 -0400 Received: from relay1-d.mail.gandi.net (relay1-d.mail.gandi.net [IPv6:2001:4b98:dc4:8::221]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3AFD4488AB; Wed, 30 Mar 2022 06:20:52 -0700 (PDT) Received: (Authenticated sender: miquel.raynal@bootlin.com) by mail.gandi.net (Postfix) with ESMTPSA id 47AF7240011; Wed, 30 Mar 2022 13:20:49 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1648646450; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=Y2lJyEILsp8NDkKtykYkfjKRpqQEf+GhkYUQftZF+0c=; b=dnAzsA4ZsYQcxNGUI9CMvGqLfLKaPyquhYof+qd/Kc6tqumAWw+gB+cAqEZWV9wSPxNsxB tTDBJLSQvvX4ofkC3qm8Cpjl/Zdps7y8ytLPksA0CbihhTp05XRAEGpDDZtbg8LRPY6GX9 cHfTynIqnkRRzzgcJ5AjcinFJ8Nm4zyj6dUqZSKmCqPypo/G+YlkZdgSBl9YiafBrPyTPJ CYde9x13pUAwf+MMX45J2phmqQec7kLlWxHoPBV2WrsBvCVwN7etWEhwhNT/ev8kZFpTV0 soPPF1/ADlPK4GeuY+ArfsWG+/gF/YINiKdmTxqLiJ4o/xcR4DQ7bj0XgNJM4A== From: Miquel Raynal To: Geert Uytterhoeven , Magnus Damm , Greg Kroah-Hartman , Jiri Slaby Cc: Miquel Raynal , Andy Shevchenko , linux-renesas-soc@vger.kernel.org, linux-serial@vger.kernel.org, Milan Stevanovic , Jimmy Lalande , Pascal Eberhard , Thomas Petazzoni , Herve Codina , Clement Leger Subject: [PATCH v4 5/9] serial: 8250: dma: Allow driver operations before starting DMA transfers Date: Wed, 30 Mar 2022 15:20:34 +0200 Message-Id: <20220330132038.808679-6-miquel.raynal@bootlin.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20220330132038.808679-1-miquel.raynal@bootlin.com> References: <20220330132038.808679-1-miquel.raynal@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-serial@vger.kernel.org One situation where this could be used is when configuring the UART controller to be the DMA flow controller. This is a typical case where the driver might need to program a few more registers before starting a DMA transfer. Provide the necessary infrastructure to support this case. Suggested-by: Andy Shevchenko Signed-off-by: Miquel Raynal --- drivers/tty/serial/8250/8250.h | 18 ++++++++++++++++++ drivers/tty/serial/8250/8250_dma.c | 4 ++++ 2 files changed, 22 insertions(+) diff --git a/drivers/tty/serial/8250/8250.h b/drivers/tty/serial/8250/8250.h index db784ace25d8..d19f24e4d13e 100644 --- a/drivers/tty/serial/8250/8250.h +++ b/drivers/tty/serial/8250/8250.h @@ -17,6 +17,8 @@ struct uart_8250_dma { int (*tx_dma)(struct uart_8250_port *p); int (*rx_dma)(struct uart_8250_port *p); + void (*prepare_tx_dma)(struct uart_8250_port *p); + void (*prepare_rx_dma)(struct uart_8250_port *p); /* Filter function */ dma_filter_fn fn; @@ -301,6 +303,22 @@ extern int serial8250_rx_dma(struct uart_8250_port *); extern void serial8250_rx_dma_flush(struct uart_8250_port *); extern int serial8250_request_dma(struct uart_8250_port *); extern void serial8250_release_dma(struct uart_8250_port *); + +static inline void serial8250_do_prepare_tx_dma(struct uart_8250_port *p) +{ + struct uart_8250_dma *dma = p->dma; + + if (dma->prepare_tx_dma) + dma->prepare_tx_dma(p); +} + +static inline void serial8250_do_prepare_rx_dma(struct uart_8250_port *p) +{ + struct uart_8250_dma *dma = p->dma; + + if (dma->prepare_rx_dma) + dma->prepare_rx_dma(p); +} #else static inline int serial8250_tx_dma(struct uart_8250_port *p) { diff --git a/drivers/tty/serial/8250/8250_dma.c b/drivers/tty/serial/8250/8250_dma.c index 890fa7ddaa7f..558d3a2ac65b 100644 --- a/drivers/tty/serial/8250/8250_dma.c +++ b/drivers/tty/serial/8250/8250_dma.c @@ -77,6 +77,8 @@ int serial8250_tx_dma(struct uart_8250_port *p) dma->tx_size = CIRC_CNT_TO_END(xmit->head, xmit->tail, UART_XMIT_SIZE); + serial8250_do_prepare_tx_dma(p); + desc = dmaengine_prep_slave_single(dma->txchan, dma->tx_addr + xmit->tail, dma->tx_size, DMA_MEM_TO_DEV, @@ -114,6 +116,8 @@ int serial8250_rx_dma(struct uart_8250_port *p) if (dma->rx_running) return 0; + serial8250_do_prepare_rx_dma(p); + desc = dmaengine_prep_slave_single(dma->rxchan, dma->rx_addr, dma->rx_size, DMA_DEV_TO_MEM, DMA_PREP_INTERRUPT | DMA_CTRL_ACK); From patchwork Wed Mar 30 13:20:37 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Miquel Raynal X-Patchwork-Id: 555243 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 023EFC433EF for ; Wed, 30 Mar 2022 13:21:28 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1346000AbiC3NXL (ORCPT ); Wed, 30 Mar 2022 09:23:11 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36294 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1345894AbiC3NWo (ORCPT ); Wed, 30 Mar 2022 09:22:44 -0400 Received: from relay1-d.mail.gandi.net (relay1-d.mail.gandi.net [217.70.183.193]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4EA924924A; Wed, 30 Mar 2022 06:20:57 -0700 (PDT) Received: (Authenticated sender: miquel.raynal@bootlin.com) by mail.gandi.net (Postfix) with ESMTPSA id 005B5240019; Wed, 30 Mar 2022 13:20:53 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1648646455; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=JsBf7EKV8RqbFBrnOs2PXsmVApqOvKVpjknHgkugL6c=; b=Tbf0sPeEQ6kn+bP9uSTI7a9EsQ3/jh0u0YsLqzE9Ad38IhWs4+z2BnCLSvydFPN8BRJaUs v9fmBHUNkdVZqEDystIRa7NMiPtZl4Nxs1l8D2pxKK2UJGflgUBZMIALzGs0vTkEHRhdh7 C+Is8G6y/SG8eJ5xMy0lK6oM5845DBzObYVBVgA3cTvXYNoDu9Q3OHEfEsGP6SdBn3XXgo IaNbTliWkbQaaoP9GqvWPvZJQBmWSsyjWbCizVtFfcULxTeb2BT66tMq1Mg4A7Azx/JPRK i/u9Mjiko33ahtiS+Plzhd+PG19V4MHFOZE8POCIg+CQrEY2xGs1r3rAEQy8Tw== From: Miquel Raynal To: Geert Uytterhoeven , Magnus Damm , Greg Kroah-Hartman , Jiri Slaby Cc: Miquel Raynal , Andy Shevchenko , linux-renesas-soc@vger.kernel.org, linux-serial@vger.kernel.org, Milan Stevanovic , Jimmy Lalande , Pascal Eberhard , Thomas Petazzoni , Herve Codina , Clement Leger , Phil Edworthy Subject: [PATCH v4 8/9] serial: 8250: dw: Improve RZN1 support Date: Wed, 30 Mar 2022 15:20:37 +0200 Message-Id: <20220330132038.808679-9-miquel.raynal@bootlin.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20220330132038.808679-1-miquel.raynal@bootlin.com> References: <20220330132038.808679-1-miquel.raynal@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-serial@vger.kernel.org From: Phil Edworthy Renesas RZ/N1 SoC features a slightly modified DW UART. On this SoC, the CPR register value is known but not synthetized in hardware. We hence need to provide a CPR value in the platform data. This version of the controller also relies on acting as flow controller when using DMA, so we need to provide the "is dma flow controller" quirk. Signed-off-by: Phil Edworthy Co-developed-by: Miquel Raynal Signed-off-by: Miquel Raynal --- drivers/tty/serial/8250/8250_dw.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/drivers/tty/serial/8250/8250_dw.c b/drivers/tty/serial/8250/8250_dw.c index 977a473535e8..195aa4516b2b 100644 --- a/drivers/tty/serial/8250/8250_dw.c +++ b/drivers/tty/serial/8250/8250_dw.c @@ -755,7 +755,10 @@ static const struct dw8250_platform_data dw8250_armada_38x_data = { .quirks = DW_UART_QUIRK_ARMADA_38X, }; -static const struct dw8250_platform_data dw8250_renesas_rzn1_data = {}; +static const struct dw8250_platform_data dw8250_renesas_rzn1_data = { + .quirks = DW_UART_QUIRK_IS_DMA_FC, + .cpr = 0x00012f32, +}; static const struct dw8250_platform_data dw8250_starfive_jh7100_data = { .quirks = DW_UART_QUIRK_SKIP_SET_RATE, From patchwork Wed Mar 30 13:20:38 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Miquel Raynal X-Patchwork-Id: 555242 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3E70BC43219 for ; Wed, 30 Mar 2022 13:21:31 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1345877AbiC3NXN (ORCPT ); Wed, 30 Mar 2022 09:23:13 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36480 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1345901AbiC3NWp (ORCPT ); Wed, 30 Mar 2022 09:22:45 -0400 Received: from relay1-d.mail.gandi.net (relay1-d.mail.gandi.net [217.70.183.193]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 28D7A49272; Wed, 30 Mar 2022 06:20:58 -0700 (PDT) Received: (Authenticated sender: miquel.raynal@bootlin.com) by mail.gandi.net (Postfix) with ESMTPSA id 1BE8B240008; Wed, 30 Mar 2022 13:20:56 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1648646457; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=VjUPIaxQ1WBMLteeByIABCjhVWOu3Y3N20N5eUaJ/3w=; b=dYzZpVWm/sUXXRq6H5Mcp7pYqmwE5wZE0X1ehFPz7/2ploOvhtAvzQ/9vfCAdaJh7DzSjJ oPtAzIjGeiznjhW4zHbBmqrS7zxU2aV2aJUuqAWIXe4hIwcLyUxLRnKZMvMndlGLjrcNPK 2+GhjGtwLnlzSgdWFbIgDkCKkVlOCu0fzy9xuedKgMrVnj854dSzVW74EPK0FkZ+ru4mPQ BdmJkM/DTjGY5jqG39XNqRUWafEdWjIgX5S60jraPiGBjGKYRrHD7lF1dUYbf1kQKAU9Iu nefFX+T5OLfgaVGOcK4bpWbWN3tkGFabZ0b2bKJQQD0JV3QLbH7VozzVjyg7Ww== From: Miquel Raynal To: Geert Uytterhoeven , Magnus Damm , Greg Kroah-Hartman , Jiri Slaby Cc: Miquel Raynal , Andy Shevchenko , linux-renesas-soc@vger.kernel.org, linux-serial@vger.kernel.org, Milan Stevanovic , Jimmy Lalande , Pascal Eberhard , Thomas Petazzoni , Herve Codina , Clement Leger Subject: [PATCH v4 9/9] ARM: dts: r9a06g032: Fill the UART DMA properties Date: Wed, 30 Mar 2022 15:20:38 +0200 Message-Id: <20220330132038.808679-10-miquel.raynal@bootlin.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20220330132038.808679-1-miquel.raynal@bootlin.com> References: <20220330132038.808679-1-miquel.raynal@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-serial@vger.kernel.org UART 0 to 2 do not have DMA support, while UART 3 to 7 do. Fill the "dmas" and "dma-names" properties for each of these nodes. Please mind that these nodes go through the dmamux node which will redirect the requests to the right DMA controller. The first 4 cells of the "dmas" properties will be transferred as-is to the DMA controllers. The last 2 cells are consumed by the dmamux. Which means cell 0 and 4 are almost redundant, one giving the controller request ID and the other the dmamux channel which is a 1:1 translation of the request IDs, shifted by 16 when pointing to the second DMA controller. Signed-off-by: Miquel Raynal --- arch/arm/boot/dts/r9a06g032.dtsi | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/arch/arm/boot/dts/r9a06g032.dtsi b/arch/arm/boot/dts/r9a06g032.dtsi index 804f2d6f416f..aa447e2622e0 100644 --- a/arch/arm/boot/dts/r9a06g032.dtsi +++ b/arch/arm/boot/dts/r9a06g032.dtsi @@ -128,6 +128,9 @@ uart3: serial@50000000 { reg-io-width = <4>; clocks = <&sysctrl R9A06G032_CLK_UART3>, <&sysctrl R9A06G032_HCLK_UART3>; clock-names = "baudclk", "apb_pclk"; + dmas = <&dmamux 0 0 0 0 0 1>, + <&dmamux 1 0 0 0 1 1>; + dma-names = "rx", "tx"; status = "disabled"; }; @@ -139,6 +142,9 @@ uart4: serial@50001000 { reg-io-width = <4>; clocks = <&sysctrl R9A06G032_CLK_UART4>, <&sysctrl R9A06G032_HCLK_UART4>; clock-names = "baudclk", "apb_pclk"; + dmas = <&dmamux 2 0 0 0 2 1>, + <&dmamux 3 0 0 0 3 1>; + dma-names = "rx", "tx"; status = "disabled"; }; @@ -150,6 +156,9 @@ uart5: serial@50002000 { reg-io-width = <4>; clocks = <&sysctrl R9A06G032_CLK_UART5>, <&sysctrl R9A06G032_HCLK_UART5>; clock-names = "baudclk", "apb_pclk"; + dmas = <&dmamux 4 0 0 0 4 1>, + <&dmamux 5 0 0 0 5 1>; + dma-names = "rx", "tx"; status = "disabled"; }; @@ -161,6 +170,9 @@ uart6: serial@50003000 { reg-io-width = <4>; clocks = <&sysctrl R9A06G032_CLK_UART6>, <&sysctrl R9A06G032_HCLK_UART6>; clock-names = "baudclk", "apb_pclk"; + dmas = <&dmamux 6 0 0 0 6 1>, + <&dmamux 7 0 0 0 7 1>; + dma-names = "rx", "tx"; status = "disabled"; }; @@ -172,6 +184,9 @@ uart7: serial@50004000 { reg-io-width = <4>; clocks = <&sysctrl R9A06G032_CLK_UART7>, <&sysctrl R9A06G032_HCLK_UART7>; clock-names = "baudclk", "apb_pclk"; + dmas = <&dmamux 4 0 0 0 20 1>, + <&dmamux 5 0 0 0 21 1>; + dma-names = "rx", "tx"; status = "disabled"; };