From patchwork Tue Apr 5 13:50:28 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Satya Priya Kakitapalli \(Temp\)" X-Patchwork-Id: 556287 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 41862C433EF for ; Tue, 5 Apr 2022 23:34:07 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1456890AbiDEXHN (ORCPT ); Tue, 5 Apr 2022 19:07:13 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48440 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1442147AbiDEPhC (ORCPT ); Tue, 5 Apr 2022 11:37:02 -0400 Received: from alexa-out.qualcomm.com (alexa-out.qualcomm.com [129.46.98.28]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 067CAECB23; Tue, 5 Apr 2022 06:51:15 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; i=@quicinc.com; q=dns/txt; s=qcdkim; t=1649166677; x=1680702677; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version; bh=/SGY5EudjaGdSXrVzfUtedVft2d5wnuxaMlMNW2aRB0=; b=bDib/z5acJoDX72Rq0ubmgNBrtCtrPuMLTklQhg7YnPgddIYXswV85Xq CWoEAISiZ/elzyyctQbrk4GPkwZV/EK3EMOacBkZ4oEH7HE+bgUr2Tiet 1b2jcOSDbyzGrayNYeIwn5gnIu4bwHcOrD3zhtGc6W3PRWaljzt2owj3M g=; Received: from ironmsg07-lv.qualcomm.com ([10.47.202.151]) by alexa-out.qualcomm.com with ESMTP; 05 Apr 2022 06:51:15 -0700 X-QCInternal: smtphost Received: from nasanex01c.na.qualcomm.com ([10.47.97.222]) by ironmsg07-lv.qualcomm.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 05 Apr 2022 06:51:15 -0700 Received: from nalasex01a.na.qualcomm.com (10.47.209.196) by nasanex01c.na.qualcomm.com (10.47.97.222) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.22; Tue, 5 Apr 2022 06:51:14 -0700 Received: from c-skakit-linux.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.22; Tue, 5 Apr 2022 06:51:10 -0700 From: Satya Priya To: Bjorn Andersson , Rob Herring CC: Lee Jones , Liam Girdwood , Mark Brown , , , , , , , , Satya Priya Subject: [PATCH V9 1/6] dt-bindings: mfd: pm8008: Add reset-gpios Date: Tue, 5 Apr 2022 19:20:28 +0530 Message-ID: <1649166633-25872-2-git-send-email-quic_c_skakit@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1649166633-25872-1-git-send-email-quic_c_skakit@quicinc.com> References: <1649166633-25872-1-git-send-email-quic_c_skakit@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01a.na.qualcomm.com (10.47.209.196) Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add reset-gpios property for pm8008. Signed-off-by: Satya Priya Reviewed-by: Rob Herring --- Changes in V7: - Removed the intermediate regulators node and added ldos directly under mfd node. Changes in V8: - Change the compatible as per driver, remove interrupts from required properties, add reset-gpios and move regulators to separate binding. Changes in V9: - Undo the changes from V8 and only add reset-gpios. Leave interrupts as required properties and do not change compatible. Documentation/devicetree/bindings/mfd/qcom,pm8008.yaml | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/Documentation/devicetree/bindings/mfd/qcom,pm8008.yaml b/Documentation/devicetree/bindings/mfd/qcom,pm8008.yaml index ec3138c..3312784 100644 --- a/Documentation/devicetree/bindings/mfd/qcom,pm8008.yaml +++ b/Documentation/devicetree/bindings/mfd/qcom,pm8008.yaml @@ -44,6 +44,9 @@ properties: "#size-cells": const: 0 + reset-gpios: + maxItems: 1 + patternProperties: "^gpio@[0-9a-f]+$": type: object @@ -92,6 +95,7 @@ required: - "#address-cells" - "#size-cells" - "#interrupt-cells" + - reset-gpios additionalProperties: false @@ -99,6 +103,7 @@ examples: - | #include #include + #include qupv3_se13_i2c { #address-cells = <1>; #size-cells = <0>; @@ -113,6 +118,8 @@ examples: interrupt-parent = <&tlmm>; interrupts = <32 IRQ_TYPE_EDGE_RISING>; + reset-gpios = <&pm8350c_gpios 4 GPIO_ACTIVE_HIGH>; + pm8008_gpios: gpio@c000 { compatible = "qcom,pm8008-gpio", "qcom,spmi-gpio"; reg = <0xc000>; From patchwork Tue Apr 5 13:50:33 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Satya Priya Kakitapalli \(Temp\)" X-Patchwork-Id: 556288 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 39C0BC43217 for ; Tue, 5 Apr 2022 23:26:59 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1455412AbiDEXHF (ORCPT ); Tue, 5 Apr 2022 19:07:05 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39156 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1442422AbiDEPhk (ORCPT ); Tue, 5 Apr 2022 11:37:40 -0400 Received: from alexa-out-sd-02.qualcomm.com (alexa-out-sd-02.qualcomm.com [199.106.114.39]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 29EB2111DD8; Tue, 5 Apr 2022 06:51:53 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; i=@quicinc.com; q=dns/txt; s=qcdkim; t=1649166713; x=1680702713; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version; bh=5+nWAPFQHv6Q16Bxq/GwQj6VzCNcFVPIYMa5uQiSOBU=; b=ZNQLPuExRktDuO3QUPcaEEaJhceRk2h+SvKRHCwuU0S2g+0Yty7WBYBW f78U9xlsFPUap+/29LTjspm8aSHEHFVlaRHUYlBh+Xhdt3PCFlgKDdMOO 9g6QYtkcVaXYQztJWcj8c3jGPRB5U4KCk8u0We7HLxvuiDpCporPcgpUi Y=; Received: from unknown (HELO ironmsg03-sd.qualcomm.com) ([10.53.140.143]) by alexa-out-sd-02.qualcomm.com with ESMTP; 05 Apr 2022 06:51:52 -0700 X-QCInternal: smtphost Received: from nasanex01c.na.qualcomm.com ([10.47.97.222]) by ironmsg03-sd.qualcomm.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 05 Apr 2022 06:51:37 -0700 Received: from nalasex01a.na.qualcomm.com (10.47.209.196) by nasanex01c.na.qualcomm.com (10.47.97.222) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.22; Tue, 5 Apr 2022 06:51:36 -0700 Received: from c-skakit-linux.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.22; Tue, 5 Apr 2022 06:51:32 -0700 From: Satya Priya To: Bjorn Andersson , Rob Herring CC: Lee Jones , Liam Girdwood , Mark Brown , , , , , , , , Satya Priya Subject: [PATCH V9 6/6] arm64: dts: qcom: sc7280: Add pm8008 support for sc7280-idp Date: Tue, 5 Apr 2022 19:20:33 +0530 Message-ID: <1649166633-25872-7-git-send-email-quic_c_skakit@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1649166633-25872-1-git-send-email-quic_c_skakit@quicinc.com> References: <1649166633-25872-1-git-send-email-quic_c_skakit@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01a.na.qualcomm.com (10.47.209.196) Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add pm8008 infra and regulators support for sc7280 idp. Signed-off-by: Satya Priya --- Changes in V6: - No changes. Changes in V7: - No Changes. Changes in V8: - Add an extra phandle "pm8008_bus" and then include pm8008 dtsi files inside it. - Remove output-high from pm8008_active node. Changes in V9: - Added interrupts properties. arch/arm64/boot/dts/qcom/sc7280-idp.dtsi | 68 ++++++++++++++++++++++++++++++++ 1 file changed, 68 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi b/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi index ecbf2b8..6f39c05 100644 --- a/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi @@ -263,6 +263,65 @@ }; }; +pm8008_bus: &i2c1 { + status = "okay"; +}; + +#include "pm8008.dtsi" + +&pm8008 { + interrupt-parent = <&tlmm>; + interrupts = <24 IRQ_TYPE_EDGE_RISING>; + + pinctrl-names = "default"; + pinctrl-0 = <&pm8008_active>; + + reset-gpios = <&pm8350c_gpios 4 GPIO_ACTIVE_HIGH>; +}; + +&pm8008_regulators { + vdd_l1_l2-supply = <&vreg_s8b_1p2>; + vdd_l3_l4-supply = <&vreg_s1b_1p8>; + vdd_l5-supply = <&vreg_bob>; + vdd_l6-supply = <&vreg_bob>; + vdd_l7-supply = <&vreg_bob>; +}; + +&pm8008_l1 { + regulator-min-microvolt = <950000>; + regulator-max-microvolt = <1300000>; +}; + +&pm8008_l2 { + regulator-min-microvolt = <950000>; + regulator-max-microvolt = <1250000>; +}; + +&pm8008_l3 { + regulator-min-microvolt = <1650000>; + regulator-max-microvolt = <3000000>; +}; + +&pm8008_l4 { + regulator-min-microvolt = <1504000>; + regulator-max-microvolt = <1600000>; +}; + +&pm8008_l5 { + regulator-min-microvolt = <2600000>; + regulator-max-microvolt = <3000000>; +}; + +&pm8008_l6 { + regulator-min-microvolt = <2600000>; + regulator-max-microvolt = <3000000>; +}; + +&pm8008_l7 { + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3544000>; +}; + &qfprom { vcc-supply = <&vreg_l1c_1p8>; }; @@ -375,6 +434,15 @@ drive-strength = <2>; }; +&pm8350c_gpios { + pm8008_active: pm8008-active { + pins = "gpio4"; + function = "normal"; + bias-disable; + power-source = <0>; + }; +}; + &qspi_cs0 { bias-disable; };