From patchwork Fri Apr 22 18:06:07 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Miquel Raynal X-Patchwork-Id: 565991 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 667E6C4332F for ; Fri, 22 Apr 2022 18:10:46 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232366AbiDVSNf (ORCPT ); Fri, 22 Apr 2022 14:13:35 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40448 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S238396AbiDVSJQ (ORCPT ); Fri, 22 Apr 2022 14:09:16 -0400 Received: from relay11.mail.gandi.net (relay11.mail.gandi.net [217.70.178.231]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A86FA120128; Fri, 22 Apr 2022 11:06:21 -0700 (PDT) Received: (Authenticated sender: miquel.raynal@bootlin.com) by mail.gandi.net (Postfix) with ESMTPSA id 673B5100007; Fri, 22 Apr 2022 18:06:18 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1650650780; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=nmsT1v66CywnMC5pd1HYcLiX68Qd1cxasJCF38vdWXo=; b=hO0D3kOpOeoejXVXlWHf/oWs+luebNBMtiDHELwXqqyeff/a/2HWm/Gf6+3IE3n0i4pZvc 94LXB0KQGyEYyAesi7EF+Rwi2isuLMFJgvaR6wCL+rnKmPMwSXP7ikdcaolVrNa5d8I2ls cdWgBPxpMqqZl3z5BrSg10E0mt9M/thC0QDbBxgDdGrq2TrTWLnvCQO1cv7DQ165KOU/j2 S/+GOe2JY3Tq1JYqGqJXnoFmaGZjaxPwdxG6rkfQk+2k35qRZ8HzcHaKDsgmPwaO2DhzVs mqPRxk9Xf4BZh1aZH6ZIoBygM3Fh1EVrx1HpqXFfvr801YcCoUnVWGDhabjE8g== From: Miquel Raynal To: Geert Uytterhoeven , Magnus Damm , Greg Kroah-Hartman , Jiri Slaby Cc: Miquel Raynal , Andy Shevchenko , linux-renesas-soc@vger.kernel.org, linux-serial@vger.kernel.org, Milan Stevanovic , Jimmy Lalande , Pascal Eberhard , Thomas Petazzoni , Herve Codina , Clement Leger , Ilpo Jarvinen , Phil Edworthy Subject: [PATCH v7 1/9] serial: 8250: dw: Move definitions to the shared header Date: Fri, 22 Apr 2022 20:06:07 +0200 Message-Id: <20220422180615.9098-2-miquel.raynal@bootlin.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20220422180615.9098-1-miquel.raynal@bootlin.com> References: <20220422180615.9098-1-miquel.raynal@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-serial@vger.kernel.org From: Phil Edworthy Move the per-device structure and a helper out of the main .c file, into a shared header as they will both be reused from another .c file. There is no functional change. Signed-off-by: Phil Edworthy [miquel.raynal@bootlin.com: Extracted from a bigger change] Signed-off-by: Miquel Raynal Reviewed-by: Andy Shevchenko --- drivers/tty/serial/8250/8250_dw.c | 21 --------------------- drivers/tty/serial/8250/8250_dwlib.h | 26 ++++++++++++++++++++++++++ 2 files changed, 26 insertions(+), 21 deletions(-) diff --git a/drivers/tty/serial/8250/8250_dw.c b/drivers/tty/serial/8250/8250_dw.c index 1769808031c5..dcbe54ccd16b 100644 --- a/drivers/tty/serial/8250/8250_dw.c +++ b/drivers/tty/serial/8250/8250_dw.c @@ -37,27 +37,6 @@ /* DesignWare specific register fields */ #define DW_UART_MCR_SIRE BIT(6) -struct dw8250_data { - struct dw8250_port_data data; - - u8 usr_reg; - int msr_mask_on; - int msr_mask_off; - struct clk *clk; - struct clk *pclk; - struct notifier_block clk_notifier; - struct work_struct clk_work; - struct reset_control *rst; - - unsigned int skip_autocfg:1; - unsigned int uart_16550_compatible:1; -}; - -static inline struct dw8250_data *to_dw8250_data(struct dw8250_port_data *data) -{ - return container_of(data, struct dw8250_data, data); -} - static inline struct dw8250_data *clk_to_dw8250_data(struct notifier_block *nb) { return container_of(nb, struct dw8250_data, clk_notifier); diff --git a/drivers/tty/serial/8250/8250_dwlib.h b/drivers/tty/serial/8250/8250_dwlib.h index 83d528e5cc21..72e7dbcccad0 100644 --- a/drivers/tty/serial/8250/8250_dwlib.h +++ b/drivers/tty/serial/8250/8250_dwlib.h @@ -1,10 +1,15 @@ /* SPDX-License-Identifier: GPL-2.0+ */ /* Synopsys DesignWare 8250 library header file. */ +#include #include +#include #include "8250.h" +struct clk; +struct reset_control; + struct dw8250_port_data { /* Port properties */ int line; @@ -16,5 +21,26 @@ struct dw8250_port_data { u8 dlf_size; }; +struct dw8250_data { + struct dw8250_port_data data; + + u8 usr_reg; + int msr_mask_on; + int msr_mask_off; + struct clk *clk; + struct clk *pclk; + struct notifier_block clk_notifier; + struct work_struct clk_work; + struct reset_control *rst; + + unsigned int skip_autocfg:1; + unsigned int uart_16550_compatible:1; +}; + void dw8250_do_set_termios(struct uart_port *p, struct ktermios *termios, struct ktermios *old); void dw8250_setup_port(struct uart_port *p); + +static inline struct dw8250_data *to_dw8250_data(struct dw8250_port_data *data) +{ + return container_of(data, struct dw8250_data, data); +} From patchwork Fri Apr 22 18:06:08 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Miquel Raynal X-Patchwork-Id: 565185 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5A0DDC433F5 for ; Fri, 22 Apr 2022 18:10:48 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232996AbiDVSNi (ORCPT ); Fri, 22 Apr 2022 14:13:38 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40588 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S238397AbiDVSJS (ORCPT ); Fri, 22 Apr 2022 14:09:18 -0400 Received: from relay11.mail.gandi.net (relay11.mail.gandi.net [217.70.178.231]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9D3EB120D13; Fri, 22 Apr 2022 11:06:23 -0700 (PDT) Received: (Authenticated sender: miquel.raynal@bootlin.com) by mail.gandi.net (Postfix) with ESMTPSA id 7ADC6100008; Fri, 22 Apr 2022 18:06:20 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1650650782; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=fH8vPkT4dWPPGb/8XoLObFxHw6R65IrJ2LRqxUIBB1A=; b=P8pOAIJPCn/P5/2cwdN3czs8QkcEMf4U24eU+4V9+rhDqP35ErLXjo+h/p1D4LKjYy2zx6 sqBzNT5UC9bDPd4R/BjpGxMlNkilnq+Lg/U/tqGRyk0UY8tONdybkU2JvcsbJlUIxZLpoZ Z2Crh5Oyl3g63h0kpmtFnPQT9wOKLMp53jIhVlFutO/QhrwGyhen8Mf2DYE1pjnOl+JVNB Sq0Av8XKF37WGpc8ezxBBokon1CkSvLAj6DCtUTNUxC0qCpf4/rPrhbaT0+7uGAeOOElpi 3FpbM4Ws85nDIjYIt5JkxWRmCbjxCi7fk3kkuW/N7NOLuaqNWBfCtC/Q9w6ctw== From: Miquel Raynal To: Geert Uytterhoeven , Magnus Damm , Greg Kroah-Hartman , Jiri Slaby Cc: Miquel Raynal , Andy Shevchenko , linux-renesas-soc@vger.kernel.org, linux-serial@vger.kernel.org, Milan Stevanovic , Jimmy Lalande , Pascal Eberhard , Thomas Petazzoni , Herve Codina , Clement Leger , Ilpo Jarvinen , Emil Renner Berthing Subject: [PATCH v7 2/9] serial: 8250: dw: Create a generic platform data structure Date: Fri, 22 Apr 2022 20:06:08 +0200 Message-Id: <20220422180615.9098-3-miquel.raynal@bootlin.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20220422180615.9098-1-miquel.raynal@bootlin.com> References: <20220422180615.9098-1-miquel.raynal@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-serial@vger.kernel.org From: Emil Renner Berthing Use device tree match data rather than multiple calls to of_device_is_compatible() by introducing a platform data structure and adding a quirks mask. Provide a stub to the compatibles without quirks to simplify the handling of the upcoming changes. Signed-off-by: Emil Renner Berthing [ Reviewed-by: Geert Uytterhoeven Reviewed-by: Andy Shevchenko --- drivers/tty/serial/8250/8250_dw.c | 42 ++++++++++++++++++++++------ drivers/tty/serial/8250/8250_dwlib.h | 5 ++++ 2 files changed, 39 insertions(+), 8 deletions(-) diff --git a/drivers/tty/serial/8250/8250_dw.c b/drivers/tty/serial/8250/8250_dw.c index dcbe54ccd16b..7fdb2683f534 100644 --- a/drivers/tty/serial/8250/8250_dw.c +++ b/drivers/tty/serial/8250/8250_dw.c @@ -19,6 +19,7 @@ #include #include #include +#include #include #include #include @@ -37,6 +38,11 @@ /* DesignWare specific register fields */ #define DW_UART_MCR_SIRE BIT(6) +/* Quirks */ +#define DW_UART_QUIRK_OCTEON BIT(0) +#define DW_UART_QUIRK_ARMADA_38X BIT(1) +#define DW_UART_QUIRK_SKIP_SET_RATE BIT(2) + static inline struct dw8250_data *clk_to_dw8250_data(struct notifier_block *nb) { return container_of(nb, struct dw8250_data, clk_notifier); @@ -366,6 +372,7 @@ static bool dw8250_idma_filter(struct dma_chan *chan, void *param) static void dw8250_quirks(struct uart_port *p, struct dw8250_data *data) { struct device_node *np = p->dev->of_node; + unsigned int quirks = data->pdata->quirks; if (np) { int id; @@ -375,7 +382,7 @@ static void dw8250_quirks(struct uart_port *p, struct dw8250_data *data) if (id >= 0) p->line = id; #ifdef CONFIG_64BIT - if (of_device_is_compatible(np, "cavium,octeon-3860-uart")) { + if (quirks & DW_UART_QUIRK_OCTEON) { p->serial_in = dw8250_serial_inq; p->serial_out = dw8250_serial_outq; p->flags = UPF_SKIP_TEST | UPF_SHARE_IRQ | UPF_FIXED_TYPE; @@ -391,9 +398,9 @@ static void dw8250_quirks(struct uart_port *p, struct dw8250_data *data) p->serial_out = dw8250_serial_out32be; } - if (of_device_is_compatible(np, "marvell,armada-38x-uart")) + if (quirks & DW_UART_QUIRK_ARMADA_38X) p->serial_out = dw8250_serial_out38x; - if (of_device_is_compatible(np, "starfive,jh7100-uart")) + if (quirks & DW_UART_QUIRK_SKIP_SET_RATE) p->set_termios = dw8250_do_set_termios; } else if (acpi_dev_present("APMC0D08", NULL, -1)) { @@ -456,6 +463,7 @@ static int dw8250_probe(struct platform_device *pdev) data->data.dma.fn = dw8250_fallback_dma_filter; data->usr_reg = DW_UART_USR; + data->pdata = device_get_match_data(p->dev); p->private_data = &data->data; data->uart_16550_compatible = device_property_read_bool(dev, @@ -672,12 +680,30 @@ static const struct dev_pm_ops dw8250_pm_ops = { SET_RUNTIME_PM_OPS(dw8250_runtime_suspend, dw8250_runtime_resume, NULL) }; +static const struct dw8250_platform_data dw8250_dw_apb = { +}; + +static const struct dw8250_platform_data dw8250_octeon_3860_data = { + .quirks = DW_UART_QUIRK_OCTEON, +}; + +static const struct dw8250_platform_data dw8250_armada_38x_data = { + .quirks = DW_UART_QUIRK_ARMADA_38X, +}; + +static const struct dw8250_platform_data dw8250_renesas_rzn1_data = { +}; + +static const struct dw8250_platform_data dw8250_starfive_jh7100_data = { + .quirks = DW_UART_QUIRK_SKIP_SET_RATE, +}; + static const struct of_device_id dw8250_of_match[] = { - { .compatible = "snps,dw-apb-uart" }, - { .compatible = "cavium,octeon-3860-uart" }, - { .compatible = "marvell,armada-38x-uart" }, - { .compatible = "renesas,rzn1-uart" }, - { .compatible = "starfive,jh7100-uart" }, + { .compatible = "snps,dw-apb-uart", .data = &dw8250_dw_apb }, + { .compatible = "cavium,octeon-3860-uart", .data = &dw8250_octeon_3860_data }, + { .compatible = "marvell,armada-38x-uart", .data = &dw8250_armada_38x_data }, + { .compatible = "renesas,rzn1-uart", .data = &dw8250_renesas_rzn1_data }, + { .compatible = "starfive,jh7100-uart", .data = &dw8250_starfive_jh7100_data }, { /* Sentinel */ } }; MODULE_DEVICE_TABLE(of, dw8250_of_match); diff --git a/drivers/tty/serial/8250/8250_dwlib.h b/drivers/tty/serial/8250/8250_dwlib.h index 72e7dbcccad0..68bb81bee660 100644 --- a/drivers/tty/serial/8250/8250_dwlib.h +++ b/drivers/tty/serial/8250/8250_dwlib.h @@ -21,8 +21,13 @@ struct dw8250_port_data { u8 dlf_size; }; +struct dw8250_platform_data { + unsigned int quirks; +}; + struct dw8250_data { struct dw8250_port_data data; + const struct dw8250_platform_data *pdata; u8 usr_reg; int msr_mask_on; From patchwork Fri Apr 22 18:06:09 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Miquel Raynal X-Patchwork-Id: 565990 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C69F1C4332F for ; Fri, 22 Apr 2022 18:10:49 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233195AbiDVSNj (ORCPT ); Fri, 22 Apr 2022 14:13:39 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40704 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S238408AbiDVSJT (ORCPT ); Fri, 22 Apr 2022 14:09:19 -0400 Received: from relay11.mail.gandi.net (relay11.mail.gandi.net [217.70.178.231]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3DCE4120D13; Fri, 22 Apr 2022 11:06:25 -0700 (PDT) Received: (Authenticated sender: miquel.raynal@bootlin.com) by mail.gandi.net (Postfix) with ESMTPSA id 6DC0B10000A; Fri, 22 Apr 2022 18:06:22 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1650650783; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=6PKwEIeql6uYeuItC4CotOv1F8iaZ9GjXTTYBwTsneM=; b=h5bsfckoKQ1d1AqQc+yKwZhv0kAuWNVq9qfIxUnbWkVxUS4nYfCuYHhMDy0I7nLoZv5oe2 tcznYgMk8hrL0pMuQx4AYjK7Nz0iMtPiZ6d8Hvi2gDWnCQYxGxvYMv8WGDgTNvriXWHSSu lHtUdbm7t7eG5wTKPxTO3Idwbyc2j41IbyO+5u8oKXoa9jUJHNy721tXoJEcXqQHhcjgWQ XwycDdEel8qjtPA21fiRHO02//gBtdJLsjcBLzTAfy8gOS5FlnG8RypoTknOnu/S8lLimL xIm+/0Guy1WoDOq/DY+7H1Feab4XWG2H4Mzwwti2aZu76pXAsgS2JX5Zxu36Kg== From: Miquel Raynal To: Geert Uytterhoeven , Magnus Damm , Greg Kroah-Hartman , Jiri Slaby Cc: Miquel Raynal , Andy Shevchenko , linux-renesas-soc@vger.kernel.org, linux-serial@vger.kernel.org, Milan Stevanovic , Jimmy Lalande , Pascal Eberhard , Thomas Petazzoni , Herve Codina , Clement Leger , Ilpo Jarvinen Subject: [PATCH v7 3/9] serial: 8250: dw: Move the USR register to pdata Date: Fri, 22 Apr 2022 20:06:09 +0200 Message-Id: <20220422180615.9098-4-miquel.raynal@bootlin.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20220422180615.9098-1-miquel.raynal@bootlin.com> References: <20220422180615.9098-1-miquel.raynal@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-serial@vger.kernel.org This offset is a good candidate to pdata's because it changes depending on the vendor implementation. Let's move the usr_reg entry from regular to pdata. This way we can drop initializing it at run time. Let's also use a define for it instead of defining only the default value. Suggested-by: Andy Shevchenko Signed-off-by: Miquel Raynal Reviewed-by: Andy Shevchenko --- drivers/tty/serial/8250/8250_dw.c | 11 ++++++++--- drivers/tty/serial/8250/8250_dwlib.h | 2 +- 2 files changed, 9 insertions(+), 4 deletions(-) diff --git a/drivers/tty/serial/8250/8250_dw.c b/drivers/tty/serial/8250/8250_dw.c index 7fdb2683f534..b34edc88af3d 100644 --- a/drivers/tty/serial/8250/8250_dw.c +++ b/drivers/tty/serial/8250/8250_dw.c @@ -35,6 +35,8 @@ /* Offsets for the DesignWare specific registers */ #define DW_UART_USR 0x1f /* UART Status Register */ +#define OCTEON_UART_USR 0x27 /* UART Status Register */ + /* DesignWare specific register fields */ #define DW_UART_MCR_SIRE BIT(6) @@ -251,7 +253,7 @@ static int dw8250_handle_irq(struct uart_port *p) if ((iir & UART_IIR_BUSY) == UART_IIR_BUSY) { /* Clear the USR */ - (void)p->serial_in(p, d->usr_reg); + (void)p->serial_in(p, d->pdata->usr_reg); return 1; } @@ -387,7 +389,6 @@ static void dw8250_quirks(struct uart_port *p, struct dw8250_data *data) p->serial_out = dw8250_serial_outq; p->flags = UPF_SKIP_TEST | UPF_SHARE_IRQ | UPF_FIXED_TYPE; p->type = PORT_OCTEON; - data->usr_reg = 0x27; data->skip_autocfg = true; } #endif @@ -462,7 +463,6 @@ static int dw8250_probe(struct platform_device *pdev) return -ENOMEM; data->data.dma.fn = dw8250_fallback_dma_filter; - data->usr_reg = DW_UART_USR; data->pdata = device_get_match_data(p->dev); p->private_data = &data->data; @@ -681,20 +681,25 @@ static const struct dev_pm_ops dw8250_pm_ops = { }; static const struct dw8250_platform_data dw8250_dw_apb = { + .usr_reg = DW_UART_USR, }; static const struct dw8250_platform_data dw8250_octeon_3860_data = { + .usr_reg = OCTEON_UART_USR, .quirks = DW_UART_QUIRK_OCTEON, }; static const struct dw8250_platform_data dw8250_armada_38x_data = { + .usr_reg = DW_UART_USR, .quirks = DW_UART_QUIRK_ARMADA_38X, }; static const struct dw8250_platform_data dw8250_renesas_rzn1_data = { + .usr_reg = DW_UART_USR, }; static const struct dw8250_platform_data dw8250_starfive_jh7100_data = { + .usr_reg = DW_UART_USR, .quirks = DW_UART_QUIRK_SKIP_SET_RATE, }; diff --git a/drivers/tty/serial/8250/8250_dwlib.h b/drivers/tty/serial/8250/8250_dwlib.h index 68bb81bee660..0df6baa6eaee 100644 --- a/drivers/tty/serial/8250/8250_dwlib.h +++ b/drivers/tty/serial/8250/8250_dwlib.h @@ -22,6 +22,7 @@ struct dw8250_port_data { }; struct dw8250_platform_data { + u8 usr_reg; unsigned int quirks; }; @@ -29,7 +30,6 @@ struct dw8250_data { struct dw8250_port_data data; const struct dw8250_platform_data *pdata; - u8 usr_reg; int msr_mask_on; int msr_mask_off; struct clk *clk; From patchwork Fri Apr 22 18:06:10 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Miquel Raynal X-Patchwork-Id: 565187 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A7DA8C433FE for ; Fri, 22 Apr 2022 18:10:41 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229544AbiDVSN3 (ORCPT ); Fri, 22 Apr 2022 14:13:29 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40962 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234683AbiDVSJX (ORCPT ); Fri, 22 Apr 2022 14:09:23 -0400 Received: from relay11.mail.gandi.net (relay11.mail.gandi.net [IPv6:2001:4b98:dc4:8::231]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 31CCC120D27; Fri, 22 Apr 2022 11:06:27 -0700 (PDT) Received: (Authenticated sender: miquel.raynal@bootlin.com) by mail.gandi.net (Postfix) with ESMTPSA id 40745100002; Fri, 22 Apr 2022 18:06:24 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1650650786; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=GW04PeL3gt042YVBAD6j+Utxak9HjtBATEu5WEj2ZLE=; b=j5DF08Nt8FD++0RdXayZC9UP8O+Z+sLE9pAUQ7eYg4aJh7Gcb390h38PrgMjOpkFUThhFC UitcwnFVGsPgyJ7CVMOFdRTl+S8caw5D2K9rkbPSAGAr6dmcqrhLFHbqw46QkLfEpL6OWe +nJA8rGaoFHZjAlZYsZXph3L4pE2uWtZnnisD/MDdpj44p/b+XWtM5Yd8SMOxi7PPKiUBW 3EK2yYXEfPXWV1vZDMvGw9SP4Egj6jRDVDLZMKrSnRFMEKs/DcvLWLuavdWOoU7vha01qx bPV6imS0jXN5vvLGBthac6Z67IqT0dYi5qnnSDCIkbRh1ESsk4f+fk2VEBRqJw== From: Miquel Raynal To: Geert Uytterhoeven , Magnus Damm , Greg Kroah-Hartman , Jiri Slaby Cc: Miquel Raynal , Andy Shevchenko , linux-renesas-soc@vger.kernel.org, linux-serial@vger.kernel.org, Milan Stevanovic , Jimmy Lalande , Pascal Eberhard , Thomas Petazzoni , Herve Codina , Clement Leger , Ilpo Jarvinen , Phil Edworthy Subject: [PATCH v7 4/9] serial: 8250: dw: Allow to use a fallback CPR value if not synthesized Date: Fri, 22 Apr 2022 20:06:10 +0200 Message-Id: <20220422180615.9098-5-miquel.raynal@bootlin.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20220422180615.9098-1-miquel.raynal@bootlin.com> References: <20220422180615.9098-1-miquel.raynal@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-serial@vger.kernel.org DW UART controllers can be synthesized without the CPR register. In this case, allow to the platform information to provide a CPR value. Co-developed-by: Phil Edworthy Signed-off-by: Phil Edworthy Signed-off-by: Miquel Raynal Reviewed-by: Andy Shevchenko --- drivers/tty/serial/8250/8250_dwlib.c | 10 +++++++--- drivers/tty/serial/8250/8250_dwlib.h | 1 + 2 files changed, 8 insertions(+), 3 deletions(-) diff --git a/drivers/tty/serial/8250/8250_dwlib.c b/drivers/tty/serial/8250/8250_dwlib.c index 622d3b0d89e7..f1fb20353612 100644 --- a/drivers/tty/serial/8250/8250_dwlib.c +++ b/drivers/tty/serial/8250/8250_dwlib.c @@ -89,6 +89,8 @@ EXPORT_SYMBOL_GPL(dw8250_do_set_termios); void dw8250_setup_port(struct uart_port *p) { + struct dw8250_port_data *pd = p->private_data; + struct dw8250_data *data = to_dw8250_data(pd); struct uart_8250_port *up = up_to_u8250p(p); u32 reg; @@ -108,14 +110,16 @@ void dw8250_setup_port(struct uart_port *p) dw8250_writel_ext(p, DW_UART_DLF, 0); if (reg) { - struct dw8250_port_data *d = p->private_data; - - d->dlf_size = fls(reg); + pd->dlf_size = fls(reg); p->get_divisor = dw8250_get_divisor; p->set_divisor = dw8250_set_divisor; } reg = dw8250_readl_ext(p, DW_UART_CPR); + if (!reg) { + reg = data->pdata->cpr_val; + dev_dbg(p->dev, "CPR is not available, using 0x%08x instead\n", reg); + } if (!reg) return; diff --git a/drivers/tty/serial/8250/8250_dwlib.h b/drivers/tty/serial/8250/8250_dwlib.h index 0df6baa6eaee..36a839ef5d9a 100644 --- a/drivers/tty/serial/8250/8250_dwlib.h +++ b/drivers/tty/serial/8250/8250_dwlib.h @@ -23,6 +23,7 @@ struct dw8250_port_data { struct dw8250_platform_data { u8 usr_reg; + u32 cpr_val; unsigned int quirks; }; From patchwork Fri Apr 22 18:06:11 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Miquel Raynal X-Patchwork-Id: 565993 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B2FC9C4332F for ; Fri, 22 Apr 2022 18:10:39 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229962AbiDVSN1 (ORCPT ); Fri, 22 Apr 2022 14:13:27 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43730 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233898AbiDVSJw (ORCPT ); Fri, 22 Apr 2022 14:09:52 -0400 Received: from relay11.mail.gandi.net (relay11.mail.gandi.net [217.70.178.231]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 22FD61597A5; Fri, 22 Apr 2022 11:06:56 -0700 (PDT) Received: (Authenticated sender: miquel.raynal@bootlin.com) by mail.gandi.net (Postfix) with ESMTPSA id 6774A100003; Fri, 22 Apr 2022 18:06:26 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1650650788; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=rh1mhKL3IupsKIdYvrmsC8AoyceKcBqCY/2ew65HEPI=; b=U1U3QA1nkQT+UI0wtcA4/ffw5gOSbY0C5B5wNQXGfNn3PIP5h1vmWVuKHyQ6ChjNpySqIs Di3GTHJff1gD7wMV+dhJzIpqk5sxmH0n2/+rej/DI2eCM5W5CRVey86qm5Y9w6PSe56wzW SH7+8fAH37QWoxf/LRhcKnufM7piIUtl9duVjs3lZ0fE5UITwxlJvWEEu6yWQUQdXPtrX5 +rSY8JlGIVUk/nO4LaP6P8zZjfXIRWgad83C4d2bFwPAFdlLXwxBwSSZUmxaFc4DlQ6lQ1 kZO56a2UrTUoHtK8EvND8o0q5VYxY6hVFVO9h8IjJDrp97jZ/BPQw9iOakjXSw== From: Miquel Raynal To: Geert Uytterhoeven , Magnus Damm , Greg Kroah-Hartman , Jiri Slaby Cc: Miquel Raynal , Andy Shevchenko , linux-renesas-soc@vger.kernel.org, linux-serial@vger.kernel.org, Milan Stevanovic , Jimmy Lalande , Pascal Eberhard , Thomas Petazzoni , Herve Codina , Clement Leger , Ilpo Jarvinen Subject: [PATCH v7 5/9] serial: 8250: dma: Allow driver operations before starting DMA transfers Date: Fri, 22 Apr 2022 20:06:11 +0200 Message-Id: <20220422180615.9098-6-miquel.raynal@bootlin.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20220422180615.9098-1-miquel.raynal@bootlin.com> References: <20220422180615.9098-1-miquel.raynal@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-serial@vger.kernel.org One situation where this could be used is when configuring the UART controller to be the DMA flow controller. This is a typical case where the driver might need to program a few more registers before starting a DMA transfer. Provide the necessary infrastructure to support this case. Suggested-by: Andy Shevchenko Signed-off-by: Miquel Raynal Reviewed-by: Andy Shevchenko --- drivers/tty/serial/8250/8250.h | 18 ++++++++++++++++++ drivers/tty/serial/8250/8250_dma.c | 4 ++++ 2 files changed, 22 insertions(+) diff --git a/drivers/tty/serial/8250/8250.h b/drivers/tty/serial/8250/8250.h index 39ffeb37786f..5a4e05c0e552 100644 --- a/drivers/tty/serial/8250/8250.h +++ b/drivers/tty/serial/8250/8250.h @@ -17,6 +17,8 @@ struct uart_8250_dma { int (*tx_dma)(struct uart_8250_port *p); int (*rx_dma)(struct uart_8250_port *p); + void (*prepare_tx_dma)(struct uart_8250_port *p); + void (*prepare_rx_dma)(struct uart_8250_port *p); /* Filter function */ dma_filter_fn fn; @@ -302,6 +304,22 @@ extern int serial8250_rx_dma(struct uart_8250_port *); extern void serial8250_rx_dma_flush(struct uart_8250_port *); extern int serial8250_request_dma(struct uart_8250_port *); extern void serial8250_release_dma(struct uart_8250_port *); + +static inline void serial8250_do_prepare_tx_dma(struct uart_8250_port *p) +{ + struct uart_8250_dma *dma = p->dma; + + if (dma->prepare_tx_dma) + dma->prepare_tx_dma(p); +} + +static inline void serial8250_do_prepare_rx_dma(struct uart_8250_port *p) +{ + struct uart_8250_dma *dma = p->dma; + + if (dma->prepare_rx_dma) + dma->prepare_rx_dma(p); +} #else static inline int serial8250_tx_dma(struct uart_8250_port *p) { diff --git a/drivers/tty/serial/8250/8250_dma.c b/drivers/tty/serial/8250/8250_dma.c index b3c3f7e5851a..1bdc8d6432fe 100644 --- a/drivers/tty/serial/8250/8250_dma.c +++ b/drivers/tty/serial/8250/8250_dma.c @@ -86,6 +86,8 @@ int serial8250_tx_dma(struct uart_8250_port *p) dma->tx_size = CIRC_CNT_TO_END(xmit->head, xmit->tail, UART_XMIT_SIZE); + serial8250_do_prepare_tx_dma(p); + desc = dmaengine_prep_slave_single(dma->txchan, dma->tx_addr + xmit->tail, dma->tx_size, DMA_MEM_TO_DEV, @@ -123,6 +125,8 @@ int serial8250_rx_dma(struct uart_8250_port *p) if (dma->rx_running) return 0; + serial8250_do_prepare_rx_dma(p); + desc = dmaengine_prep_slave_single(dma->rxchan, dma->rx_addr, dma->rx_size, DMA_DEV_TO_MEM, DMA_PREP_INTERRUPT | DMA_CTRL_ACK); From patchwork Fri Apr 22 18:06:12 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Miquel Raynal X-Patchwork-Id: 565184 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 93AFEC433F5 for ; Fri, 22 Apr 2022 18:10:50 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233312AbiDVSNl (ORCPT ); Fri, 22 Apr 2022 14:13:41 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42242 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234470AbiDVSJh (ORCPT ); Fri, 22 Apr 2022 14:09:37 -0400 Received: from relay11.mail.gandi.net (relay11.mail.gandi.net [IPv6:2001:4b98:dc4:8::231]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id BFE2B1586D5; Fri, 22 Apr 2022 11:06:42 -0700 (PDT) Received: (Authenticated sender: miquel.raynal@bootlin.com) by mail.gandi.net (Postfix) with ESMTPSA id 195E1100006; Fri, 22 Apr 2022 18:06:28 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1650650790; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=1o9gHj8wxamYjHVCuaoFpSvvDAO8QSz0Ljq85N7Dk7I=; b=jUznzKZN6/EzDoCCbdRs6vO987ce+XYJY8xPOraKGfaREZp8PkHWJmG9MEVU51Qdi+z/Ul uxNoGJQmpGsMnDDsNFZ/fwfjT611Aa1UggxEYzNNvFGtg6hkN9Fdj82vVWPhDh7H+/Y8mW n7Dg/CjhFyecSoWG93laq2G5dlwVIWSdEndH3jzmpNNWPyveYQEugnpUiNeVo6AK6V5UNY dLOOxdwtilYxk67qRxcFgRAUD3NdzQNjPorZlIEwQFPfq6jTKuEywQ06jWr96VQAZc92cj EPiJy7Iffeb/WtnzOuct/bVvmQ6XzhFg2s0z1jD9P1EMoxYqPXl6+BiUEea3kA== From: Miquel Raynal To: Geert Uytterhoeven , Magnus Damm , Greg Kroah-Hartman , Jiri Slaby Cc: Miquel Raynal , Andy Shevchenko , linux-renesas-soc@vger.kernel.org, linux-serial@vger.kernel.org, Milan Stevanovic , Jimmy Lalande , Pascal Eberhard , Thomas Petazzoni , Herve Codina , Clement Leger , Ilpo Jarvinen Subject: [PATCH v7 6/9] serial: 8250: dw: Introduce an rx_timeout variable in the IRQ path Date: Fri, 22 Apr 2022 20:06:12 +0200 Message-Id: <20220422180615.9098-7-miquel.raynal@bootlin.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20220422180615.9098-1-miquel.raynal@bootlin.com> References: <20220422180615.9098-1-miquel.raynal@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-serial@vger.kernel.org In a next change we are going to need the same Rx timeout condition as we already have in the IRQ handling code. Let's just create a boolean to clarify what this operation does before reusing it. There is no functional change. Signed-off-by: Miquel Raynal Reviewed-by: Andy Shevchenko --- drivers/tty/serial/8250/8250_dw.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/tty/serial/8250/8250_dw.c b/drivers/tty/serial/8250/8250_dw.c index b34edc88af3d..ef3f05c82ad6 100644 --- a/drivers/tty/serial/8250/8250_dw.c +++ b/drivers/tty/serial/8250/8250_dw.c @@ -225,6 +225,7 @@ static int dw8250_handle_irq(struct uart_port *p) struct uart_8250_port *up = up_to_u8250p(p); struct dw8250_data *d = to_dw8250_data(p->private_data); unsigned int iir = p->serial_in(p, UART_IIR); + bool rx_timeout = (iir & 0x3f) == UART_IIR_RX_TIMEOUT; unsigned int status; unsigned long flags; @@ -238,7 +239,7 @@ static int dw8250_handle_irq(struct uart_port *p) * This problem has only been observed so far when not in DMA mode * so we limit the workaround only to non-DMA mode. */ - if (!up->dma && ((iir & 0x3f) == UART_IIR_RX_TIMEOUT)) { + if (!up->dma && rx_timeout) { spin_lock_irqsave(&p->lock, flags); status = p->serial_in(p, UART_LSR); From patchwork Fri Apr 22 18:06:13 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Miquel Raynal X-Patchwork-Id: 565186 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id BDD43C433F5 for ; Fri, 22 Apr 2022 18:10:44 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231958AbiDVSNe (ORCPT ); Fri, 22 Apr 2022 14:13:34 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44686 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234737AbiDVSKD (ORCPT ); Fri, 22 Apr 2022 14:10:03 -0400 Received: from relay11.mail.gandi.net (relay11.mail.gandi.net [217.70.178.231]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E47DF15B452; Fri, 22 Apr 2022 11:07:08 -0700 (PDT) Received: (Authenticated sender: miquel.raynal@bootlin.com) by mail.gandi.net (Postfix) with ESMTPSA id A08E4100002; Fri, 22 Apr 2022 18:06:30 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1650650792; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-type:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=CQTwgZcq4HqCPFwdxSXAHd+ul51T09kMifPhktLxBDE=; b=Yr0yFRMw1BcKoQJF907x86oadQeKZUTGkFJE9LcV+uA7kR7pbwKbrRrp15GPzrBVRy/nEI rOQao+8bIE+I/eUN/T7V+rkffPbQ992yoEWJA65lzmjRBuYMP+lgtT86K/b+H1YLC7SpL8 Mu40n6/8eN1VCfG5VAaSavvIQSMQdw240M3FHQXDeil1yXgGmafbvfJeNsICr7UKodT+9X iLf+nzhEx8becApRo71MUUU6WqzP0qhBr9/VVH0RVVdt+JlZihVJCUtHDCTzp2dOY0VFmp rgv47UptJGC+FR9fBcj4r//wgyTEd17pxPmVNckR2t8XOZpF4bQWcX+DH+XA+w== From: Miquel Raynal To: Geert Uytterhoeven , Magnus Damm , Greg Kroah-Hartman , Jiri Slaby Cc: Miquel Raynal , Andy Shevchenko , linux-renesas-soc@vger.kernel.org, linux-serial@vger.kernel.org, Milan Stevanovic , Jimmy Lalande , Pascal Eberhard , Thomas Petazzoni , Herve Codina , Clement Leger , Ilpo Jarvinen Subject: [PATCH v7 7/9] serial: 8250: dw: Move the IO accessors to 8250_dwlib.h Date: Fri, 22 Apr 2022 20:06:13 +0200 Message-Id: <20220422180615.9098-8-miquel.raynal@bootlin.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20220422180615.9098-1-miquel.raynal@bootlin.com> References: <20220422180615.9098-1-miquel.raynal@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-serial@vger.kernel.org These accessors should be used instead of the regular readl/writel() helpers. In order to use them also from 8250_dw.c in this directory, move the helpers to 8250_dwlib.h There is no functional change. There is no need for declaring `struct uart_port` or even UPIO_MEM32BE which both are already included in the 8250_dwlib.h header by 8250.h. Suggested-by: Ilpo Järvinen Signed-off-by: Miquel Raynal Reviewed-by: Andy Shevchenko --- drivers/tty/serial/8250/8250_dwlib.c | 16 ---------------- drivers/tty/serial/8250/8250_dwlib.h | 16 ++++++++++++++++ 2 files changed, 16 insertions(+), 16 deletions(-) diff --git a/drivers/tty/serial/8250/8250_dwlib.c b/drivers/tty/serial/8250/8250_dwlib.c index f1fb20353612..b3df6dee9ceb 100644 --- a/drivers/tty/serial/8250/8250_dwlib.c +++ b/drivers/tty/serial/8250/8250_dwlib.c @@ -3,7 +3,6 @@ #include #include -#include #include #include #include @@ -32,21 +31,6 @@ /* Helper for FIFO size calculation */ #define DW_UART_CPR_FIFO_SIZE(a) (((a >> 16) & 0xff) * 16) -static inline u32 dw8250_readl_ext(struct uart_port *p, int offset) -{ - if (p->iotype == UPIO_MEM32BE) - return ioread32be(p->membase + offset); - return readl(p->membase + offset); -} - -static inline void dw8250_writel_ext(struct uart_port *p, int offset, u32 reg) -{ - if (p->iotype == UPIO_MEM32BE) - iowrite32be(reg, p->membase + offset); - else - writel(reg, p->membase + offset); -} - /* * divisor = div(I) + div(F) * "I" means integer, "F" means fractional diff --git a/drivers/tty/serial/8250/8250_dwlib.h b/drivers/tty/serial/8250/8250_dwlib.h index 36a839ef5d9a..b10e60a5d16a 100644 --- a/drivers/tty/serial/8250/8250_dwlib.h +++ b/drivers/tty/serial/8250/8250_dwlib.h @@ -1,6 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0+ */ /* Synopsys DesignWare 8250 library header file. */ +#include #include #include #include @@ -50,3 +51,18 @@ static inline struct dw8250_data *to_dw8250_data(struct dw8250_port_data *data) { return container_of(data, struct dw8250_data, data); } + +static inline u32 dw8250_readl_ext(struct uart_port *p, int offset) +{ + if (p->iotype == UPIO_MEM32BE) + return ioread32be(p->membase + offset); + return readl(p->membase + offset); +} + +static inline void dw8250_writel_ext(struct uart_port *p, int offset, u32 reg) +{ + if (p->iotype == UPIO_MEM32BE) + iowrite32be(reg, p->membase + offset); + else + writel(reg, p->membase + offset); +} From patchwork Fri Apr 22 18:06:14 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Miquel Raynal X-Patchwork-Id: 565992 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D1005C4332F for ; Fri, 22 Apr 2022 18:10:42 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231320AbiDVSNc (ORCPT ); Fri, 22 Apr 2022 14:13:32 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42992 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233306AbiDVSJq (ORCPT ); Fri, 22 Apr 2022 14:09:46 -0400 Received: from relay11.mail.gandi.net (relay11.mail.gandi.net [IPv6:2001:4b98:dc4:8::231]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id DB63E1594B1; Fri, 22 Apr 2022 11:06:50 -0700 (PDT) Received: (Authenticated sender: miquel.raynal@bootlin.com) by mail.gandi.net (Postfix) with ESMTPSA id B86F7100007; Fri, 22 Apr 2022 18:06:32 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1650650794; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=22QNVg6uSLAoA0tE56JQu0CNN8Oej1eCBOWwcucJ1cc=; b=B2nojxgHo+7ZCwykW7ensKGhNKv2jStErzZXdBcukoCUd6o2LZKQsn2l7Mqc1KKcr6ai5f US4T3Y0jLg7dgRcQ8T8HHft/HOnuc6yvr/laicBx0vPZySq2btzDTAx3KtFAh1sV8dhG/M phReOEYV4EyTM1vV/1TPL+S5cNyoCDgPZgvauEhkKHd7WaHmSTAbW+uOrYOcGBc5Bv/ZJy ZoYNrcs5noLGrVLQVideBdsbdyH+X6wa8rXBDJYjYrdesaxbmlbtjp3Ge2Pyl9lHLA9++7 YgR5oUk2gVMleSXmyMr6w8kVosmkrHCd1E8RsrYuXGVPgJtXdk69eJQ4P32d7w== From: Miquel Raynal To: Geert Uytterhoeven , Magnus Damm , Greg Kroah-Hartman , Jiri Slaby Cc: Miquel Raynal , Andy Shevchenko , linux-renesas-soc@vger.kernel.org, linux-serial@vger.kernel.org, Milan Stevanovic , Jimmy Lalande , Pascal Eberhard , Thomas Petazzoni , Herve Codina , Clement Leger , Ilpo Jarvinen , Phil Edworthy Subject: [PATCH v7 8/9] serial: 8250: dw: Add support for DMA flow controlling devices Date: Fri, 22 Apr 2022 20:06:14 +0200 Message-Id: <20220422180615.9098-9-miquel.raynal@bootlin.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20220422180615.9098-1-miquel.raynal@bootlin.com> References: <20220422180615.9098-1-miquel.raynal@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-serial@vger.kernel.org From: Phil Edworthy DW based controllers like the one on Renesas RZ/N1 must be programmed as flow controllers when using DMA. * Table 11.45 of the system manual, "Flow Control Combinations", states that using UART with DMA requires setting the DMA in the peripheral flow controller mode regardless of the direction. * Chapter 11.6.1.3 of the system manual, "Basic Interface Definitions", explains that the burst size in the above case must be configured in the peripheral's register DEST/SRC_BURST_SIZE. Experiments shown that upon Rx timeout, the DMA transaction needed to be manually cleared as well. Signed-off-by: Phil Edworthy Co-developed-by: Miquel Raynal Signed-off-by: Miquel Raynal Reviewed-by: Andy Shevchenko --- drivers/tty/serial/8250/8250_dw.c | 64 +++++++++++++++++++++++++++++++ 1 file changed, 64 insertions(+) diff --git a/drivers/tty/serial/8250/8250_dw.c b/drivers/tty/serial/8250/8250_dw.c index ef3f05c82ad6..90e64c8bd4bf 100644 --- a/drivers/tty/serial/8250/8250_dw.c +++ b/drivers/tty/serial/8250/8250_dw.c @@ -34,16 +34,28 @@ /* Offsets for the DesignWare specific registers */ #define DW_UART_USR 0x1f /* UART Status Register */ +#define DW_UART_DMASA 0xa8 /* DMA Software Ack */ #define OCTEON_UART_USR 0x27 /* UART Status Register */ +#define RZN1_UART_TDMACR 0x10c /* DMA Control Register Transmit Mode */ +#define RZN1_UART_RDMACR 0x110 /* DMA Control Register Receive Mode */ + /* DesignWare specific register fields */ #define DW_UART_MCR_SIRE BIT(6) +/* Renesas specific register fields */ +#define RZN1_UART_xDMACR_DMA_EN BIT(0) +#define RZN1_UART_xDMACR_1_WORD_BURST (0 << 1) +#define RZN1_UART_xDMACR_4_WORD_BURST (1 << 1) +#define RZN1_UART_xDMACR_8_WORD_BURST (3 << 1) +#define RZN1_UART_xDMACR_BLK_SZ(x) ((x) << 3) + /* Quirks */ #define DW_UART_QUIRK_OCTEON BIT(0) #define DW_UART_QUIRK_ARMADA_38X BIT(1) #define DW_UART_QUIRK_SKIP_SET_RATE BIT(2) +#define DW_UART_QUIRK_IS_DMA_FC BIT(3) static inline struct dw8250_data *clk_to_dw8250_data(struct notifier_block *nb) { @@ -226,6 +238,7 @@ static int dw8250_handle_irq(struct uart_port *p) struct dw8250_data *d = to_dw8250_data(p->private_data); unsigned int iir = p->serial_in(p, UART_IIR); bool rx_timeout = (iir & 0x3f) == UART_IIR_RX_TIMEOUT; + unsigned int quirks = d->pdata->quirks; unsigned int status; unsigned long flags; @@ -249,6 +262,15 @@ static int dw8250_handle_irq(struct uart_port *p) spin_unlock_irqrestore(&p->lock, flags); } + /* Manually stop the Rx DMA transfer when acting as flow controller */ + if (quirks & DW_UART_QUIRK_IS_DMA_FC && up->dma && up->dma->rx_running && rx_timeout) { + status = p->serial_in(p, UART_LSR); + if (status & (UART_LSR_DR | UART_LSR_BI)) { + dw8250_writel_ext(p, RZN1_UART_RDMACR, 0); + dw8250_writel_ext(p, DW_UART_DMASA, 1); + } + } + if (serial8250_handle_irq(p, iir)) return 1; @@ -372,6 +394,42 @@ static bool dw8250_idma_filter(struct dma_chan *chan, void *param) return param == chan->device->dev; } +static u32 dw8250_rzn1_get_dmacr_burst(int max_burst) +{ + if (max_burst >= 8) + return RZN1_UART_xDMACR_8_WORD_BURST; + else if (max_burst >= 4) + return RZN1_UART_xDMACR_4_WORD_BURST; + else + return RZN1_UART_xDMACR_1_WORD_BURST; +} + +static void dw8250_prepare_tx_dma(struct uart_8250_port *p) +{ + struct uart_port *up = &p->port; + struct uart_8250_dma *dma = p->dma; + u32 val; + + dw8250_writel_ext(up, RZN1_UART_TDMACR, 0); + val = dw8250_rzn1_get_dmacr_burst(dma->txconf.dst_maxburst) | + RZN1_UART_xDMACR_BLK_SZ(dma->tx_size) | + RZN1_UART_xDMACR_DMA_EN; + dw8250_writel_ext(up, RZN1_UART_TDMACR, val); +} + +static void dw8250_prepare_rx_dma(struct uart_8250_port *p) +{ + struct uart_port *up = &p->port; + struct uart_8250_dma *dma = p->dma; + u32 val; + + dw8250_writel_ext(up, RZN1_UART_RDMACR, 0); + val = dw8250_rzn1_get_dmacr_burst(dma->rxconf.src_maxburst) | + RZN1_UART_xDMACR_BLK_SZ(dma->rx_size) | + RZN1_UART_xDMACR_DMA_EN; + dw8250_writel_ext(up, RZN1_UART_RDMACR, val); +} + static void dw8250_quirks(struct uart_port *p, struct dw8250_data *data) { struct device_node *np = p->dev->of_node; @@ -404,6 +462,12 @@ static void dw8250_quirks(struct uart_port *p, struct dw8250_data *data) p->serial_out = dw8250_serial_out38x; if (quirks & DW_UART_QUIRK_SKIP_SET_RATE) p->set_termios = dw8250_do_set_termios; + if (quirks & DW_UART_QUIRK_IS_DMA_FC) { + data->data.dma.txconf.device_fc = 1; + data->data.dma.rxconf.device_fc = 1; + data->data.dma.prepare_tx_dma = dw8250_prepare_tx_dma; + data->data.dma.prepare_rx_dma = dw8250_prepare_rx_dma; + } } else if (acpi_dev_present("APMC0D08", NULL, -1)) { p->iotype = UPIO_MEM32; From patchwork Fri Apr 22 18:06:15 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Miquel Raynal X-Patchwork-Id: 565989 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 32DC0C433FE for ; Fri, 22 Apr 2022 18:10:55 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233446AbiDVSNm (ORCPT ); Fri, 22 Apr 2022 14:13:42 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44802 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234779AbiDVSKE (ORCPT ); Fri, 22 Apr 2022 14:10:04 -0400 Received: from relay11.mail.gandi.net (relay11.mail.gandi.net [217.70.178.231]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5EC3815B46C; Fri, 22 Apr 2022 11:07:10 -0700 (PDT) Received: (Authenticated sender: miquel.raynal@bootlin.com) by mail.gandi.net (Postfix) with ESMTPSA id C5A51100008; Fri, 22 Apr 2022 18:06:34 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1650650796; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=InYlcnp2sDm4ChkUXG4xyc4b9OP+smT4t/tQR4FHwzw=; b=krxB/j1VLxHYflaeOYpxgSRpNiHJQuzzRMPvW9G3vmAIXiI/kFL0esitjydF+WMV4EzJye fyCRh+hiS47pns/xwZHQ9tzsSOMZrsbfmyTa0uCVuDfYQWR6VO3OH5b1WNrnjOIZrpYC7C fHazs+P2lwCwiMnAZMngU4qLGVMAfI5nPRlQQ2CQPEKY9loQWmWUJDWkRBSlsKl1eBTTgw 0Rs/3HlgUZX08hhoW8hQp3yn+ls097RcRGt9KhQoosEZ15eVrNT0TTvGDdoJQej0fwHrSu ZSD7Ryh7x2KmZ7t0lfX3MNWfPD890BisxRSj0+LHqhyAH5IqORdG4h6xkpJ32g== From: Miquel Raynal To: Geert Uytterhoeven , Magnus Damm , Greg Kroah-Hartman , Jiri Slaby Cc: Miquel Raynal , Andy Shevchenko , linux-renesas-soc@vger.kernel.org, linux-serial@vger.kernel.org, Milan Stevanovic , Jimmy Lalande , Pascal Eberhard , Thomas Petazzoni , Herve Codina , Clement Leger , Ilpo Jarvinen , Phil Edworthy Subject: [PATCH v7 9/9] serial: 8250: dw: Improve RZN1 support Date: Fri, 22 Apr 2022 20:06:15 +0200 Message-Id: <20220422180615.9098-10-miquel.raynal@bootlin.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20220422180615.9098-1-miquel.raynal@bootlin.com> References: <20220422180615.9098-1-miquel.raynal@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-serial@vger.kernel.org From: Phil Edworthy Renesas RZ/N1 SoC features a slightly modified DW UART. On this SoC, the CPR register value is known but not synthetized in hardware. We hence need to provide a CPR value in the platform data. This version of the controller also relies on acting as flow controller when using DMA, so we need to provide the "is dma flow controller" quirk. Signed-off-by: Phil Edworthy Co-developed-by: Miquel Raynal Signed-off-by: Miquel Raynal Reviewed-by: Andy Shevchenko --- drivers/tty/serial/8250/8250_dw.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/tty/serial/8250/8250_dw.c b/drivers/tty/serial/8250/8250_dw.c index 90e64c8bd4bf..0cf1a99dc124 100644 --- a/drivers/tty/serial/8250/8250_dw.c +++ b/drivers/tty/serial/8250/8250_dw.c @@ -761,6 +761,8 @@ static const struct dw8250_platform_data dw8250_armada_38x_data = { static const struct dw8250_platform_data dw8250_renesas_rzn1_data = { .usr_reg = DW_UART_USR, + .cpr_val = 0x00012f32, + .quirks = DW_UART_QUIRK_IS_DMA_FC, }; static const struct dw8250_platform_data dw8250_starfive_jh7100_data = {