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[198.145.21.10]) by mx.google.com with ESMTPS id a8si770262pgw.380.2018.12.18.05.10.23 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 18 Dec 2018 05:10:23 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 198.145.21.10 as permitted sender) client-ip=198.145.21.10; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=IMCKM8vY; spf=pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 198.145.21.10 as permitted sender) smtp.mailfrom=edk2-devel-bounces@lists.01.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id 8B3762119EF41; Tue, 18 Dec 2018 05:10:22 -0800 (PST) X-Original-To: edk2-devel@lists.01.org Delivered-To: edk2-devel@lists.01.org Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2a00:1450:4864:20::542; helo=mail-ed1-x542.google.com; envelope-from=ard.biesheuvel@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-ed1-x542.google.com (mail-ed1-x542.google.com [IPv6:2a00:1450:4864:20::542]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 57E2E2119AC2B for ; Tue, 18 Dec 2018 05:10:21 -0800 (PST) Received: by mail-ed1-x542.google.com with SMTP id h50so13825310ede.5 for ; Tue, 18 Dec 2018 05:10:21 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=F1a75r7VfhWUyjRKN+DNvUTlOxWt5Q51EHGVZK6nxNI=; b=IMCKM8vYXvuVRdiJddctgGzwUIKwUBCYSVjIzB1cMrWq7IXk2Sa0mtRmQcszgD94+u ydRm0Ey/4t75x2aM5NpODiv/ZgLGdfOak1bLAoRZ3vOegodBBe+R2iCe0vWvYuuX8Wj1 e8T2ZhjASE6j+4Dbt47SJ0ZOpvZlhJ5ViGCTY= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=F1a75r7VfhWUyjRKN+DNvUTlOxWt5Q51EHGVZK6nxNI=; b=iRDp/76NOYaWHEnXbWhedxr5WnueYwq2/JBZB3EEY48ZTqPWU6qRGYD1s70ygl62Dh oQ3NunpXuvOxf90ktHPwog9epZLzJaAs1UGsBY6xXRmD9q0sx2/m4y0xods9xJ4Aysv5 xw5+Rn0ArR8iDkpbm+mX9iv76ChUbRKHqAo4hNHqRox3GxYIOMbmKhDpaWH4TFzz/VV8 mQzNQNUl47479dwcfROHjakXPLAMjHcdQP4RPVeXaLtl90V56rksuhyDpCKrvF6MVGF4 puI97/H603l1S3pTNBlW7h+SO5c4l/XPr85Ed7xt1za4m7gfJRJ6/Lt+S4OTn1g0FNOu jeqw== X-Gm-Message-State: AA+aEWb6lauyyILi+ijQd7n3nLqD3GdUyPK41a1I+WUkl9NpRs7bIzrG GLP4wKCu5JY9EoB6xAebCrdUwlX1b2rkeaXY X-Received: by 2002:a17:906:7143:: with SMTP id z3-v6mr13325947ejj.241.1545138619129; Tue, 18 Dec 2018 05:10:19 -0800 (PST) Received: from mba13.arnhem.chello.nl (dhcp-077-251-017-237.chello.nl. [77.251.17.237]) by smtp.gmail.com with ESMTPSA id f6sm4384755ede.53.2018.12.18.05.10.17 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 18 Dec 2018 05:10:18 -0800 (PST) From: Ard Biesheuvel To: edk2-devel@lists.01.org Date: Tue, 18 Dec 2018 14:10:11 +0100 Message-Id: <20181218131015.20062-2-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20181218131015.20062-1-ard.biesheuvel@linaro.org> References: <20181218131015.20062-1-ard.biesheuvel@linaro.org> Subject: [edk2] [PATCH 1/4] ArmPlatformPkg/SP805WatchdogDxe: cosmetic cleanup X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" Before fixing the SP805 driver, let's clean it up a bit. No functional changes. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel --- ArmPlatformPkg/Drivers/SP805WatchdogDxe/SP805Watchdog.c | 97 ++++++++++---------- ArmPlatformPkg/Drivers/SP805WatchdogDxe/SP805WatchdogDxe.inf | 13 +-- 2 files changed, 53 insertions(+), 57 deletions(-) -- 2.17.1 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel Reviewed-by: Leif Lindholm diff --git a/ArmPlatformPkg/Drivers/SP805WatchdogDxe/SP805Watchdog.c b/ArmPlatformPkg/Drivers/SP805WatchdogDxe/SP805Watchdog.c index 0a9f64095bf8..12c2f0a1fe49 100644 --- a/ArmPlatformPkg/Drivers/SP805WatchdogDxe/SP805Watchdog.c +++ b/ArmPlatformPkg/Drivers/SP805WatchdogDxe/SP805Watchdog.c @@ -1,6 +1,7 @@ /** @file * * Copyright (c) 2011-2013, ARM Limited. All rights reserved. +* Copyright (c) 2018, Linaro Limited. All rights reserved. * * This program and the accompanying materials * are licensed and made available under the terms and conditions of the BSD License @@ -19,16 +20,13 @@ #include #include #include -#include #include -#include -#include #include #include "SP805Watchdog.h" -EFI_EVENT EfiExitBootServicesEvent = (EFI_EVENT)NULL; +STATIC EFI_EVENT mEfiExitBootServicesEvent; /** Make sure the SP805 registers are unlocked for writing. @@ -43,8 +41,8 @@ SP805Unlock ( VOID ) { - if( MmioRead32(SP805_WDOG_LOCK_REG) == SP805_WDOG_LOCK_IS_LOCKED ) { - MmioWrite32(SP805_WDOG_LOCK_REG, SP805_WDOG_SPECIAL_UNLOCK_CODE); + if (MmioRead32 (SP805_WDOG_LOCK_REG) == SP805_WDOG_LOCK_IS_LOCKED) { + MmioWrite32 (SP805_WDOG_LOCK_REG, SP805_WDOG_SPECIAL_UNLOCK_CODE); } } @@ -61,9 +59,9 @@ SP805Lock ( VOID ) { - if( MmioRead32(SP805_WDOG_LOCK_REG) == SP805_WDOG_LOCK_IS_UNLOCKED ) { + if (MmioRead32 (SP805_WDOG_LOCK_REG) == SP805_WDOG_LOCK_IS_UNLOCKED) { // To lock it, just write in any number (except the special unlock code). - MmioWrite32(SP805_WDOG_LOCK_REG, SP805_WDOG_LOCK_IS_LOCKED); + MmioWrite32 (SP805_WDOG_LOCK_REG, SP805_WDOG_LOCK_IS_LOCKED); } } @@ -77,8 +75,8 @@ SP805Stop ( ) { // Disable interrupts - if ( (MmioRead32(SP805_WDOG_CONTROL_REG) & SP805_WDOG_CTRL_INTEN) != 0 ) { - MmioAnd32(SP805_WDOG_CONTROL_REG, ~SP805_WDOG_CTRL_INTEN); + if ((MmioRead32 (SP805_WDOG_CONTROL_REG) & SP805_WDOG_CTRL_INTEN) != 0) { + MmioAnd32 (SP805_WDOG_CONTROL_REG, ~SP805_WDOG_CTRL_INTEN); } } @@ -94,8 +92,8 @@ SP805Start ( ) { // Enable interrupts - if ( (MmioRead32(SP805_WDOG_CONTROL_REG) & SP805_WDOG_CTRL_INTEN) == 0 ) { - MmioOr32(SP805_WDOG_CONTROL_REG, SP805_WDOG_CTRL_INTEN); + if ((MmioRead32 (SP805_WDOG_CONTROL_REG) & SP805_WDOG_CTRL_INTEN) == 0) { + MmioOr32 (SP805_WDOG_CONTROL_REG, SP805_WDOG_CTRL_INTEN); } } @@ -103,6 +101,7 @@ SP805Start ( On exiting boot services we must make sure the SP805 Watchdog Timer is stopped. **/ +STATIC VOID EFIAPI ExitBootServicesEvent ( @@ -110,9 +109,9 @@ ExitBootServicesEvent ( IN VOID *Context ) { - SP805Unlock(); - SP805Stop(); - SP805Lock(); + SP805Unlock (); + SP805Stop (); + SP805Lock (); } /** @@ -142,10 +141,11 @@ ExitBootServicesEvent ( previously registered. **/ +STATIC EFI_STATUS EFIAPI SP805RegisterHandler ( - IN CONST EFI_WATCHDOG_TIMER_ARCH_PROTOCOL *This, + IN EFI_WATCHDOG_TIMER_ARCH_PROTOCOL *This, IN EFI_WATCHDOG_TIMER_NOTIFY NotifyFunction ) { @@ -182,22 +182,24 @@ SP805RegisterHandler ( @retval EFI_DEVICE_ERROR The timer period could not be changed due to a device error. **/ +STATIC EFI_STATUS EFIAPI SP805SetTimerPeriod ( - IN CONST EFI_WATCHDOG_TIMER_ARCH_PROTOCOL *This, + IN EFI_WATCHDOG_TIMER_ARCH_PROTOCOL *This, IN UINT64 TimerPeriod // In 100ns units ) { - EFI_STATUS Status = EFI_SUCCESS; + EFI_STATUS Status; UINT64 Ticks64bit; - SP805Unlock(); + SP805Unlock (); - if( TimerPeriod == 0 ) { + Status = EFI_SUCCESS; + + if (TimerPeriod == 0) { // This is a watchdog stop request - SP805Stop(); - goto EXIT; + SP805Stop (); } else { // Calculate the Watchdog ticks required for a delay of (TimerTicks * 100) nanoseconds // The SP805 will count down to ZERO once, generate an interrupt and @@ -211,10 +213,11 @@ SP805SetTimerPeriod ( // // WatchdogTicks = (TimerPeriod * SP805_CLOCK_FREQUENCY) / 20 MHz ; - Ticks64bit = DivU64x32(MultU64x32(TimerPeriod, (UINTN)PcdGet32(PcdSP805WatchdogClockFrequencyInHz)), 20000000); + Ticks64bit = MultU64x32 (TimerPeriod, PcdGet32 (PcdSP805WatchdogClockFrequencyInHz)); + Ticks64bit = DivU64x32 (Ticks64bit, 20000000); // The registers in the SP805 are only 32 bits - if(Ticks64bit > (UINT64)0xFFFFFFFF) { + if (Ticks64bit > MAX_UINT32) { // We could load the watchdog with the maximum supported value but // if a smaller value was requested, this could have the watchdog // triggering before it was intended. @@ -224,15 +227,15 @@ SP805SetTimerPeriod ( } // Update the watchdog with a 32-bit value. - MmioWrite32(SP805_WDOG_LOAD_REG, (UINT32)Ticks64bit); + MmioWrite32 (SP805_WDOG_LOAD_REG, (UINT32)Ticks64bit); // Start the watchdog - SP805Start(); + SP805Start (); } - EXIT: +EXIT: // Ensure the watchdog is locked before exiting. - SP805Lock(); + SP805Lock (); return Status; } @@ -251,14 +254,14 @@ SP805SetTimerPeriod ( @retval EFI_INVALID_PARAMETER TimerPeriod is NULL. **/ +STATIC EFI_STATUS EFIAPI SP805GetTimerPeriod ( - IN CONST EFI_WATCHDOG_TIMER_ARCH_PROTOCOL *This, + IN EFI_WATCHDOG_TIMER_ARCH_PROTOCOL *This, OUT UINT64 *TimerPeriod ) { - EFI_STATUS Status = EFI_SUCCESS; UINT64 ReturnValue; if (TimerPeriod == NULL) { @@ -266,19 +269,19 @@ SP805GetTimerPeriod ( } // Check if the watchdog is stopped - if ( (MmioRead32(SP805_WDOG_CONTROL_REG) & SP805_WDOG_CTRL_INTEN) == 0 ) { + if ((MmioRead32 (SP805_WDOG_CONTROL_REG) & SP805_WDOG_CTRL_INTEN) == 0) { // It is stopped, so return zero. ReturnValue = 0; } else { // Convert the Watchdog ticks into TimerPeriod // Ensure 64bit arithmetic throughout because the Watchdog ticks may already // be at the maximum 32 bit value and we still need to multiply that by 600. - ReturnValue = MultU64x32( MmioRead32(SP805_WDOG_LOAD_REG), 600 ); + ReturnValue = MultU64x32 (MmioRead32 (SP805_WDOG_LOAD_REG), 600); } *TimerPeriod = ReturnValue; - return Status; + return EFI_SUCCESS; } /** @@ -313,10 +316,10 @@ SP805GetTimerPeriod ( Retrieves the period of the timer interrupt in 100 nS units. **/ -EFI_WATCHDOG_TIMER_ARCH_PROTOCOL gWatchdogTimer = { - (EFI_WATCHDOG_TIMER_REGISTER_HANDLER) SP805RegisterHandler, - (EFI_WATCHDOG_TIMER_SET_TIMER_PERIOD) SP805SetTimerPeriod, - (EFI_WATCHDOG_TIMER_GET_TIMER_PERIOD) SP805GetTimerPeriod +STATIC EFI_WATCHDOG_TIMER_ARCH_PROTOCOL mWatchdogTimer = { + SP805RegisterHandler, + SP805SetTimerPeriod, + SP805GetTimerPeriod }; /** @@ -347,12 +350,12 @@ SP805Initialize ( SP805Stop (); // Set the watchdog to reset the board when triggered - if ((MmioRead32(SP805_WDOG_CONTROL_REG) & SP805_WDOG_CTRL_RESEN) == 0) { + if ((MmioRead32 (SP805_WDOG_CONTROL_REG) & SP805_WDOG_CTRL_RESEN) == 0) { MmioOr32 (SP805_WDOG_CONTROL_REG, SP805_WDOG_CTRL_RESEN); } // Prohibit any rogue access to SP805 registers - SP805Lock(); + SP805Lock (); // // Make sure the Watchdog Timer Architectural Protocol has not been installed in the system yet. @@ -361,28 +364,26 @@ SP805Initialize ( ASSERT_PROTOCOL_ALREADY_INSTALLED (NULL, &gEfiWatchdogTimerArchProtocolGuid); // Register for an ExitBootServicesEvent - Status = gBS->CreateEvent (EVT_SIGNAL_EXIT_BOOT_SERVICES, TPL_NOTIFY, ExitBootServicesEvent, NULL, &EfiExitBootServicesEvent); - if (EFI_ERROR(Status)) { + Status = gBS->CreateEvent (EVT_SIGNAL_EXIT_BOOT_SERVICES, TPL_NOTIFY, + ExitBootServicesEvent, NULL, &mEfiExitBootServicesEvent); + if (EFI_ERROR (Status)) { Status = EFI_OUT_OF_RESOURCES; goto EXIT; } // Install the Timer Architectural Protocol onto a new handle Handle = NULL; - Status = gBS->InstallMultipleProtocolInterfaces( + Status = gBS->InstallMultipleProtocolInterfaces ( &Handle, - &gEfiWatchdogTimerArchProtocolGuid, &gWatchdogTimer, + &gEfiWatchdogTimerArchProtocolGuid, &mWatchdogTimer, NULL ); - if (EFI_ERROR(Status)) { + if (EFI_ERROR (Status)) { Status = EFI_OUT_OF_RESOURCES; goto EXIT; } EXIT: - if(EFI_ERROR(Status)) { - // The watchdog failed to initialize - ASSERT(FALSE); - } + ASSERT_EFI_ERROR (Status); return Status; } diff --git a/ArmPlatformPkg/Drivers/SP805WatchdogDxe/SP805WatchdogDxe.inf b/ArmPlatformPkg/Drivers/SP805WatchdogDxe/SP805WatchdogDxe.inf index 37924f2e3cd2..99ecab477567 100644 --- a/ArmPlatformPkg/Drivers/SP805WatchdogDxe/SP805WatchdogDxe.inf +++ b/ArmPlatformPkg/Drivers/SP805WatchdogDxe/SP805WatchdogDxe.inf @@ -1,6 +1,7 @@ /** @file * * Copyright (c) 2011-2012, ARM Limited. All rights reserved. +* Copyright (c) 2018, Linaro Limited. All rights reserved. * * This program and the accompanying materials * are licensed and made available under the terms and conditions of the BSD License @@ -18,35 +19,29 @@ FILE_GUID = ebd705fb-fa92-46a7-b32b-7f566d944614 MODULE_TYPE = DXE_DRIVER VERSION_STRING = 1.0 - ENTRY_POINT = SP805Initialize [Sources.common] SP805Watchdog.c [Packages] - MdePkg/MdePkg.dec - EmbeddedPkg/EmbeddedPkg.dec - ArmPkg/ArmPkg.dec ArmPlatformPkg/ArmPlatformPkg.dec + ArmPkg/ArmPkg.dec + MdePkg/MdePkg.dec [LibraryClasses] BaseLib - BaseMemoryLib DebugLib IoLib - PcdLib - UefiLib UefiBootServicesTableLib UefiDriverEntryPoint - UefiRuntimeServicesTableLib [Pcd] gArmPlatformTokenSpaceGuid.PcdSP805WatchdogBase gArmPlatformTokenSpaceGuid.PcdSP805WatchdogClockFrequencyInHz [Protocols] - gEfiWatchdogTimerArchProtocolGuid + gEfiWatchdogTimerArchProtocolGuid ## ALWAYS_PRODUCES [Depex] TRUE From patchwork Tue Dec 18 13:10:12 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ard Biesheuvel X-Patchwork-Id: 154140 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp3690457ljp; Tue, 18 Dec 2018 05:10:26 -0800 (PST) X-Google-Smtp-Source: AFSGD/UpLLScK07mWmxhnjZ1c0LXJVxFhtKRDqXZA9JsQO9xnruk865bYCYUeSNHtFfL5gj/NEBF X-Received: by 2002:a63:7c13:: with SMTP id x19mr14758692pgc.336.1545138626578; Tue, 18 Dec 2018 05:10:26 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1545138626; cv=none; d=google.com; s=arc-20160816; b=flk2t+rgX6GZAb93rH2Wzp6t348axa6CsnWqBLbBtZ517HdkfRHyUjWXB5AO1ky8bL 61cADTQeMQ1TbBlrk3CrATaABXAtB4AEcPrrqWaIhjB6N+ZF+UnvHaMLyE3+vmYr4JL/ u/aenvme8QfbC0/E4SkfuN+qk8t85OEJ4XM9BZJbaCzSnB5TlWc5zFG6PCBiaTsV3nbU kEColMMsTtp0H44SB7OiReTyfC+bkl8Q1XE5s4ytSXqqX/r1oEvqcrNZ6K91H5TTpt4t ajbgeFgGQ9XQ3O9CvgOsMr3S5VxqlfjWvuC9oyUrax51OlBZZrfftGXKQXNKKZPOKRtH 6Gww== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version :list-subscribe:list-help:list-post:list-archive:list-unsubscribe :list-id:precedence:subject:references:in-reply-to:message-id:date :to:from:dkim-signature:delivered-to; bh=1ZEtI9CKNSbJf1BSkx0VLPco8daCsLwspaTNqYwGFJ0=; b=eK85HoK4MSQc+fk8vB3SwPiaC+HFAkI1HuTPGz6slNfvJ+NZu3lq/eein765RW1Ky2 9093WWO+dHPFMsQfoEBsoqfhyFORw5q4c22GQ4jaT6QyVrk2EWQBI6LbvtIy3eKRN9+o PVzZEJiVr6TzPFhqLFVW/OQaJdfJT5Cu6TJEuGduth2OTcno4iTgSH5QzozNCdqsKngU Gynhmoai5K735duF4vVxKRWrmwCZBDT3yq06cmgewEixPwXCb9Bhh8D0R+1zDPn+w5pr maD8zxRYatcfgv8RiqZzVAIFhSbx9O6yGYII/elesy0y+heR5NMvtLe2C/ylepnWueje fv1w== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=Rxw1hYwG; spf=pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 2001:19d0:306:5::1 as permitted sender) smtp.mailfrom=edk2-devel-bounces@lists.01.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from ml01.01.org (ml01.01.org. [2001:19d0:306:5::1]) by mx.google.com with ESMTPS id k19si10592946pgn.20.2018.12.18.05.10.26 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 18 Dec 2018 05:10:26 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 2001:19d0:306:5::1 as permitted sender) client-ip=2001:19d0:306:5::1; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=Rxw1hYwG; spf=pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 2001:19d0:306:5::1 as permitted sender) smtp.mailfrom=edk2-devel-bounces@lists.01.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id C01FF2119EF4A; Tue, 18 Dec 2018 05:10:23 -0800 (PST) X-Original-To: edk2-devel@lists.01.org Delivered-To: edk2-devel@lists.01.org Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2a00:1450:4864:20::542; helo=mail-ed1-x542.google.com; envelope-from=ard.biesheuvel@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-ed1-x542.google.com (mail-ed1-x542.google.com [IPv6:2a00:1450:4864:20::542]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 3B8442119AC2B for ; Tue, 18 Dec 2018 05:10:22 -0800 (PST) Received: by mail-ed1-x542.google.com with SMTP id b3so13842382ede.1 for ; Tue, 18 Dec 2018 05:10:22 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=NfIBw6OCuzPvpeUBiyRYvzBcvOIY4kpxB6UjFI2CzPo=; b=Rxw1hYwGER8kwFImI9AeTT6lKZayaaEL5j1PDhYeEum62ZjjMMk9wLt5Z5ZCxiW3WX i+lc7vkMcRnPGjsZr4njCHJnVI4QP813XYwWHLGLws7ZTlnr527SwNn1e4pWDjdlgVog iwqmXf/K/Nw3rtYs4eIUv4QcRs4DgezSwXZFo= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=NfIBw6OCuzPvpeUBiyRYvzBcvOIY4kpxB6UjFI2CzPo=; b=tpwj80/naXMBYSrmUIvveHjTcKLjnYodw1J1GWtCqvy40dgKhWZckumfHrx7GbdWz/ EHLbU3drbVK4rewQHxVpAAlccPylDTUVgHZprfmUjDHL9JQHqgqikmcZ62/BaR4keuBk NjpD3s2OBc7/DSQJocWPVO+7JlAdoQNYWc5OiJzLEopI3c5kNixPF+ADik/zl6bBwxMZ R+wqtkTguupCxxSsSLFtl3daHCMyccLiCcZNW8ufOzlhlK2/KRed/oID/WmzOM75Si29 bR1X3iYePtogBBgsuAUpUJ1Lg6Cu6Al8RaXr4rbYX+Ee68U6473jxJ5VPRWmHjZabIiH zHkQ== X-Gm-Message-State: AA+aEWZTu9QiYo6ZdtCSyB2X9J52BMvt0CwaraXdv6RXumgMqHHTikFA Bv01LOZi1q0jrJikc8Kcgm9Bja0j5248uPpX X-Received: by 2002:a50:ac19:: with SMTP id v25mr16616588edc.218.1545138620263; Tue, 18 Dec 2018 05:10:20 -0800 (PST) Received: from mba13.arnhem.chello.nl (dhcp-077-251-017-237.chello.nl. [77.251.17.237]) by smtp.gmail.com with ESMTPSA id f6sm4384755ede.53.2018.12.18.05.10.19 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 18 Dec 2018 05:10:19 -0800 (PST) From: Ard Biesheuvel To: edk2-devel@lists.01.org Date: Tue, 18 Dec 2018 14:10:12 +0100 Message-Id: <20181218131015.20062-3-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20181218131015.20062-1-ard.biesheuvel@linaro.org> References: <20181218131015.20062-1-ard.biesheuvel@linaro.org> Subject: [edk2] [PATCH 2/4] ArmPlatformPkg/SP805WatchdogDxe: switch to interrupt mode X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" The SP805 watchdog driver doesn't implement the PI watchdog protocol fully, but always simply resets the system if the watchdog time runs out. However, the hardware does support the intended usage model, as long as the SP805 is wired up correctly. So let's implement interrupt based mode involving a handler that is registered by the DXE core and invoked when the watchdog runs out. In the interrupt handler, we invoke the notify function if one was registered, or call the ResetSystem() runtime service otherwise (as per the UEFI spec) Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel --- ArmPlatformPkg/ArmPlatformPkg.dec | 1 + ArmPlatformPkg/Drivers/SP805WatchdogDxe/SP805Watchdog.c | 95 ++++++++++++++------ ArmPlatformPkg/Drivers/SP805WatchdogDxe/SP805WatchdogDxe.inf | 6 +- 3 files changed, 75 insertions(+), 27 deletions(-) -- 2.17.1 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel diff --git a/ArmPlatformPkg/ArmPlatformPkg.dec b/ArmPlatformPkg/ArmPlatformPkg.dec index 5f67e7415469..44c00bd0c133 100644 --- a/ArmPlatformPkg/ArmPlatformPkg.dec +++ b/ArmPlatformPkg/ArmPlatformPkg.dec @@ -70,6 +70,7 @@ ## SP805 Watchdog gArmPlatformTokenSpaceGuid.PcdSP805WatchdogBase|0x0|UINT32|0x00000023 gArmPlatformTokenSpaceGuid.PcdSP805WatchdogClockFrequencyInHz|32000|UINT32|0x00000021 + gArmPlatformTokenSpaceGuid.PcdSP805WatchdogInterrupt|0|UINT32|0x0000002E ## PL011 UART gArmPlatformTokenSpaceGuid.PL011UartClkInHz|24000000|UINT32|0x0000001F diff --git a/ArmPlatformPkg/Drivers/SP805WatchdogDxe/SP805Watchdog.c b/ArmPlatformPkg/Drivers/SP805WatchdogDxe/SP805Watchdog.c index 12c2f0a1fe49..4f09acf1fa28 100644 --- a/ArmPlatformPkg/Drivers/SP805WatchdogDxe/SP805Watchdog.c +++ b/ArmPlatformPkg/Drivers/SP805WatchdogDxe/SP805Watchdog.c @@ -21,12 +21,17 @@ #include #include #include +#include +#include #include #include "SP805Watchdog.h" -STATIC EFI_EVENT mEfiExitBootServicesEvent; +STATIC EFI_EVENT mEfiExitBootServicesEvent; +STATIC EFI_HARDWARE_INTERRUPT_PROTOCOL *mInterrupt; +STATIC EFI_WATCHDOG_TIMER_NOTIFY mWatchdogNotify; +STATIC UINT32 mTimerPeriod; /** Make sure the SP805 registers are unlocked for writing. @@ -65,6 +70,33 @@ SP805Lock ( } } +STATIC +VOID +EFIAPI +SP805InterruptHandler ( + IN HARDWARE_INTERRUPT_SOURCE Source, + IN EFI_SYSTEM_CONTEXT SystemContext + ) +{ + // + // The notify function should be called with the elapsed number of ticks + // since the watchdog was armed, which should exceed the timer period. + // We don't actually know the elapsed number of ticks, so let's return + // the timer period plus 1. + // + if (mWatchdogNotify != NULL) { + mWatchdogNotify (mTimerPeriod + 1); + } else { + gRT->ResetSystem (EfiResetCold, EFI_TIMEOUT, 0, NULL); + } + + SP805Unlock (); + MmioWrite32 (SP805_WDOG_INT_CLR_REG, 0); // write of any value clears the irq + SP805Lock (); + + mInterrupt->EndOfInterrupt (mInterrupt, Source); +} + /** Stop the SP805 watchdog timer from counting down by disabling interrupts. **/ @@ -149,9 +181,16 @@ SP805RegisterHandler ( IN EFI_WATCHDOG_TIMER_NOTIFY NotifyFunction ) { - // ERROR: This function is not supported. - // The hardware watchdog will reset the board - return EFI_INVALID_PARAMETER; + if (mWatchdogNotify == NULL && NotifyFunction == NULL) { + return EFI_INVALID_PARAMETER; + } + + if (mWatchdogNotify != NULL && NotifyFunction != NULL) { + return EFI_ALREADY_STARTED; + } + + mWatchdogNotify = NotifyFunction; + return EFI_SUCCESS; } /** @@ -202,19 +241,16 @@ SP805SetTimerPeriod ( SP805Stop (); } else { // Calculate the Watchdog ticks required for a delay of (TimerTicks * 100) nanoseconds - // The SP805 will count down to ZERO once, generate an interrupt and - // then it will again reload the initial value and start again. - // On the second time when it reaches ZERO, it will actually reset the board. - // Therefore, we need to load half the required delay. + // The SP805 will count down to zero and generate an interrupt. // - // WatchdogTicks = ((TimerPeriod * 100 * SP805_CLOCK_FREQUENCY) / 1GHz) / 2 ; + // WatchdogTicks = ((TimerPeriod * 100 * SP805_CLOCK_FREQUENCY) / 1GHz); // // i.e.: // - // WatchdogTicks = (TimerPeriod * SP805_CLOCK_FREQUENCY) / 20 MHz ; + // WatchdogTicks = (TimerPeriod * SP805_CLOCK_FREQUENCY) / 10 MHz ; Ticks64bit = MultU64x32 (TimerPeriod, PcdGet32 (PcdSP805WatchdogClockFrequencyInHz)); - Ticks64bit = DivU64x32 (Ticks64bit, 20000000); + Ticks64bit = DivU64x32 (Ticks64bit, 10 * 1000 * 1000); // The registers in the SP805 are only 32 bits if (Ticks64bit > MAX_UINT32) { @@ -233,9 +269,12 @@ SP805SetTimerPeriod ( SP805Start (); } + mTimerPeriod = TimerPeriod; + EXIT: // Ensure the watchdog is locked before exiting. SP805Lock (); + ASSERT_EFI_ERROR (Status); return Status; } @@ -262,25 +301,11 @@ SP805GetTimerPeriod ( OUT UINT64 *TimerPeriod ) { - UINT64 ReturnValue; - if (TimerPeriod == NULL) { return EFI_INVALID_PARAMETER; } - // Check if the watchdog is stopped - if ((MmioRead32 (SP805_WDOG_CONTROL_REG) & SP805_WDOG_CTRL_INTEN) == 0) { - // It is stopped, so return zero. - ReturnValue = 0; - } else { - // Convert the Watchdog ticks into TimerPeriod - // Ensure 64bit arithmetic throughout because the Watchdog ticks may already - // be at the maximum 32 bit value and we still need to multiply that by 600. - ReturnValue = MultU64x32 (MmioRead32 (SP805_WDOG_LOAD_REG), 600); - } - - *TimerPeriod = ReturnValue; - + *TimerPeriod = mTimerPeriod; return EFI_SUCCESS; } @@ -343,6 +368,11 @@ SP805Initialize ( EFI_STATUS Status; EFI_HANDLE Handle; + // Find the interrupt controller protocol. ASSERT if not found. + Status = gBS->LocateProtocol (&gHardwareInterruptProtocolGuid, NULL, + (VOID **)&mInterrupt); + ASSERT_EFI_ERROR (Status); + // Unlock access to the SP805 registers SP805Unlock (); @@ -350,13 +380,26 @@ SP805Initialize ( SP805Stop (); // Set the watchdog to reset the board when triggered + // This is a last resort in case the interrupt handler fails if ((MmioRead32 (SP805_WDOG_CONTROL_REG) & SP805_WDOG_CTRL_RESEN) == 0) { MmioOr32 (SP805_WDOG_CONTROL_REG, SP805_WDOG_CTRL_RESEN); } + // Clear any pending interrupts + MmioWrite32 (SP805_WDOG_INT_CLR_REG, 0); // write of any value clears the irq + // Prohibit any rogue access to SP805 registers SP805Lock (); + Status = mInterrupt->RegisterInterruptSource (mInterrupt, + PcdGet32 (PcdSP805WatchdogInterrupt), + SP805InterruptHandler); + if (EFI_ERROR (Status)) { + DEBUG ((DEBUG_ERROR, "%a: failed to register watchdog interrupt - %r\n", + __FUNCTION__, Status)); + return Status; + } + // // Make sure the Watchdog Timer Architectural Protocol has not been installed in the system yet. // This will avoid conflicts with the universal watchdog diff --git a/ArmPlatformPkg/Drivers/SP805WatchdogDxe/SP805WatchdogDxe.inf b/ArmPlatformPkg/Drivers/SP805WatchdogDxe/SP805WatchdogDxe.inf index 99ecab477567..1373e267612f 100644 --- a/ArmPlatformPkg/Drivers/SP805WatchdogDxe/SP805WatchdogDxe.inf +++ b/ArmPlatformPkg/Drivers/SP805WatchdogDxe/SP805WatchdogDxe.inf @@ -27,6 +27,7 @@ [Packages] ArmPlatformPkg/ArmPlatformPkg.dec ArmPkg/ArmPkg.dec + EmbeddedPkg/EmbeddedPkg.dec MdePkg/MdePkg.dec [LibraryClasses] @@ -35,13 +36,16 @@ IoLib UefiBootServicesTableLib UefiDriverEntryPoint + UefiRuntimeServicesTableLib [Pcd] gArmPlatformTokenSpaceGuid.PcdSP805WatchdogBase gArmPlatformTokenSpaceGuid.PcdSP805WatchdogClockFrequencyInHz + gArmPlatformTokenSpaceGuid.PcdSP805WatchdogInterrupt [Protocols] + gHardwareInterruptProtocolGuid ## ALWAYS_CONSUMES gEfiWatchdogTimerArchProtocolGuid ## ALWAYS_PRODUCES [Depex] - TRUE + gHardwareInterruptProtocolGuid From patchwork Tue Dec 18 13:10:13 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ard Biesheuvel X-Patchwork-Id: 154142 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp3690518ljp; Tue, 18 Dec 2018 05:10:29 -0800 (PST) X-Google-Smtp-Source: AFSGD/UzbR+xFiFRjkqROFOM5xF0cTIoQEtqMzedx/DAxyRYMpwUt2r/hrQWA8FjzZ9C7Yt1PBz1 X-Received: by 2002:a17:902:bc3:: with SMTP id 61mr16468011plr.15.1545138629802; Tue, 18 Dec 2018 05:10:29 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1545138629; cv=none; d=google.com; s=arc-20160816; b=jji/3D5/YZ9wfa8ilkLx+DzsESVO40uasZkwdT9Y38Y+yhAPvpag6xLSqr15EixeAj lL5jtRGX+yUbe/4Rpov8BdfZSjk3UIoio2/4W1iX4dfzKQNoq/cVOjr02TopO6b+gkzX dQiPNT8/ShS7IZX15dQPasG3XyDk6Zx0uG0O0lnO+ux25xIUlQPKMk91h/n5OSFNxacn i9w1/la1FZJWuG5HyysIQuSxsaxhwVFqw8N2f+kTLHWF6fmSn/DqFJAmkEM7GhHxwr5W mA/SoPTNQwB+iZ8tYUDrSdJva04e6Iq2Rqf+zAdyUqUj7+2wsp6zkCt+WGp9OVUOn+9g LIWQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version :list-subscribe:list-help:list-post:list-archive:list-unsubscribe :list-id:precedence:subject:references:in-reply-to:message-id:date :to:from:dkim-signature:delivered-to; bh=1TmblHr6FYjAEOlFI5VG5itQczRb8kfNL6iWIwoB+jU=; b=tDshoM2GSB3Z/A5ObTXn0GRq6OGasv/s/n/znb2OQZTNVA0td/aaG8ArioMWU/ClXJ L2OG9n3FZ9wqWSq9mPdjRtIBOd2GNA7/sEFGP7JsFvCqeOyMzalH6TI4DXLS8IlA/bP8 zSTtvdupkK9H5EnvkEd4xU+gbUCS/BZ5XeONaFJLv1Ni4WhDr7a4F4x+zYdBZD1yjeph +9wleNlPvSnWm4MlednHDShRz6kcyXHiqQUkI8xo/2k50rk9Lc0JGAHC0eBou5S1f1ET NAQusY4lqG96m/1B7DVBNfVjAagHDNokR/9ziOEAfvbCZ+h3VvGu7vlsI989yVyOCK0T a31w== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=Wm+N2zS9; spf=pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 2001:19d0:306:5::1 as permitted sender) smtp.mailfrom=edk2-devel-bounces@lists.01.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from ml01.01.org (ml01.01.org. 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[77.251.17.237]) by smtp.gmail.com with ESMTPSA id f6sm4384755ede.53.2018.12.18.05.10.20 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 18 Dec 2018 05:10:20 -0800 (PST) From: Ard Biesheuvel To: edk2-devel@lists.01.org Date: Tue, 18 Dec 2018 14:10:13 +0100 Message-Id: <20181218131015.20062-4-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20181218131015.20062-1-ard.biesheuvel@linaro.org> References: <20181218131015.20062-1-ard.biesheuvel@linaro.org> Subject: [edk2] [PATCH 3/4] ArmPkg/GenericWatchdogDxe: clean up the code X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" Clean up the code, by adding missing STATIC modifiers, drop redundant casts, and get rid of the 'success handling' anti pattern in the entry point code. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel --- ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdogDxe.c | 111 +++++++++++--------- ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdogDxe.inf | 11 +- 2 files changed, 64 insertions(+), 58 deletions(-) -- 2.17.1 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel Reviewed-by: Leif Lindholm diff --git a/ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdogDxe.c b/ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdogDxe.c index 8ccf15366dfa..717a180a64ec 100644 --- a/ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdogDxe.c +++ b/ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdogDxe.c @@ -34,15 +34,16 @@ #define TIME_UNITS_PER_SECOND 10000000 // Tick frequency of the generic timer basis of the generic watchdog. -UINTN mTimerFrequencyHz = 0; +STATIC UINTN mTimerFrequencyHz = 0; /* In cases where the compare register was set manually, information about how long the watchdog was asked to wait cannot be retrieved from hardware. It is therefore stored here. 0 means the timer is not running. */ -UINT64 mNumTimerTicks = 0; +STATIC UINT64 mNumTimerTicks = 0; -EFI_HARDWARE_INTERRUPT2_PROTOCOL *mInterruptProtocol; +STATIC EFI_HARDWARE_INTERRUPT2_PROTOCOL *mInterruptProtocol; +STATIC VOID WatchdogWriteOffsetRegister ( UINT32 Value @@ -51,6 +52,7 @@ WatchdogWriteOffsetRegister ( MmioWrite32 (GENERIC_WDOG_OFFSET_REG, Value); } +STATIC VOID WatchdogWriteCompareRegister ( UINT64 Value @@ -60,6 +62,7 @@ WatchdogWriteCompareRegister ( MmioWrite32 (GENERIC_WDOG_COMPARE_VALUE_REG_HIGH, (Value >> 32) & MAX_UINT32); } +STATIC VOID WatchdogEnable ( VOID @@ -68,6 +71,7 @@ WatchdogEnable ( MmioWrite32 (GENERIC_WDOG_CONTROL_STATUS_REG, GENERIC_WDOG_ENABLED); } +STATIC VOID WatchdogDisable ( VOID @@ -79,6 +83,7 @@ WatchdogDisable ( /** On exiting boot services we must make sure the Watchdog Timer is stopped. **/ +STATIC VOID EFIAPI WatchdogExitBootServicesEvent ( @@ -93,6 +98,7 @@ WatchdogExitBootServicesEvent ( /* This function is called when the watchdog's first signal (WS0) goes high. It uses the ResetSystem Runtime Service to reset the board. */ +STATIC VOID EFIAPI WatchdogInterruptHandler ( @@ -141,10 +147,11 @@ WatchdogInterruptHandler ( @retval EFI_UNSUPPORTED The code does not support NotifyFunction. **/ +STATIC EFI_STATUS EFIAPI WatchdogRegisterHandler ( - IN CONST EFI_WATCHDOG_TIMER_ARCH_PROTOCOL *This, + IN EFI_WATCHDOG_TIMER_ARCH_PROTOCOL *This, IN EFI_WATCHDOG_TIMER_NOTIFY NotifyFunction ) { @@ -167,10 +174,11 @@ WatchdogRegisterHandler ( in TimerPeriod 100ns units. **/ +STATIC EFI_STATUS EFIAPI WatchdogSetTimerPeriod ( - IN CONST EFI_WATCHDOG_TIMER_ARCH_PROTOCOL *This, + IN EFI_WATCHDOG_TIMER_ARCH_PROTOCOL *This, IN UINT64 TimerPeriod // In 100ns units ) { @@ -178,8 +186,8 @@ WatchdogSetTimerPeriod ( // if TimerPeriod is 0, this is a request to stop the watchdog. if (TimerPeriod == 0) { - mNumTimerTicks = 0; - WatchdogDisable (); + //mNumTimerTicks = 0; + //WatchdogDisable (); return EFI_SUCCESS; } @@ -222,10 +230,11 @@ WatchdogSetTimerPeriod ( @retval EFI_INVALID_PARAMETER TimerPeriod is NULL. **/ +STATIC EFI_STATUS EFIAPI WatchdogGetTimerPeriod ( - IN CONST EFI_WATCHDOG_TIMER_ARCH_PROTOCOL *This, + IN EFI_WATCHDOG_TIMER_ARCH_PROTOCOL *This, OUT UINT64 *TimerPeriod ) { @@ -270,13 +279,13 @@ WatchdogGetTimerPeriod ( Retrieves the period of the timer interrupt in 100ns units. **/ -EFI_WATCHDOG_TIMER_ARCH_PROTOCOL gWatchdogTimer = { - (EFI_WATCHDOG_TIMER_REGISTER_HANDLER)WatchdogRegisterHandler, - (EFI_WATCHDOG_TIMER_SET_TIMER_PERIOD)WatchdogSetTimerPeriod, - (EFI_WATCHDOG_TIMER_GET_TIMER_PERIOD)WatchdogGetTimerPeriod +STATIC EFI_WATCHDOG_TIMER_ARCH_PROTOCOL mWatchdogTimer = { + WatchdogRegisterHandler, + WatchdogSetTimerPeriod, + WatchdogGetTimerPeriod }; -EFI_EVENT EfiExitBootServicesEvent = (EFI_EVENT)NULL; +STATIC EFI_EVENT mEfiExitBootServicesEvent; EFI_STATUS EFIAPI @@ -288,6 +297,10 @@ GenericWatchdogEntry ( EFI_STATUS Status; EFI_HANDLE Handle; + Status = gBS->LocateProtocol (&gHardwareInterrupt2ProtocolGuid, NULL, + (VOID **)&mInterruptProtocol); + ASSERT_EFI_ERROR (Status); + /* Make sure the Watchdog Timer Architectural Protocol has not been installed in the system yet. This will avoid conflicts with the universal watchdog */ @@ -296,51 +309,45 @@ GenericWatchdogEntry ( mTimerFrequencyHz = ArmGenericTimerGetTimerFreq (); ASSERT (mTimerFrequencyHz != 0); - // Register for an ExitBootServicesEvent - Status = gBS->CreateEvent ( - EVT_SIGNAL_EXIT_BOOT_SERVICES, - TPL_NOTIFY, - WatchdogExitBootServicesEvent, - NULL, - &EfiExitBootServicesEvent - ); - if (!EFI_ERROR (Status)) { - // Install interrupt handler - Status = gBS->LocateProtocol ( - &gHardwareInterrupt2ProtocolGuid, - NULL, - (VOID **)&mInterruptProtocol - ); - if (!EFI_ERROR (Status)) { - Status = mInterruptProtocol->RegisterInterruptSource ( - mInterruptProtocol, - FixedPcdGet32 (PcdGenericWatchdogEl2IntrNum), - WatchdogInterruptHandler - ); - if (!EFI_ERROR (Status)) { - Status = mInterruptProtocol->SetTriggerType ( - mInterruptProtocol, - FixedPcdGet32 (PcdGenericWatchdogEl2IntrNum), - EFI_HARDWARE_INTERRUPT2_TRIGGER_EDGE_RISING - ); - if (!EFI_ERROR (Status)) { - // Install the Timer Architectural Protocol onto a new handle - Handle = NULL; - Status = gBS->InstallMultipleProtocolInterfaces ( - &Handle, - &gEfiWatchdogTimerArchProtocolGuid, - &gWatchdogTimer, - NULL - ); - } - } - } + // Install interrupt handler + Status = mInterruptProtocol->RegisterInterruptSource (mInterruptProtocol, + FixedPcdGet32 (PcdGenericWatchdogEl2IntrNum), + WatchdogInterruptHandler); + if (EFI_ERROR (Status)) { + return Status; + } + + Status = mInterruptProtocol->SetTriggerType (mInterruptProtocol, + FixedPcdGet32 (PcdGenericWatchdogEl2IntrNum), + EFI_HARDWARE_INTERRUPT2_TRIGGER_EDGE_RISING); + if (EFI_ERROR (Status)) { + goto UnregisterHandler; } + // Install the Timer Architectural Protocol onto a new handle + Handle = NULL; + Status = gBS->InstallMultipleProtocolInterfaces (&Handle, + &gEfiWatchdogTimerArchProtocolGuid, &mWatchdogTimer, + NULL); + if (EFI_ERROR (Status)) { + goto UnregisterHandler; + } + + // Register for an ExitBootServicesEvent + Status = gBS->CreateEvent (EVT_SIGNAL_EXIT_BOOT_SERVICES, TPL_NOTIFY, + WatchdogExitBootServicesEvent, NULL, + &mEfiExitBootServicesEvent); ASSERT_EFI_ERROR (Status); mNumTimerTicks = 0; WatchdogDisable (); + return EFI_SUCCESS; + +UnregisterHandler: + // Unregister the handler + mInterruptProtocol->RegisterInterruptSource (mInterruptProtocol, + FixedPcdGet32 (PcdGenericWatchdogEl2IntrNum), + NULL); return Status; } diff --git a/ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdogDxe.inf b/ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdogDxe.inf index ba0403d7fdc3..7992f3ac78bb 100644 --- a/ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdogDxe.inf +++ b/ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdogDxe.inf @@ -16,17 +16,16 @@ FILE_GUID = 0619f5c2-4858-4caa-a86a-73a21a18df6b MODULE_TYPE = DXE_DRIVER VERSION_STRING = 1.0 - ENTRY_POINT = GenericWatchdogEntry [Sources.common] GenericWatchdogDxe.c [Packages] - MdePkg/MdePkg.dec - EmbeddedPkg/EmbeddedPkg.dec - ArmPkg/ArmPkg.dec ArmPlatformPkg/ArmPlatformPkg.dec + ArmPkg/ArmPkg.dec + EmbeddedPkg/EmbeddedPkg.dec + MdePkg/MdePkg.dec [LibraryClasses] ArmGenericTimerCounterLib @@ -46,8 +45,8 @@ gArmTokenSpaceGuid.PcdGenericWatchdogEl2IntrNum [Protocols] - gEfiWatchdogTimerArchProtocolGuid - gHardwareInterrupt2ProtocolGuid + gEfiWatchdogTimerArchProtocolGuid ## ALWAYS_PRODUCES + gHardwareInterrupt2ProtocolGuid ## ALWAYS_CONSUMES [Depex] gHardwareInterrupt2ProtocolGuid From patchwork Tue Dec 18 13:10:14 2018 Content-Type: text/plain; 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[77.251.17.237]) by smtp.gmail.com with ESMTPSA id f6sm4384755ede.53.2018.12.18.05.10.21 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 18 Dec 2018 05:10:22 -0800 (PST) From: Ard Biesheuvel To: edk2-devel@lists.01.org Date: Tue, 18 Dec 2018 14:10:14 +0100 Message-Id: <20181218131015.20062-5-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20181218131015.20062-1-ard.biesheuvel@linaro.org> References: <20181218131015.20062-1-ard.biesheuvel@linaro.org> Subject: [edk2] [PATCH 4/4] ArmPkg/GenericWatchdogDxe: implement RegisterHandler() method X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" Even though UEFI does not appear to use it, let's implement the complete PI watchdog protocol, including handler registration, which will be invoked instead of the ResetSystem() runtime service when the watchdog timer expires. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel --- ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdogDxe.c | 34 ++++++++++++++------ 1 file changed, 25 insertions(+), 9 deletions(-) -- 2.17.1 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel Reviewed-by: Leif Lindholm diff --git a/ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdogDxe.c b/ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdogDxe.c index 717a180a64ec..21118a3c88d1 100644 --- a/ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdogDxe.c +++ b/ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdogDxe.c @@ -42,6 +42,7 @@ STATIC UINTN mTimerFrequencyHz = 0; STATIC UINT64 mNumTimerTicks = 0; STATIC EFI_HARDWARE_INTERRUPT2_PROTOCOL *mInterruptProtocol; +STATIC EFI_WATCHDOG_TIMER_NOTIFY mWatchdogNotify; STATIC VOID @@ -107,17 +108,25 @@ WatchdogInterruptHandler ( ) { STATIC CONST CHAR16 ResetString[]= L"The generic watchdog timer ran out."; + UINT64 TimerPeriod; WatchdogDisable (); mInterruptProtocol->EndOfInterrupt (mInterruptProtocol, Source); - gRT->ResetSystem ( - EfiResetCold, - EFI_TIMEOUT, - StrSize (ResetString), - (VOID *) &ResetString - ); + // + // The notify function should be called with the elapsed number of ticks + // since the watchdog was armed, which should exceed the timer period. + // We don't actually know the elapsed number of ticks, so let's return + // the timer period plus 1. + // + if (mWatchdogNotify != NULL) { + TimerPeriod = ((TIME_UNITS_PER_SECOND / mTimerFrequencyHz) * mNumTimerTicks); + mWatchdogNotify (TimerPeriod + 1); + } else { + gRT->ResetSystem (EfiResetCold, EFI_TIMEOUT, StrSize (ResetString), + (CHAR16 *)ResetString); + } // If we got here then the reset didn't work ASSERT (FALSE); @@ -155,9 +164,16 @@ WatchdogRegisterHandler ( IN EFI_WATCHDOG_TIMER_NOTIFY NotifyFunction ) { - // ERROR: This function is not supported. - // The watchdog will reset the board - return EFI_UNSUPPORTED; + if (mWatchdogNotify == NULL && NotifyFunction == NULL) { + return EFI_INVALID_PARAMETER; + } + + if (mWatchdogNotify != NULL && NotifyFunction != NULL) { + return EFI_ALREADY_STARTED; + } + + mWatchdogNotify = NotifyFunction; + return EFI_SUCCESS; } /**