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[2001:19d0:306:5::1]) by mx.google.com with ESMTPS id d32si4982350pla.136.2018.12.18.08.46.28 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 18 Dec 2018 08:46:29 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 2001:19d0:306:5::1 as permitted sender) client-ip=2001:19d0:306:5::1; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=NpUD8sPB; spf=pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 2001:19d0:306:5::1 as permitted sender) smtp.mailfrom=edk2-devel-bounces@lists.01.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id E694E21199B12; Tue, 18 Dec 2018 08:46:27 -0800 (PST) X-Original-To: edk2-devel@lists.01.org Delivered-To: edk2-devel@lists.01.org Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2a00:1450:4864:20::542; helo=mail-ed1-x542.google.com; envelope-from=ard.biesheuvel@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-ed1-x542.google.com (mail-ed1-x542.google.com [IPv6:2a00:1450:4864:20::542]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 84CA22119379B for ; Tue, 18 Dec 2018 08:46:26 -0800 (PST) Received: by mail-ed1-x542.google.com with SMTP id y56so14420401edd.11 for ; Tue, 18 Dec 2018 08:46:26 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id; bh=QhKfy4RzLUXjie9rrmVa8/z47GYXcCr0v5+YhVm10Jk=; b=NpUD8sPB0S7fqKCtGqKsSoWpVUQk6n7MRBLlzaFqZwA9KAW5wzHgb7gRTL/oBPO313 1/B09Qmb4mZ4SQAgAyzuOlsCgoHPNv9hpYgHRn6YXU6W5MJm/f6/AMnDLRxWO6nAQgwI C3xOuuUKpk8KRua3foHHkF97m+8k7spKiwrCg= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=QhKfy4RzLUXjie9rrmVa8/z47GYXcCr0v5+YhVm10Jk=; b=COg9i+i4tw/QsGur0F7MFMwZOEWBXuE6pr6VT4xlPZ7raFlQGjKGLKga2ryATQS4vs t4aOsajfJbAJApdwMvoKxuorvcgdcfWRIDMqr3lcAcla9u1YMJQOEqaSoWDr7E/FHKQ1 70Tc38vLandncpxm9HFtDZ1txoX8zPpXEG83hjY7owHYMGkTBVwaV0rM2lGc4hgOmopy jyu4kESwq5CXfqRA+LDi1NdiAJKsVjCXXnBOqkDL6D7tySlDxrR/cjfGQniOOELBdIoZ 9vBH+TVONH5nV/fR35+hkMxZECHwmJFQy1GD8SRh2gOU+KaWm+MmCGT0XROQAW79i/1O 3OTg== X-Gm-Message-State: AA+aEWYpe4gvzrlnSAT4bglOl+m77qaKSfbFdWcaRUd3AYX0BewtHPHQ NqOX9m5ZL6TC0Kln7xGyGXzSiwAMggz0Ng== X-Received: by 2002:aa7:cdda:: with SMTP id h26mr17320440edw.248.1545151584543; Tue, 18 Dec 2018 08:46:24 -0800 (PST) Received: from mba13.arnhem.chello.nl ([89.248.140.8]) by smtp.gmail.com with ESMTPSA id o37sm4519013edc.32.2018.12.18.08.46.23 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 18 Dec 2018 08:46:23 -0800 (PST) From: Ard Biesheuvel To: edk2-devel@lists.01.org Date: Tue, 18 Dec 2018 17:46:21 +0100 Message-Id: <20181218164621.19072-1-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.17.1 Subject: [edk2] [PATCH] Platform/FVP-AArch64: switch to the SBSA watchdog X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" On the FVP Foundation model, the SP805 watchdog appears to be 'wired' incorrectly, resulting in a watchdog counter that decrements at the APB clock rate of 24 MHz instead of the usual 32 kHz. Since the timer start value is only 32-bits wide, this makes the watchdog unusable in UEFI, since the default timeout set by the DXE core is 5 minutes, which is not representable in 32-bit at this clock rate. So switch to the SBSA watchdog instead, which is wired up to the generic timer, and ticks at the correct rate. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel --- Platform/ARM/VExpressPkg/ArmVExpress-FVP-AArch64.dsc | 7 ++++--- Platform/ARM/VExpressPkg/ArmVExpress-FVP-AArch64.fdf | 2 +- Platform/ARM/VExpressPkg/Include/Platform/RTSM/ArmPlatform.h | 3 +++ Platform/ARM/VExpressPkg/Library/ArmVExpressLibRTSM/ArmVExpressLib.inf | 3 +++ Platform/ARM/VExpressPkg/Library/ArmVExpressLibRTSM/RTSMMem.c | 7 ++++++- 5 files changed, 17 insertions(+), 5 deletions(-) -- 2.17.1 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel Reviewed-by: Leif Lindholm diff --git a/Platform/ARM/VExpressPkg/ArmVExpress-FVP-AArch64.dsc b/Platform/ARM/VExpressPkg/ArmVExpress-FVP-AArch64.dsc index 7db1c675c3d9..0941edeaf53c 100644 --- a/Platform/ARM/VExpressPkg/ArmVExpress-FVP-AArch64.dsc +++ b/Platform/ARM/VExpressPkg/ArmVExpress-FVP-AArch64.dsc @@ -133,9 +133,10 @@ gArmPlatformTokenSpaceGuid.PcdPL031RtcBase|0x1C170000 ## SBSA Watchdog Count -!ifndef DISABLE_SBSA_WATCHDOG gArmPlatformTokenSpaceGuid.PcdWatchdogCount|1 -!endif + gArmTokenSpaceGuid.PcdGenericWatchdogControlBase|0x2a440000 + gArmTokenSpaceGuid.PcdGenericWatchdogRefreshBase|0x2a450000 + gArmTokenSpaceGuid.PcdGenericWatchdogEl2IntrNum|59 !ifdef EDK2_ENABLE_PL111 ## PL111 Versatile Express Motherboard controller @@ -265,7 +266,7 @@ !ifdef EDK2_ENABLE_PL111 ArmPlatformPkg/Drivers/LcdGraphicsOutputDxe/LcdGraphicsOutputDxe.inf !endif - ArmPlatformPkg/Drivers/SP805WatchdogDxe/SP805WatchdogDxe.inf + ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdogDxe.inf # SMBIOS Support diff --git a/Platform/ARM/VExpressPkg/ArmVExpress-FVP-AArch64.fdf b/Platform/ARM/VExpressPkg/ArmVExpress-FVP-AArch64.fdf index 239029d05cf1..c3e573e1bb4f 100644 --- a/Platform/ARM/VExpressPkg/ArmVExpress-FVP-AArch64.fdf +++ b/Platform/ARM/VExpressPkg/ArmVExpress-FVP-AArch64.fdf @@ -116,7 +116,7 @@ FvNameGuid = 87940482-fc81-41c3-87e6-399cf85ac8a0 !ifdef EDK2_ENABLE_PL111 INF ArmPlatformPkg/Drivers/LcdGraphicsOutputDxe/LcdGraphicsOutputDxe.inf !endif - INF ArmPlatformPkg/Drivers/SP805WatchdogDxe/SP805WatchdogDxe.inf + INF ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdogDxe.inf # # Semi-hosting filesystem diff --git a/Platform/ARM/VExpressPkg/Include/Platform/RTSM/ArmPlatform.h b/Platform/ARM/VExpressPkg/Include/Platform/RTSM/ArmPlatform.h index d856b6daa1d7..e267912ef5f5 100644 --- a/Platform/ARM/VExpressPkg/Include/Platform/RTSM/ArmPlatform.h +++ b/Platform/ARM/VExpressPkg/Include/Platform/RTSM/ArmPlatform.h @@ -76,4 +76,7 @@ #define PL111_CLCD_MOTHERBOARD_VIDEO_MODE_OSC_ID 1 #define PL111_CLCD_CORE_TILE_VIDEO_MODE_OSC_ID 1 +#define SBSA_WATCHDOG_BASE 0x2a440000 +#define SBSA_WATCHDOG_SIZE (2 * SIZE_64KB) + #endif diff --git a/Platform/ARM/VExpressPkg/Library/ArmVExpressLibRTSM/ArmVExpressLib.inf b/Platform/ARM/VExpressPkg/Library/ArmVExpressLibRTSM/ArmVExpressLib.inf index 53898c5e957e..511a2ac99b75 100644 --- a/Platform/ARM/VExpressPkg/Library/ArmVExpressLibRTSM/ArmVExpressLib.inf +++ b/Platform/ARM/VExpressPkg/Library/ArmVExpressLibRTSM/ArmVExpressLib.inf @@ -60,5 +60,8 @@ gArmPlatformTokenSpaceGuid.PcdArmMaliDpBase gArmPlatformTokenSpaceGuid.PcdArmMaliDpMemoryRegionLength + gArmTokenSpaceGuid.PcdGenericWatchdogControlBase + gArmTokenSpaceGuid.PcdGenericWatchdogRefreshBase + [Ppis] gArmMpCoreInfoPpiGuid diff --git a/Platform/ARM/VExpressPkg/Library/ArmVExpressLibRTSM/RTSMMem.c b/Platform/ARM/VExpressPkg/Library/ArmVExpressLibRTSM/RTSMMem.c index c8eefa0cf28b..eb8f6a48cd02 100644 --- a/Platform/ARM/VExpressPkg/Library/ArmVExpressLibRTSM/RTSMMem.c +++ b/Platform/ARM/VExpressPkg/Library/ArmVExpressLibRTSM/RTSMMem.c @@ -23,7 +23,7 @@ #define DP_BASE_DESCRIPTOR ((FixedPcdGet64 (PcdArmMaliDpBase) != 0) ? 1 : 0) // Number of Virtual Memory Map Descriptors -#define MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS (9 + DP_BASE_DESCRIPTOR) +#define MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS (10 + DP_BASE_DESCRIPTOR) // DDR attributes #define DDR_ATTRIBUTES_CACHED ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK @@ -175,6 +175,11 @@ ArmPlatformGetVirtualMemoryMap ( VirtualMemoryTable[Index].Attributes = CacheAttributes; } + VirtualMemoryTable[++Index].PhysicalBase = SBSA_WATCHDOG_BASE; + VirtualMemoryTable[Index].VirtualBase = SBSA_WATCHDOG_BASE; + VirtualMemoryTable[Index].Length = SBSA_WATCHDOG_SIZE; + VirtualMemoryTable[Index].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE; + // End of Table VirtualMemoryTable[++Index].PhysicalBase = 0; VirtualMemoryTable[Index].VirtualBase = 0;