From patchwork Thu Dec 20 17:31:01 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ard Biesheuvel X-Patchwork-Id: 154349 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp6456633ljp; Thu, 20 Dec 2018 09:31:14 -0800 (PST) X-Google-Smtp-Source: AFSGD/WzHMDy1X+E7OxBiYGsE/Cx9fFkfq0IzJ03e1ZJTSLV6Br1JagAfFGyIqdmuukFYlSleB+L X-Received: by 2002:a62:2082:: with SMTP id m2mr24562941pfj.163.1545327074369; Thu, 20 Dec 2018 09:31:14 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1545327074; cv=none; d=google.com; s=arc-20160816; b=SFfyzpHv8K5qWdRIXDiAVCDtCSnoSUjwK/jPqQoYwwC006SAYHpzuH6AcTUTmI1VwG l+ygGEJsqrYx9kx9aZ6ydziA86dlB19QKIUMKn1v2cG4rqLOPifmva++NcaFhpkPh5H+ Ut9huryRzW+CEKUPuy2zMwxbI8VgfSeBZl+yzpw9+QjvEIQj2VXxKt1MMgf0EYfVXW9T MzYSgUtMs0AyvW7ey72MRe/eXngSk23s5OZu5wOM5oNVh4wOgnXt63OVgwgyFUUxii47 Aa1xdFan7A8fbfOQ5GfteI3jqPmBCbifualy3jTx7HsIeOUP8fZ6Dhi6BZxDtR02Cibx 3NrQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:cc:list-subscribe :list-help:list-post:list-archive:list-unsubscribe:list-id :precedence:subject:mime-version:references:in-reply-to:message-id :date:to:from:dkim-signature:delivered-to; bh=tQ7P3uokkx30BLVIWO/ZCJWr+GRzPsjxvV/RD4+oHJo=; b=JBTk3DG5aY4Ui90TtG7xmOLi3PsiMCI1/fzGu49xXY214EJ7+m1HCeAgFzWPv0jzy8 otMPhe1byjT9NzMytqIzPtiLapHr0aZNWwcc4p85YyICG8jdg7ZsdRWiYv7Sz6b2G/zW PZnNSG6W2Fa5btVQ73uInocirilg4uPPrIjULYq9dOQDilUQhAoRDjW0Mn1pXcdxhjmk ArFCcAJe3uxIHXmI7vUT1g2wmBgXJxUzxk9JgZeF+bmAGOIK9si5ohEWXeh6Mi2q3pVL 1A4BuEZGNv9mZAd7NQH/JifNM9kir5NOOMcnhMHK/8KF3kIS2PWMjbacNEA6XaB1WHzh Mf4Q== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=jPR9gSf0; spf=pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 2001:19d0:306:5::1 as permitted sender) smtp.mailfrom=edk2-devel-bounces@lists.01.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from ml01.01.org (ml01.01.org. [2001:19d0:306:5::1]) by mx.google.com with ESMTPS id n28si19933820pfb.88.2018.12.20.09.31.14 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 20 Dec 2018 09:31:14 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 2001:19d0:306:5::1 as permitted sender) client-ip=2001:19d0:306:5::1; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=jPR9gSf0; spf=pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 2001:19d0:306:5::1 as permitted sender) smtp.mailfrom=edk2-devel-bounces@lists.01.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id 01302211A4583; Thu, 20 Dec 2018 09:31:14 -0800 (PST) X-Original-To: edk2-devel@lists.01.org Delivered-To: edk2-devel@lists.01.org Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2a00:1450:4864:20::32f; helo=mail-wm1-x32f.google.com; envelope-from=ard.biesheuvel@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-wm1-x32f.google.com (mail-wm1-x32f.google.com [IPv6:2a00:1450:4864:20::32f]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 9EBCE211A3232 for ; Thu, 20 Dec 2018 09:31:11 -0800 (PST) Received: by mail-wm1-x32f.google.com with SMTP id p6so3105344wmc.1 for ; Thu, 20 Dec 2018 09:31:11 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=uUCgiqWfIuQQSyoagOyRa0ER8KKFZMUyaEVpQTSppRA=; b=jPR9gSf0pEI7VRo67BezXlvIyriFoC04s5+wVoItNWa00gIZl1Y6vhtq7elXrFBSAJ JZxbvssyvd8fyEMsAILeVg0ZfPHLEueghrD4OW4cvYWsK/eGKmQt0Ld9nqNFQb85hHlM WUFF1I4+pokUhi5KoJuXWcEHYfGKaBCSM2Jnc= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=uUCgiqWfIuQQSyoagOyRa0ER8KKFZMUyaEVpQTSppRA=; b=AZy2FVsXIhwnnMy4Lo5MNjMzgQC7xw1mZtIhnTSPCJjaIaBCZdc62tbPZ0ui8lB7MW ABAdOWIEDfVa22yAeZ1bX8btTsUcZ2KpxsVgXTyQksHXwh68gJeBsLLkDSNWWd2ngCra 3B2+WrLJQJkTqGezPE+HOQfYf6q6H4bszHCig7gRYguuFgfXLePp92sAUGwOhOEwryfc MtkeFxg94HipnPk5jxonrkNXC7UiAIqVLSsI8seYIB3VCOalMSelKbs/f9r5aSCfgz82 EzVCESy9fNU98aXnh7RnQ0czm2686Y0HuVLLMFrYFTtyo/LYMaZfVwAXHCjK3ps4/aBZ A7PA== X-Gm-Message-State: AA+aEWYJC17jSXzO3sly3fij7xN/p8PXRUvjIwk9C1iXqOIAkZb6yvaC nUKJlYj4d4Nxnk0SbZwisRzbuWQhopihmg== X-Received: by 2002:a1c:df46:: with SMTP id w67mr12685814wmg.51.1545327069196; Thu, 20 Dec 2018 09:31:09 -0800 (PST) Received: from localhost.localdomain (aputeaux-683-1-2-211.w90-86.abo.wanadoo.fr. [90.86.101.211]) by smtp.gmail.com with ESMTPSA id x12sm6826131wrt.20.2018.12.20.09.31.07 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 20 Dec 2018 09:31:08 -0800 (PST) From: Ard Biesheuvel To: edk2-devel@lists.01.org Date: Thu, 20 Dec 2018 18:31:01 +0100 Message-Id: <20181220173104.11481-2-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.19.2 In-Reply-To: <20181220173104.11481-1-ard.biesheuvel@linaro.org> References: <20181220173104.11481-1-ard.biesheuvel@linaro.org> MIME-Version: 1.0 Subject: [edk2] [PATCH 1/4] ArmPkg/DebugAgentSymbolsBaseLib: remove exception handling X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: lersek@redhat.com Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" DebugAgentSymbolsBaseLib is an optional library that is in charge of extracting debug headers from SEC and PEI_CORE images in memory so the filename and the offset in memory can be reported via the UART, allowing a developer to load debugging symbols into his debugger. Interestingly enough, DebugAgentSymbolsBaseLib is also in charge of exception handling before this duty is taken over by either the PEI core, or the CPU DXE driver when running under PrePi. Since exceptions are not actually handled at all on AArch64, and simply routed to the DefaultExceptionHandlerLib (for which a special version has been created to be usable this early), let's get rid of this dubious functionality altogether. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel --- ArmPkg/Library/DebugAgentSymbolsBaseLib/AArch64/DebugAgentException.S | 96 ------- ArmPkg/Library/DebugAgentSymbolsBaseLib/Arm/DebugAgentException.S | 277 -------------------- ArmPkg/Library/DebugAgentSymbolsBaseLib/Arm/DebugAgentException.asm | 273 ------------------- ArmPkg/Library/DebugAgentSymbolsBaseLib/DebugAgentSymbolsBaseLib.c | 7 - ArmPkg/Library/DebugAgentSymbolsBaseLib/DebugAgentSymbolsBaseLib.inf | 9 - 5 files changed, 662 deletions(-) -- 2.19.2 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel diff --git a/ArmPkg/Library/DebugAgentSymbolsBaseLib/AArch64/DebugAgentException.S b/ArmPkg/Library/DebugAgentSymbolsBaseLib/AArch64/DebugAgentException.S deleted file mode 100644 index f33a07a19bad..000000000000 --- a/ArmPkg/Library/DebugAgentSymbolsBaseLib/AArch64/DebugAgentException.S +++ /dev/null @@ -1,96 +0,0 @@ -#------------------------------------------------------------------------------ -# -# Copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.
-# -# This program and the accompanying materials -# are licensed and made available under the terms and conditions of the BSD License -# which accompanies this distribution. The full text of the license may be found at -# http://opensource.org/licenses/bsd-license.php -# -# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. -# -#------------------------------------------------------------------------------ - -#include - -GCC_ASM_IMPORT(DefaultExceptionHandler) - -.text -VECTOR_BASE(DebugAgentVectorTable) - -// -// Current EL with SP0 : 0x0 - 0x180 -// -VECTOR_ENTRY(DebugAgentVectorTable, ARM_VECTOR_CUR_SP0_SYNC) -ASM_PFX(SynchronousExceptionSP0): - b ASM_PFX(SynchronousExceptionSP0) - -VECTOR_ENTRY(DebugAgentVectorTable, ARM_VECTOR_CUR_SP0_IRQ) -ASM_PFX(IrqSP0): - b ASM_PFX(IrqSP0) - -VECTOR_ENTRY(DebugAgentVectorTable, ARM_VECTOR_CUR_SP0_FIQ) -ASM_PFX(FiqSP0): - b ASM_PFX(FiqSP0) - -VECTOR_ENTRY(DebugAgentVectorTable, ARM_VECTOR_CUR_SP0_SERR) -ASM_PFX(SErrorSP0): - b ASM_PFX(SErrorSP0) - -// -// Current EL with SPx: 0x200 - 0x380 -// -VECTOR_ENTRY(DebugAgentVectorTable, ARM_VECTOR_CUR_SPx_SYNC) -ASM_PFX(SynchronousExceptionSPx): - b ASM_PFX(SynchronousExceptionSPx) - -VECTOR_ENTRY(DebugAgentVectorTable, ARM_VECTOR_CUR_SPx_IRQ) -ASM_PFX(IrqSPx): - b ASM_PFX(IrqSPx) - -VECTOR_ENTRY(DebugAgentVectorTable, ARM_VECTOR_CUR_SPx_FIQ) -ASM_PFX(FiqSPx): - b ASM_PFX(FiqSPx) - -VECTOR_ENTRY(DebugAgentVectorTable, ARM_VECTOR_CUR_SPx_SERR) -ASM_PFX(SErrorSPx): - b ASM_PFX(SErrorSPx) - -/* Lower EL using AArch64 : 0x400 - 0x580 */ -VECTOR_ENTRY(DebugAgentVectorTable, ARM_VECTOR_LOW_A64_SYNC) -ASM_PFX(SynchronousExceptionA64): - b ASM_PFX(SynchronousExceptionA64) - -VECTOR_ENTRY(DebugAgentVectorTable, ARM_VECTOR_LOW_A64_IRQ) -ASM_PFX(IrqA64): - b ASM_PFX(IrqA64) - -VECTOR_ENTRY(DebugAgentVectorTable, ARM_VECTOR_LOW_A64_FIQ) -ASM_PFX(FiqA64): - b ASM_PFX(FiqA64) - -VECTOR_ENTRY(DebugAgentVectorTable, ARM_VECTOR_LOW_A64_SERR) -ASM_PFX(SErrorA64): - b ASM_PFX(SErrorA64) - -// -// Lower EL using AArch32 : 0x600 - 0x780 -// -VECTOR_ENTRY(DebugAgentVectorTable, ARM_VECTOR_LOW_A32_SYNC) -ASM_PFX(SynchronousExceptionA32): - b ASM_PFX(SynchronousExceptionA32) - -VECTOR_ENTRY(DebugAgentVectorTable, ARM_VECTOR_LOW_A32_IRQ) -ASM_PFX(IrqA32): - b ASM_PFX(IrqA32) - -VECTOR_ENTRY(DebugAgentVectorTable, ARM_VECTOR_LOW_A32_FIQ) -ASM_PFX(FiqA32): - b ASM_PFX(FiqA32) - -VECTOR_ENTRY(DebugAgentVectorTable, ARM_VECTOR_LOW_A32_SERR) -ASM_PFX(SErrorA32): - b ASM_PFX(SErrorA32) - -VECTOR_END(DebugAgentVectorTable) diff --git a/ArmPkg/Library/DebugAgentSymbolsBaseLib/Arm/DebugAgentException.S b/ArmPkg/Library/DebugAgentSymbolsBaseLib/Arm/DebugAgentException.S deleted file mode 100644 index 215181460803..000000000000 --- a/ArmPkg/Library/DebugAgentSymbolsBaseLib/Arm/DebugAgentException.S +++ /dev/null @@ -1,277 +0,0 @@ -#------------------------------------------------------------------------------ -# -# Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.
-# Copyright (c) 2011 - 2012, ARM Ltd. All rights reserved.
-# -# This program and the accompanying materials -# are licensed and made available under the terms and conditions of the BSD License -# which accompanies this distribution. The full text of the license may be found at -# http://opensource.org/licenses/bsd-license.php -# -# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. -# -#------------------------------------------------------------------------------ - -#include - -/* - -This is the stack constructed by the exception handler (low address to high address) - # R0 - IFAR is EFI_SYSTEM_CONTEXT for ARM - Reg Offset - === ====== - R0 0x00 # stmfd SP!,{R0-R12} - R1 0x04 - R2 0x08 - R3 0x0c - R4 0x10 - R5 0x14 - R6 0x18 - R7 0x1c - R8 0x20 - R9 0x24 - R10 0x28 - R11 0x2c - R12 0x30 - SP 0x34 # reserved via adding 0x20 (32) to the SP - LR 0x38 - PC 0x3c - CPSR 0x40 - DFSR 0x44 - DFAR 0x48 - IFSR 0x4c - IFAR 0x50 - - LR 0x54 # SVC Link register (we need to restore it) - - LR 0x58 # pushed by srsfd - CPSR 0x5c - - */ - -GCC_ASM_EXPORT(DebugAgentVectorTable) -GCC_ASM_IMPORT(DefaultExceptionHandler) - -.text -.syntax unified -#if !defined(__APPLE__) -.fpu neon @ makes vpush/vpop assemble -#endif -.align 5 - - -// -// This code gets copied to the ARM vector table -// ExceptionHandlersStart - ExceptionHandlersEnd gets copied -// -ASM_PFX(DebugAgentVectorTable): - b ASM_PFX(ResetEntry) - b ASM_PFX(UndefinedInstructionEntry) - b ASM_PFX(SoftwareInterruptEntry) - b ASM_PFX(PrefetchAbortEntry) - b ASM_PFX(DataAbortEntry) - b ASM_PFX(ReservedExceptionEntry) - b ASM_PFX(IrqEntry) - b ASM_PFX(FiqEntry) - -ASM_PFX(ResetEntry): - srsdb #0x13! @ Store return state on SVC stack - @ We are already in SVC mode - - stmfd SP!,{LR} @ Store the link register for the current mode - sub SP,SP,#0x20 @ Save space for SP, LR, PC, IFAR - CPSR - stmfd SP!,{R0-R12} @ Store the register state - - mov R0,#0 @ ExceptionType - ldr R1,ASM_PFX(CommonExceptionEntry) - bx R1 - -ASM_PFX(UndefinedInstructionEntry): - sub LR, LR, #4 @ Only -2 for Thumb, adjust in CommonExceptionEntry - srsdb #0x13! @ Store return state on SVC stack - cps #0x13 @ Switch to SVC for common stack - stmfd SP!,{LR} @ Store the link register for the current mode - sub SP,SP,#0x20 @ Save space for SP, LR, PC, IFAR - CPSR - stmfd SP!,{R0-R12} @ Store the register state - - mov R0,#1 @ ExceptionType - ldr R1,ASM_PFX(CommonExceptionEntry) - bx R1 - -ASM_PFX(SoftwareInterruptEntry): - sub LR, LR, #4 @ Only -2 for Thumb, adjust in CommonExceptionEntry - srsdb #0x13! @ Store return state on SVC stack - @ We are already in SVC mode - stmfd SP!,{LR} @ Store the link register for the current mode - sub SP,SP,#0x20 @ Save space for SP, LR, PC, IFAR - CPSR - stmfd SP!,{R0-R12} @ Store the register state - - mov R0,#2 @ ExceptionType - ldr R1,ASM_PFX(CommonExceptionEntry) - bx R1 - -ASM_PFX(PrefetchAbortEntry): - sub LR,LR,#4 - srsdb #0x13! @ Store return state on SVC stack - cps #0x13 @ Switch to SVC for common stack - stmfd SP!,{LR} @ Store the link register for the current mode - sub SP,SP,#0x20 @ Save space for SP, LR, PC, IFAR - CPSR - stmfd SP!,{R0-R12} @ Store the register state - - mov R0,#3 @ ExceptionType - ldr R1,ASM_PFX(CommonExceptionEntry) - bx R1 - -ASM_PFX(DataAbortEntry): - sub LR,LR,#8 - srsdb #0x13! @ Store return state on SVC stack - cps #0x13 @ Switch to SVC for common stack - stmfd SP!,{LR} @ Store the link register for the current mode - sub SP,SP,#0x20 @ Save space for SP, LR, PC, IFAR - CPSR - stmfd SP!,{R0-R12} @ Store the register state - - mov R0,#4 - ldr R1,ASM_PFX(CommonExceptionEntry) - bx R1 - -ASM_PFX(ReservedExceptionEntry): - srsdb #0x13! @ Store return state on SVC stack - cps #0x13 @ Switch to SVC for common stack - stmfd SP!,{LR} @ Store the link register for the current mode - sub SP,SP,#0x20 @ Save space for SP, LR, PC, IFAR - CPSR - stmfd SP!,{R0-R12} @ Store the register state - - mov R0,#5 - ldr R1,ASM_PFX(CommonExceptionEntry) - bx R1 - -ASM_PFX(IrqEntry): - sub LR,LR,#4 - srsdb #0x13! @ Store return state on SVC stack - cps #0x13 @ Switch to SVC for common stack - stmfd SP!,{LR} @ Store the link register for the current mode - sub SP,SP,#0x20 @ Save space for SP, LR, PC, IFAR - CPSR - stmfd SP!,{R0-R12} @ Store the register state - - mov R0,#6 @ ExceptionType - ldr R1,ASM_PFX(CommonExceptionEntry) - bx R1 - -ASM_PFX(FiqEntry): - sub LR,LR,#4 - srsdb #0x13! @ Store return state on SVC stack - cps #0x13 @ Switch to SVC for common stack - stmfd SP!,{LR} @ Store the link register for the current mode - sub SP,SP,#0x20 @ Save space for SP, LR, PC, IFAR - CPSR - stmfd SP!,{R0-R12} @ Store the register state - @ Since we have already switch to SVC R8_fiq - R12_fiq - @ never get used or saved - mov R0,#7 @ ExceptionType - ldr R1,ASM_PFX(CommonExceptionEntry) - bx R1 - -// -// This gets patched by the C code that patches in the vector table -// -ASM_PFX(CommonExceptionEntry): - .word ASM_PFX(AsmCommonExceptionEntry) - -ASM_PFX(ExceptionHandlersEnd): - -// -// This code runs from CpuDxe driver loaded address. It is patched into -// CommonExceptionEntry. -// -ASM_PFX(AsmCommonExceptionEntry): - mrc p15, 0, R1, c6, c0, 2 @ Read IFAR - str R1, [SP, #0x50] @ Store it in EFI_SYSTEM_CONTEXT_ARM.IFAR - - mrc p15, 0, R1, c5, c0, 1 @ Read IFSR - str R1, [SP, #0x4c] @ Store it in EFI_SYSTEM_CONTEXT_ARM.IFSR - - mrc p15, 0, R1, c6, c0, 0 @ Read DFAR - str R1, [SP, #0x48] @ Store it in EFI_SYSTEM_CONTEXT_ARM.DFAR - - mrc p15, 0, R1, c5, c0, 0 @ Read DFSR - str R1, [SP, #0x44] @ Store it in EFI_SYSTEM_CONTEXT_ARM.DFSR - - ldr R1, [SP, #0x5c] @ srsdb saved pre-exception CPSR on the stack - str R1, [SP, #0x40] @ Store it in EFI_SYSTEM_CONTEXT_ARM.CPSR - - add R2, SP, #0x38 @ Make R2 point to EFI_SYSTEM_CONTEXT_ARM.LR - and R3, R1, #0x1f @ Check CPSR to see if User or System Mode - cmp R3, #0x1f @ if ((CPSR == 0x10) || (CPSR == 0x1df)) - cmpne R3, #0x10 @ - stmdaeq R2, {lr}^ @ save unbanked lr - @ else - stmdane R2, {lr} @ save SVC lr - - - ldr R5, [SP, #0x58] @ PC is the LR pushed by srsfd - @ Check to see if we have to adjust for Thumb entry - sub r4, r0, #1 @ if (ExceptionType == 1 || ExceptionType ==2)) { - cmp r4, #1 @ // UND & SVC have different LR adjust for Thumb - bhi NoAdjustNeeded - - tst r1, #0x20 @ if ((CPSR & T)) == T) { // Thumb Mode on entry - addne R5, R5, #2 @ PC += 2@ - str R5,[SP,#0x58] @ Update LR value pused by srsfd - -NoAdjustNeeded: - - str R5, [SP, #0x3c] @ Store it in EFI_SYSTEM_CONTEXT_ARM.PC - - sub R1, SP, #0x60 @ We pused 0x60 bytes on the stack - str R1, [SP, #0x34] @ Store it in EFI_SYSTEM_CONTEXT_ARM.SP - - @ R0 is ExceptionType - mov R1,SP @ R1 is SystemContext - -#if (FixedPcdGet32(PcdVFPEnabled)) - vpush {d0-d15} @ save vstm registers in case they are used in optimizations -#endif - -/* -VOID -EFIAPI -DefaultExceptionHandler ( - IN EFI_EXCEPTION_TYPE ExceptionType, R0 - IN OUT EFI_SYSTEM_CONTEXT SystemContext R1 - ) - -*/ - blx ASM_PFX(DefaultExceptionHandler) @ Call exception handler - -#if (FixedPcdGet32(PcdVFPEnabled)) - vpop {d0-d15} -#endif - - ldr R1, [SP, #0x4c] @ Restore EFI_SYSTEM_CONTEXT_ARM.IFSR - mcr p15, 0, R1, c5, c0, 1 @ Write IFSR - - ldr R1, [SP, #0x44] @ sRestore EFI_SYSTEM_CONTEXT_ARM.DFSR - mcr p15, 0, R1, c5, c0, 0 @ Write DFSR - - ldr R1,[SP,#0x3c] @ EFI_SYSTEM_CONTEXT_ARM.PC - str R1,[SP,#0x58] @ Store it back to srsfd stack slot so it can be restored - - ldr R1,[SP,#0x40] @ EFI_SYSTEM_CONTEXT_ARM.CPSR - str R1,[SP,#0x5c] @ Store it back to srsfd stack slot so it can be restored - - add R3, SP, #0x54 @ Make R3 point to SVC LR saved on entry - add R2, SP, #0x38 @ Make R2 point to EFI_SYSTEM_CONTEXT_ARM.LR - and R1, R1, #0x1f @ Check to see if User or System Mode - cmp R1, #0x1f @ if ((CPSR == 0x10) || (CPSR == 0x1f)) - cmpne R1, #0x10 @ - ldmibeq R2, {lr}^ @ restore unbanked lr - @ else - ldmibne R3, {lr} @ restore SVC lr, via ldmfd SP!, {LR} - - ldmfd SP!,{R0-R12} @ Restore general purpose registers - @ Exception handler can not change SP - - add SP,SP,#0x20 @ Clear out the remaining stack space - ldmfd SP!,{LR} @ restore the link register for this context - rfefd SP! @ return from exception via srsfd stack slot - diff --git a/ArmPkg/Library/DebugAgentSymbolsBaseLib/Arm/DebugAgentException.asm b/ArmPkg/Library/DebugAgentSymbolsBaseLib/Arm/DebugAgentException.asm deleted file mode 100644 index cf59447bed10..000000000000 --- a/ArmPkg/Library/DebugAgentSymbolsBaseLib/Arm/DebugAgentException.asm +++ /dev/null @@ -1,273 +0,0 @@ -//------------------------------------------------------------------------------ -// -// Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.
-// Copyright (c) 2011 - 2012, ARM Ltd. All rights reserved.
-// -// This program and the accompanying materials -// are licensed and made available under the terms and conditions of the BSD License -// which accompanies this distribution. The full text of the license may be found at -// http://opensource.org/licenses/bsd-license.php -// -// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. -// -//------------------------------------------------------------------------------ - -#include - -/* - -This is the stack constructed by the exception handler (low address to high address) - # R0 - IFAR is EFI_SYSTEM_CONTEXT for ARM - Reg Offset - === ====== - R0 0x00 # stmfd SP!,{R0-R12} - R1 0x04 - R2 0x08 - R3 0x0c - R4 0x10 - R5 0x14 - R6 0x18 - R7 0x1c - R8 0x20 - R9 0x24 - R10 0x28 - R11 0x2c - R12 0x30 - SP 0x34 # reserved via adding 0x20 (32) to the SP - LR 0x38 - PC 0x3c - CPSR 0x40 - DFSR 0x44 - DFAR 0x48 - IFSR 0x4c - IFAR 0x50 - - LR 0x54 # SVC Link register (we need to restore it) - - LR 0x58 # pushed by srsfd - CPSR 0x5c - - */ - - EXPORT DebugAgentVectorTable - IMPORT DefaultExceptionHandler - - PRESERVE8 - AREA DebugAgentException, CODE, READONLY, CODEALIGN, ALIGN=5 - -// -// This code gets copied to the ARM vector table -// ExceptionHandlersStart - ExceptionHandlersEnd gets copied -// -DebugAgentVectorTable FUNCTION - b ResetEntry - b UndefinedInstructionEntry - b SoftwareInterruptEntry - b PrefetchAbortEntry - b DataAbortEntry - b ReservedExceptionEntry - b IrqEntry - b FiqEntry - ENDFUNC - -ResetEntry - srsfd #0x13! ; Store return state on SVC stack - ; We are already in SVC mode - stmfd SP!,{LR} ; Store the link register for the current mode - sub SP,SP,#0x20 ; Save space for SP, LR, PC, IFAR - CPSR - stmfd SP!,{R0-R12} ; Store the register state - - mov R0,#0 ; ExceptionType - ldr R1,CommonExceptionEntry - bx R1 - -UndefinedInstructionEntry - sub LR, LR, #4 ; Only -2 for Thumb, adjust in CommonExceptionEntry - srsfd #0x13! ; Store return state on SVC stack - cps #0x13 ; Switch to SVC for common stack - stmfd SP!,{LR} ; Store the link register for the current mode - sub SP,SP,#0x20 ; Save space for SP, LR, PC, IFAR - CPSR - stmfd SP!,{R0-R12} ; Store the register state - - mov R0,#1 ; ExceptionType - ldr R1,CommonExceptionEntry; - bx R1 - -SoftwareInterruptEntry - sub LR, LR, #4 ; Only -2 for Thumb, adjust in CommonExceptionEntry - srsfd #0x13! ; Store return state on SVC stack - ; We are already in SVC mode - stmfd SP!,{LR} ; Store the link register for the current mode - sub SP,SP,#0x20 ; Save space for SP, LR, PC, IFAR - CPSR - stmfd SP!,{R0-R12} ; Store the register state - - mov R0,#2 ; ExceptionType - ldr R1,CommonExceptionEntry - bx R1 - -PrefetchAbortEntry - sub LR,LR,#4 - srsfd #0x13! ; Store return state on SVC stack - cps #0x13 ; Switch to SVC for common stack - stmfd SP!,{LR} ; Store the link register for the current mode - sub SP,SP,#0x20 ; Save space for SP, LR, PC, IFAR - CPSR - stmfd SP!,{R0-R12} ; Store the register state - - mov R0,#3 ; ExceptionType - ldr R1,CommonExceptionEntry - bx R1 - -DataAbortEntry - sub LR,LR,#8 - srsfd #0x13! ; Store return state on SVC stack - cps #0x13 ; Switch to SVC for common stack - stmfd SP!,{LR} ; Store the link register for the current mode - sub SP,SP,#0x20 ; Save space for SP, LR, PC, IFAR - CPSR - stmfd SP!,{R0-R12} ; Store the register state - - mov R0,#4 ; ExceptionType - ldr R1,CommonExceptionEntry - bx R1 - -ReservedExceptionEntry - srsfd #0x13! ; Store return state on SVC stack - cps #0x13 ; Switch to SVC for common stack - stmfd SP!,{LR} ; Store the link register for the current mode - sub SP,SP,#0x20 ; Save space for SP, LR, PC, IFAR - CPSR - stmfd SP!,{R0-R12} ; Store the register state - - mov R0,#5 ; ExceptionType - ldr R1,CommonExceptionEntry - bx R1 - -IrqEntry - sub LR,LR,#4 - srsfd #0x13! ; Store return state on SVC stack - cps #0x13 ; Switch to SVC for common stack - stmfd SP!,{LR} ; Store the link register for the current mode - sub SP,SP,#0x20 ; Save space for SP, LR, PC, IFAR - CPSR - stmfd SP!,{R0-R12} ; Store the register state - - mov R0,#6 ; ExceptionType - ldr R1,CommonExceptionEntry - bx R1 - -FiqEntry - sub LR,LR,#4 - srsfd #0x13! ; Store return state on SVC stack - cps #0x13 ; Switch to SVC for common stack - stmfd SP!,{LR} ; Store the link register for the current mode - sub SP,SP,#0x20 ; Save space for SP, LR, PC, IFAR - CPSR - stmfd SP!,{R0-R12} ; Store the register state - ; Since we have already switch to SVC R8_fiq - R12_fiq - ; never get used or saved - mov R0,#7 ; ExceptionType - ldr R1,CommonExceptionEntry - bx R1 - -// -// This gets patched by the C code that patches in the vector table -// -CommonExceptionEntry - dcd AsmCommonExceptionEntry - -ExceptionHandlersEnd - -// -// This code runs from CpuDxe driver loaded address. It is patched into -// CommonExceptionEntry. -// -AsmCommonExceptionEntry - mrc p15, 0, R1, c6, c0, 2 ; Read IFAR - str R1, [SP, #0x50] ; Store it in EFI_SYSTEM_CONTEXT_ARM.IFAR - - mrc p15, 0, R1, c5, c0, 1 ; Read IFSR - str R1, [SP, #0x4c] ; Store it in EFI_SYSTEM_CONTEXT_ARM.IFSR - - mrc p15, 0, R1, c6, c0, 0 ; Read DFAR - str R1, [SP, #0x48] ; Store it in EFI_SYSTEM_CONTEXT_ARM.DFAR - - mrc p15, 0, R1, c5, c0, 0 ; Read DFSR - str R1, [SP, #0x44] ; Store it in EFI_SYSTEM_CONTEXT_ARM.DFSR - - ldr R1, [SP, #0x5c] ; srsfd saved pre-exception CPSR on the stack - str R1, [SP, #0x40] ; Store it in EFI_SYSTEM_CONTEXT_ARM.CPSR - - add R2, SP, #0x38 ; Make R2 point to EFI_SYSTEM_CONTEXT_ARM.LR - and R3, R1, #0x1f ; Check CPSR to see if User or System Mode - cmp R3, #0x1f ; if ((CPSR == 0x10) || (CPSR == 0x1df)) - cmpne R3, #0x10 ; - stmeqed R2, {lr}^ ; save unbanked lr - ; else - stmneed R2, {lr} ; save SVC lr - - - ldr R5, [SP, #0x58] ; PC is the LR pushed by srsfd - ; Check to see if we have to adjust for Thumb entry - sub r4, r0, #1 ; if (ExceptionType == 1 || ExceptionType ==2)) { - cmp r4, #1 ; // UND & SVC have different LR adjust for Thumb - bhi NoAdjustNeeded - - tst r1, #0x20 ; if ((CPSR & T)) == T) { // Thumb Mode on entry - addne R5, R5, #2 ; PC += 2; - str R5,[SP,#0x58] ; Update LR value pused by srsfd - -NoAdjustNeeded - - str R5, [SP, #0x3c] ; Store it in EFI_SYSTEM_CONTEXT_ARM.PC - - sub R1, SP, #0x60 ; We pused 0x60 bytes on the stack - str R1, [SP, #0x34] ; Store it in EFI_SYSTEM_CONTEXT_ARM.SP - - ; R0 is ExceptionType - mov R1,SP ; R1 is SystemContext - -#if (FixedPcdGet32(PcdVFPEnabled)) - vpush {d0-d15} ; save vstm registers in case they are used in optimizations -#endif - -/* -VOID -EFIAPI -DefaultExceptionHandler ( - IN EFI_EXCEPTION_TYPE ExceptionType, R0 - IN OUT EFI_SYSTEM_CONTEXT SystemContext R1 - ) - -*/ - blx DefaultExceptionHandler ; Call exception handler - -#if (FixedPcdGet32(PcdVFPEnabled)) - vpop {d0-d15} -#endif - - ldr R1, [SP, #0x4c] ; Restore EFI_SYSTEM_CONTEXT_ARM.IFSR - mcr p15, 0, R1, c5, c0, 1 ; Write IFSR - - ldr R1, [SP, #0x44] ; sRestore EFI_SYSTEM_CONTEXT_ARM.DFSR - mcr p15, 0, R1, c5, c0, 0 ; Write DFSR - - ldr R1,[SP,#0x3c] ; EFI_SYSTEM_CONTEXT_ARM.PC - str R1,[SP,#0x58] ; Store it back to srsfd stack slot so it can be restored - - ldr R1,[SP,#0x40] ; EFI_SYSTEM_CONTEXT_ARM.CPSR - str R1,[SP,#0x5c] ; Store it back to srsfd stack slot so it can be restored - - add R3, SP, #0x54 ; Make R3 point to SVC LR saved on entry - add R2, SP, #0x38 ; Make R2 point to EFI_SYSTEM_CONTEXT_ARM.LR - and R1, R1, #0x1f ; Check to see if User or System Mode - cmp R1, #0x1f ; if ((CPSR == 0x10) || (CPSR == 0x1f)) - cmpne R1, #0x10 ; - ldmeqed R2, {lr}^ ; restore unbanked lr - ; else - ldmneed R3, {lr} ; restore SVC lr, via ldmfd SP!, {LR} - - ldmfd SP!,{R0-R12} ; Restore general purpose registers - ; Exception handler can not change SP - - add SP,SP,#0x20 ; Clear out the remaining stack space - ldmfd SP!,{LR} ; restore the link register for this context - rfefd SP! ; return from exception via srsfd stack slot - - END diff --git a/ArmPkg/Library/DebugAgentSymbolsBaseLib/DebugAgentSymbolsBaseLib.c b/ArmPkg/Library/DebugAgentSymbolsBaseLib/DebugAgentSymbolsBaseLib.c index 9c0cf0de38e1..f47f4250d1e8 100644 --- a/ArmPkg/Library/DebugAgentSymbolsBaseLib/DebugAgentSymbolsBaseLib.c +++ b/ArmPkg/Library/DebugAgentSymbolsBaseLib/DebugAgentSymbolsBaseLib.c @@ -14,7 +14,6 @@ **/ #include -#include #include #include #include @@ -283,12 +282,6 @@ InitializeDebugAgent ( EFI_FFS_FILE_HEADER *FfsHeader; PE_COFF_LOADER_IMAGE_CONTEXT ImageContext; - // Now we've got UART, check the Debug Agent Vector Table - // Note: The AArch64 Vector table must be 2k-byte aligned - if this assertion fails ensure - // 'Align=4K' is defined into your FDF for this module. - ASSERT (((UINTN)DebugAgentVectorTable & ARM_VECTOR_TABLE_ALIGNMENT) == 0); - ArmWriteVBar ((UINTN)DebugAgentVectorTable); - // We use InitFlag to know if DebugAgent has been initialized from // Sec (DEBUG_AGENT_INIT_PREMEM_SEC) or PrePi (DEBUG_AGENT_INIT_POSTMEM_SEC) // modules diff --git a/ArmPkg/Library/DebugAgentSymbolsBaseLib/DebugAgentSymbolsBaseLib.inf b/ArmPkg/Library/DebugAgentSymbolsBaseLib/DebugAgentSymbolsBaseLib.inf index 6b784f749b5e..671c1b6474b2 100644 --- a/ArmPkg/Library/DebugAgentSymbolsBaseLib/DebugAgentSymbolsBaseLib.inf +++ b/ArmPkg/Library/DebugAgentSymbolsBaseLib/DebugAgentSymbolsBaseLib.inf @@ -22,22 +22,13 @@ [Sources.common] DebugAgentSymbolsBaseLib.c -[Sources.ARM] - Arm/DebugAgentException.asm | RVCT - Arm/DebugAgentException.S | GCC - -[Sources.AARCH64] - AArch64/DebugAgentException.S - [Packages] MdePkg/MdePkg.dec MdeModulePkg/MdeModulePkg.dec ArmPkg/ArmPkg.dec [LibraryClasses] - ArmLib DebugLib - DefaultExceptionHandlerLib PcdLib PeCoffExtraActionLib PeCoffLib From patchwork Thu Dec 20 17:31:02 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ard Biesheuvel X-Patchwork-Id: 154350 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp6456694ljp; Thu, 20 Dec 2018 09:31:17 -0800 (PST) X-Google-Smtp-Source: AFSGD/XXamoZys1UtwuJEPeIGuDcKsB+BOjBuWBmJL//lJjCMWcgHwRSzkT6rnB5xPITKYt8Hzt+ X-Received: by 2002:a17:902:bd0b:: with SMTP id p11mr25154401pls.259.1545327077466; Thu, 20 Dec 2018 09:31:17 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1545327077; cv=none; d=google.com; s=arc-20160816; b=n3ClrdXQ1CdJcI5NrR513uaI6bgnc6TCBK/fej0bGmFiiR9riAajaHW+3Xnr60WylB 5iSkl/GRgvF3CvpnoQPomPAtdxf/aiLvZb8V8piWXEifvfczHAhFKqG7LM7i7iEQKpLr iFK698ZuCSxRwR0loxgZwFDGaLJd8sySFbntFnngwqQJLYo8x0TStCkqDXeI+utqIvy+ nR3WNDk3axUih2OQidiKDaZcgtJCd1qc+x/5Cy/sxl6Qh8olHE+1DakAON5qRckA6yAV fVN2Nc6TImyfcwMWN4snxON2GST/rXi0SBKs21sO9BZMJhqxDby0xzqnzbSRJ8Nip0Nk u6cw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:cc:list-subscribe :list-help:list-post:list-archive:list-unsubscribe:list-id :precedence:subject:mime-version:references:in-reply-to:message-id :date:to:from:dkim-signature:delivered-to; bh=OrhJKy3BjYd7bKTC6wrLs2+fPDgc23LLrmkwe4FMFRY=; b=rehsB91HPFG8+HW/vRUN/DckT7WOHyQ4TmqsF1iBF/JMW8yf+8G6H3+B+sJKvLJuET 1OgQzVjuOWBC8t/0kDb9IXv6RS+g1KJYjDCcqGPfjx+aqWeK1OI4IQN5C2GnetA+IGg9 KFyzu4CynuKLo7JPUZyLBZdUoIlThfIXncVhuP5dKgOPAgVJDfomZQJHyZNNN5SV+9CK RO3jt98TATyhkzrdqvM0amJfyLFnEQSEP5tJT/aHkcEI9jh8AGLJEVUyPt+bCcPhG7BI /SAnzQsIl949R/IWarOBWMKc6j09vpmjVBwN31Uu4DxxZlE9WyWVY19H7G4durP64kIe Q/DQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=HZiHzt9e; spf=pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 2001:19d0:306:5::1 as permitted sender) smtp.mailfrom=edk2-devel-bounces@lists.01.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from ml01.01.org (ml01.01.org. [2001:19d0:306:5::1]) by mx.google.com with ESMTPS id a6si19611601pfa.227.2018.12.20.09.31.17 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 20 Dec 2018 09:31:17 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 2001:19d0:306:5::1 as permitted sender) client-ip=2001:19d0:306:5::1; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=HZiHzt9e; spf=pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 2001:19d0:306:5::1 as permitted sender) smtp.mailfrom=edk2-devel-bounces@lists.01.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id 3310D2194D3B9; Thu, 20 Dec 2018 09:31:14 -0800 (PST) X-Original-To: edk2-devel@lists.01.org Delivered-To: edk2-devel@lists.01.org Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2a00:1450:4864:20::342; helo=mail-wm1-x342.google.com; envelope-from=ard.biesheuvel@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-wm1-x342.google.com (mail-wm1-x342.google.com [IPv6:2a00:1450:4864:20::342]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 1DCD92194D3B9 for ; Thu, 20 Dec 2018 09:31:13 -0800 (PST) Received: by mail-wm1-x342.google.com with SMTP id y139so2859386wmc.5 for ; Thu, 20 Dec 2018 09:31:12 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=DlyzOdpv8t2V5sBtarqN8CXzqn/b/085op3NZgR4gQM=; b=HZiHzt9eMTSSWFMafj9TkB0X4jnDjkWx1EAs9TJd0cPHC8Jpf93TxDkrcHSImCICI9 XG4I3FLgQnAmtkH8dxcL+TDFb4i2SpqypbFL7Or9sXV8hgbfCgK8KXNbtPmUsitJwhQ5 b2bj4aNicpNX28YhBaWarLy8ABeTujJMBGz8I= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=DlyzOdpv8t2V5sBtarqN8CXzqn/b/085op3NZgR4gQM=; b=PcwVHXLzPaQj22n4tUHRSKPNnlD9GaxUplOdJ4p2vVmptdnsjLqO556g8nXkEW4v5x Pn/IyDQX4E4YXc/aySJ3j9lgTuqx8AG0bDndAfQWYMGSq4k1ludSpr4SY/mn48DvXxIx k7nqMlU+taMYfANonnSK7gKuWI8667Z0PL1w8fiUiTBFIJ5srvj+nSklq7DtAFKsTDj2 z/CfY0KDxcMmQzvHmaI6EOZRC1QhvycjrTDYeM5NabcuN5l2uLBo1ci70YEfeP0hzZsm hbLC5X5tSZaMFtd6qExHwLcEFOi3nbkwXKryo/ThjJAPKGZhd3KcLd65zDPtBeaB8H5l 4h9A== X-Gm-Message-State: AA+aEWYinR9Of28Ak1sknskHGV6jmOk2M7qcSUuOXFBgK9rfhOu9BTlA rtJji83WOuCk0R/MzfyMoYaDntKJo+8nYw== X-Received: by 2002:a1c:128b:: with SMTP id 133mr12962614wms.22.1545327071308; Thu, 20 Dec 2018 09:31:11 -0800 (PST) Received: from localhost.localdomain (aputeaux-683-1-2-211.w90-86.abo.wanadoo.fr. [90.86.101.211]) by smtp.gmail.com with ESMTPSA id x12sm6826131wrt.20.2018.12.20.09.31.09 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 20 Dec 2018 09:31:09 -0800 (PST) From: Ard Biesheuvel To: edk2-devel@lists.01.org Date: Thu, 20 Dec 2018 18:31:02 +0100 Message-Id: <20181220173104.11481-3-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.19.2 In-Reply-To: <20181220173104.11481-1-ard.biesheuvel@linaro.org> References: <20181220173104.11481-1-ard.biesheuvel@linaro.org> MIME-Version: 1.0 Subject: [edk2] [PATCH 2/4] ArmPkg/DefaultExceptionHandlerLib: declare the permitted usage context X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: lersek@redhat.com Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" Declare that this library is only usable in the context of DXE core or a DXE driver. Set the MODULE_TYPE to BASE: this only affects the prototype of the constructor (if present) but doesn't actually restrict the usage context otherwise. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel --- ArmPkg/Library/DefaultExceptionHandlerLib/DefaultExceptionHandlerLib.inf | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) -- 2.19.2 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel diff --git a/ArmPkg/Library/DefaultExceptionHandlerLib/DefaultExceptionHandlerLib.inf b/ArmPkg/Library/DefaultExceptionHandlerLib/DefaultExceptionHandlerLib.inf index f5421b1240a1..7609f82d89a1 100644 --- a/ArmPkg/Library/DefaultExceptionHandlerLib/DefaultExceptionHandlerLib.inf +++ b/ArmPkg/Library/DefaultExceptionHandlerLib/DefaultExceptionHandlerLib.inf @@ -17,9 +17,9 @@ INF_VERSION = 0x00010005 BASE_NAME = DefaultExceptionHandlerLib FILE_GUID = EACDB354-DF1A-4AF9-A171-499737ED818F - MODULE_TYPE = UEFI_DRIVER + MODULE_TYPE = BASE VERSION_STRING = 1.0 - LIBRARY_CLASS = DefaultExceptionHandlerLib + LIBRARY_CLASS = DefaultExceptionHandlerLib|DXE_CORE DXE_DRIVER [Sources.common] DefaultExceptionHandlerUefi.c From patchwork Thu Dec 20 17:31:03 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ard Biesheuvel X-Patchwork-Id: 154351 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp6456764ljp; Thu, 20 Dec 2018 09:31:20 -0800 (PST) X-Google-Smtp-Source: AFSGD/XtqmNrmobH149uDG+xbPnihTWqhEV1s/QydNwsjrkqZriamrRH24q95BI45IUQZI6AH33C X-Received: by 2002:a63:2a4a:: with SMTP id q71mr23725010pgq.374.1545327080696; Thu, 20 Dec 2018 09:31:20 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1545327080; cv=none; d=google.com; s=arc-20160816; b=Fc6xFNV4lAbA04/tP8Mxb9QgMcKRRFR56GMWyFDPNY3pKKvf+IojP7BH2dJ6Zh0BqI cscsYq3kwkDgrfE2alRLlHET9V/iZH1VeKzeDX1K1H89l5VClU9n4fqS/K+mn89SuBZE 9DFlOR1yCsUcgqLbdciJhGFcM3FfnjZTiLpffBdJnLu5GPlrYd3VDp/FNV7N7UyidRTy O7XWuHPAYYYyQZTPxhZIkpTIzPfoCas80TWpyVKrp+EqDO5f2C2B9phXTT9cA+44vog0 0CSg3A5G0XPBZYjhwf+kuHxoyaNDucztq4sCjjqiFt6Eki/VNh8gUN0ExfXCzU3vy9Qx DxsA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:cc:list-subscribe :list-help:list-post:list-archive:list-unsubscribe:list-id :precedence:subject:mime-version:references:in-reply-to:message-id :date:to:from:dkim-signature:delivered-to; bh=3nKILYX0TOas/yAcvQ8Q0GE29JbWRV2JLXJxBfGxcnc=; b=DlkuKwEyRg53kitLrTesXjs/cl0CYRwqH+bCOeEbmeQ5tWrf6gll3XX2wbLMRe36tj lb+5yEaBX3GkTdv6Sjjimk1QnxYhhAfzEVRVoofy19udh8RONm2/nlD1aMBxHj8L4iTX OKfWOQhZxW0Chskz1x7PfYfTUoeGp2c87SGPfmsPDGULPeqhucSJt0QA+v27maR/DYGv a/SQaZUUXiQZHTKh6MlFrgaobK8ExB0i9Dq+OLf+lM2SrSXznGpleVVxAskEkVOiFfOL kj0Pr+ZvSBWwBOB+weeNx8HwJoe2acTbWQ0MG3tmyn+1ZlopHyacN8jJ+murrXoJBKjW hnlA== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=N6beZDPe; spf=pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 2001:19d0:306:5::1 as permitted sender) smtp.mailfrom=edk2-devel-bounces@lists.01.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from ml01.01.org (ml01.01.org. [2001:19d0:306:5::1]) by mx.google.com with ESMTPS id cf17si19136081plb.52.2018.12.20.09.31.20 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 20 Dec 2018 09:31:20 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 2001:19d0:306:5::1 as permitted sender) client-ip=2001:19d0:306:5::1; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=N6beZDPe; spf=pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 2001:19d0:306:5::1 as permitted sender) smtp.mailfrom=edk2-devel-bounces@lists.01.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id 63232211A458F; Thu, 20 Dec 2018 09:31:16 -0800 (PST) X-Original-To: edk2-devel@lists.01.org Delivered-To: edk2-devel@lists.01.org Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2a00:1450:4864:20::344; helo=mail-wm1-x344.google.com; envelope-from=ard.biesheuvel@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-wm1-x344.google.com (mail-wm1-x344.google.com [IPv6:2a00:1450:4864:20::344]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 67B7921BADAB9 for ; Thu, 20 Dec 2018 09:31:14 -0800 (PST) Received: by mail-wm1-x344.google.com with SMTP id f81so3090577wmd.4 for ; Thu, 20 Dec 2018 09:31:14 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=pm8gswzlUQTR/O3539Y+H/MbcDCFNio2Y9tnn/psWFM=; b=N6beZDPeIn9otF9ipY3qI3mcwyoDKNa10FZYVZlgCPC7h/uiatuUElioKOXKTZXkHG TTZv6SIJfbRevuub9xqTxG4hLf+esCOdP57MQUzolKILRm4uwJdXBobeIYfpm4zWayK5 aBbndMxetxf9oPsE8vHWZO9vHslmSUzOZVVkY= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=pm8gswzlUQTR/O3539Y+H/MbcDCFNio2Y9tnn/psWFM=; b=kU7G5CfYZQMPxTOSp9I4blw09XLj2bjF9xKEy6xcUu6PymtadeRrwfJd9WZ7lZNrzw vbdQ7F7KrN4p0F8rwy8kp1RIUT3+OXG6Lb4o4dz7ovI0zU+f5CP1DPjamFND+nSSbnG7 xu01WZQapzruRhmpAko6W9tdjBZE9Sd1CagjpJDlFvRzsuQ9ryopMfYeowyQvLSEpf/7 nn//oJhe+Van0KWLNuZpPwIrNU4/00zCj7K8ORHg+hl7cXv9vQas4Osfx9F5uOAmXu4c kP3K6q1tFflgbRfqGao04w36XN/6t/qqVd2nywUFl6Y6nN6oiQ/3jdlGsr46Tn8M+E21 quSg== X-Gm-Message-State: AA+aEWYL90oPtGzPkPwNM9npCEvT+ffJxwzsRWVFmVmGvthIT1pNOZ72 68XQRvdiQ9o0+GgQPVt52bnTrZ2McTwzSQ== X-Received: by 2002:a1c:544f:: with SMTP id p15mr12294668wmi.37.1545327072521; Thu, 20 Dec 2018 09:31:12 -0800 (PST) Received: from localhost.localdomain (aputeaux-683-1-2-211.w90-86.abo.wanadoo.fr. [90.86.101.211]) by smtp.gmail.com with ESMTPSA id x12sm6826131wrt.20.2018.12.20.09.31.11 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 20 Dec 2018 09:31:11 -0800 (PST) From: Ard Biesheuvel To: edk2-devel@lists.01.org Date: Thu, 20 Dec 2018 18:31:03 +0100 Message-Id: <20181220173104.11481-4-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.19.2 In-Reply-To: <20181220173104.11481-1-ard.biesheuvel@linaro.org> References: <20181220173104.11481-1-ard.biesheuvel@linaro.org> MIME-Version: 1.0 Subject: [edk2] [PATCH 3/4] ArmPkg/DefaultExceptionHandlerLib: drop BASE variant X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: lersek@redhat.com Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" Drop the redundant BASE variant, which is no longer used anywhere now that DebugAgentSymbolsBaseLib no longer incorporates a vector table and exception handling. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel --- ArmPkg/ArmPkg.dsc | 1 - ArmPkg/Library/DefaultExceptionHandlerLib/DefaultExceptionHandlerBase.c | 35 --------------- ArmPkg/Library/DefaultExceptionHandlerLib/DefaultExceptionHandlerLibBase.inf | 45 -------------------- ArmVirtPkg/ArmVirt.dsc.inc | 1 - 4 files changed, 82 deletions(-) -- 2.19.2 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel diff --git a/ArmPkg/ArmPkg.dsc b/ArmPkg/ArmPkg.dsc index 5d83c18b143e..d9f9935d70b6 100644 --- a/ArmPkg/ArmPkg.dsc +++ b/ArmPkg/ArmPkg.dsc @@ -141,7 +141,6 @@ ArmPkg/Library/ArmGicArchSecLib/ArmGicArchSecLib.inf ArmPkg/Library/ArmLib/ArmBaseLib.inf ArmPkg/Library/ArmSoftFloatLib/ArmSoftFloatLib.inf - ArmPkg/Library/DefaultExceptionHandlerLib/DefaultExceptionHandlerLibBase.inf ArmPkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointerLib.inf ArmPkg/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf diff --git a/ArmPkg/Library/DefaultExceptionHandlerLib/DefaultExceptionHandlerBase.c b/ArmPkg/Library/DefaultExceptionHandlerLib/DefaultExceptionHandlerBase.c deleted file mode 100644 index 4a54298b1189..000000000000 --- a/ArmPkg/Library/DefaultExceptionHandlerLib/DefaultExceptionHandlerBase.c +++ /dev/null @@ -1,35 +0,0 @@ -/** @file - - Copyright (c) 2012, ARM Ltd. All rights reserved.
- - This program and the accompanying materials - are licensed and made available under the terms and conditions of the BSD License - which accompanies this distribution. The full text of the license may be found at - http://opensource.org/licenses/bsd-license.php - - THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, - WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. - -**/ - -#include - -/** - - @param FaultAddress Address to find PE/COFF image for. - @param ImageBase Return load address of found image - @param PeCoffSizeOfHeaders Return the size of the PE/COFF header for the image that was found - - @retval NULL FaultAddress not in a loaded PE/COFF image. - @retval Path and file name of PE/COFF image. - -**/ -CHAR8 * -GetImageName ( - IN UINTN FaultAddress, - OUT UINTN *ImageBase, - OUT UINTN *PeCoffSizeOfHeaders - ) -{ - return NULL; -} diff --git a/ArmPkg/Library/DefaultExceptionHandlerLib/DefaultExceptionHandlerLibBase.inf b/ArmPkg/Library/DefaultExceptionHandlerLib/DefaultExceptionHandlerLibBase.inf deleted file mode 100644 index b53a5e89f507..000000000000 --- a/ArmPkg/Library/DefaultExceptionHandlerLib/DefaultExceptionHandlerLibBase.inf +++ /dev/null @@ -1,45 +0,0 @@ -#/** @file -# -# Copyright (c) 2012, ARM Ltd. All rights reserved.
-# -# This program and the accompanying materials -# are licensed and made available under the terms and conditions of the BSD License -# which accompanies this distribution. The full text of the license may be found at -# http://opensource.org/licenses/bsd-license.php -# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. -# -# -#**/ - -[Defines] - INF_VERSION = 0x00010005 - BASE_NAME = DefaultExceptionHandlerBaseLib - FILE_GUID = 3d5261d5-5eb7-4559-98e7-475aa9d0dc42 - MODULE_TYPE = BASE - VERSION_STRING = 1.0 - LIBRARY_CLASS = DefaultExceptionHandlerLib - -[Sources.common] - DefaultExceptionHandlerBase.c - -[Sources.ARM] - Arm/DefaultExceptionHandler.c - -[Sources.AARCH64] - AArch64/DefaultExceptionHandler.c - -[Packages] - MdePkg/MdePkg.dec - ArmPkg/ArmPkg.dec - -[LibraryClasses] - BaseLib - PrintLib - DebugLib - PeCoffGetEntryPointLib - ArmDisassemblerLib - SerialPortLib - -[Guids] - gEfiDebugImageInfoTableGuid diff --git a/ArmVirtPkg/ArmVirt.dsc.inc b/ArmVirtPkg/ArmVirt.dsc.inc index 89c2db074711..c47955be940c 100644 --- a/ArmVirtPkg/ArmVirt.dsc.inc +++ b/ArmVirtPkg/ArmVirt.dsc.inc @@ -174,7 +174,6 @@ BaseMemoryLib|MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf DebugAgentLib|ArmPkg/Library/DebugAgentSymbolsBaseLib/DebugAgentSymbolsBaseLib.inf - DefaultExceptionHandlerLib|ArmPkg/Library/DefaultExceptionHandlerLib/DefaultExceptionHandlerLibBase.inf SerialPortLib|ArmVirtPkg/Library/FdtPL011SerialPortLib/EarlyFdtPL011SerialPortLib.inf HobLib|MdePkg/Library/PeiHobLib/PeiHobLib.inf PeiServicesLib|MdePkg/Library/PeiServicesLib/PeiServicesLib.inf From patchwork Thu Dec 20 17:31:04 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ard Biesheuvel X-Patchwork-Id: 154352 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp6456824ljp; Thu, 20 Dec 2018 09:31:24 -0800 (PST) X-Google-Smtp-Source: AFSGD/WOX2T+H6UH7r77zaNxBZ9Fb6RUBh0PMRIFDNhBsWTBGHIkS3heJ+SGYt6r7EB6h6O4igJD X-Received: by 2002:a62:1e87:: with SMTP id e129mr24943059pfe.221.1545327084098; Thu, 20 Dec 2018 09:31:24 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1545327084; cv=none; d=google.com; s=arc-20160816; b=Yxh+h3HslHJKKbMQFL1LUzseh/lJJ4pJaPRoDbjXApVNnr4JEwepmGuDEgfjbsfF4m J/WRZyO995JM99AFinn6bUmUKiXDBkUWFXTyWyRK22PVoHp4l/OGXaej4p4vNIknJ3Qn s5DmDzdqM+0BsR75t1K9qNOvneM1KxNJH8qeW7AsV4k75g/41elZDnBTzl58pBJe0ewE ATrOsNgUu2VFXxSovm5gPQW/r8+uhdAC/6qXCDYPQhQYMA2bwwhmoRSIzp2/qOOvAmqq LpzzdqOqtq0oI0WqPAHEAqPETzf1igEQp9i2/gmwB+B+biNsx7nrLryLNLeg3AS6epHe vQkw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:cc:list-subscribe :list-help:list-post:list-archive:list-unsubscribe:list-id :precedence:subject:mime-version:references:in-reply-to:message-id :date:to:from:dkim-signature:delivered-to; bh=U2/L0pfjx9V72MGxM+zqLuIcPyVWMr57bX0XqY9YGQw=; b=GmgV1dAa5209YbxR304uwVua0E+0snRfXHDzNEuHxRZopoBEZrqH+zOaCzaZDDU+iO Yd7xzikg+rlcTj9avUrF90/vZ3zMFSKJlkndsBYYtm1c6GNosjtQMHt/LzJK17Cf18qD tdCo8iKgaZQ/wkhMsslN86DVlx4etbMGumiG1IUy7LUAC0udkNYldl7PB/83CUWEA3aB EIjXLMt/5uP+ejnpaQ+r0aietieJiUv2xaKn2XQ8e3RX1342GhWoRpBLkPfOnvAw3HJo XNszHBz8Q0jOU8fHTCrsNCzWbyTykhTvnlijFZ3aWW98ynprNfSj7ljw/vZXollTij+7 NCaQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=ZKdAa1JH; spf=pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 198.145.21.10 as permitted sender) smtp.mailfrom=edk2-devel-bounces@lists.01.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from ml01.01.org (ml01.01.org. [198.145.21.10]) by mx.google.com with ESMTPS id p4si16900972pga.514.2018.12.20.09.31.23 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 20 Dec 2018 09:31:24 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 198.145.21.10 as permitted sender) client-ip=198.145.21.10; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=ZKdAa1JH; spf=pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 198.145.21.10 as permitted sender) smtp.mailfrom=edk2-devel-bounces@lists.01.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id 9A2F1211A4592; Thu, 20 Dec 2018 09:31:17 -0800 (PST) X-Original-To: edk2-devel@lists.01.org Delivered-To: edk2-devel@lists.01.org Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2a00:1450:4864:20::343; helo=mail-wm1-x343.google.com; envelope-from=ard.biesheuvel@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-wm1-x343.google.com (mail-wm1-x343.google.com [IPv6:2a00:1450:4864:20::343]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id D8459211A458F for ; Thu, 20 Dec 2018 09:31:15 -0800 (PST) Received: by mail-wm1-x343.google.com with SMTP id y139so2859528wmc.5 for ; Thu, 20 Dec 2018 09:31:15 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=ZNleVR4l2uNP6RGv5dyG8m7SUyZ3p/kOKp2WRg8cqpk=; b=ZKdAa1JH7oJAFUet/eqcNsVzzV5i3UP8Sekz7kAjBAAlVovQwfAAtAgmIop/atitG3 rP3Mp1YEJnWtjBcyLCTTBIYNozMJOhphhOHLBMwleXS60ckm+gLrkmmv3ZNQx86Zm28t wQqdXsfidIjBwzLqgkzR9mhsxUksCBPC/F0m0= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=ZNleVR4l2uNP6RGv5dyG8m7SUyZ3p/kOKp2WRg8cqpk=; b=eYd7X5aeZOFKFwPvCyjQC0sdiYGeZ6mYerNSD0wEBu1zMr3WbWYHB3rPljcQhGHw63 06Ma6lCV2Mw62jWtwuHZJ1aIMCcCOXOkchQqzcOIjePH9c0L4bfWQmfj2ucbQ4D3cSOO JuxGu53tMHw9gmt1vuw6uKosAhkhHvPRnarl/EXbfSI/CM3UMJUUn5MrX7QabNDvPUA3 y65zKpWmGyxveW19V/a/fbRgLy+VSowP08Aeu2AD+5M/hV1wyOAmSFH+rMhhdmEBeQRv m50RoQjajYAbNMSjfsQUnuQj+8rDQZuH58HVvlw98o27OKt3I5GwLKcxiBeonkouvjFM pelA== X-Gm-Message-State: AA+aEWbMKm4FTVL9aszTjMb89QHULy03tyJF/24QiOKFxOh1VKmEKg4T 3Wv7VLzwHFKhCAcW5J+1vg8XJTVaARxKCA== X-Received: by 2002:a1c:35ca:: with SMTP id c193mr12203960wma.146.1545327074110; Thu, 20 Dec 2018 09:31:14 -0800 (PST) Received: from localhost.localdomain (aputeaux-683-1-2-211.w90-86.abo.wanadoo.fr. [90.86.101.211]) by smtp.gmail.com with ESMTPSA id x12sm6826131wrt.20.2018.12.20.09.31.12 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 20 Dec 2018 09:31:13 -0800 (PST) From: Ard Biesheuvel To: edk2-devel@lists.01.org Date: Thu, 20 Dec 2018 18:31:04 +0100 Message-Id: <20181220173104.11481-5-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.19.2 In-Reply-To: <20181220173104.11481-1-ard.biesheuvel@linaro.org> References: <20181220173104.11481-1-ard.biesheuvel@linaro.org> MIME-Version: 1.0 Subject: [edk2] [PATCH 4/4] ArmPkg/DefaultExceptionHandlerLib: use console if available X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: lersek@redhat.com Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" Print the minimal 'exception occurred' message to the console instead of straight to the serial port if the console is available. This makes such messages visible on systems where the console is graphical and the serial is not connected. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel --- ArmPkg/Library/DefaultExceptionHandlerLib/AArch64/DefaultExceptionHandler.c | 16 +++++++++++++--- ArmPkg/Library/DefaultExceptionHandlerLib/Arm/DefaultExceptionHandler.c | 7 ++++++- ArmPkg/Library/DefaultExceptionHandlerLib/DefaultExceptionHandlerLib.inf | 1 + 3 files changed, 20 insertions(+), 4 deletions(-) -- 2.19.2 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel diff --git a/ArmPkg/Library/DefaultExceptionHandlerLib/AArch64/DefaultExceptionHandler.c b/ArmPkg/Library/DefaultExceptionHandlerLib/AArch64/DefaultExceptionHandler.c index 1024bf48c63d..1aaf3c88f21e 100644 --- a/ArmPkg/Library/DefaultExceptionHandlerLib/AArch64/DefaultExceptionHandler.c +++ b/ArmPkg/Library/DefaultExceptionHandlerLib/AArch64/DefaultExceptionHandler.c @@ -22,6 +22,7 @@ #include #include #include +#include #include #include @@ -159,14 +160,23 @@ DefaultExceptionHandler ( INT32 Offset; if (mRecursiveException) { - CharCount = AsciiSPrint (Buffer, sizeof (Buffer),"\nRecursive exception occurred while dumping the CPU state\n"); - SerialPortWrite ((UINT8 *) Buffer, CharCount); + STATIC CHAR8 CONST Message[] = "\nRecursive exception occurred while dumping the CPU state\n"; + + if (gST->ConOut != NULL) { + AsciiPrint (Message); + } else { + SerialPortWrite ((UINT8 *)Message, AsciiStrLen (Message)); + } CpuDeadLoop (); } mRecursiveException = TRUE; CharCount = AsciiSPrint (Buffer,sizeof (Buffer),"\n\n%a Exception at 0x%016lx\n", gExceptionTypeString[ExceptionType], SystemContext.SystemContextAArch64->ELR); - SerialPortWrite ((UINT8 *) Buffer, CharCount); + if (gST->ConOut != NULL) { + AsciiPrint (Buffer); + } else { + SerialPortWrite ((UINT8 *)Buffer, CharCount); + } DEBUG_CODE_BEGIN (); CHAR8 *Pdb, *PrevPdb; diff --git a/ArmPkg/Library/DefaultExceptionHandlerLib/Arm/DefaultExceptionHandler.c b/ArmPkg/Library/DefaultExceptionHandlerLib/Arm/DefaultExceptionHandler.c index 0b9da031b47d..9159b579da6f 100644 --- a/ArmPkg/Library/DefaultExceptionHandlerLib/Arm/DefaultExceptionHandler.c +++ b/ArmPkg/Library/DefaultExceptionHandlerLib/Arm/DefaultExceptionHandler.c @@ -21,6 +21,7 @@ #include #include #include +#include #include @@ -194,7 +195,11 @@ DefaultExceptionHandler ( CharCount = AsciiSPrint (Buffer,sizeof (Buffer),"\n%a Exception PC at 0x%08x CPSR 0x%08x ", gExceptionTypeString[ExceptionType], SystemContext.SystemContextArm->PC, SystemContext.SystemContextArm->CPSR); - SerialPortWrite ((UINT8 *) Buffer, CharCount); + if (gST->ConOut != NULL) { + AsciiPrint (Buffer); + } else { + SerialPortWrite ((UINT8 *)Buffer, CharCount); + } DEBUG_CODE_BEGIN (); CHAR8 *Pdb; diff --git a/ArmPkg/Library/DefaultExceptionHandlerLib/DefaultExceptionHandlerLib.inf b/ArmPkg/Library/DefaultExceptionHandlerLib/DefaultExceptionHandlerLib.inf index 7609f82d89a1..6bc48714c9dc 100644 --- a/ArmPkg/Library/DefaultExceptionHandlerLib/DefaultExceptionHandlerLib.inf +++ b/ArmPkg/Library/DefaultExceptionHandlerLib/DefaultExceptionHandlerLib.inf @@ -42,6 +42,7 @@ PeCoffGetEntryPointLib ArmDisassemblerLib SerialPortLib + UefiBootServicesTableLib [Guids] gEfiDebugImageInfoTableGuid