From patchwork Sat Apr 30 07:59:11 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Biju Das X-Patchwork-Id: 568312 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 41C5FC4321E for ; Sat, 30 Apr 2022 07:59:31 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238650AbiD3ICu (ORCPT ); Sat, 30 Apr 2022 04:02:50 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46074 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229728AbiD3ICt (ORCPT ); Sat, 30 Apr 2022 04:02:49 -0400 Received: from relmlie5.idc.renesas.com (relmlor1.renesas.com [210.160.252.171]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 6B30391571; Sat, 30 Apr 2022 00:59:28 -0700 (PDT) X-IronPort-AV: E=Sophos;i="5.91,187,1647270000"; d="scan'208";a="118453218" Received: from unknown (HELO relmlir5.idc.renesas.com) ([10.200.68.151]) by relmlie5.idc.renesas.com with ESMTP; 30 Apr 2022 16:59:27 +0900 Received: from localhost.localdomain (unknown [10.226.92.1]) by relmlir5.idc.renesas.com (Postfix) with ESMTP id 159AA40065B7; Sat, 30 Apr 2022 16:59:22 +0900 (JST) From: Biju Das To: Thierry Reding , Lee Jones , Rob Herring , Krzysztof Kozlowski Cc: Biju Das , =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= , linux-pwm@vger.kernel.org, devicetree@vger.kernel.org, Geert Uytterhoeven , Chris Paterson , Biju Das , Prabhakar Mahadev Lad , linux-renesas-soc@vger.kernel.org Subject: [RFC 1/5] dt-bindings: pwm: Add RZ/G2L GPT binding Date: Sat, 30 Apr 2022 08:59:11 +0100 Message-Id: <20220430075915.5036-2-biju.das.jz@bp.renesas.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220430075915.5036-1-biju.das.jz@bp.renesas.com> References: <20220430075915.5036-1-biju.das.jz@bp.renesas.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add device tree bindings for the RZ/G2L General PWM Timer (GPT). Signed-off-by: Biju Das --- .../bindings/pwm/renesas,rzg2l-gpt.yaml | 104 ++++++++++++++++++ 1 file changed, 104 insertions(+) create mode 100644 Documentation/devicetree/bindings/pwm/renesas,rzg2l-gpt.yaml diff --git a/Documentation/devicetree/bindings/pwm/renesas,rzg2l-gpt.yaml b/Documentation/devicetree/bindings/pwm/renesas,rzg2l-gpt.yaml new file mode 100644 index 000000000000..0e44c0fbe04a --- /dev/null +++ b/Documentation/devicetree/bindings/pwm/renesas,rzg2l-gpt.yaml @@ -0,0 +1,104 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pwm/renesas,rzg2l-gpt.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Renesas RZ/G2L General PWM Timer (GPT) + +maintainers: + - Biju Das + +properties: + compatible: + items: + - enum: + - renesas,r9a07g044-gpt # RZ/G2{L,LC} + - renesas,r9a07g054-gpt # RZ/V2L + - const: renesas,rzg2l-gpt + + reg: + # base address and length of the registers block for the PWM. + maxItems: 1 + + '#pwm-cells': + # should be 2. See pwm.yaml in this directory for a description of + # the cells format. + const: 2 + + interrupts: + items: + - description: GTCCRA input capture/compare match + - description: GTCCRB input capture/compare + - description: GTCCRC compare match + - description: GTCCRD compare match + - description: GTCCRE compare match + - description: GTCCRF compare match + - description: GTADTRA compare match + - description: GTADTRB compare match + - description: GTCNT overflow/GTPR compare match + - description: GTCNT underflow + + interrupt-names: + items: + - const: ccmpa + - const: ccmpb + - const: cmpc + - const: cmpd + - const: cmpe + - const: cmpf + - const: adtrga + - const: adtrgb + - const: ovf + - const: unf + + clocks: + # clock phandle and specifier pair. + maxItems: 1 + + power-domains: + maxItems: 1 + + resets: + maxItems: 1 + +required: + - compatible + - reg + - interrupts + - interrupt-names + - clocks + - power-domains + - resets + +allOf: + - $ref: pwm.yaml# + +additionalProperties: false + +examples: + - | + #include + #include + + gpt4: pwm@10048400 { + compatible = "renesas,r9a07g044-gpt", "renesas,rzg2l-gpt"; + reg = <0x10048400 0xa4>; + interrupts = , + , + , + , + , + , + , + , + , + ; + interrupt-names = "ccmpa", "ccmpb", "cmpc", "cmpd", + "cmpe", "cmpf", "adtrga", "adtrgb", + "ovf", "unf"; + clocks = <&cpg CPG_MOD R9A07G044_GPT_PCLK>; + power-domains = <&cpg>; + resets = <&cpg 523 R9A07G044_GPT_RST_C>; + #pwm-cells = <2>; + }; From patchwork Sat Apr 30 07:59:14 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Biju Das X-Patchwork-Id: 568311 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 415F8C4332F for ; Sat, 30 Apr 2022 07:59:43 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S241453AbiD3IDB (ORCPT ); Sat, 30 Apr 2022 04:03:01 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46218 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S240657AbiD3IDA (ORCPT ); Sat, 30 Apr 2022 04:03:00 -0400 Received: from relmlie5.idc.renesas.com (relmlor1.renesas.com [210.160.252.171]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id B967092300; Sat, 30 Apr 2022 00:59:39 -0700 (PDT) X-IronPort-AV: E=Sophos;i="5.91,187,1647270000"; d="scan'208";a="118453236" Received: from unknown (HELO relmlir5.idc.renesas.com) ([10.200.68.151]) by relmlie5.idc.renesas.com with ESMTP; 30 Apr 2022 16:59:39 +0900 Received: from localhost.localdomain (unknown [10.226.92.1]) by relmlir5.idc.renesas.com (Postfix) with ESMTP id EB0DF40065B7; Sat, 30 Apr 2022 16:59:35 +0900 (JST) From: Biju Das To: Rob Herring , Krzysztof Kozlowski Cc: Biju Das , Geert Uytterhoeven , Magnus Damm , linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org, Chris Paterson , Biju Das , Prabhakar Mahadev Lad Subject: [RFC 4/5] arm64: dts: renesas: r9a07g054: Add GPT support Date: Sat, 30 Apr 2022 08:59:14 +0100 Message-Id: <20220430075915.5036-5-biju.das.jz@bp.renesas.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220430075915.5036-1-biju.das.jz@bp.renesas.com> References: <20220430075915.5036-1-biju.das.jz@bp.renesas.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add GPT support by adding pwm nodes to RZ/V2L SoC DTSI. Signed-off-by: Biju Das --- arch/arm64/boot/dts/renesas/r9a07g054.dtsi | 192 +++++++++++++++++++++ 1 file changed, 192 insertions(+) diff --git a/arch/arm64/boot/dts/renesas/r9a07g054.dtsi b/arch/arm64/boot/dts/renesas/r9a07g054.dtsi index 4313b9e3abed..4a1039572147 100644 --- a/arch/arm64/boot/dts/renesas/r9a07g054.dtsi +++ b/arch/arm64/boot/dts/renesas/r9a07g054.dtsi @@ -168,6 +168,198 @@ soc: soc { #size-cells = <2>; ranges; + gpt0: pwm@10048000 { + compatible = "renesas,r9a07g054-gpt", + "renesas,rzg2l-gpt"; + reg = <0 0x10048000 0 0xa4>; + #pwm-cells = <2>; + interrupts = , + , + , + , + , + , + , + , + , + ; + interrupt-names = "ccmpa", "ccmpb", "cmpc", "cmpd", + "cmpe", "cmpf", "adtrga", "adtrgb", + "ovf", "unf"; + clocks = <&cpg CPG_MOD R9A07G054_GPT_PCLK>; + resets = <&cpg R9A07G054_GPT_RST_C>; + power-domains = <&cpg>; + status = "disabled"; + }; + + gpt1: pwm@10048100 { + compatible = "renesas,r9a07g054-gpt", + "renesas,rzg2l-gpt"; + reg = <0 0x10048100 0 0xa4>; + #pwm-cells = <2>; + interrupts = , + , + , + , + , + , + , + , + , + ; + interrupt-names = "ccmpa", "ccmpb", "cmpc", "cmpd", + "cmpe", "cmpf", "adtrga", "adtrgb", + "ovf", "unf"; + clocks = <&cpg CPG_MOD R9A07G054_GPT_PCLK>; + resets = <&cpg R9A07G054_GPT_RST_C>; + power-domains = <&cpg>; + status = "disabled"; + }; + + gpt2: pwm@10048200 { + compatible = "renesas,r9a07g054-gpt", + "renesas,rzg2l-gpt"; + reg = <0 0x10048200 0 0xa4>; + #pwm-cells = <2>; + interrupts = , + , + , + , + , + , + , + , + , + ; + interrupt-names = "ccmpa", "ccmpb", "cmpc", "cmpd", + "cmpe", "cmpf", "adtrga", "adtrgb", + "ovf", "unf"; + clocks = <&cpg CPG_MOD R9A07G054_GPT_PCLK>; + resets = <&cpg R9A07G054_GPT_RST_C>; + power-domains = <&cpg>; + status = "disabled"; + }; + + gpt3: pwm@10048300 { + compatible = "renesas,r9a07g054-gpt", + "renesas,rzg2l-gpt"; + reg = <0 0x10048300 0 0xa4>; + #pwm-cells = <2>; + interrupts = , + , + , + , + , + , + , + , + , + ; + interrupt-names = "ccmpa", "ccmpb", "cmpc", "cmpd", + "cmpe", "cmpf", "adtrga", "adtrgb", + "ovf", "unf"; + clocks = <&cpg CPG_MOD R9A07G054_GPT_PCLK>; + resets = <&cpg R9A07G054_GPT_RST_C>; + power-domains = <&cpg>; + status = "disabled"; + }; + + gpt4: pwm@10048400 { + compatible = "renesas,r9a07g054-gpt", + "renesas,rzg2l-gpt"; + reg = <0 0x10048400 0 0xa4>; + #pwm-cells = <2>; + interrupts = , + , + , + , + , + , + , + , + , + ; + interrupt-names = "ccmpa", "ccmpb", "cmpc", "cmpd", + "cmpe", "cmpf", "adtrga", "adtrgb", + "ovf", "unf"; + clocks = <&cpg CPG_MOD R9A07G054_GPT_PCLK>; + resets = <&cpg R9A07G054_GPT_RST_C>; + power-domains = <&cpg>; + status = "disabled"; + }; + + gpt5: pwm@10048500 { + compatible = "renesas,r9a07g054-gpt", + "renesas,rzg2l-gpt"; + reg = <0 0x10048500 0 0xa4>; + #pwm-cells = <2>; + interrupts = , + , + , + , + , + , + , + , + , + ; + interrupt-names = "ccmpa", "ccmpb", "cmpc", "cmpd", + "cmpe", "cmpf", "adtrga", "adtrgb", + "ovf", "unf"; + clocks = <&cpg CPG_MOD R9A07G054_GPT_PCLK>; + resets = <&cpg R9A07G054_GPT_RST_C>; + power-domains = <&cpg>; + status = "disabled"; + }; + + gpt6: pwm@10048600 { + compatible = "renesas,r9a07g054-gpt", + "renesas,rzg2l-gpt"; + reg = <0 0x10048600 0 0xa4>; + #pwm-cells = <2>; + interrupts = , + , + , + , + , + , + , + , + , + ; + interrupt-names = "ccmpa", "ccmpb", "cmpc", "cmpd", + "cmpe", "cmpf", "adtrga", "adtrgb", + "ovf", "unf"; + clocks = <&cpg CPG_MOD R9A07G054_GPT_PCLK>; + resets = <&cpg R9A07G054_GPT_RST_C>; + power-domains = <&cpg>; + status = "disabled"; + }; + + gpt7: pwm@10048700 { + compatible = "renesas,r9a07g054-gpt", + "renesas,rzg2l-gpt"; + reg = <0 0x10048700 0 0xa4>; + #pwm-cells = <2>; + interrupts = , + , + , + , + , + , + , + , + , + ; + interrupt-names = "ccmpa", "ccmpb", "cmpc", "cmpd", + "cmpe", "cmpf", "adtrga", "adtrgb", + "ovf", "unf"; + clocks = <&cpg CPG_MOD R9A07G054_GPT_PCLK>; + resets = <&cpg R9A07G054_GPT_RST_C>; + power-domains = <&cpg>; + status = "disabled"; + }; + ssi0: ssi@10049c00 { compatible = "renesas,r9a07g054-ssi", "renesas,rz-ssi";