From patchwork Wed May 4 16:57:26 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Marek_Beh=C3=BAn?= X-Patchwork-Id: 569655 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A146FC433EF for ; Wed, 4 May 2022 17:14:54 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1356099AbiEDRSZ (ORCPT ); Wed, 4 May 2022 13:18:25 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56436 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1357178AbiEDROw (ORCPT ); Wed, 4 May 2022 13:14:52 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [139.178.84.217]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 00498541A5 for ; Wed, 4 May 2022 09:58:22 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 9EE5061940 for ; Wed, 4 May 2022 16:58:01 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id D5F2DC385B4; Wed, 4 May 2022 16:57:59 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1651683481; bh=FLs2a5xZY5CZ3hC370JczBIhfl5+QTXLD/1JRocAJ24=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=g1073US+qYBQYUZqqfsV4yKkBO4oZqKH50bspxlxJWmbCz+b0/aAQTG9NFEbVSzcF oGmmKGYBdHbRcb3l+Ge1/93eXVRVx45od0DrJ6FymW3h4PX7aWW9CW8bjZnWDx489R +gMlrvXaAnyt5RANNN0fo9XQ93fsDL0yeCf66vT+aGW0c+aBKM6o50lckl8ZMpjhdR nYEef9KCixFpDFmRm/WpEcyDrqTGwXZFdjgmteleC+7nqsPOl22vlrhsInhLsYZRxO mAeW+TRpNVRd+hrPQitu+Xd4PL8ucaUl4h+uf3DgbR0HZM5WZ/YqOOzZwxgttkimnn firmVg02OpbTA== From: =?utf-8?q?Marek_Beh=C3=BAn?= To: Greg Kroah-Hartman , Sasha Levin Cc: stable@vger.kernel.org, pali@kernel.org, =?utf-8?q?Marek_Beh=C3=BAn?= Subject: [PATCH 5.15 01/30] PCI: pci-bridge-emul: Add description for class_revision field Date: Wed, 4 May 2022 18:57:26 +0200 Message-Id: <20220504165755.30002-2-kabel@kernel.org> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220504165755.30002-1-kabel@kernel.org> References: <20220504165755.30002-1-kabel@kernel.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: stable@vger.kernel.org From: Pali Rohár commit 9319230ac147067652b58fe849ffe0ceec098665 upstream. The current assignment to the class_revision member class_revision |= cpu_to_le32(PCI_CLASS_BRIDGE_PCI << 16); can make the reader think that class is at high 16 bits of the member and revision at low 16 bits. In reality, class is at high 24 bits, but the class for PCI Bridge Normal Decode is PCI_CLASS_BRIDGE_PCI << 8. Change the assignment and add a comment to make this clearer. Link: https://lore.kernel.org/r/20211130172913.9727-2-kabel@kernel.org Signed-off-by: Pali Rohár Signed-off-by: Marek Behún Signed-off-by: Lorenzo Pieralisi Signed-off-by: Marek Behún --- drivers/pci/pci-bridge-emul.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/drivers/pci/pci-bridge-emul.c b/drivers/pci/pci-bridge-emul.c index 37504c2cce9b..0a4e71301537 100644 --- a/drivers/pci/pci-bridge-emul.c +++ b/drivers/pci/pci-bridge-emul.c @@ -284,7 +284,11 @@ int pci_bridge_emul_init(struct pci_bridge_emul *bridge, { BUILD_BUG_ON(sizeof(bridge->conf) != PCI_BRIDGE_CONF_END); - bridge->conf.class_revision |= cpu_to_le32(PCI_CLASS_BRIDGE_PCI << 16); + /* + * class_revision: Class is high 24 bits and revision is low 8 bit of this member, + * while class for PCI Bridge Normal Decode has the 24-bit value: PCI_CLASS_BRIDGE_PCI << 8 + */ + bridge->conf.class_revision |= cpu_to_le32((PCI_CLASS_BRIDGE_PCI << 8) << 8); bridge->conf.header_type = PCI_HEADER_TYPE_BRIDGE; bridge->conf.cache_line_size = 0x10; bridge->conf.status = cpu_to_le16(PCI_STATUS_CAP_LIST); From patchwork Wed May 4 16:57:27 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Marek_Beh=C3=BAn?= X-Patchwork-Id: 569662 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id CBEDEC433F5 for ; Wed, 4 May 2022 17:14:23 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1352523AbiEDRRy (ORCPT ); Wed, 4 May 2022 13:17:54 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39302 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1356484AbiEDRNr (ORCPT ); Wed, 4 May 2022 13:13:47 -0400 Received: from ams.source.kernel.org (ams.source.kernel.org [145.40.68.75]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5B14553A4C for ; Wed, 4 May 2022 09:58:04 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id D584FB8278E for ; Wed, 4 May 2022 16:58:03 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 776BFC385B2; Wed, 4 May 2022 16:58:01 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1651683482; bh=QMlm+XKrgNssklGI1kRhG/3Xj9lrO8dQUWeFrK4o3jI=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=n1X9jLeSPBGKSRm+Zn3r1tB4v/6hT48Qfo8RZ0jRp8c8FxRb3St6hm8EsgpcDcj20 cW/fF5PsNASopi2NkIszN6mLcwdRanC4EzRbrfHHZSXVXhBlhutHpZ4/hQg4saWH1C tIl7tU1hYl8MnW2HzJ1ClTwmg0ooa9ayD09AC4WRKtmMazXd9dv7Hou5qqH9uPlg8e yNLIKnahImKFBJjEmXAUkbwcnsNxVmiEOUvFC3UNsx2e8l5JXwZnldnnDDvsJbb2ox cIIyuO1/3Dj4QYslDUrU8S01UGV0YqrCFQI/kEBlNDSj1etFraAyKfO5UAx2YQi1Sf gz71j5zr8+mhg== From: =?utf-8?q?Marek_Beh=C3=BAn?= To: Greg Kroah-Hartman , Sasha Levin Cc: stable@vger.kernel.org, pali@kernel.org, =?utf-8?q?Marek_Beh=C3=BAn?= Subject: [PATCH 5.15 02/30] PCI: pci-bridge-emul: Add definitions for missing capabilities registers Date: Wed, 4 May 2022 18:57:27 +0200 Message-Id: <20220504165755.30002-3-kabel@kernel.org> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220504165755.30002-1-kabel@kernel.org> References: <20220504165755.30002-1-kabel@kernel.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: stable@vger.kernel.org From: Pali Rohár commit 8ea673a8b30b4a32516b8adabb15e2a68ff02ec8 upstream. pci-bridge-emul driver already allocates buffer for capabilities up to the PCI_EXP_SLTSTA2 register, but does not define bit access behavior for these registers. Add these missing definitions. Link: https://lore.kernel.org/r/20211130172913.9727-3-kabel@kernel.org Signed-off-by: Pali Rohár Signed-off-by: Marek Behún Signed-off-by: Lorenzo Pieralisi Signed-off-by: Marek Behún --- drivers/pci/pci-bridge-emul.c | 43 +++++++++++++++++++++++++++++++++++ 1 file changed, 43 insertions(+) diff --git a/drivers/pci/pci-bridge-emul.c b/drivers/pci/pci-bridge-emul.c index 0a4e71301537..c994ebec2360 100644 --- a/drivers/pci/pci-bridge-emul.c +++ b/drivers/pci/pci-bridge-emul.c @@ -270,6 +270,49 @@ struct pci_bridge_reg_behavior pcie_cap_regs_behavior[PCI_CAP_PCIE_SIZEOF / 4] = .ro = GENMASK(15, 0) | PCI_EXP_RTSTA_PENDING, .w1c = PCI_EXP_RTSTA_PME, }, + + [PCI_EXP_DEVCAP2 / 4] = { + /* + * Device capabilities 2 register has reserved bits [30:27]. + * Also bits [26:24] are reserved for non-upstream ports. + */ + .ro = BIT(31) | GENMASK(23, 0), + }, + + [PCI_EXP_DEVCTL2 / 4] = { + /* + * Device control 2 register is RW. Bit 11 is reserved for + * non-upstream ports. + * + * Device status 2 register is reserved. + */ + .rw = GENMASK(15, 12) | GENMASK(10, 0), + }, + + [PCI_EXP_LNKCAP2 / 4] = { + /* Link capabilities 2 register has reserved bits [30:25] and 0. */ + .ro = BIT(31) | GENMASK(24, 1), + }, + + [PCI_EXP_LNKCTL2 / 4] = { + /* + * Link control 2 register is RW. + * + * Link status 2 register has bits 5, 15 W1C; + * bits 10, 11 reserved and others are RO. + */ + .rw = GENMASK(15, 0), + .w1c = (BIT(15) | BIT(5)) << 16, + .ro = (GENMASK(14, 12) | GENMASK(9, 6) | GENMASK(4, 0)) << 16, + }, + + [PCI_EXP_SLTCAP2 / 4] = { + /* Slot capabilities 2 register is reserved. */ + }, + + [PCI_EXP_SLTCTL2 / 4] = { + /* Both Slot control 2 and Slot status 2 registers are reserved. */ + }, }; /* From patchwork Wed May 4 16:57:29 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Marek_Beh=C3=BAn?= X-Patchwork-Id: 569598 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 93A80C433FE for ; Wed, 4 May 2022 17:18:47 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1356935AbiEDRWU (ORCPT ); Wed, 4 May 2022 13:22:20 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55866 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1357336AbiEDRO7 (ORCPT ); Wed, 4 May 2022 13:14:59 -0400 Received: from ams.source.kernel.org (ams.source.kernel.org [145.40.68.75]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id ADABA5419F for ; Wed, 4 May 2022 09:58:28 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id 1F218B82795 for ; Wed, 4 May 2022 16:58:07 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id AF8AFC385B2; Wed, 4 May 2022 16:58:04 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1651683485; bh=/Y0Wli2UZ5yUmmJ48rkTaiby66vgqeO7DD9aHNTrS7w=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=QDHXhHvjtkNZKags5V56vGAT7EzUZkyATPXDsOvzSGoypgCZ83nyRyeGCa9ujG1n2 XS2GX+cjAmYgSZXqyvnkmpI+5iIIToksSLpimeasybchAb56eJQ93PD+8nNO7ydxm2 xMkH9ZSoRuIZiaFyQMgk9GZllawhMI3wK+krRXxscLW3ed4yIZR0Zv9XZj3p+Jo2a7 O7RE3/l0+avm0ova50deuD27hvdWW7E31HGS4GCHvGI39GdfaUVXv38eDfogG8EKK0 WRXN8h7oAtoRAL8KfW75rmmxz/AYEPWasz4jnzMR436jbjSiDWSL1LEHT6SEK68AsD aeSlB7VZJt5Pg== From: =?utf-8?q?Marek_Beh=C3=BAn?= To: Greg Kroah-Hartman , Sasha Levin Cc: stable@vger.kernel.org, pali@kernel.org, =?utf-8?q?Marek_Beh=C3=BAn?= Subject: [PATCH 5.15 04/30] PCI: aardvark: Clear all MSIs at setup Date: Wed, 4 May 2022 18:57:29 +0200 Message-Id: <20220504165755.30002-5-kabel@kernel.org> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220504165755.30002-1-kabel@kernel.org> References: <20220504165755.30002-1-kabel@kernel.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: stable@vger.kernel.org From: Pali Rohár commit 7d8dc1f7cd007a7ce94c5b4c20d63a8b8d6d7751 upstream. We already clear all the other interrupts (ISR0, ISR1, HOST_CTRL_INT). Define a new macro PCIE_MSI_ALL_MASK and do the same clearing for MSIs, to ensure that we don't start receiving spurious interrupts. Use this new mask in advk_pcie_handle_msi(); Link: https://lore.kernel.org/r/20211130172913.9727-5-kabel@kernel.org Signed-off-by: Pali Rohár Signed-off-by: Marek Behún Signed-off-by: Lorenzo Pieralisi Signed-off-by: Marek Behún --- drivers/pci/controller/pci-aardvark.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/drivers/pci/controller/pci-aardvark.c b/drivers/pci/controller/pci-aardvark.c index 708734afc254..0d02ae8bb4a6 100644 --- a/drivers/pci/controller/pci-aardvark.c +++ b/drivers/pci/controller/pci-aardvark.c @@ -115,6 +115,7 @@ #define PCIE_MSI_ADDR_HIGH_REG (CONTROL_BASE_ADDR + 0x54) #define PCIE_MSI_STATUS_REG (CONTROL_BASE_ADDR + 0x58) #define PCIE_MSI_MASK_REG (CONTROL_BASE_ADDR + 0x5C) +#define PCIE_MSI_ALL_MASK GENMASK(31, 0) #define PCIE_MSI_PAYLOAD_REG (CONTROL_BASE_ADDR + 0x9C) #define PCIE_MSI_DATA_MASK GENMASK(15, 0) @@ -570,6 +571,7 @@ static void advk_pcie_setup_hw(struct advk_pcie *pcie) advk_writel(pcie, reg, PCIE_CORE_CTRL2_REG); /* Clear all interrupts */ + advk_writel(pcie, PCIE_MSI_ALL_MASK, PCIE_MSI_STATUS_REG); advk_writel(pcie, PCIE_ISR0_ALL_MASK, PCIE_ISR0_REG); advk_writel(pcie, PCIE_ISR1_ALL_MASK, PCIE_ISR1_REG); advk_writel(pcie, PCIE_IRQ_ALL_MASK, HOST_CTRL_INT_STATUS_REG); @@ -582,7 +584,7 @@ static void advk_pcie_setup_hw(struct advk_pcie *pcie) advk_writel(pcie, PCIE_ISR1_ALL_MASK, PCIE_ISR1_MASK_REG); /* Unmask all MSIs */ - advk_writel(pcie, 0, PCIE_MSI_MASK_REG); + advk_writel(pcie, ~(u32)PCIE_MSI_ALL_MASK, PCIE_MSI_MASK_REG); /* Enable summary interrupt for GIC SPI source */ reg = PCIE_IRQ_ALL_MASK & (~PCIE_IRQ_ENABLE_INTS_MASK); @@ -1389,7 +1391,7 @@ static void advk_pcie_handle_msi(struct advk_pcie *pcie) msi_mask = advk_readl(pcie, PCIE_MSI_MASK_REG); msi_val = advk_readl(pcie, PCIE_MSI_STATUS_REG); - msi_status = msi_val & ~msi_mask; + msi_status = msi_val & ((~msi_mask) & PCIE_MSI_ALL_MASK); for (msi_idx = 0; msi_idx < MSI_IRQ_NUM; msi_idx++) { if (!(BIT(msi_idx) & msi_status)) From patchwork Wed May 4 16:57:34 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Marek_Beh=C3=BAn?= X-Patchwork-Id: 569592 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D20EEC433EF for ; Wed, 4 May 2022 17:19:00 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1356525AbiEDRWe (ORCPT ); Wed, 4 May 2022 13:22:34 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40998 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1356737AbiEDROF (ORCPT ); Wed, 4 May 2022 13:14:05 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [139.178.84.217]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1641553B77 for ; Wed, 4 May 2022 09:58:14 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 87D126179D for ; Wed, 4 May 2022 16:58:14 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id C0632C385B3; Wed, 4 May 2022 16:58:12 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1651683494; bh=Pqm5eITw/y3Bb8/eENOq5EtcKZAsIAOIpyQTM5omGpo=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=qgVDy60rB9W/4ksGCQsehAv8FillnpS455CSPrEf9YmROPbE7BjSGa+8fmbYpzNvt rIBdtK/88VFq++n9ZUQ00dkBwXoYeo/hBhqhcMscNvV5/2aaEpjlqFrXaIWzwlIJfz 8MlULbPqH0AORbJhZzJ26x2ThGbtqCUPe2svwBdGfKRe5YG/gjGv3kqU1Qnpni8BtB BRZP8GRlXOf0HpJnLpgLsBnJGQMC/FmDRpbD01nkuMk7ofe+51NxXCZYCKp/zK2tJZ Gkp14zPuJrAjjewe12q1FH1f+KtaEa3J+7L+EwQqx+0UKD7Jl7ES41ljE1N01ctOWk 007oI7nHW3O+A== From: =?utf-8?q?Marek_Beh=C3=BAn?= To: Greg Kroah-Hartman , Sasha Levin Cc: stable@vger.kernel.org, pali@kernel.org, =?utf-8?q?Marek_Beh=C3=BAn?= Subject: [PATCH 5.15 09/30] PCI: aardvark: Assert PERST# when unbinding driver Date: Wed, 4 May 2022 18:57:34 +0200 Message-Id: <20220504165755.30002-10-kabel@kernel.org> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220504165755.30002-1-kabel@kernel.org> References: <20220504165755.30002-1-kabel@kernel.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: stable@vger.kernel.org From: Pali Rohár commit 1f54391be8ce0c981d312cb93acdc5608def576a upstream. Put the PCIe card into reset by asserting PERST# signal when unbinding driver. It doesn't make sense to leave the card working if it can't communicate with the host. This should also save some power. Link: https://lore.kernel.org/r/20211130172913.9727-10-kabel@kernel.org Signed-off-by: Pali Rohár Signed-off-by: Marek Behún Signed-off-by: Lorenzo Pieralisi Signed-off-by: Marek Behún --- drivers/pci/controller/pci-aardvark.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/pci/controller/pci-aardvark.c b/drivers/pci/controller/pci-aardvark.c index 02eefc13ac60..78bc57d57926 100644 --- a/drivers/pci/controller/pci-aardvark.c +++ b/drivers/pci/controller/pci-aardvark.c @@ -1721,6 +1721,10 @@ static int advk_pcie_remove(struct platform_device *pdev) /* Free config space for emulated root bridge */ pci_bridge_emul_cleanup(&pcie->bridge); + /* Assert PERST# signal which prepares PCIe card for power down */ + if (pcie->reset_gpio) + gpiod_set_value_cansleep(pcie->reset_gpio, 1); + /* Disable outbound address windows mapping */ for (i = 0; i < OB_WIN_COUNT; i++) advk_pcie_disable_ob_win(pcie, i); From patchwork Wed May 4 16:57:36 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Marek_Beh=C3=BAn?= X-Patchwork-Id: 569605 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9AA0FC433FE for ; Wed, 4 May 2022 17:18:17 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1356660AbiEDRVu (ORCPT ); Wed, 4 May 2022 13:21:50 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58654 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1357562AbiEDRPG (ORCPT ); Wed, 4 May 2022 13:15:06 -0400 Received: from ams.source.kernel.org (ams.source.kernel.org [145.40.68.75]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A2C065520A for ; Wed, 4 May 2022 09:58:43 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id 720BCB827A6 for ; Wed, 4 May 2022 16:58:18 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 03E4BC385B1; Wed, 4 May 2022 16:58:15 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1651683497; bh=gsEZEd7giI+LOqW8G4A/YdRs0EkIF3FQhEY2WEZh+KM=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=jenRXMichO5huic1PJfD6w0K9Wgwu3QWyDCXCHbjkZa/VEUeesWoeXcf+076RMBI6 gKGPkfQl0tQpyD54BfsK8UTatQQuLh0cGaj2RnRW2peCEqYu+rVe6mlI5gyKWp6Ca9 65q20wK5HEF+oW3AG2+4TBzm+khblREbQaRlqsPnt5lcnl6IOfYHtmcju90oKGjOCg 2SxPVhcQNIQvJD50lyop9Kci0+47BYt3YKhuY4LrkcEg4LYFdXBcCXn9cy4JGiAFef i8j7gTpZypwIcTPdHAe0Iovgk+BWJBY9ns6dRNUmD6V6eDVQYKHTjOKSS5H+YZVmAS R+T87143pPKaw== From: =?utf-8?q?Marek_Beh=C3=BAn?= To: Greg Kroah-Hartman , Sasha Levin Cc: stable@vger.kernel.org, pali@kernel.org, =?utf-8?q?Marek_Beh=C3=BAn?= Subject: [PATCH 5.15 11/30] PCI: aardvark: Disable common PHY when unbinding driver Date: Wed, 4 May 2022 18:57:36 +0200 Message-Id: <20220504165755.30002-12-kabel@kernel.org> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220504165755.30002-1-kabel@kernel.org> References: <20220504165755.30002-1-kabel@kernel.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: stable@vger.kernel.org From: Pali Rohár commit fdbbe242c15a8f2cd0e3ad8a56cd0a447b771d0d upstream. Disable the PCIe PHY when unbinding driver. This should save some power. Link: https://lore.kernel.org/r/20211130172913.9727-12-kabel@kernel.org Signed-off-by: Pali Rohár Signed-off-by: Marek Behún Signed-off-by: Lorenzo Pieralisi Signed-off-by: Marek Behún --- drivers/pci/controller/pci-aardvark.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/pci/controller/pci-aardvark.c b/drivers/pci/controller/pci-aardvark.c index 3f6919564434..ae0219ae730a 100644 --- a/drivers/pci/controller/pci-aardvark.c +++ b/drivers/pci/controller/pci-aardvark.c @@ -1734,6 +1734,9 @@ static int advk_pcie_remove(struct platform_device *pdev) for (i = 0; i < OB_WIN_COUNT; i++) advk_pcie_disable_ob_win(pcie, i); + /* Disable phy */ + advk_pcie_disable_phy(pcie); + return 0; } From patchwork Wed May 4 16:57:37 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Marek_Beh=C3=BAn?= X-Patchwork-Id: 569595 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id AFB63C433FE for ; Wed, 4 May 2022 17:18:55 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234512AbiEDRW2 (ORCPT ); Wed, 4 May 2022 13:22:28 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55528 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1357058AbiEDROq (ORCPT ); Wed, 4 May 2022 13:14:46 -0400 Received: from ams.source.kernel.org (ams.source.kernel.org [145.40.68.75]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B207753E33 for ; Wed, 4 May 2022 09:58:19 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id 20246B827A9 for ; Wed, 4 May 2022 16:58:19 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 9A269C385A4; Wed, 4 May 2022 16:58:17 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1651683498; bh=jvetpaMO9Ho4Ae+NYXB0JK9vsbZBB/QjRNqwFM3B7d4=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=sNvK9+o82lkic8+gdaeSNJh5hgBwSzxJnFHbtAUq9bi3g+Bio98nrUBwflIu4oq3d +VoO33fyHOWcphdDtsvx8DYLK1f3s9B2HHjI7/OAvceF1OV3d2WMj+thFdL/qTS+uW 3q97M5K9rnq7I5lRfHwYTuJiFyTV1Ck8izyynCISzRvmjS3KD/19Ds/BrQlhUXpPnC p+R0gKqPreIoS+KAKwbNa3n23+NSN224kr9913KLnRDB9yIiq1euThvGrjneXfMBLl 9+FkltKLN2P4Gtab/T3R09yePRkeCLy6T4H6SmSgScQazslErsb6d8Pj6QURPd/9Dv eFAi3kAGS8TVw== From: =?utf-8?q?Marek_Beh=C3=BAn?= To: Greg Kroah-Hartman , Sasha Levin Cc: stable@vger.kernel.org, pali@kernel.org, =?utf-8?q?Marek_Beh=C3=BAn?= Subject: [PATCH 5.15 12/30] PCI: aardvark: Replace custom PCIE_CORE_INT_* macros with PCI_INTERRUPT_* Date: Wed, 4 May 2022 18:57:37 +0200 Message-Id: <20220504165755.30002-13-kabel@kernel.org> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220504165755.30002-1-kabel@kernel.org> References: <20220504165755.30002-1-kabel@kernel.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: stable@vger.kernel.org From: Pali Rohár commit 1d86abf1f89672a70f2ab65f6000299feb1f1781 upstream. Header file linux/pci.h defines enum pci_interrupt_pin with corresponding PCI_INTERRUPT_* values. Link: https://lore.kernel.org/r/20220110015018.26359-2-kabel@kernel.org Signed-off-by: Pali Rohár Signed-off-by: Marek Behún Signed-off-by: Lorenzo Pieralisi Reviewed-by: Bjorn Helgaas Signed-off-by: Marek Behún --- drivers/pci/controller/pci-aardvark.c | 6 +----- 1 file changed, 1 insertion(+), 5 deletions(-) diff --git a/drivers/pci/controller/pci-aardvark.c b/drivers/pci/controller/pci-aardvark.c index ae0219ae730a..6076bb7b3ed3 100644 --- a/drivers/pci/controller/pci-aardvark.c +++ b/drivers/pci/controller/pci-aardvark.c @@ -38,10 +38,6 @@ #define PCIE_CORE_ERR_CAPCTL_ECRC_CHK_TX_EN BIT(6) #define PCIE_CORE_ERR_CAPCTL_ECRC_CHCK BIT(7) #define PCIE_CORE_ERR_CAPCTL_ECRC_CHCK_RCV BIT(8) -#define PCIE_CORE_INT_A_ASSERT_ENABLE 1 -#define PCIE_CORE_INT_B_ASSERT_ENABLE 2 -#define PCIE_CORE_INT_C_ASSERT_ENABLE 3 -#define PCIE_CORE_INT_D_ASSERT_ENABLE 4 /* PIO registers base address and register offsets */ #define PIO_BASE_ADDR 0x4000 #define PIO_CTRL (PIO_BASE_ADDR + 0x0) @@ -961,7 +957,7 @@ static int advk_sw_pci_bridge_init(struct advk_pcie *pcie) bridge->conf.pref_mem_limit = cpu_to_le16(PCI_PREF_RANGE_TYPE_64); /* Support interrupt A for MSI feature */ - bridge->conf.intpin = PCIE_CORE_INT_A_ASSERT_ENABLE; + bridge->conf.intpin = PCI_INTERRUPT_INTA; /* Aardvark HW provides PCIe Capability structure in version 2 */ bridge->pcie_conf.cap = cpu_to_le16(2); From patchwork Wed May 4 16:57:38 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Marek_Beh=C3=BAn?= X-Patchwork-Id: 569651 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id BC51AC433FE for ; Wed, 4 May 2022 17:15:12 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1356690AbiEDRSm (ORCPT ); Wed, 4 May 2022 13:18:42 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55272 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1357398AbiEDRPB (ORCPT ); Wed, 4 May 2022 13:15:01 -0400 Received: from ams.source.kernel.org (ams.source.kernel.org [IPv6:2604:1380:4601:e00::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E8D9354BDB for ; Wed, 4 May 2022 09:58:31 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id B4AC5B827AF for ; Wed, 4 May 2022 16:58:21 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 3C312C385AF; Wed, 4 May 2022 16:58:19 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1651683500; bh=vHtBCoedpWskrFoSPmt6dutIoQdu6fWNkJtzMtLWxkg=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=d9ZI3AYmvP/yozj93VH7Z4NA9xIPQsv5HQOOrkGx5K9NKit4W/GCeUiShj8MaXWEE 7E9LAI1jk0RXqNsXcG3035t0nBrTjL2qFHFq1ymHpD/xltVnycUZhEf12GR5vB/6YV gZ4wvMX7nDOLcU4N6eQ6h/u9XTWy9yNOe3zWqZDWRyQgk1wLrG93ugYcZ8KQ1bgfyy agHNnvA7QL+3SzJUcIn/0hRjbkUjU/OQPx2lkjAOBh7RuwRX4uW8iAmAnC8y+z2XxO xrN+oP179/wOMBEbORf/DxyucaGDlQwQNsLWfkEdqfi/V4kViD7SH52p5CwG/c8uJ9 K7T/c322JzNMA== From: =?utf-8?q?Marek_Beh=C3=BAn?= To: Greg Kroah-Hartman , Sasha Levin Cc: stable@vger.kernel.org, pali@kernel.org, =?utf-8?q?Marek_Beh=C3=BAn?= Subject: [PATCH 5.15 13/30] PCI: aardvark: Rewrite IRQ code to chained IRQ handler Date: Wed, 4 May 2022 18:57:38 +0200 Message-Id: <20220504165755.30002-14-kabel@kernel.org> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220504165755.30002-1-kabel@kernel.org> References: <20220504165755.30002-1-kabel@kernel.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: stable@vger.kernel.org From: Pali Rohár commit 1571d67dc190e50c6c56e8f88cdc39f7cc53166e upstream. Rewrite the code to use irq_set_chained_handler_and_data() handler with chained_irq_enter() and chained_irq_exit() processing instead of using devm_request_irq(). advk_pcie_irq_handler() reads IRQ status bits and calls other functions based on which bits are set. These functions then read its own IRQ status bits and calls other aardvark functions based on these bits. Finally generic_handle_domain_irq() with translated linux IRQ numbers are called. Link: https://lore.kernel.org/r/20220110015018.26359-5-kabel@kernel.org Signed-off-by: Pali Rohár Signed-off-by: Marek Behún Signed-off-by: Lorenzo Pieralisi Signed-off-by: Marek Behún --- drivers/pci/controller/pci-aardvark.c | 48 +++++++++++++++------------ 1 file changed, 26 insertions(+), 22 deletions(-) diff --git a/drivers/pci/controller/pci-aardvark.c b/drivers/pci/controller/pci-aardvark.c index 6076bb7b3ed3..5d6ed7a3816f 100644 --- a/drivers/pci/controller/pci-aardvark.c +++ b/drivers/pci/controller/pci-aardvark.c @@ -268,6 +268,7 @@ struct advk_pcie { u32 actions; } wins[OB_WIN_COUNT]; u8 wins_count; + int irq; struct irq_domain *irq_domain; struct irq_chip irq_chip; raw_spinlock_t irq_lock; @@ -1432,21 +1433,26 @@ static void advk_pcie_handle_int(struct advk_pcie *pcie) } } -static irqreturn_t advk_pcie_irq_handler(int irq, void *arg) +static void advk_pcie_irq_handler(struct irq_desc *desc) { - struct advk_pcie *pcie = arg; - u32 status; + struct advk_pcie *pcie = irq_desc_get_handler_data(desc); + struct irq_chip *chip = irq_desc_get_chip(desc); + u32 val, mask, status; - status = advk_readl(pcie, HOST_CTRL_INT_STATUS_REG); - if (!(status & PCIE_IRQ_CORE_INT)) - return IRQ_NONE; + chained_irq_enter(chip, desc); - advk_pcie_handle_int(pcie); + val = advk_readl(pcie, HOST_CTRL_INT_STATUS_REG); + mask = advk_readl(pcie, HOST_CTRL_INT_MASK_REG); + status = val & ((~mask) & PCIE_IRQ_ALL_MASK); - /* Clear interrupt */ - advk_writel(pcie, PCIE_IRQ_CORE_INT, HOST_CTRL_INT_STATUS_REG); + if (status & PCIE_IRQ_CORE_INT) { + advk_pcie_handle_int(pcie); - return IRQ_HANDLED; + /* Clear interrupt */ + advk_writel(pcie, PCIE_IRQ_CORE_INT, HOST_CTRL_INT_STATUS_REG); + } + + chained_irq_exit(chip, desc); } static void __maybe_unused advk_pcie_disable_phy(struct advk_pcie *pcie) @@ -1513,7 +1519,7 @@ static int advk_pcie_probe(struct platform_device *pdev) struct advk_pcie *pcie; struct pci_host_bridge *bridge; struct resource_entry *entry; - int ret, irq; + int ret; bridge = devm_pci_alloc_host_bridge(dev, sizeof(struct advk_pcie)); if (!bridge) @@ -1599,17 +1605,9 @@ static int advk_pcie_probe(struct platform_device *pdev) if (IS_ERR(pcie->base)) return PTR_ERR(pcie->base); - irq = platform_get_irq(pdev, 0); - if (irq < 0) - return irq; - - ret = devm_request_irq(dev, irq, advk_pcie_irq_handler, - IRQF_SHARED | IRQF_NO_THREAD, "advk-pcie", - pcie); - if (ret) { - dev_err(dev, "Failed to register interrupt\n"); - return ret; - } + pcie->irq = platform_get_irq(pdev, 0); + if (pcie->irq < 0) + return pcie->irq; pcie->reset_gpio = devm_gpiod_get_from_of_node(dev, dev->of_node, "reset-gpios", 0, @@ -1658,11 +1656,14 @@ static int advk_pcie_probe(struct platform_device *pdev) return ret; } + irq_set_chained_handler_and_data(pcie->irq, advk_pcie_irq_handler, pcie); + bridge->sysdata = pcie; bridge->ops = &advk_pcie_ops; ret = pci_host_probe(bridge); if (ret < 0) { + irq_set_chained_handler_and_data(pcie->irq, NULL, NULL); advk_pcie_remove_msi_irq_domain(pcie); advk_pcie_remove_irq_domain(pcie); return ret; @@ -1710,6 +1711,9 @@ static int advk_pcie_remove(struct platform_device *pdev) advk_writel(pcie, PCIE_ISR1_ALL_MASK, PCIE_ISR1_REG); advk_writel(pcie, PCIE_IRQ_ALL_MASK, HOST_CTRL_INT_STATUS_REG); + /* Remove IRQ handler */ + irq_set_chained_handler_and_data(pcie->irq, NULL, NULL); + /* Remove IRQ domains */ advk_pcie_remove_msi_irq_domain(pcie); advk_pcie_remove_irq_domain(pcie); From patchwork Wed May 4 16:57:40 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Marek_Beh=C3=BAn?= X-Patchwork-Id: 569648 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 01094C4332F for ; Wed, 4 May 2022 17:17:09 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1356715AbiEDRSy (ORCPT ); Wed, 4 May 2022 13:18:54 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55472 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1357412AbiEDRPB (ORCPT ); Wed, 4 May 2022 13:15:01 -0400 Received: from ams.source.kernel.org (ams.source.kernel.org [IPv6:2604:1380:4601:e00::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B4FB454BDF for ; Wed, 4 May 2022 09:58:32 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id EA150B827AC for ; Wed, 4 May 2022 16:58:24 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 750D3C385A5; Wed, 4 May 2022 16:58:22 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1651683503; bh=xGGDPF0DTjcAr+4naN64H2tBJ0GKsH9c4Zp1Prq44W8=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Iacq1/vglEWj1QxiJoGV+9HX1YOe/1aj0RYZzKOL8zg6x0hBnDj6cLiFGoGuXuVd5 p7n6wnFD5VZPdlfPyuE+t7jcK5AwMARafkvmO6MesEcNKgOZtcEeFmqfewYQUtG60Y li9Wb3w0zZl09sCG4O7Uo/jbmdNAOfL8/dFpgkJ91cP7w26urtu7Zc5xRV4xPynXVl YiOK5djJF4kUFi3DN8GQD2rRyzROspwi7Tl1+kcX1FHvkqp4HzbfP3LkElNrIBJLBX BbGYz6sVHtxHzk7V10KBSYtKOAEuuoIWodiIl13ZlQiAoyc4+JZ4rVQtGccHru3vzN VSNow1+hO5bOA== From: =?utf-8?q?Marek_Beh=C3=BAn?= To: Greg Kroah-Hartman , Sasha Levin Cc: stable@vger.kernel.org, pali@kernel.org, =?utf-8?q?Marek_Beh=C3=BAn?= Subject: [PATCH 5.15 15/30] PCI: aardvark: Make MSI irq_chip structures static driver structures Date: Wed, 4 May 2022 18:57:40 +0200 Message-Id: <20220504165755.30002-16-kabel@kernel.org> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220504165755.30002-1-kabel@kernel.org> References: <20220504165755.30002-1-kabel@kernel.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: stable@vger.kernel.org commit c3cb8e51839adc0aaef478c47665443d02f5aa07 upstream. In [1] it was agreed that we should use struct irq_chip as a global static struct in the driver. Even though the structure currently contains a dynamic member (parent_device), In [2] the plans to kill it and make the structure completely static were set out. Convert Aardvark's priv->msi_bottom_irq_chip and priv->msi_irq_chip to static driver structure. [1] https://lore.kernel.org/linux-pci/877dbcvngf.wl-maz@kernel.org/ [2] https://lore.kernel.org/linux-pci/874k6gvkhz.wl-maz@kernel.org/ Link: https://lore.kernel.org/r/20220110015018.26359-7-kabel@kernel.org Signed-off-by: Marek Behún Signed-off-by: Lorenzo Pieralisi Signed-off-by: Marek Behún --- drivers/pci/controller/pci-aardvark.c | 26 ++++++++++++-------------- 1 file changed, 12 insertions(+), 14 deletions(-) diff --git a/drivers/pci/controller/pci-aardvark.c b/drivers/pci/controller/pci-aardvark.c index 00fe1e6682ad..7011a4a36165 100644 --- a/drivers/pci/controller/pci-aardvark.c +++ b/drivers/pci/controller/pci-aardvark.c @@ -274,8 +274,6 @@ struct advk_pcie { raw_spinlock_t irq_lock; struct irq_domain *msi_domain; struct irq_domain *msi_inner_domain; - struct irq_chip msi_bottom_irq_chip; - struct irq_chip msi_irq_chip; struct msi_domain_info msi_domain_info; DECLARE_BITMAP(msi_used, MSI_IRQ_NUM); struct mutex msi_used_lock; @@ -1194,6 +1192,12 @@ static int advk_msi_set_affinity(struct irq_data *irq_data, return -EINVAL; } +static struct irq_chip advk_msi_bottom_irq_chip = { + .name = "MSI", + .irq_compose_msi_msg = advk_msi_irq_compose_msi_msg, + .irq_set_affinity = advk_msi_set_affinity, +}; + static int advk_msi_irq_domain_alloc(struct irq_domain *domain, unsigned int virq, unsigned int nr_irqs, void *args) @@ -1210,7 +1214,7 @@ static int advk_msi_irq_domain_alloc(struct irq_domain *domain, for (i = 0; i < nr_irqs; i++) irq_domain_set_info(domain, virq + i, hwirq + i, - &pcie->msi_bottom_irq_chip, + &advk_msi_bottom_irq_chip, domain->host_data, handle_simple_irq, NULL, NULL); @@ -1280,29 +1284,23 @@ static const struct irq_domain_ops advk_pcie_irq_domain_ops = { .xlate = irq_domain_xlate_onecell, }; +static struct irq_chip advk_msi_irq_chip = { + .name = "advk-MSI", +}; + static int advk_pcie_init_msi_irq_domain(struct advk_pcie *pcie) { struct device *dev = &pcie->pdev->dev; struct device_node *node = dev->of_node; - struct irq_chip *bottom_ic, *msi_ic; struct msi_domain_info *msi_di; phys_addr_t msi_msg_phys; mutex_init(&pcie->msi_used_lock); - bottom_ic = &pcie->msi_bottom_irq_chip; - - bottom_ic->name = "MSI"; - bottom_ic->irq_compose_msi_msg = advk_msi_irq_compose_msi_msg; - bottom_ic->irq_set_affinity = advk_msi_set_affinity; - - msi_ic = &pcie->msi_irq_chip; - msi_ic->name = "advk-MSI"; - msi_di = &pcie->msi_domain_info; msi_di->flags = MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS | MSI_FLAG_MULTI_PCI_MSI; - msi_di->chip = msi_ic; + msi_di->chip = &advk_msi_irq_chip; msi_msg_phys = virt_to_phys(&pcie->msi_msg); From patchwork Wed May 4 16:57:41 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Marek_Beh=C3=BAn?= X-Patchwork-Id: 569597 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C8692C433F5 for ; Wed, 4 May 2022 17:18:50 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1353839AbiEDRWX (ORCPT ); Wed, 4 May 2022 13:22:23 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55410 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1357249AbiEDRO5 (ORCPT ); Wed, 4 May 2022 13:14:57 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [139.178.84.217]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 116BF5469C for ; Wed, 4 May 2022 09:58:25 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id CE6C5616AC for ; Wed, 4 May 2022 16:58:25 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 1679AC385A4; Wed, 4 May 2022 16:58:23 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1651683505; bh=9aJYKKWbTst3EcmdJdoVXN3+itjkBAzu3VWO8iOPpbY=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=nbGIrbGMdf0ipfoTW1OkgMmBh5dHmMKfwQX+XcSJbjIjfgu2oSuugWWlwLCeOBjrr VFrFF8xOPcdd/Lo4o3xRYb0Ajed1INyPsIe612I87GI46vxe7OH9YWkAyT1lkcuzvx 37jqbJfz3bS2zwPfK53d0yqb6hsEmwe9LVp14L6eLQwZMATUjkTPwuihu3j2JTBFqr j0ySAAi0jBpP5pUrrRcHpDf+lS1OGnAbK+GB/OmOu5aff8+13cDqzZM1aFXcHuqKKu Uv1zL3UJpmZCShnQYnsH93SnSBEIErQTWH9byeoutAAi2cIURI6r64o1ZMRU0/oLb1 cVZ42AfiWoPnw== From: =?utf-8?q?Marek_Beh=C3=BAn?= To: Greg Kroah-Hartman , Sasha Levin Cc: stable@vger.kernel.org, pali@kernel.org, =?utf-8?q?Marek_Beh=C3=BAn?= Subject: [PATCH 5.15 16/30] PCI: aardvark: Make msi_domain_info structure a static driver structure Date: Wed, 4 May 2022 18:57:41 +0200 Message-Id: <20220504165755.30002-17-kabel@kernel.org> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220504165755.30002-1-kabel@kernel.org> References: <20220504165755.30002-1-kabel@kernel.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: stable@vger.kernel.org commit 26bcd54e4a5cd51ec12d06fdc30e22863ed4c422 upstream. Make Aardvark's msi_domain_info structure into a private driver structure. Domain info is same for every potential instatination of a controller. Link: https://lore.kernel.org/r/20220110015018.26359-8-kabel@kernel.org Signed-off-by: Marek Behún Signed-off-by: Lorenzo Pieralisi Signed-off-by: Marek Behún --- drivers/pci/controller/pci-aardvark.c | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/drivers/pci/controller/pci-aardvark.c b/drivers/pci/controller/pci-aardvark.c index 7011a4a36165..51cb49a9d3f5 100644 --- a/drivers/pci/controller/pci-aardvark.c +++ b/drivers/pci/controller/pci-aardvark.c @@ -274,7 +274,6 @@ struct advk_pcie { raw_spinlock_t irq_lock; struct irq_domain *msi_domain; struct irq_domain *msi_inner_domain; - struct msi_domain_info msi_domain_info; DECLARE_BITMAP(msi_used, MSI_IRQ_NUM); struct mutex msi_used_lock; u16 msi_msg; @@ -1288,20 +1287,20 @@ static struct irq_chip advk_msi_irq_chip = { .name = "advk-MSI", }; +static struct msi_domain_info advk_msi_domain_info = { + .flags = MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS | + MSI_FLAG_MULTI_PCI_MSI, + .chip = &advk_msi_irq_chip, +}; + static int advk_pcie_init_msi_irq_domain(struct advk_pcie *pcie) { struct device *dev = &pcie->pdev->dev; struct device_node *node = dev->of_node; - struct msi_domain_info *msi_di; phys_addr_t msi_msg_phys; mutex_init(&pcie->msi_used_lock); - msi_di = &pcie->msi_domain_info; - msi_di->flags = MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS | - MSI_FLAG_MULTI_PCI_MSI; - msi_di->chip = &advk_msi_irq_chip; - msi_msg_phys = virt_to_phys(&pcie->msi_msg); advk_writel(pcie, lower_32_bits(msi_msg_phys), @@ -1317,7 +1316,8 @@ static int advk_pcie_init_msi_irq_domain(struct advk_pcie *pcie) pcie->msi_domain = pci_msi_create_irq_domain(of_node_to_fwnode(node), - msi_di, pcie->msi_inner_domain); + &advk_msi_domain_info, + pcie->msi_inner_domain); if (!pcie->msi_domain) { irq_domain_remove(pcie->msi_inner_domain); return -ENOMEM; From patchwork Wed May 4 16:57:42 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Marek_Beh=C3=BAn?= X-Patchwork-Id: 569652 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id BA05DC433EF for ; Wed, 4 May 2022 17:15:04 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1356342AbiEDRSf (ORCPT ); Wed, 4 May 2022 13:18:35 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55680 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1357299AbiEDRO6 (ORCPT ); Wed, 4 May 2022 13:14:58 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [139.178.84.217]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B19D9546B1 for ; Wed, 4 May 2022 09:58:27 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 6F68A618E5 for ; Wed, 4 May 2022 16:58:27 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id ACCCCC385AF; Wed, 4 May 2022 16:58:25 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1651683506; bh=g862QrS3wo0M/ymobfj93eBn4vKHS9GLem5bUZbWcwc=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=sWanudqyZOZQSzoPuigccGOcS7D2XFu9jao7NIVbjb8VHwvwgcIHeWArUPusr4dUh Qv3zpIZlDFHKPwlY6scdLHXt92eZFwNto8Vr97ukSvdFNSv6lWjbKyJ/O+HboYCSJ8 9VC+EFssy9eVarHk53A3pQzczS7reMjh166Qpe8f2P34ZWv2w2O8iXBh+5PAuDUgqP 2ttUX7q/9kQYhwUeGrMkk1RcIZK/+uYVks6PJQh1VQhb/B3FfyJfp+pz5iz67Sd4cM E55OGz6Fb57I3VK+SGOAHhM2ysWLzTLs37hg6ERF/STPSCSX9eaYKeZpZqpSUCzRWW c6OheBluWd1CQ== From: =?utf-8?q?Marek_Beh=C3=BAn?= To: Greg Kroah-Hartman , Sasha Levin Cc: stable@vger.kernel.org, pali@kernel.org, =?utf-8?q?Marek_Beh=C3=BAn?= Subject: [PATCH 5.15 17/30] PCI: aardvark: Use dev_fwnode() instead of of_node_to_fwnode(dev->of_node) Date: Wed, 4 May 2022 18:57:42 +0200 Message-Id: <20220504165755.30002-18-kabel@kernel.org> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220504165755.30002-1-kabel@kernel.org> References: <20220504165755.30002-1-kabel@kernel.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: stable@vger.kernel.org commit 222af78532fa299cd9b1008e49c347b7f5a45c17 upstream. Use simple dev_fwnode(dev) instead of struct device_node *node = dev->of_node; of_node_to_fwnode(node) especially since the node variable is not used elsewhere in the function. Link: https://lore.kernel.org/r/20220110015018.26359-9-kabel@kernel.org Signed-off-by: Marek Behún Signed-off-by: Lorenzo Pieralisi Signed-off-by: Marek Behún --- drivers/pci/controller/pci-aardvark.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/pci/controller/pci-aardvark.c b/drivers/pci/controller/pci-aardvark.c index 51cb49a9d3f5..e704aada3365 100644 --- a/drivers/pci/controller/pci-aardvark.c +++ b/drivers/pci/controller/pci-aardvark.c @@ -1296,7 +1296,6 @@ static struct msi_domain_info advk_msi_domain_info = { static int advk_pcie_init_msi_irq_domain(struct advk_pcie *pcie) { struct device *dev = &pcie->pdev->dev; - struct device_node *node = dev->of_node; phys_addr_t msi_msg_phys; mutex_init(&pcie->msi_used_lock); @@ -1315,7 +1314,7 @@ static int advk_pcie_init_msi_irq_domain(struct advk_pcie *pcie) return -ENOMEM; pcie->msi_domain = - pci_msi_create_irq_domain(of_node_to_fwnode(node), + pci_msi_create_irq_domain(dev_fwnode(dev), &advk_msi_domain_info, pcie->msi_inner_domain); if (!pcie->msi_domain) { From patchwork Wed May 4 16:57:43 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Marek_Beh=C3=BAn?= X-Patchwork-Id: 569601 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 37689C4332F for ; Wed, 4 May 2022 17:18:39 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1355912AbiEDRWL (ORCPT ); Wed, 4 May 2022 13:22:11 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55596 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1357443AbiEDRPC (ORCPT ); Wed, 4 May 2022 13:15:02 -0400 Received: from sin.source.kernel.org (sin.source.kernel.org [IPv6:2604:1380:40e1:4800::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A147554BF4 for ; Wed, 4 May 2022 09:58:35 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by sin.source.kernel.org (Postfix) with ESMTPS id 36BC5CE28B9 for ; Wed, 4 May 2022 16:58:30 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 4EC16C385A5; Wed, 4 May 2022 16:58:27 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1651683508; bh=Qio1QUKxsqujMYZd+uA/JnVaA1Z1Q9a70Xei0uwv2+Y=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=HtMop+iiVxtabQkl4ZPSKDQtjDqc3gb/Qanr3TvYuiaKLV8QQ5+0dnsIs7pQiRoQU LqeEI8MZIW7+NB4t0BwnWwqlXTcr57JU3+7nRfjlwEIs05kX64KhW800Paz33HO7FO 8oGyYwgdfoCbezElFL66n95LmSexmD/EO63XrxvL/tIkGG1j9TeUSdk/HIBvWQaIOC ODwFoKMC0pBoS/ObB9vu3XHYtk+n1ocjnJFqDm+sz5K0JZSn7yMQPh+0WS29qQxuoM 2yf54SY3WZvekWyAFqKC17Ien7HpjrPqB+YV7C8IKDdtTXOZaZUYdwyUQIP9u/9NN4 RpUVW4nOkD2VA== From: =?utf-8?q?Marek_Beh=C3=BAn?= To: Greg Kroah-Hartman , Sasha Levin Cc: stable@vger.kernel.org, pali@kernel.org, =?utf-8?q?Marek_Beh=C3=BAn?= Subject: [PATCH 5.15 18/30] PCI: aardvark: Refactor unmasking summary MSI interrupt Date: Wed, 4 May 2022 18:57:43 +0200 Message-Id: <20220504165755.30002-19-kabel@kernel.org> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220504165755.30002-1-kabel@kernel.org> References: <20220504165755.30002-1-kabel@kernel.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: stable@vger.kernel.org From: Pali Rohár commit 4689c0916320f112a8a33f2689d3addc3262f02c upstream. Refactor the masking of ISR0/1 Sources and unmasking of summary MSI interrupt so that it corresponds to the comments: - first mask all ISR0/1 - then unmask all MSIs - then unmask summary MSI interrupt Link: https://lore.kernel.org/r/20220110015018.26359-10-kabel@kernel.org Signed-off-by: Pali Rohár Signed-off-by: Marek Behún Signed-off-by: Lorenzo Pieralisi Signed-off-by: Marek Behún --- drivers/pci/controller/pci-aardvark.c | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/drivers/pci/controller/pci-aardvark.c b/drivers/pci/controller/pci-aardvark.c index e704aada3365..b96ef0fdf9e6 100644 --- a/drivers/pci/controller/pci-aardvark.c +++ b/drivers/pci/controller/pci-aardvark.c @@ -571,15 +571,17 @@ static void advk_pcie_setup_hw(struct advk_pcie *pcie) advk_writel(pcie, PCIE_IRQ_ALL_MASK, HOST_CTRL_INT_STATUS_REG); /* Disable All ISR0/1 Sources */ - reg = PCIE_ISR0_ALL_MASK; - reg &= ~PCIE_ISR0_MSI_INT_PENDING; - advk_writel(pcie, reg, PCIE_ISR0_MASK_REG); - + advk_writel(pcie, PCIE_ISR0_ALL_MASK, PCIE_ISR0_MASK_REG); advk_writel(pcie, PCIE_ISR1_ALL_MASK, PCIE_ISR1_MASK_REG); /* Unmask all MSIs */ advk_writel(pcie, ~(u32)PCIE_MSI_ALL_MASK, PCIE_MSI_MASK_REG); + /* Unmask summary MSI interrupt */ + reg = advk_readl(pcie, PCIE_ISR0_MASK_REG); + reg &= ~PCIE_ISR0_MSI_INT_PENDING; + advk_writel(pcie, reg, PCIE_ISR0_MASK_REG); + /* Enable summary interrupt for GIC SPI source */ reg = PCIE_IRQ_ALL_MASK & (~PCIE_IRQ_ENABLE_INTS_MASK); advk_writel(pcie, reg, HOST_CTRL_INT_MASK_REG); From patchwork Wed May 4 16:57:45 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Marek_Beh=C3=BAn?= X-Patchwork-Id: 569621 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5CB0FC3A59D for ; Wed, 4 May 2022 17:17:28 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1357069AbiEDRTS (ORCPT ); Wed, 4 May 2022 13:19:18 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55650 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1357736AbiEDRPN (ORCPT ); Wed, 4 May 2022 13:15:13 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [139.178.84.217]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E87D34D26C for ; Wed, 4 May 2022 09:58:56 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 4FF6461931 for ; Wed, 4 May 2022 16:58:32 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 873EAC385A5; Wed, 4 May 2022 16:58:30 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1651683511; bh=ztObVUwDhe4+yim/9mKWxs9oywA9XPXyB8C0mZuT82o=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=SSnGByMhCyrRVTbOPmJjL45nxsT9E4IXgq/tmpcb9V9gAJ/RkgiO8J3+XxiS8qKRD btgG2UtaCZTQ6WMdqPrrBWvK2CueGdmTdmn05NmzZPLtm1uoWceRoAmyQdr5Ns+/kX GGpe1Oypfe4fj80ar1qzA4eeCAl3l0VW9wlScoYBUCJRGO8yCjlP9YgYvZ4h4uhKnL kU/Xg4SDecYnF1G5yLsdnrpn02X8qO6YOTGVbq3LThSrNAtepFgXb/cIzUiXk/5/RW AUPzxYUJ5BCxC3Y9RsUJgcWBnKEAfN/x3AA48P72x4WFXd55NfKAF+Dpw75KZGtUzc 5GgPW3KUA0VTA== From: =?utf-8?q?Marek_Beh=C3=BAn?= To: Greg Kroah-Hartman , Sasha Levin Cc: stable@vger.kernel.org, pali@kernel.org, =?utf-8?q?Marek_Beh=C3=BAn?= Subject: [PATCH 5.15 20/30] PCI: aardvark: Fix setting MSI address Date: Wed, 4 May 2022 18:57:45 +0200 Message-Id: <20220504165755.30002-21-kabel@kernel.org> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220504165755.30002-1-kabel@kernel.org> References: <20220504165755.30002-1-kabel@kernel.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: stable@vger.kernel.org From: Pali Rohár commit 46ad3dc4171b5ee1d12267d70112563d5760210a upstream. MSI address for receiving MSI interrupts needs to be correctly set before enabling processing of MSI interrupts. Move code for setting PCIE_MSI_ADDR_LOW_REG and PCIE_MSI_ADDR_HIGH_REG from advk_pcie_init_msi_irq_domain() to advk_pcie_setup_hw(), before enabling PCIE_CORE_CTRL2_MSI_ENABLE. After this we can remove the now unused member msi_msg, which was used only for MSI doorbell address. MSI address can be any address which cannot be used to DMA to. So change it to the address of the main struct advk_pcie. Link: https://lore.kernel.org/r/20220110015018.26359-12-kabel@kernel.org Fixes: 8c39d710363c ("PCI: aardvark: Add Aardvark PCI host controller driver") Signed-off-by: Pali Rohár Signed-off-by: Marek Behún Signed-off-by: Lorenzo Pieralisi Acked-by: Marc Zyngier Cc: stable@vger.kernel.org # f21a8b1b6837 ("PCI: aardvark: Move to MSI handling using generic MSI support") Signed-off-by: Marek Behún --- drivers/pci/controller/pci-aardvark.c | 21 +++++++++------------ 1 file changed, 9 insertions(+), 12 deletions(-) diff --git a/drivers/pci/controller/pci-aardvark.c b/drivers/pci/controller/pci-aardvark.c index ad3931919de3..43f79cbf9027 100644 --- a/drivers/pci/controller/pci-aardvark.c +++ b/drivers/pci/controller/pci-aardvark.c @@ -277,7 +277,6 @@ struct advk_pcie { raw_spinlock_t msi_irq_lock; DECLARE_BITMAP(msi_used, MSI_IRQ_NUM); struct mutex msi_used_lock; - u16 msi_msg; int link_gen; struct pci_bridge_emul bridge; struct gpio_desc *reset_gpio; @@ -472,6 +471,7 @@ static void advk_pcie_disable_ob_win(struct advk_pcie *pcie, u8 win_num) static void advk_pcie_setup_hw(struct advk_pcie *pcie) { + phys_addr_t msi_addr; u32 reg; int i; @@ -560,6 +560,11 @@ static void advk_pcie_setup_hw(struct advk_pcie *pcie) reg |= LANE_COUNT_1; advk_writel(pcie, reg, PCIE_CORE_CTRL0_REG); + /* Set MSI address */ + msi_addr = virt_to_phys(pcie); + advk_writel(pcie, lower_32_bits(msi_addr), PCIE_MSI_ADDR_LOW_REG); + advk_writel(pcie, upper_32_bits(msi_addr), PCIE_MSI_ADDR_HIGH_REG); + /* Enable MSI */ reg = advk_readl(pcie, PCIE_CORE_CTRL2_REG); reg |= PCIE_CORE_CTRL2_MSI_ENABLE; @@ -1179,10 +1184,10 @@ static void advk_msi_irq_compose_msi_msg(struct irq_data *data, struct msi_msg *msg) { struct advk_pcie *pcie = irq_data_get_irq_chip_data(data); - phys_addr_t msi_msg = virt_to_phys(&pcie->msi_msg); + phys_addr_t msi_addr = virt_to_phys(pcie); - msg->address_lo = lower_32_bits(msi_msg); - msg->address_hi = upper_32_bits(msi_msg); + msg->address_lo = lower_32_bits(msi_addr); + msg->address_hi = upper_32_bits(msi_addr); msg->data = data->hwirq; } @@ -1341,18 +1346,10 @@ static struct msi_domain_info advk_msi_domain_info = { static int advk_pcie_init_msi_irq_domain(struct advk_pcie *pcie) { struct device *dev = &pcie->pdev->dev; - phys_addr_t msi_msg_phys; raw_spin_lock_init(&pcie->msi_irq_lock); mutex_init(&pcie->msi_used_lock); - msi_msg_phys = virt_to_phys(&pcie->msi_msg); - - advk_writel(pcie, lower_32_bits(msi_msg_phys), - PCIE_MSI_ADDR_LOW_REG); - advk_writel(pcie, upper_32_bits(msi_msg_phys), - PCIE_MSI_ADDR_HIGH_REG); - pcie->msi_inner_domain = irq_domain_add_linear(NULL, MSI_IRQ_NUM, &advk_msi_domain_ops, pcie); From patchwork Wed May 4 16:57:48 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Marek_Beh=C3=BAn?= X-Patchwork-Id: 569645 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3F811C43219 for ; Wed, 4 May 2022 17:17:10 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1356733AbiEDRS5 (ORCPT ); Wed, 4 May 2022 13:18:57 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55690 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1357465AbiEDRPD (ORCPT ); Wed, 4 May 2022 13:15:03 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [IPv6:2604:1380:4641:c500::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 44DEF54F8A for ; Wed, 4 May 2022 09:58:37 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 266426195D for ; Wed, 4 May 2022 16:58:37 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 5E5F4C385B1; Wed, 4 May 2022 16:58:35 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1651683516; bh=8N+WUUiyxZMe5u7HExyLzq8wLvaARJ8I8Bj6f+m/qOI=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=QQQlDgz61YINjkneEMwGJ0pEnHblBv/oUXY+FJl2hcoJr2gdqPgSjIcf1e/K2w9nk XD/YQ4J2HMfkUdpyGLHCUVBHFl8s+yLIX2MtxXxY+olHGr6b1JeGvuCf44DZa74scm Hq7P2chmZ3UuIRGxgSOU2fISkW4IYh8nRwakRVlWEEFGSqgd26+Noc9PTlPmgTV0rg zUTf73G8KxnkIQVliahv/LZeoUlYdX8lUDk17o7qCx0w8KRi6w4qt9QWYxKT6coZ6F GtWU+oJ/KNGc1oOkMvRxsG8AUNxlI9fqxHikKzvYLUBMm+7hN9ohU2DUV6u9Lr12V/ eG3rVmkWwi/SA== From: =?utf-8?q?Marek_Beh=C3=BAn?= To: Greg Kroah-Hartman , Sasha Levin Cc: stable@vger.kernel.org, pali@kernel.org, =?utf-8?q?Marek_Beh=C3=BAn?= Subject: [PATCH 5.15 23/30] PCI: aardvark: Optimize writing PCI_EXP_RTCTL_PMEIE and PCI_EXP_RTSTA_PME on emulated bridge Date: Wed, 4 May 2022 18:57:48 +0200 Message-Id: <20220504165755.30002-24-kabel@kernel.org> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220504165755.30002-1-kabel@kernel.org> References: <20220504165755.30002-1-kabel@kernel.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: stable@vger.kernel.org From: Pali Rohár commit 7122bcb33295228c882c0aa32a04b2547beba2c3 upstream. To optimize advk_pci_bridge_emul_pcie_conf_write() code, touch PCIE_ISR0_REG and PCIE_ISR0_MASK_REG registers only when it is really needed, when processing PCI_EXP_RTCTL_PMEIE and PCI_EXP_RTSTA_PME bits. Link: https://lore.kernel.org/r/20220110015018.26359-16-kabel@kernel.org Signed-off-by: Pali Rohár Signed-off-by: Marek Behún Signed-off-by: Lorenzo Pieralisi Signed-off-by: Marek Behún --- drivers/pci/controller/pci-aardvark.c | 20 +++++++++++--------- 1 file changed, 11 insertions(+), 9 deletions(-) diff --git a/drivers/pci/controller/pci-aardvark.c b/drivers/pci/controller/pci-aardvark.c index 0384dc842e6d..ba641dc84bd3 100644 --- a/drivers/pci/controller/pci-aardvark.c +++ b/drivers/pci/controller/pci-aardvark.c @@ -925,19 +925,21 @@ advk_pci_bridge_emul_pcie_conf_write(struct pci_bridge_emul *bridge, advk_pcie_wait_for_retrain(pcie); break; - case PCI_EXP_RTCTL: { + case PCI_EXP_RTCTL: /* Only mask/unmask PME interrupt */ - u32 val = advk_readl(pcie, PCIE_ISR0_MASK_REG) & - ~PCIE_MSG_PM_PME_MASK; - if ((new & PCI_EXP_RTCTL_PMEIE) == 0) - val |= PCIE_MSG_PM_PME_MASK; - advk_writel(pcie, val, PCIE_ISR0_MASK_REG); + if (mask & PCI_EXP_RTCTL_PMEIE) { + u32 val = advk_readl(pcie, PCIE_ISR0_MASK_REG); + if (new & PCI_EXP_RTCTL_PMEIE) + val &= ~PCIE_MSG_PM_PME_MASK; + else + val |= PCIE_MSG_PM_PME_MASK; + advk_writel(pcie, val, PCIE_ISR0_MASK_REG); + } break; - } case PCI_EXP_RTSTA: - new = (new & PCI_EXP_RTSTA_PME) >> 9; - advk_writel(pcie, new, PCIE_ISR0_REG); + if (new & PCI_EXP_RTSTA_PME) + advk_writel(pcie, PCIE_MSG_PM_PME_MASK, PCIE_ISR0_REG); break; case PCI_EXP_DEVCTL: From patchwork Wed May 4 16:57:51 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Marek_Beh=C3=BAn?= X-Patchwork-Id: 569594 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 57C75C433FE for ; Wed, 4 May 2022 17:18:57 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1356386AbiEDRWb (ORCPT ); Wed, 4 May 2022 13:22:31 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55368 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1357550AbiEDRPG (ORCPT ); Wed, 4 May 2022 13:15:06 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [IPv6:2604:1380:4641:c500::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4E22354FB8 for ; Wed, 4 May 2022 09:58:42 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id F3BBA616AC for ; Wed, 4 May 2022 16:58:41 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 38D13C385C4; Wed, 4 May 2022 16:58:40 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1651683521; bh=LbdFsUVPQuQKXf29wiQKo3pV0naA4dA9/eLYOgK2KzM=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=XoxeEbGh/ZfbML69m49WpN0wlZduv6WoNiIH5HXW6ioIuinF10+YONMOXdR/JTaYA kskfFGn64i5h1kz8Bz0jWPB6zqW4559B+nI4W3p+T1m0Vp14GWUttghG73R+B1hiFM Cmpkbu4FkNh21vVfxwI2uixPDf5h4Vno9DV3CJV4Ckh9QXaJF4uDc6jQhdc5NCLrRT dUr4gN50k3sGbqpasmmXNxHt+EWg6bGxlnvWOoG3ic4/4VnI6nnmW/IIPOx9ru0mj+ fDV/VFTZ7i+y+wt5IMTdJfdjj3Q6pIDgDE0BUXlThhvTD9JTYCJapddmwaKD375Gdk mXg3PPYkGrUKw== From: =?utf-8?q?Marek_Beh=C3=BAn?= To: Greg Kroah-Hartman , Sasha Levin Cc: stable@vger.kernel.org, pali@kernel.org, =?utf-8?q?Marek_Beh=C3=BAn?= Subject: [PATCH 5.15 26/30] PCI: aardvark: Use separate INTA interrupt for emulated root bridge Date: Wed, 4 May 2022 18:57:51 +0200 Message-Id: <20220504165755.30002-27-kabel@kernel.org> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220504165755.30002-1-kabel@kernel.org> References: <20220504165755.30002-1-kabel@kernel.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: stable@vger.kernel.org From: Pali Rohár commit 815bc313686783e3a1823ec0efc332c70e6bd976 upstream. Emulated root bridge currently provides only one Legacy INTA interrupt which is used for reporting PCIe PME and ERR events and handled by kernel PCIe PME and AER drivers. Aardvark HW reports these PME and ERR events separately, so there is no need to mix real INTA interrupt and emulated INTA interrupt for PCIe PME and AER drivers. Register a new advk-RP (as in Root Port) irq chip and a new irq domain for emulated root bridge and use this new separate irq domain for providing INTA interrupt from emulated root bridge for PME and ERR events. The real INTA interrupt from real devices is now separate. A custom map_irq callback function on PCI host bridge structure is used to allocate IRQ mapping for emulated root bridge from new irq domain. Original callback of_irq_parse_and_map_pci() is used for all other devices as before. Link: https://lore.kernel.org/r/20220110015018.26359-19-kabel@kernel.org Signed-off-by: Pali Rohár Signed-off-by: Marek Behún Signed-off-by: Lorenzo Pieralisi Signed-off-by: Marek Behún --- drivers/pci/controller/pci-aardvark.c | 69 ++++++++++++++++++++++++++- 1 file changed, 67 insertions(+), 2 deletions(-) diff --git a/drivers/pci/controller/pci-aardvark.c b/drivers/pci/controller/pci-aardvark.c index 1943e7e312ab..39fa8af01671 100644 --- a/drivers/pci/controller/pci-aardvark.c +++ b/drivers/pci/controller/pci-aardvark.c @@ -273,6 +273,7 @@ struct advk_pcie { } wins[OB_WIN_COUNT]; u8 wins_count; int irq; + struct irq_domain *rp_irq_domain; struct irq_domain *irq_domain; struct irq_chip irq_chip; raw_spinlock_t irq_lock; @@ -1436,6 +1437,44 @@ static void advk_pcie_remove_irq_domain(struct advk_pcie *pcie) irq_domain_remove(pcie->irq_domain); } +static struct irq_chip advk_rp_irq_chip = { + .name = "advk-RP", +}; + +static int advk_pcie_rp_irq_map(struct irq_domain *h, + unsigned int virq, irq_hw_number_t hwirq) +{ + struct advk_pcie *pcie = h->host_data; + + irq_set_chip_and_handler(virq, &advk_rp_irq_chip, handle_simple_irq); + irq_set_chip_data(virq, pcie); + + return 0; +} + +static const struct irq_domain_ops advk_pcie_rp_irq_domain_ops = { + .map = advk_pcie_rp_irq_map, + .xlate = irq_domain_xlate_onecell, +}; + +static int advk_pcie_init_rp_irq_domain(struct advk_pcie *pcie) +{ + pcie->rp_irq_domain = irq_domain_add_linear(NULL, 1, + &advk_pcie_rp_irq_domain_ops, + pcie); + if (!pcie->rp_irq_domain) { + dev_err(&pcie->pdev->dev, "Failed to add Root Port IRQ domain\n"); + return -ENOMEM; + } + + return 0; +} + +static void advk_pcie_remove_rp_irq_domain(struct advk_pcie *pcie) +{ + irq_domain_remove(pcie->rp_irq_domain); +} + static void advk_pcie_handle_pme(struct advk_pcie *pcie) { u32 requester = advk_readl(pcie, PCIE_MSG_LOG_REG) >> 16; @@ -1457,7 +1496,7 @@ static void advk_pcie_handle_pme(struct advk_pcie *pcie) if (!(le16_to_cpu(pcie->bridge.pcie_conf.rootctl) & PCI_EXP_RTCTL_PMEIE)) return; - if (generic_handle_domain_irq(pcie->irq_domain, 0) == -EINVAL) + if (generic_handle_domain_irq(pcie->rp_irq_domain, 0) == -EINVAL) dev_err_ratelimited(&pcie->pdev->dev, "unhandled PME IRQ\n"); } } @@ -1509,7 +1548,7 @@ static void advk_pcie_handle_int(struct advk_pcie *pcie) * Aardvark HW returns zero for PCI_ERR_ROOT_AER_IRQ, so use * PCIe interrupt 0 */ - if (generic_handle_domain_irq(pcie->irq_domain, 0) == -EINVAL) + if (generic_handle_domain_irq(pcie->rp_irq_domain, 0) == -EINVAL) dev_err_ratelimited(&pcie->pdev->dev, "unhandled ERR IRQ\n"); } @@ -1553,6 +1592,21 @@ static void advk_pcie_irq_handler(struct irq_desc *desc) chained_irq_exit(chip, desc); } +static int advk_pcie_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) +{ + struct advk_pcie *pcie = dev->bus->sysdata; + + /* + * Emulated root bridge has its own emulated irq chip and irq domain. + * Argument pin is the INTx pin (1=INTA, 2=INTB, 3=INTC, 4=INTD) and + * hwirq for irq_create_mapping() is indexed from zero. + */ + if (pci_is_root_bus(dev->bus)) + return irq_create_mapping(pcie->rp_irq_domain, pin - 1); + else + return of_irq_parse_and_map_pci(dev, slot, pin); +} + static void __maybe_unused advk_pcie_disable_phy(struct advk_pcie *pcie) { phy_power_off(pcie->phy); @@ -1754,14 +1808,24 @@ static int advk_pcie_probe(struct platform_device *pdev) return ret; } + ret = advk_pcie_init_rp_irq_domain(pcie); + if (ret) { + dev_err(dev, "Failed to initialize irq\n"); + advk_pcie_remove_msi_irq_domain(pcie); + advk_pcie_remove_irq_domain(pcie); + return ret; + } + irq_set_chained_handler_and_data(pcie->irq, advk_pcie_irq_handler, pcie); bridge->sysdata = pcie; bridge->ops = &advk_pcie_ops; + bridge->map_irq = advk_pcie_map_irq; ret = pci_host_probe(bridge); if (ret < 0) { irq_set_chained_handler_and_data(pcie->irq, NULL, NULL); + advk_pcie_remove_rp_irq_domain(pcie); advk_pcie_remove_msi_irq_domain(pcie); advk_pcie_remove_irq_domain(pcie); return ret; @@ -1813,6 +1877,7 @@ static int advk_pcie_remove(struct platform_device *pdev) irq_set_chained_handler_and_data(pcie->irq, NULL, NULL); /* Remove IRQ domains */ + advk_pcie_remove_rp_irq_domain(pcie); advk_pcie_remove_msi_irq_domain(pcie); advk_pcie_remove_irq_domain(pcie); From patchwork Wed May 4 16:57:52 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Marek_Beh=C3=BAn?= X-Patchwork-Id: 569646 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 651D8C4167B for ; Wed, 4 May 2022 17:17:10 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1356769AbiEDRTA (ORCPT ); Wed, 4 May 2022 13:19:00 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55406 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1357564AbiEDRPG (ORCPT ); Wed, 4 May 2022 13:15:06 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [139.178.84.217]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C4E415520D for ; Wed, 4 May 2022 09:58:43 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 992706179D for ; Wed, 4 May 2022 16:58:43 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id CFFDCC385B0; Wed, 4 May 2022 16:58:41 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1651683523; bh=0/LLEg595DdMV4CWDCK0iNA8sk94FhJe32O27McizyE=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=eYFiLn5Sz8lH9482zhttMrUgOG7p/kb985zxTTMpcRdeE5DEgXX9y+kiD9ih4AOQm lQkAk6R+ZIm2RYVGkaY4XfzQOQmi3hcos1hbSNOTbR2vgGRASCu9tL835d+pGLVs6c xaI/COSWDMWUE7LMjL91YSvRyTxH1aQGfzUNaHloMBD7gLy1NLe9vqYbgd20kdZk0s GrxRfTLDm5UmDbpOPBLEVClIPGHpDv7cm7m82NX7V4fsYnSHDYLag2tTK6K84NK0u5 BzI02IBOIyMBRFPNnYQRyM5rUeX5bzFxfJDPObrftUQmuJXfq7I0ktUaQnZMhpQvg5 HIHQjz6tPdTKA== From: =?utf-8?q?Marek_Beh=C3=BAn?= To: Greg Kroah-Hartman , Sasha Levin Cc: stable@vger.kernel.org, pali@kernel.org, =?utf-8?q?Marek_Beh=C3=BAn?= Subject: [PATCH 5.15 27/30] PCI: aardvark: Remove irq_mask_ack() callback for INTx interrupts Date: Wed, 4 May 2022 18:57:52 +0200 Message-Id: <20220504165755.30002-28-kabel@kernel.org> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220504165755.30002-1-kabel@kernel.org> References: <20220504165755.30002-1-kabel@kernel.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: stable@vger.kernel.org From: Pali Rohár commit b08e5b53d17be58eb2311d6790a84fe2c200ee47 upstream. Callback for irq_mask_ack() is the same as for irq_mask(). As there is no special handling for irq_ack(), there is no need to define irq_mask_ack() too. Link: https://lore.kernel.org/r/20220110015018.26359-20-kabel@kernel.org Signed-off-by: Pali Rohár Signed-off-by: Marek Behún Signed-off-by: Lorenzo Pieralisi Acked-by: Marc Zyngier Signed-off-by: Marek Behún --- drivers/pci/controller/pci-aardvark.c | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/pci/controller/pci-aardvark.c b/drivers/pci/controller/pci-aardvark.c index 39fa8af01671..e1783fb94eb8 100644 --- a/drivers/pci/controller/pci-aardvark.c +++ b/drivers/pci/controller/pci-aardvark.c @@ -1415,7 +1415,6 @@ static int advk_pcie_init_irq_domain(struct advk_pcie *pcie) } irq_chip->irq_mask = advk_pcie_irq_mask; - irq_chip->irq_mask_ack = advk_pcie_irq_mask; irq_chip->irq_unmask = advk_pcie_irq_unmask; pcie->irq_domain = From patchwork Wed May 4 16:57:55 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Marek_Beh=C3=BAn?= X-Patchwork-Id: 569640 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0C638C433FE for ; Wed, 4 May 2022 17:17:15 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1356898AbiEDRTJ (ORCPT ); Wed, 4 May 2022 13:19:09 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56560 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1357643AbiEDRPJ (ORCPT ); Wed, 4 May 2022 13:15:09 -0400 Received: from ams.source.kernel.org (ams.source.kernel.org [145.40.68.75]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C6DB75534A for ; Wed, 4 May 2022 09:58:49 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id 11326B82795 for ; Wed, 4 May 2022 16:58:49 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id A90F5C385AF; Wed, 4 May 2022 16:58:46 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1651683527; bh=KYuIlRixMRXJ/NR0UmXgTUkR5mDhasieXg47JokMK8E=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=WZxmWnOzDkhA3ZlAYEJvyG8IIkWUiOQzZaa17yuuHEHSAL8so39pSwCIzomOMQBTT YUVsJRmDuMlq+NXc0KJQB5JwtvXHaafAzvjGg2cHAWKSZ/OYJBqRsLoNFHLFanyb7p Hd3T7FH3GVFNL0EGfZJdlhNvRtG3KtOfl8WoEMMdZGFUK5eswV428a3aGX77iW3u1e UBAVE3UWtOWbK4YUj60QP3dyPNHgUdgJticMrWPRL65yGQsRHfmRgt9SdiVAqmIpW1 poD7MfnzawVgqvrK5L5SPv9lBZ16IXTEMAREPZPA+iaLZcpkck/WV20RDlOPe7JmUV 241cBQlTavpaQ== From: =?utf-8?q?Marek_Beh=C3=BAn?= To: Greg Kroah-Hartman , Sasha Levin Cc: stable@vger.kernel.org, pali@kernel.org, =?utf-8?q?Marek_Beh=C3=BAn?= Subject: [PATCH 5.15 30/30] PCI: aardvark: Update comment about link going down after link-up Date: Wed, 4 May 2022 18:57:55 +0200 Message-Id: <20220504165755.30002-31-kabel@kernel.org> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220504165755.30002-1-kabel@kernel.org> References: <20220504165755.30002-1-kabel@kernel.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: stable@vger.kernel.org commit 92f4ffecc4170ce29e67a1f8d51c168c3de95fb2 upstream. Update the comment about what happens when link goes down after we have checked for link-up. If a PIO request is done while link-down, we have a serious problem. Link: https://lore.kernel.org/r/20220110015018.26359-23-kabel@kernel.org Signed-off-by: Marek Behún Signed-off-by: Lorenzo Pieralisi Signed-off-by: Marek Behún --- drivers/pci/controller/pci-aardvark.c | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/drivers/pci/controller/pci-aardvark.c b/drivers/pci/controller/pci-aardvark.c index 669663fb982e..ff45052cf48d 100644 --- a/drivers/pci/controller/pci-aardvark.c +++ b/drivers/pci/controller/pci-aardvark.c @@ -998,8 +998,12 @@ static bool advk_pcie_valid_device(struct advk_pcie *pcie, struct pci_bus *bus, return false; /* - * If the link goes down after we check for link-up, nothing bad - * happens but the config access times out. + * If the link goes down after we check for link-up, we have a problem: + * if a PIO request is executed while link-down, the whole controller + * gets stuck in a non-functional state, and even after link comes up + * again, PIO requests won't work anymore, and a reset of the whole PCIe + * controller is needed. Therefore we need to prevent sending PIO + * requests while the link is down. */ if (!pci_is_root_bus(bus) && !advk_pcie_link_up(pcie)) return false;