From patchwork Sat May 14 00:01:05 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 572637 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 06C61C433F5 for ; Sat, 14 May 2022 02:05:01 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229752AbiENCE7 (ORCPT ); Fri, 13 May 2022 22:04:59 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37100 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229699AbiENCE6 (ORCPT ); Fri, 13 May 2022 22:04:58 -0400 Received: from mail-lj1-x22c.google.com (mail-lj1-x22c.google.com [IPv6:2a00:1450:4864:20::22c]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 217CB2CC13F for ; Fri, 13 May 2022 17:06:09 -0700 (PDT) Received: by mail-lj1-x22c.google.com with SMTP id o22so11107202ljp.8 for ; Fri, 13 May 2022 17:06:08 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=p1+Xm7EUInIY3jvthb6tC3vLUTde35YYnc+B4cs34zo=; b=orPadqrPCDmcbZuPrF06wsMUbSjw0K+eL03xR0/hC+F5ybl24xD7r7i/VpUfJehJjk X7fSZnDiXocFltfDjaIUXQ+2sZJSMEBKp7kxrsGGq4S5G/NJxkIfzIQXJ+A7TWZyrU33 iTKOFmYgHaZevZbhf3ot98zN7uXpkuR6sOTHnPqzxXlgjnHRtoY8RMP9ey+fYqZvlp79 4NMatCxHNITiRkmcwILZ7Rx80bpuJdAsaH5juR9kCTcF7CFb4Br5dhPPVbUjWQq3RXW9 2/yGlPOeaPIWEGbSJABM4Trh8lsVMpLOuCd45SlXaur4jayaeS8Qf9i0I+e7snI2bISe Tstg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=p1+Xm7EUInIY3jvthb6tC3vLUTde35YYnc+B4cs34zo=; b=iX8hx3yltwJ50t4xkmonw+Iau7wGrH4FetCyspauxHO1K3UycAkEozTgsrLq3K/vxr INdZrYKThocbAP8QidqYIo4RmVorUyKAQOsiE9boThAvXuZaODTt0LCsAWmxXkdKORvr J8kRcjo/B5LibF2tK1iYx+dFl39RYvZf108KN+XY92tzPXbHOhrJMAICvJII29RnmAkZ p872fwlFaP7ONE3lc4Ho7Wqr77uMWgXRMoMwpgGh3ETHrMTaxl+kVTt2nmwWI507W5XZ Rz+RvFD348EFiyi6bLMPU6zXl0NbK3T7F6MQ74P4v7P9deWvilMoyDlDs1YnBzeP4+iX 4g6A== X-Gm-Message-State: AOAM530S24mAwp1icgGbYzc/VGKyIu2iG9jBkqK+L8QJBne8zV/Emp1T 3VZDw3CFcIraMtNeOO+dlWL5uA== X-Google-Smtp-Source: ABdhPJx0UmqhGj8S6MnXyxoYZW8I6PIYPveeEoxF6Y5cYXtbK5eThZLO5BKTg4wcW6L0KPMOIrlYQQ== X-Received: by 2002:a05:651c:10b:b0:24f:24a3:9dec with SMTP id a11-20020a05651c010b00b0024f24a39decmr4361223ljb.144.1652486470712; Fri, 13 May 2022 17:01:10 -0700 (PDT) Received: from eriador.lan ([37.153.55.125]) by smtp.gmail.com with ESMTPSA id z2-20020a2e9b82000000b0024f3d1daeaesm626221lji.54.2022.05.13.17.01.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 13 May 2022 17:01:10 -0700 (PDT) From: Dmitry Baryshkov To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Mathieu Poirier , Rob Herring , Krzysztof Kozlowski Cc: linux-arm-msm@vger.kernel.org, linux-remoteproc@vger.kernel.org, devicetree@vger.kernel.org Subject: [PATCH 1/4] dt-bindings: remoteproc: qcom: Add SDM660 modem PAS compatible Date: Sat, 14 May 2022 03:01:05 +0300 Message-Id: <20220514000108.3070363-2-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220514000108.3070363-1-dmitry.baryshkov@linaro.org> References: <20220514000108.3070363-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Describe required properties of the SDM660 MSS PIL device. Signed-off-by: Dmitry Baryshkov --- Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt b/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt index 8f1507052afd..5ecfaf2048ab 100644 --- a/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt +++ b/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt @@ -16,6 +16,7 @@ on the Qualcomm Hexagon core. "qcom,msm8998-mss-pil" "qcom,sc7180-mss-pil" "qcom,sc7280-mss-pil" + "qcom,sdm660-mss-pil" "qcom,sdm845-mss-pil" - reg: @@ -44,6 +45,7 @@ on the Qualcomm Hexagon core. qcom,qcs404-wcss-pil: qcom,msm8916-mss-pil: qcom,msm8974-mss-pil: + qcom,sdm660-mss-pil: must be "wdog", "fatal", "ready", "handover", "stop-ack" qcom,msm8996-mss-pil: qcom,msm8998-mss-pil: @@ -84,6 +86,7 @@ on the Qualcomm Hexagon core. must be "iface", "bus", "mem", "xo", "gpll0_mss", "snoc_axi", "mnoc_axi", "pnoc", "qdss" qcom,msm8998-mss-pil: + qcom,sdm660-mss-pil: must be "iface", "bus", "mem", "xo", "gpll0_mss", "snoc_axi", "mnoc_axi", "qdss" qcom,sc7180-mss-pil: @@ -175,6 +178,7 @@ For the compatible string below the following supplies are required: qcom,msm8974-mss-pil: qcom,msm8996-mss-pil: qcom,msm8998-mss-pil: + qcom,sdm660-mss-pil: must be "cx", "mx" qcom,sc7180-mss-pil: must be "cx", "mx", "mss" From patchwork Sat May 14 00:01:06 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 572641 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 530E1C433F5 for ; Sat, 14 May 2022 01:18:06 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229532AbiENBSF (ORCPT ); Fri, 13 May 2022 21:18:05 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50424 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229490AbiENBSE (ORCPT ); Fri, 13 May 2022 21:18:04 -0400 Received: from mail-wr1-f42.google.com (mail-wr1-f42.google.com [209.85.221.42]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6FFC74911F8 for ; Fri, 13 May 2022 17:49:12 -0700 (PDT) Received: by mail-wr1-f42.google.com with SMTP id a5so9517808wrp.7 for ; Fri, 13 May 2022 17:49:12 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=wBxMEIa7glrwrCrckfkFnYPIKZ191GVYDBXQw925KJM=; b=JONcElkgDZphNsx81je19YoaYkIWiMXMmwWkXlRXBRAoc2mTGHmpUt3PVXhzlE7zOk w1olp0FSMeHbZ2s2dF2YXwBndjBW4gZJCN3c/jAJu/pzOTbmIR0DCO1EDjSJFZOlAvzF 2rBrEVG+JhyXcRlhoCB9KoBC4NtQeSlqRz+QWoRUrUtE/YPl18UTVtkhfmH/Kim5Pt8r D/mzYJ5oWj8NXSB5608/xtHNfZJxs/V+2BBAil73jGDzejFoko6GhJbBFAxFPE4o6VG8 jCXzbIDMth9WiTWAyLVoR2dQ6zs62At73Hkqc629pl/9N7Yqgqwr8Le/0XPh8tecPF5H iaQQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=wBxMEIa7glrwrCrckfkFnYPIKZ191GVYDBXQw925KJM=; b=YgPcLRYrEhRtzo/IYlkulJZb9vAlIXqoldryQM+g2ifm7SxBpYTjRPHIoZmE9ZA0jg +booBS4TxNaseqSiSnfrX0UVGDDnUIVjs8j8eVBvq10RQapbP912lcL3ui8PfgX/7IWH 3IyOYSVH5/4Ct6feF4m9+jlxO7h/KCuHo73yddIP+hLnHBh1FdThC3iZF7HetVmVXXRH sm9B2D8lUmBPqcaktZqWUEBtKCI5r3Hx1LoECJGTw+Dlk2xHNtHbK4k8f7KVI2/ZaKxG TsW9HhCFe8a3wMScJ+Oh6xqS4MRgt3ZAMMh8J9afzZsWcQBCmZVS/SIelAhQnYYNR4/s h22g== X-Gm-Message-State: AOAM5322KniAF/W3sRjjfNvADKPA89jJGnbjZKyiW6nyrvFNinBvHI+W ioxjEnYhHJFJmMZ5U9TLKGpGbK5hANIeLw== X-Google-Smtp-Source: ABdhPJwDY51jaWk5OxFlqX2bG7+SQ3FCT87DAJ8k854xm7TgH2QAb1WKHYeT0fxHN9Xtcqg+lLJ3Vg== X-Received: by 2002:a05:6512:1513:b0:448:39c0:def0 with SMTP id bq19-20020a056512151300b0044839c0def0mr4888476lfb.469.1652486471683; Fri, 13 May 2022 17:01:11 -0700 (PDT) Received: from eriador.lan ([37.153.55.125]) by smtp.gmail.com with ESMTPSA id z2-20020a2e9b82000000b0024f3d1daeaesm626221lji.54.2022.05.13.17.01.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 13 May 2022 17:01:11 -0700 (PDT) From: Dmitry Baryshkov To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Mathieu Poirier , Rob Herring , Krzysztof Kozlowski Cc: linux-arm-msm@vger.kernel.org, linux-remoteproc@vger.kernel.org, devicetree@vger.kernel.org Subject: [PATCH 2/4] dt-bindings: remoteproc: qcom: pas: Add SDM660 CDSP PAS compatible Date: Sat, 14 May 2022 03:01:06 +0300 Message-Id: <20220514000108.3070363-3-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220514000108.3070363-1-dmitry.baryshkov@linaro.org> References: <20220514000108.3070363-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The Qualcomm SDM660 has the usual audio, compute, sensor and modem remoteprocs. Add compatible string and conditions for the compute and modem PAS. While we are at it, also add missing conditions for the audio PAS. Signed-off-by: Dmitry Baryshkov --- .../devicetree/bindings/remoteproc/qcom,adsp.yaml | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,adsp.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,adsp.yaml index a4409c398193..682df80d3a96 100644 --- a/Documentation/devicetree/bindings/remoteproc/qcom,adsp.yaml +++ b/Documentation/devicetree/bindings/remoteproc/qcom,adsp.yaml @@ -30,6 +30,7 @@ properties: - qcom,sc8180x-cdsp-pas - qcom,sc8180x-mpss-pas - qcom,sdm660-adsp-pas + - qcom,sdm660-cdsp-pas - qcom,sdm845-adsp-pas - qcom,sdm845-cdsp-pas - qcom,sdx55-mpss-pas @@ -169,6 +170,8 @@ allOf: - qcom,sc8180x-adsp-pas - qcom,sc8180x-cdsp-pas - qcom,sc8180x-mpss-pas + - qcom,sdm660-adsp-pas + - qcom,sdm660-cdsp-pas - qcom,sdm845-adsp-pas - qcom,sdm845-cdsp-pas - qcom,sm6350-adsp-pas @@ -284,6 +287,8 @@ allOf: - qcom,qcs404-wcss-pas - qcom,sc8180x-adsp-pas - qcom,sc8180x-cdsp-pas + - qcom,sdm660-adsp-pas + - qcom,sdm660-cdsp-pas - qcom,sdm845-adsp-pas - qcom,sdm845-cdsp-pas - qcom,sm6350-adsp-pas @@ -366,6 +371,8 @@ allOf: enum: - qcom,msm8996-adsp-pil - qcom,msm8998-adsp-pas + - qcom,sdm660-adsp-pas + - qcom,sdm660-cdsp-pas then: properties: power-domains: From patchwork Sat May 14 00:01:07 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 572884 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 895BEC433EF for ; Sat, 14 May 2022 01:14:57 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229527AbiENBO4 (ORCPT ); Fri, 13 May 2022 21:14:56 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45586 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229490AbiENBO4 (ORCPT ); Fri, 13 May 2022 21:14:56 -0400 Received: from mail-lj1-x22b.google.com (mail-lj1-x22b.google.com [IPv6:2a00:1450:4864:20::22b]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2727D3327D6 for ; Fri, 13 May 2022 17:47:06 -0700 (PDT) Received: by mail-lj1-x22b.google.com with SMTP id q130so12061238ljb.5 for ; Fri, 13 May 2022 17:47:06 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=CKMWbsqhUqRcv5cL/MZG/jSUCVckqZL5PQJo3104saM=; b=xuQE4hpHFKbh9ohIroypOCagmO2u8A3Uiiux75LNFnmK6FYx7Ul0jwhDPZVpHE1pDo vpc16MDWu+10GSRBWihg2SafCC4eX8XFxaRDyozDLQLvh1z1TGyP06foUOm1KjIG/Vy7 SRXDJx0cUMCfbZnL1hEqZyBUPvgoXYaI4FBPGffE8hIjefSkzucfYFDVN5/N4ADZRHlM PUfgf2l7/+yDklvXfBQ3RwAWbheedDfRn5Uc4V7hB+xOrfc7LNg7o32zwiQURYvMTiJm UFiCkd8wyIe9slXZLSO0nzcICb2NeJ702UbQuGnnNeha54Ee1vAVQYbrABiVmP0U731K VXTQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=CKMWbsqhUqRcv5cL/MZG/jSUCVckqZL5PQJo3104saM=; b=T7oSNdLFUGgZQ0yooxaOvYVoX0n0fBU8CFRvUmN0yDPNITKYI4ZRs/Q8IKjspUBoMb SXzxwKjm/EMWsfCp0zoRtFvx/ujOVzEncOxgLAzhvxoqnVOI2Xy/bZCrg87XOLM9VFu6 u1LSp6pOze0Dx6EquMdcYEPxotBqvVU2X2h6hew22e9cpEVABY3bXQIV7UcBJJjYeNDk YhZGrQfWlKEajyUlOe86PE+Uz7cN4rV9KNv40lMAi7ivysc8M6g9XmK2Op1DcygzBYYF gBQ7ALrqnLLuFoRkq+awuqvkZ5iXLvotkclM9vPywciBfs2kmkrZrj3FOdJDZuSGb/i6 rsMg== X-Gm-Message-State: AOAM533emfvtSm5HaqESsCSgqNY7CvX5rf5kWUQU7vrznd8amtm6Jj+9 lKGMvKxsx80uHNGs1cDoMYfUBCAkCHt/9A== X-Google-Smtp-Source: ABdhPJyW5xDxxvf+POhxEPJqCACn/yfmuA2FY9yVqaPnFutRliQSHZtoA+T5X7wNewa37Y9zdp5Puw== X-Received: by 2002:a05:6512:220e:b0:473:cd23:2c3f with SMTP id h14-20020a056512220e00b00473cd232c3fmr5210508lfu.349.1652486472437; Fri, 13 May 2022 17:01:12 -0700 (PDT) Received: from eriador.lan ([37.153.55.125]) by smtp.gmail.com with ESMTPSA id z2-20020a2e9b82000000b0024f3d1daeaesm626221lji.54.2022.05.13.17.01.11 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 13 May 2022 17:01:12 -0700 (PDT) From: Dmitry Baryshkov To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Mathieu Poirier , Rob Herring , Krzysztof Kozlowski Cc: linux-arm-msm@vger.kernel.org, linux-remoteproc@vger.kernel.org, devicetree@vger.kernel.org, Konrad Dybcio Subject: [PATCH 3/4] remoteproc: qcom: q6v5-mss: Add support for SDM630/636/660 MSS remoteproc Date: Sat, 14 May 2022 03:01:07 +0300 Message-Id: <20220514000108.3070363-4-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220514000108.3070363-1-dmitry.baryshkov@linaro.org> References: <20220514000108.3070363-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Konrad Dybcio This adds support for sdm630/636/660 modem subsystem remote processor. Signed-off-by: Konrad Dybcio [DB: fixed commit message, removed note about modem restarting regularly] Signed-off-by: Dmitry Baryshkov --- drivers/remoteproc/qcom_q6v5_mss.c | 111 +++++++++++++++++++++++++++++ 1 file changed, 111 insertions(+) diff --git a/drivers/remoteproc/qcom_q6v5_mss.c b/drivers/remoteproc/qcom_q6v5_mss.c index af217de75e4d..7a4cca30db8a 100644 --- a/drivers/remoteproc/qcom_q6v5_mss.c +++ b/drivers/remoteproc/qcom_q6v5_mss.c @@ -68,6 +68,7 @@ #define QDSP6SS_MEM_PWR_CTL 0x0B0 #define QDSP6V6SS_MEM_PWR_CTL 0x034 #define QDSP6SS_STRAP_ACC 0x110 +#define QDSP6V62SS_BHS_STATUS 0x0C4 /* AXI Halt Register Offsets */ #define AXI_HALTREQ_REG 0x0 @@ -117,6 +118,9 @@ #define QDSP6v56_CLAMP_QMC_MEM BIT(22) #define QDSP6SS_XO_CBCR 0x0038 #define QDSP6SS_ACC_OVERRIDE_VAL 0x20 +#define QDSP6v55_BHS_EN_REST_ACK BIT(0) + +#define BHS_CHECK_MAX_LOOPS (200) /* QDSP6v65 parameters */ #define QDSP6SS_CORE_CBCR 0x20 @@ -239,6 +243,7 @@ enum { MSS_MSM8998, MSS_SC7180, MSS_SC7280, + MSS_SDM660, MSS_SDM845, }; @@ -754,6 +759,79 @@ static int q6v5proc_reset(struct q6v5 *qproc) val |= readl(qproc->reg_base + mem_pwr_ctl); udelay(1); } + /* Remove word line clamp */ + val = readl(qproc->reg_base + QDSP6SS_PWR_CTL_REG); + val &= ~QDSP6v56_CLAMP_WL; + writel(val, qproc->reg_base + QDSP6SS_PWR_CTL_REG); + } else if (qproc->version == MSS_SDM660) { + int mem_pwr_ctl; + + /* Override the ACC value if required */ + writel(QDSP6SS_ACC_OVERRIDE_VAL, + qproc->reg_base + QDSP6SS_STRAP_ACC); + + /* Assert resets, stop core */ + val = readl(qproc->reg_base + QDSP6SS_RESET_REG); + val |= Q6SS_CORE_ARES | Q6SS_BUS_ARES_ENABLE | Q6SS_STOP_CORE; + writel(val, qproc->reg_base + QDSP6SS_RESET_REG); + + /* BHS require xo cbcr to be enabled */ + val = readl(qproc->reg_base + QDSP6SS_XO_CBCR); + val |= 1; + writel(val, qproc->reg_base + QDSP6SS_XO_CBCR); + + /* Enable power block headswitch and wait for it to stabilize */ + val = readl(qproc->reg_base + QDSP6SS_PWR_CTL_REG); + val |= QDSP6v56_BHS_ON; + writel(val, qproc->reg_base + QDSP6SS_PWR_CTL_REG); + mb(); + udelay(1); + + for (i = BHS_CHECK_MAX_LOOPS; i > 0; i--) { + if (readl_relaxed(qproc->reg_base + QDSP6V62SS_BHS_STATUS) + & QDSP6v55_BHS_EN_REST_ACK) + break; + udelay(1); + } + if (!i) { + pr_err("%s: BHS_EN_REST_ACK not set!\n", __func__); + return -ETIMEDOUT; + } + + /* Put LDO in bypass mode */ + val |= QDSP6v56_LDO_BYP; + writel(val, qproc->reg_base + QDSP6SS_PWR_CTL_REG); + + /* Remove QMC_MEM clamp */ + val &= ~QDSP6v56_CLAMP_QMC_MEM; + writel(val, qproc->reg_base + QDSP6SS_PWR_CTL_REG); + + /* Deassert QDSP6 compiler memory clamp */ + val = readl(qproc->reg_base + QDSP6SS_PWR_CTL_REG); + val &= ~QDSP6v56_CLAMP_QMC_MEM; + writel(val, qproc->reg_base + QDSP6SS_PWR_CTL_REG); + + /* Deassert memory peripheral sleep and L2 memory standby */ + val |= Q6SS_L2DATA_STBY_N | Q6SS_SLP_RET_N; + writel(val, qproc->reg_base + QDSP6SS_PWR_CTL_REG); + + /* Turn on L1, L2, ETB and JU memories 1 at a time */ + mem_pwr_ctl = QDSP6V6SS_MEM_PWR_CTL; + i = 29; + + val = readl(qproc->reg_base + mem_pwr_ctl); + for (; i >= 0; i--) { + val |= BIT(i); + writel(val, qproc->reg_base + mem_pwr_ctl); + /* + * Read back value to ensure the write is done then + * wait for 1us for both memory peripheral and data + * array to turn on. + */ + val |= readl(qproc->reg_base + mem_pwr_ctl); + udelay(1); + } + /* Remove word line clamp */ val = readl(qproc->reg_base + QDSP6SS_PWR_CTL_REG); val &= ~QDSP6v56_CLAMP_WL; @@ -785,6 +863,7 @@ static int q6v5proc_reset(struct q6v5 *qproc) val |= Q6SS_L2DATA_SLP_NRET_N_0; writel(val, qproc->reg_base + QDSP6SS_PWR_CTL_REG); } + /* Remove IO clamp */ val &= ~Q6SS_CLAMP_IO; writel(val, qproc->reg_base + QDSP6SS_PWR_CTL_REG); @@ -2098,6 +2177,37 @@ static const struct rproc_hexagon_res sc7280_mss = { .version = MSS_SC7280, }; +static const struct rproc_hexagon_res sdm660_mss = { + .hexagon_mba_image = "mba.mbn", + .proxy_clk_names = (char*[]){ + "xo", + "qdss", + NULL + }, + .active_clk_names = (char*[]){ + "iface", + "bus", + "gpll0_mss", + "mnoc_axi", + "snoc_axi", + "mem", + NULL + }, + .proxy_pd_names = (char*[]){ + "cx", + "mx", + NULL + }, + .need_mem_protection = true, + .has_alt_reset = false, + .has_mba_logs = false, + .has_spare_reg = false, + .has_qaccept_regs = false, + .has_ext_cntl_regs = false, + .has_vq6 = false, + .version = MSS_SDM660, +}; + static const struct rproc_hexagon_res sdm845_mss = { .hexagon_mba_image = "mba.mbn", .proxy_clk_names = (char*[]){ @@ -2304,6 +2414,7 @@ static const struct of_device_id q6v5_of_match[] = { { .compatible = "qcom,msm8998-mss-pil", .data = &msm8998_mss}, { .compatible = "qcom,sc7180-mss-pil", .data = &sc7180_mss}, { .compatible = "qcom,sc7280-mss-pil", .data = &sc7280_mss}, + { .compatible = "qcom,sdm660-mss-pil", .data = &sdm660_mss}, { .compatible = "qcom,sdm845-mss-pil", .data = &sdm845_mss}, { }, }; From patchwork Sat May 14 00:01:08 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 572642 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2BC45C433F5 for ; Sat, 14 May 2022 01:14:07 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229526AbiENBOG (ORCPT ); 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Fri, 13 May 2022 17:01:12 -0700 (PDT) From: Dmitry Baryshkov To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Mathieu Poirier , Rob Herring , Krzysztof Kozlowski Cc: linux-arm-msm@vger.kernel.org, linux-remoteproc@vger.kernel.org, devicetree@vger.kernel.org Subject: [PATCH 4/4] remoteproc: qcom: pas: Add SDM660 CDSP PAS support Date: Sat, 14 May 2022 03:01:08 +0300 Message-Id: <20220514000108.3070363-5-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220514000108.3070363-1-dmitry.baryshkov@linaro.org> References: <20220514000108.3070363-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add compatible string for the CDSP found on SDM660 platform. The resources needed matches those of QCS404, so its desc is reused. Signed-off-by: Dmitry Baryshkov --- drivers/remoteproc/qcom_q6v5_pas.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/remoteproc/qcom_q6v5_pas.c b/drivers/remoteproc/qcom_q6v5_pas.c index 1ae47cc153e5..39c9c56e8de9 100644 --- a/drivers/remoteproc/qcom_q6v5_pas.c +++ b/drivers/remoteproc/qcom_q6v5_pas.c @@ -862,6 +862,7 @@ static const struct of_device_id adsp_of_match[] = { { .compatible = "qcom,sc8180x-cdsp-pas", .data = &sm8150_cdsp_resource}, { .compatible = "qcom,sc8180x-mpss-pas", .data = &sc8180x_mpss_resource}, { .compatible = "qcom,sdm660-adsp-pas", .data = &adsp_resource_init}, + { .compatible = "qcom,sdm660-cdsp-pas", .data = &cdsp_resource_init}, { .compatible = "qcom,sdm845-adsp-pas", .data = &sdm845_adsp_resource_init}, { .compatible = "qcom,sdm845-cdsp-pas", .data = &sdm845_cdsp_resource_init}, { .compatible = "qcom,sdx55-mpss-pas", .data = &sdx55_mpss_resource},