From patchwork Mon May 23 07:00:56 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sibi Sankar X-Patchwork-Id: 575593 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C42EFC433F5 for ; Mon, 23 May 2022 07:46:50 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230446AbiEWHqs (ORCPT ); Mon, 23 May 2022 03:46:48 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59826 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230456AbiEWHqn (ORCPT ); Mon, 23 May 2022 03:46:43 -0400 Received: from alexa-out.qualcomm.com (alexa-out.qualcomm.com [129.46.98.28]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7104B18B13; Mon, 23 May 2022 00:46:40 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; i=@quicinc.com; q=dns/txt; s=qcdkim; t=1653292001; x=1684828001; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version; bh=jkdxHplSLsDnOsD55YcH0JiIDuH9zEfIVpFV2KpIO/k=; b=Z7YPNuz4DGKmYuWNLAjwoK6Q3JOGDSnDj0O1F1d966VBi4WVzEVgfdap XQra6KCcjyVPkQN722hJ90t/9TxTM5cPWH6/h/pg22xBYuEkApNRsxFvW TwsFqcdBvm2Ia93T2u4a9CHllSbtyHEkLOHWm6qlpDjgDWRQdDuw7yjun c=; Received: from ironmsg07-lv.qualcomm.com ([10.47.202.151]) by alexa-out.qualcomm.com with ESMTP; 23 May 2022 00:01:20 -0700 X-QCInternal: smtphost Received: from nasanex01c.na.qualcomm.com ([10.47.97.222]) by ironmsg07-lv.qualcomm.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 23 May 2022 00:01:19 -0700 Received: from nalasex01a.na.qualcomm.com (10.47.209.196) by nasanex01c.na.qualcomm.com (10.47.97.222) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.22; Mon, 23 May 2022 00:01:19 -0700 Received: from blr-ubuntu-87.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.22; Mon, 23 May 2022 00:01:16 -0700 From: Sibi Sankar To: CC: , , , , , , , , Sibi Sankar Subject: [RFC 1/3] dt-bindings: firmware: qcom-scm: Add interconnects property Date: Mon, 23 May 2022 12:30:56 +0530 Message-ID: <1653289258-17699-2-git-send-email-quic_sibis@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1653289258-17699-1-git-send-email-quic_sibis@quicinc.com> References: <1653289258-17699-1-git-send-email-quic_sibis@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01a.na.qualcomm.com (10.47.209.196) Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add interconnects as an optional property for SM8450 SoCs. Signed-off-by: Sibi Sankar Acked-by: Rob Herring --- Since the interconnect requirements could either be specified in the individual remoteprocs or directly in the scm interface, will perform the yaml conversion in the next re-spin based on the consensus. Documentation/devicetree/bindings/firmware/qcom,scm.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/firmware/qcom,scm.txt b/Documentation/devicetree/bindings/firmware/qcom,scm.txt index 0f4e5ab26477..4de3e055bc94 100644 --- a/Documentation/devicetree/bindings/firmware/qcom,scm.txt +++ b/Documentation/devicetree/bindings/firmware/qcom,scm.txt @@ -43,6 +43,7 @@ Required properties: clock and "bus" for the bus clock per the requirements of the compatible. - qcom,dload-mode: phandle to the TCSR hardware block and offset of the download mode control register (optional) +- interconnects: Specifies the bandwidth requirements of the SCM interface (optional) Example for MSM8916: From patchwork Mon May 23 07:00:58 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sibi Sankar X-Patchwork-Id: 575595 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4CB87C433EF for ; Mon, 23 May 2022 07:46:36 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231255AbiEWHqe (ORCPT ); Mon, 23 May 2022 03:46:34 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59274 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230489AbiEWHqd (ORCPT ); Mon, 23 May 2022 03:46:33 -0400 Received: from alexa-out-sd-01.qualcomm.com (alexa-out-sd-01.qualcomm.com [199.106.114.38]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id DA293319; Mon, 23 May 2022 00:46:31 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; i=@quicinc.com; q=dns/txt; s=qcdkim; t=1653291993; x=1684827993; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version; bh=6g634P+Cf4Pshw57qC44rMV82hE+PJG/SPHu3T6JgF0=; b=sEUMkIYQvquw7iQ2NvBqdzUOFALU0t/T9vyaNMzdBxwJwG60dasDiKUx AyisKshJRwXSNg0P7AjYwrmjyoHzmuer7nKpcj8p1kWv04VmpMhp012Uc rYllbn3K05yfJkX9k4ketUaD8jjiAsRFpfrI4Mdcd5bKuQJFTHkLYDpD0 g=; Received: from unknown (HELO ironmsg02-sd.qualcomm.com) ([10.53.140.142]) by alexa-out-sd-01.qualcomm.com with ESMTP; 23 May 2022 00:01:27 -0700 X-QCInternal: smtphost Received: from nasanex01c.na.qualcomm.com ([10.47.97.222]) by ironmsg02-sd.qualcomm.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 23 May 2022 00:01:27 -0700 Received: from nalasex01a.na.qualcomm.com (10.47.209.196) by nasanex01c.na.qualcomm.com (10.47.97.222) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.22; Mon, 23 May 2022 00:01:27 -0700 Received: from blr-ubuntu-87.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.22; Mon, 23 May 2022 00:01:23 -0700 From: Sibi Sankar To: CC: , , , , , , , , Sibi Sankar Subject: [RFC 3/3] arm64: dts: qcom: sm8450: Add interconnect requirements for SCM Date: Mon, 23 May 2022 12:30:58 +0530 Message-ID: <1653289258-17699-4-git-send-email-quic_sibis@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1653289258-17699-1-git-send-email-quic_sibis@quicinc.com> References: <1653289258-17699-1-git-send-email-quic_sibis@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01a.na.qualcomm.com (10.47.209.196) Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add interconnects requirements for the SCM interface on SM8450 SoCs. Signed-off-by: Sibi Sankar --- arch/arm64/boot/dts/qcom/sm8450.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi index 4e796f27d6fc..6fdbad34d012 100644 --- a/arch/arm64/boot/dts/qcom/sm8450.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi @@ -258,6 +258,7 @@ firmware { scm: scm { compatible = "qcom,scm-sm8450", "qcom,scm"; + interconnects = <&aggre2_noc MASTER_CRYPTO 0 &mc_virt SLAVE_EBI1 0>; #reset-cells = <1>; }; };