From patchwork Thu May 26 11:42:04 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Viresh Kumar X-Patchwork-Id: 576266 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 60057C433F5 for ; Thu, 26 May 2022 11:43:53 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1347203AbiEZLnv (ORCPT ); Thu, 26 May 2022 07:43:51 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54324 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1347167AbiEZLnu (ORCPT ); Thu, 26 May 2022 07:43:50 -0400 Received: from mail-pf1-x42d.google.com (mail-pf1-x42d.google.com [IPv6:2607:f8b0:4864:20::42d]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 612DA3EBAA for ; Thu, 26 May 2022 04:43:41 -0700 (PDT) Received: by mail-pf1-x42d.google.com with SMTP id c14so1505039pfn.2 for ; Thu, 26 May 2022 04:43:41 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=C1aSxoXPeQBXlB3qL18aLGtP/jLnJcgk49cmVEjZDqY=; b=kXLq05FZBLbJAaTe80aq29sNfqJD7IT3RIS7chlu+dkCEmzO1U1sbIbbTSt+r7eiRK pHRIZV78aRurYDHxEDxC87/tyCowtiuh3J1q8BO0WuEGu8ddjIXMdRcikwRMb7I7O7og s10o19L/EiZalAkrXMbbgaB7gwtLAGOphCpO7gcXjV6rK9xV7moRearJ5j2DlpWNTqP4 tlYCqMIUBFYvIURsAxHBrlTPTsdHD5jjuIe8Lg2BhfBt2M9FE6nbZFrpVIU66Bj1TmJQ He78mg87wqSE6yb8ml71Tra0HXEXB2NM4YlUIv9wNUm3JfbzQk2DMYq0lD8aC7BFbj0h t3hg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=C1aSxoXPeQBXlB3qL18aLGtP/jLnJcgk49cmVEjZDqY=; b=cGELQupZYvHP33jhqDTM1zvDZscxQiBflqx+G43Sv/XFFsDGQan3mviTWcCYPTzdAX uYe2zBSTog3xpfqHZoLxSHlZcfJaI+/to7eoez6MnH0b7zy7gJOK4QpR6OiuynNb/Zjy cS+nB1P9ZodXnh2KAFSGx5oCwyIRMwCaFmYybyjGZb35AnDEQiOFIbk8OjRBvIW6OaUS HA12+rhPU8qDBCh6sY3mwXtdiG67YGf+TWKlpu5NtPw8MeYVjOqakoythwVl24aElzC3 XB9wd/xo5lyCcMOi9yFG4c7jeMnHiQQHHp710N5awAdU7x/Z7d9ont/ZpjmRd7ko1EnK 4YGg== X-Gm-Message-State: AOAM530SS9+uN5Vb4LWFXO03NTuIiO0KSdxK/N1hcSxmDylpYE14DRKc eZ4ScuJ2fXfZRN2B6zuk2cavDg== X-Google-Smtp-Source: ABdhPJxWRgVUAVoXBqPYan+UY9BAEdKbGzQtd1Y+4MoI7hCORnXl47xbN0MT2uthDuMSymRjvtUyQw== X-Received: by 2002:a62:1b06:0:b0:518:1649:bb6d with SMTP id b6-20020a621b06000000b005181649bb6dmr38679459pfb.25.1653565420831; Thu, 26 May 2022 04:43:40 -0700 (PDT) Received: from localhost ([122.162.234.2]) by smtp.gmail.com with ESMTPSA id o20-20020a170903301400b0015e8d4eb234sm1280322pla.126.2022.05.26.04.43.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 26 May 2022 04:43:40 -0700 (PDT) From: Viresh Kumar To: Andy Gross , Bjorn Andersson , Ilia Lin , "Rafael J. Wysocki" , Viresh Kumar Cc: linux-pm@vger.kernel.org, Vincent Guittot , Rafael Wysocki , Stephen Boyd , Nishanth Menon , Krzysztof Kozlowski , linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 05/31] cpufreq: qcom-nvmem: Migrate to dev_pm_opp_set_config() Date: Thu, 26 May 2022 17:12:04 +0530 Message-Id: X-Mailer: git-send-email 2.31.1.272.g89b43f80a514 In-Reply-To: References: MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org The OPP core now provides a unified API for setting all configuration types, i.e. dev_pm_opp_set_config(). Lets start using it. Signed-off-by: Viresh Kumar --- drivers/cpufreq/qcom-cpufreq-nvmem.c | 107 ++++++++------------------- 1 file changed, 29 insertions(+), 78 deletions(-) diff --git a/drivers/cpufreq/qcom-cpufreq-nvmem.c b/drivers/cpufreq/qcom-cpufreq-nvmem.c index 6dfa86971a75..4166b8d93b70 100644 --- a/drivers/cpufreq/qcom-cpufreq-nvmem.c +++ b/drivers/cpufreq/qcom-cpufreq-nvmem.c @@ -55,9 +55,7 @@ struct qcom_cpufreq_match_data { }; struct qcom_cpufreq_drv { - struct opp_table **names_opp_tables; - struct opp_table **hw_opp_tables; - struct opp_table **genpd_opp_tables; + struct opp_table **opp_tables; u32 versions; const struct qcom_cpufreq_match_data *data; }; @@ -315,72 +313,44 @@ static int qcom_cpufreq_probe(struct platform_device *pdev) } of_node_put(np); - drv->names_opp_tables = kcalloc(num_possible_cpus(), - sizeof(*drv->names_opp_tables), + drv->opp_tables = kcalloc(num_possible_cpus(), + sizeof(*drv->opp_tables), GFP_KERNEL); - if (!drv->names_opp_tables) { + if (!drv->opp_tables) { ret = -ENOMEM; goto free_drv; } - drv->hw_opp_tables = kcalloc(num_possible_cpus(), - sizeof(*drv->hw_opp_tables), - GFP_KERNEL); - if (!drv->hw_opp_tables) { - ret = -ENOMEM; - goto free_opp_names; - } - - drv->genpd_opp_tables = kcalloc(num_possible_cpus(), - sizeof(*drv->genpd_opp_tables), - GFP_KERNEL); - if (!drv->genpd_opp_tables) { - ret = -ENOMEM; - goto free_opp; - } for_each_possible_cpu(cpu) { + struct dev_pm_opp_config config = { + .supported_hw = NULL, + }; + cpu_dev = get_cpu_device(cpu); if (NULL == cpu_dev) { ret = -ENODEV; - goto free_genpd_opp; + goto free_opp; } if (drv->data->get_version) { + config.supported_hw = &drv->versions; + config.supported_hw_count = 1; - if (pvs_name) { - drv->names_opp_tables[cpu] = dev_pm_opp_set_prop_name( - cpu_dev, - pvs_name); - if (IS_ERR(drv->names_opp_tables[cpu])) { - ret = PTR_ERR(drv->names_opp_tables[cpu]); - dev_err(cpu_dev, "Failed to add OPP name %s\n", - pvs_name); - goto free_opp; - } - } - - drv->hw_opp_tables[cpu] = dev_pm_opp_set_supported_hw( - cpu_dev, &drv->versions, 1); - if (IS_ERR(drv->hw_opp_tables[cpu])) { - ret = PTR_ERR(drv->hw_opp_tables[cpu]); - dev_err(cpu_dev, - "Failed to set supported hardware\n"); - goto free_genpd_opp; - } + if (pvs_name) + config.prop_name = pvs_name; } if (drv->data->genpd_names) { - drv->genpd_opp_tables[cpu] = - dev_pm_opp_attach_genpd(cpu_dev, - drv->data->genpd_names, - NULL); - if (IS_ERR(drv->genpd_opp_tables[cpu])) { - ret = PTR_ERR(drv->genpd_opp_tables[cpu]); - if (ret != -EPROBE_DEFER) - dev_err(cpu_dev, - "Could not attach to pm_domain: %d\n", - ret); - goto free_genpd_opp; + config.genpd_names = drv->data->genpd_names; + config.virt_devs = NULL; + } + + if (config.supported_hw || config.genpd_names) { + drv->opp_tables[cpu] = dev_pm_opp_set_config(cpu_dev, &config); + if (IS_ERR(drv->opp_tables[cpu])) { + ret = PTR_ERR(drv->opp_tables[cpu]); + dev_err(cpu_dev, "Failed to set OPP config\n"); + goto free_opp; } } } @@ -395,27 +365,13 @@ static int qcom_cpufreq_probe(struct platform_device *pdev) ret = PTR_ERR(cpufreq_dt_pdev); dev_err(cpu_dev, "Failed to register platform device\n"); -free_genpd_opp: - for_each_possible_cpu(cpu) { - if (IS_ERR(drv->genpd_opp_tables[cpu])) - break; - dev_pm_opp_detach_genpd(drv->genpd_opp_tables[cpu]); - } - kfree(drv->genpd_opp_tables); free_opp: for_each_possible_cpu(cpu) { - if (IS_ERR(drv->names_opp_tables[cpu])) + if (IS_ERR(drv->opp_tables[cpu])) break; - dev_pm_opp_put_prop_name(drv->names_opp_tables[cpu]); + dev_pm_opp_clear_config(drv->opp_tables[cpu]); } - for_each_possible_cpu(cpu) { - if (IS_ERR(drv->hw_opp_tables[cpu])) - break; - dev_pm_opp_put_supported_hw(drv->hw_opp_tables[cpu]); - } - kfree(drv->hw_opp_tables); -free_opp_names: - kfree(drv->names_opp_tables); + kfree(drv->opp_tables); free_drv: kfree(drv); @@ -429,15 +385,10 @@ static int qcom_cpufreq_remove(struct platform_device *pdev) platform_device_unregister(cpufreq_dt_pdev); - for_each_possible_cpu(cpu) { - dev_pm_opp_put_supported_hw(drv->names_opp_tables[cpu]); - dev_pm_opp_put_supported_hw(drv->hw_opp_tables[cpu]); - dev_pm_opp_detach_genpd(drv->genpd_opp_tables[cpu]); - } + for_each_possible_cpu(cpu) + dev_pm_opp_clear_config(drv->opp_tables[cpu]); - kfree(drv->names_opp_tables); - kfree(drv->hw_opp_tables); - kfree(drv->genpd_opp_tables); + kfree(drv->opp_tables); kfree(drv); return 0; From patchwork Thu May 26 11:42:13 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Viresh Kumar X-Patchwork-Id: 576939 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0A60AC433FE for ; Thu, 26 May 2022 11:44:41 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1347297AbiEZLoj (ORCPT ); Thu, 26 May 2022 07:44:39 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57728 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1347219AbiEZLoW (ORCPT ); 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Thu, 26 May 2022 04:44:09 -0700 (PDT) From: Viresh Kumar To: Rob Clark , Sean Paul , Abhinav Kumar Cc: Viresh Kumar , linux-pm@vger.kernel.org, Vincent Guittot , Rafael Wysocki , Stephen Boyd , Nishanth Menon , Krzysztof Kozlowski , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, linux-kernel@vger.kernel.org Subject: [PATCH 14/31] drm/msm: Migrate to dev_pm_opp_set_config() Date: Thu, 26 May 2022 17:12:13 +0530 Message-Id: X-Mailer: git-send-email 2.31.1.272.g89b43f80a514 In-Reply-To: References: MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org The OPP core now provides a unified API for setting all configuration types, i.e. dev_pm_opp_set_config(). Lets start using it. Signed-off-by: Viresh Kumar --- drivers/gpu/drm/msm/adreno/a5xx_gpu.c | 8 ++++++-- drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 10 +++++----- drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 5 ++++- drivers/gpu/drm/msm/dp/dp_ctrl.c | 5 ++++- drivers/gpu/drm/msm/dsi/dsi_host.c | 5 ++++- 5 files changed, 23 insertions(+), 10 deletions(-) diff --git a/drivers/gpu/drm/msm/adreno/a5xx_gpu.c b/drivers/gpu/drm/msm/adreno/a5xx_gpu.c index 407f50a15faa..c39fb085a762 100644 --- a/drivers/gpu/drm/msm/adreno/a5xx_gpu.c +++ b/drivers/gpu/drm/msm/adreno/a5xx_gpu.c @@ -1728,10 +1728,14 @@ static void check_speed_bin(struct device *dev) { struct nvmem_cell *cell; u32 val; + struct dev_pm_opp_config config = { + .supported_hw = &val, + .supported_hw_count = 1, + }; /* * If the OPP table specifies a opp-supported-hw property then we have - * to set something with dev_pm_opp_set_supported_hw() or the table + * to set something with dev_pm_opp_set_config() or the table * doesn't get populated so pick an arbitrary value that should * ensure the default frequencies are selected but not conflict with any * actual bins @@ -1753,7 +1757,7 @@ static void check_speed_bin(struct device *dev) nvmem_cell_put(cell); } - devm_pm_opp_set_supported_hw(dev, &val, 1); + devm_pm_opp_set_config(dev, &config); } struct msm_gpu *a5xx_gpu_init(struct drm_device *dev) diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c index 83c31b2ad865..ddb2812b1ff7 100644 --- a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c +++ b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c @@ -1805,6 +1805,10 @@ static int a6xx_set_supported_hw(struct device *dev, struct adreno_rev rev) u32 supp_hw = UINT_MAX; u32 speedbin; int ret; + struct dev_pm_opp_config config = { + .supported_hw = &supp_hw, + .supported_hw_count = 1, + }; ret = adreno_read_speedbin(dev, &speedbin); /* @@ -1823,11 +1827,7 @@ static int a6xx_set_supported_hw(struct device *dev, struct adreno_rev rev) supp_hw = fuse_to_supp_hw(dev, rev, speedbin); done: - ret = devm_pm_opp_set_supported_hw(dev, &supp_hw, 1); - if (ret) - return ret; - - return 0; + return devm_pm_opp_set_config(dev, &config); } static const struct adreno_gpu_funcs funcs = { diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c index e29796c4f27b..43f943fdfde5 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c @@ -1203,12 +1203,15 @@ static int dpu_bind(struct device *dev, struct device *master, void *data) struct drm_device *ddev = priv->dev; struct dpu_kms *dpu_kms; int ret = 0; + struct dev_pm_opp_config config = { + .clk_name = "core", + }; dpu_kms = devm_kzalloc(&pdev->dev, sizeof(*dpu_kms), GFP_KERNEL); if (!dpu_kms) return -ENOMEM; - ret = devm_pm_opp_set_clkname(dev, "core"); + ret = devm_pm_opp_set_config(dev, &config); if (ret) return ret; /* OPP table is optional */ diff --git a/drivers/gpu/drm/msm/dp/dp_ctrl.c b/drivers/gpu/drm/msm/dp/dp_ctrl.c index 53568567e05b..54bdb33eef45 100644 --- a/drivers/gpu/drm/msm/dp/dp_ctrl.c +++ b/drivers/gpu/drm/msm/dp/dp_ctrl.c @@ -1974,6 +1974,9 @@ struct dp_ctrl *dp_ctrl_get(struct device *dev, struct dp_link *link, { struct dp_ctrl_private *ctrl; int ret; + struct dev_pm_opp_config config = { + .clk_name = "ctrl_link", + }; if (!dev || !panel || !aux || !link || !catalog) { @@ -1987,7 +1990,7 @@ struct dp_ctrl *dp_ctrl_get(struct device *dev, struct dp_link *link, return ERR_PTR(-ENOMEM); } - ret = devm_pm_opp_set_clkname(dev, "ctrl_link"); + ret = devm_pm_opp_set_config(dev, &config); if (ret) { dev_err(dev, "invalid DP OPP table in device tree\n"); /* caller do PTR_ERR(opp_table) */ diff --git a/drivers/gpu/drm/msm/dsi/dsi_host.c b/drivers/gpu/drm/msm/dsi/dsi_host.c index d51e70fab93d..7d5b027629d2 100644 --- a/drivers/gpu/drm/msm/dsi/dsi_host.c +++ b/drivers/gpu/drm/msm/dsi/dsi_host.c @@ -1801,6 +1801,9 @@ int msm_dsi_host_init(struct msm_dsi *msm_dsi) struct msm_dsi_host *msm_host = NULL; struct platform_device *pdev = msm_dsi->pdev; int ret; + struct dev_pm_opp_config config = { + .clk_name = "byte", + }; msm_host = devm_kzalloc(&pdev->dev, sizeof(*msm_host), GFP_KERNEL); if (!msm_host) { @@ -1862,7 +1865,7 @@ int msm_dsi_host_init(struct msm_dsi *msm_dsi) goto fail; } - ret = devm_pm_opp_set_clkname(&pdev->dev, "byte"); + ret = devm_pm_opp_set_config(&pdev->dev, &config); if (ret) return ret; /* OPP table is optional */ From patchwork Thu May 26 11:42:16 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Viresh Kumar X-Patchwork-Id: 576937 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 50131C4332F for ; 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Thu, 26 May 2022 04:44:18 -0700 (PDT) From: Viresh Kumar To: Stanimir Varbanov , Andy Gross , Bjorn Andersson Cc: Viresh Kumar , linux-pm@vger.kernel.org, Vincent Guittot , Rafael Wysocki , Stephen Boyd , Nishanth Menon , Krzysztof Kozlowski , linux-media@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 17/31] media: venus: Migrate to dev_pm_opp_set_config() Date: Thu, 26 May 2022 17:12:16 +0530 Message-Id: <1f243f35b02d53fde5bf730a7da1a789186f62b1.1653564321.git.viresh.kumar@linaro.org> X-Mailer: git-send-email 2.31.1.272.g89b43f80a514 In-Reply-To: References: MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org The OPP core now provides a unified API for setting all configuration types, i.e. dev_pm_opp_set_config(). Lets start using it. Signed-off-by: Viresh Kumar --- drivers/media/platform/qcom/venus/pm_helpers.c | 16 +++++++++++++--- 1 file changed, 13 insertions(+), 3 deletions(-) diff --git a/drivers/media/platform/qcom/venus/pm_helpers.c b/drivers/media/platform/qcom/venus/pm_helpers.c index cb48c5ff3dee..16f8849896a9 100644 --- a/drivers/media/platform/qcom/venus/pm_helpers.c +++ b/drivers/media/platform/qcom/venus/pm_helpers.c @@ -294,12 +294,15 @@ static int load_scale_v1(struct venus_inst *inst) static int core_get_v1(struct venus_core *core) { int ret; + struct dev_pm_opp_config config = { + .clk_name = "core", + }; ret = core_clks_get(core); if (ret) return ret; - ret = devm_pm_opp_set_clkname(core->dev, "core"); + ret = devm_pm_opp_set_config(core->dev, &config); if (ret) return ret; @@ -862,6 +865,10 @@ static int vcodec_domains_get(struct venus_core *core) const struct venus_resources *res = core->res; struct device *pd; unsigned int i; + struct dev_pm_opp_config config = { + .genpd_names = res->opp_pmdomain, + .virt_devs = &opp_virt_dev, + }; if (!res->vcodec_pmdomains_num) goto skip_pmdomains; @@ -879,7 +886,7 @@ static int vcodec_domains_get(struct venus_core *core) return 0; /* Attach the power domain for setting performance state */ - ret = devm_pm_opp_attach_genpd(dev, res->opp_pmdomain, &opp_virt_dev); + ret = devm_pm_opp_set_config(dev, &config); if (ret) goto opp_attach_err; @@ -978,6 +985,9 @@ static int core_get_v4(struct venus_core *core) struct device *dev = core->dev; const struct venus_resources *res = core->res; int ret; + struct dev_pm_opp_config config = { + .clk_name = "core", + }; ret = core_clks_get(core); if (ret) @@ -1003,7 +1013,7 @@ static int core_get_v4(struct venus_core *core) if (legacy_binding) return 0; - ret = devm_pm_opp_set_clkname(dev, "core"); + ret = devm_pm_opp_set_config(dev, &config); if (ret) return ret; From patchwork Thu May 26 11:42:18 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Viresh Kumar X-Patchwork-Id: 576264 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 05A3FC4332F for ; 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Thu, 26 May 2022 04:44:25 -0700 (PDT) From: Viresh Kumar To: Andy Gross , Bjorn Andersson , Adrian Hunter , Ulf Hansson Cc: Viresh Kumar , linux-pm@vger.kernel.org, Vincent Guittot , Rafael Wysocki , Stephen Boyd , Nishanth Menon , Krzysztof Kozlowski , linux-mmc@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 19/31] mmc: sdhci-msm: Migrate to dev_pm_opp_set_config() Date: Thu, 26 May 2022 17:12:18 +0530 Message-Id: <80314068d96eb53e0d9838736415b96015803844.1653564321.git.viresh.kumar@linaro.org> X-Mailer: git-send-email 2.31.1.272.g89b43f80a514 In-Reply-To: References: MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org The OPP core now provides a unified API for setting all configuration types, i.e. dev_pm_opp_set_config(). Lets start using it. Signed-off-by: Viresh Kumar --- drivers/mmc/host/sdhci-msm.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/drivers/mmc/host/sdhci-msm.c b/drivers/mmc/host/sdhci-msm.c index 50c71e0ba5e4..994f3f0231f7 100644 --- a/drivers/mmc/host/sdhci-msm.c +++ b/drivers/mmc/host/sdhci-msm.c @@ -2496,6 +2496,9 @@ static int sdhci_msm_probe(struct platform_device *pdev) const struct sdhci_msm_offset *msm_offset; const struct sdhci_msm_variant_info *var_info; struct device_node *node = pdev->dev.of_node; + struct dev_pm_opp_config opp_config = { + .clk_name = "core", + }; host = sdhci_pltfm_init(pdev, &sdhci_msm_pdata, sizeof(*msm_host)); if (IS_ERR(host)) @@ -2564,7 +2567,7 @@ static int sdhci_msm_probe(struct platform_device *pdev) if (ret) goto bus_clk_disable; - ret = devm_pm_opp_set_clkname(&pdev->dev, "core"); + ret = devm_pm_opp_set_config(&pdev->dev, &opp_config); if (ret) goto bus_clk_disable; From patchwork Thu May 26 11:42:22 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Viresh Kumar X-Patchwork-Id: 576265 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 78DC0C433F5 for ; Thu, 26 May 2022 11:45:08 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238055AbiEZLpF (ORCPT ); Thu, 26 May 2022 07:45:05 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59120 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1347330AbiEZLoy (ORCPT ); Thu, 26 May 2022 07:44:54 -0400 Received: from mail-pg1-x529.google.com (mail-pg1-x529.google.com [IPv6:2607:f8b0:4864:20::529]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id DA083424AA for ; Thu, 26 May 2022 04:44:38 -0700 (PDT) Received: by mail-pg1-x529.google.com with SMTP id d129so1121102pgc.9 for ; Thu, 26 May 2022 04:44:38 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=sbZ69EBj+CLxahhE5rw5q494M5c4cxGAZWpQHb2IOAc=; b=CYrVjUIuWd0zfRIJSi8HO31AD9AB7Z/b4ZGo/R1bvdZBPaGfQHMVsp9no9MCPRLZSu Rx1UKPigFvdWFI3gG/HlfhuEFFhdBc8tINuYmFZ2So48AD+5LQVHGJMBlzObMv8wxjVS yxTShzVoWieKyQP/hK9o+Iv3sCcjl67EpSLJ4d2H1lHxljTM5NdTslfMlya8H+j/wS4D 5jzP9DwrV/aPT9HOxUtxo26dGuXTskGfoJK1LPz5Wf7KLcG8wn5snDKw2cATPMw3anCP 5FnfmuUON+mH1UD1VSlbTe1asCjQWGQZLQNt973KfqWmp4KKOCgcij5STXxI/EUUQ76d 2vrg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=sbZ69EBj+CLxahhE5rw5q494M5c4cxGAZWpQHb2IOAc=; b=mvelmeWSsC2XfiaAOplJkKwh80hiVsISqgp9oZyZ/bdcRz1jg0hl7azvivYvKuB9td DNPvfVN52ulPpS3Znjq6EkdnD/e/r6hqOXviBO7iQx43GjGKx1PEz9te6hK5TkFqagRG AVupSY794ElP9uybVjfTG5eww9LZuawtSx4Sv0VVXsE1nOU3t4BQluzlPUhUEOneIPz2 I5b2zVYj6RN9UxMpTcOTNKB3ppF0ZDDcvrT5fjhPtGcodwvkVfZk7Qm8inaylEITlnhv sQ4Xc7mwdYlZsEDK2T+CP0ofPBHYiheK1pk86747+rjdTr2nqtEnp/z7apWyieeviH6E yB7g== X-Gm-Message-State: AOAM5310fDxXt0fyvZv0UjYrf7ZEtYkvxuL1nkTBbJ0SSC/IuqUP2UJi Y2SxbyHJB/VcJV8fEJ+3vVzaIbR0P8IluA== X-Google-Smtp-Source: ABdhPJyI36Xh7JTRb61yxLCPh2nssAdsbatU80ZBS3PRQ6y4gvF9EpP1vtaAGYqIfWJADbOhRY1hSw== X-Received: by 2002:a05:6a00:ad2:b0:4f1:2734:a3d9 with SMTP id c18-20020a056a000ad200b004f12734a3d9mr38397886pfl.61.1653565478103; Thu, 26 May 2022 04:44:38 -0700 (PDT) Received: from localhost ([122.162.234.2]) by smtp.gmail.com with ESMTPSA id d4-20020a170902c18400b001637d72b314sm1231655pld.10.2022.05.26.04.44.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 26 May 2022 04:44:37 -0700 (PDT) From: Viresh Kumar To: Andy Gross , Bjorn Andersson , Mark Brown Cc: Viresh Kumar , linux-pm@vger.kernel.org, Vincent Guittot , Rafael Wysocki , Stephen Boyd , Nishanth Menon , Krzysztof Kozlowski , linux-arm-msm@vger.kernel.org, linux-spi@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 23/31] spi: qcom: Migrate to dev_pm_opp_set_config() Date: Thu, 26 May 2022 17:12:22 +0530 Message-Id: <09fde85449e0e189572ea847e86148943aff8b2e.1653564321.git.viresh.kumar@linaro.org> X-Mailer: git-send-email 2.31.1.272.g89b43f80a514 In-Reply-To: References: MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org The OPP core now provides a unified API for setting all configuration types, i.e. dev_pm_opp_set_config(). Lets start using it. Signed-off-by: Viresh Kumar --- drivers/spi/spi-geni-qcom.c | 5 ++++- drivers/spi/spi-qcom-qspi.c | 5 ++++- 2 files changed, 8 insertions(+), 2 deletions(-) diff --git a/drivers/spi/spi-geni-qcom.c b/drivers/spi/spi-geni-qcom.c index 4e83cc5b445d..d869f270dcca 100644 --- a/drivers/spi/spi-geni-qcom.c +++ b/drivers/spi/spi-geni-qcom.c @@ -892,6 +892,9 @@ static int spi_geni_probe(struct platform_device *pdev) void __iomem *base; struct clk *clk; struct device *dev = &pdev->dev; + struct dev_pm_opp_config config = { + .clk_name = "se", + }; irq = platform_get_irq(pdev, 0); if (irq < 0) @@ -922,7 +925,7 @@ static int spi_geni_probe(struct platform_device *pdev) mas->se.base = base; mas->se.clk = clk; - ret = devm_pm_opp_set_clkname(&pdev->dev, "se"); + ret = devm_pm_opp_set_config(&pdev->dev, &config); if (ret) return ret; /* OPP table is optional */ diff --git a/drivers/spi/spi-qcom-qspi.c b/drivers/spi/spi-qcom-qspi.c index c334dfec4117..5ab3ae406ef7 100644 --- a/drivers/spi/spi-qcom-qspi.c +++ b/drivers/spi/spi-qcom-qspi.c @@ -458,6 +458,9 @@ static int qcom_qspi_probe(struct platform_device *pdev) struct device *dev; struct spi_master *master; struct qcom_qspi *ctrl; + struct dev_pm_opp_config config = { + .clk_name = "core", + }; dev = &pdev->dev; @@ -529,7 +532,7 @@ static int qcom_qspi_probe(struct platform_device *pdev) master->handle_err = qcom_qspi_handle_err; master->auto_runtime_pm = true; - ret = devm_pm_opp_set_clkname(&pdev->dev, "core"); + ret = devm_pm_opp_set_config(&pdev->dev, &config); if (ret) return ret; /* OPP table is optional */ From patchwork Thu May 26 11:42:23 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Viresh Kumar X-Patchwork-Id: 576938 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id EFA6BC433F5 for ; Thu, 26 May 2022 11:45:15 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1347252AbiEZLpM (ORCPT ); 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Thu, 26 May 2022 04:44:40 -0700 (PDT) From: Viresh Kumar To: Andy Gross , Bjorn Andersson , Greg Kroah-Hartman , Jiri Slaby Cc: Viresh Kumar , linux-pm@vger.kernel.org, Vincent Guittot , Rafael Wysocki , Stephen Boyd , Nishanth Menon , Krzysztof Kozlowski , linux-arm-msm@vger.kernel.org, linux-serial@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 24/31] serial: qcom: Migrate to dev_pm_opp_set_config() Date: Thu, 26 May 2022 17:12:23 +0530 Message-Id: <49aff8c5f72dae52ef7e9acb4f821d0c3e097813.1653564321.git.viresh.kumar@linaro.org> X-Mailer: git-send-email 2.31.1.272.g89b43f80a514 In-Reply-To: References: MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org The OPP core now provides a unified API for setting all configuration types, i.e. dev_pm_opp_set_config(). Lets start using it. Signed-off-by: Viresh Kumar --- drivers/tty/serial/qcom_geni_serial.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/drivers/tty/serial/qcom_geni_serial.c b/drivers/tty/serial/qcom_geni_serial.c index 1543a6028856..391fcc3a0f61 100644 --- a/drivers/tty/serial/qcom_geni_serial.c +++ b/drivers/tty/serial/qcom_geni_serial.c @@ -1331,6 +1331,9 @@ static int qcom_geni_serial_probe(struct platform_device *pdev) int irq; bool console = false; struct uart_driver *drv; + struct dev_pm_opp_config config = { + .clk_name = "se", + }; if (of_device_is_compatible(pdev->dev.of_node, "qcom,geni-debug-uart")) console = true; @@ -1414,7 +1417,7 @@ static int qcom_geni_serial_probe(struct platform_device *pdev) if (of_property_read_bool(pdev->dev.of_node, "cts-rts-swap")) port->cts_rts_swap = true; - ret = devm_pm_opp_set_clkname(&pdev->dev, "se"); + ret = devm_pm_opp_set_config(&pdev->dev, &config); if (ret) return ret; /* OPP table is optional */