From patchwork Tue Jun 14 07:49:31 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Benjamin Gaignard X-Patchwork-Id: 581861 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9D628C433EF for ; Tue, 14 Jun 2022 07:50:00 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1352521AbiFNHt6 (ORCPT ); Tue, 14 Jun 2022 03:49:58 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39114 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235132AbiFNHt6 (ORCPT ); Tue, 14 Jun 2022 03:49:58 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [46.235.227.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A303D3EB99; Tue, 14 Jun 2022 00:49:57 -0700 (PDT) Received: from benjamin-XPS-13-9310.. (unknown [IPv6:2a01:e0a:120:3210:4a7b:8d3a:acaa:ec46]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: benjamin.gaignard) by madras.collabora.co.uk (Postfix) with ESMTPSA id CB53066016A2; Tue, 14 Jun 2022 08:49:55 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1655192996; bh=v/Qj9dkCpC1sNaB07KNbLhoqv0M/1payaJLdzsZJWFE=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=XZ/eJ6r0zNhIiBhIM9ETHLKHAuRxLmnEFy1dOETZqQikWdxPmX+YWt/CCuDFzxrc+ vqP1M84+EqdzLq8/XdQ6uxmB+XQadivjXP+SQFFTGY3pDI+gN6vVRduCNur8gy77or 3zhMXfJgwte65c1BCh3mHEUwQv31i/GrMHztNUNeDec8fg01NOptf0BLtF0Jlv3cBd E6K+ZkPuqe+L87nUa+1+A0I8XtRZU1O/dQpapUHtsIULps0sdn1LwEkUaiOuXV1Lv4 EH3ar2AZEvSsNbuv5DKRdSnxKw8CJ62eDwM7CoXzFBvA7HgGqepJidyZvG9eJ5j7gc Cyb0tbMII8tjg== From: Benjamin Gaignard To: mchehab@kernel.org, hverkuil@xs4all.nl, ezequiel@vanguardiasur.com.ar, p.zabel@pengutronix.de, gregkh@linuxfoundation.org, mripard@kernel.org, paul.kocialkowski@bootlin.com, wens@csie.org, jernej.skrabec@gmail.com, samuel@sholland.org, nicolas.dufresne@collabora.com, andrzej.p@collabora.com Cc: linux-media@vger.kernel.org, linux-kernel@vger.kernel.org, linux-rockchip@lists.infradead.org, linux-staging@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, kernel@collabora.com, Hans Verkuil Subject: [PATCH v7 01/17] videodev2.h: add V4L2_CTRL_FLAG_DYNAMIC_ARRAY Date: Tue, 14 Jun 2022 09:49:31 +0200 Message-Id: <20220614074947.160316-2-benjamin.gaignard@collabora.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20220614074947.160316-1-benjamin.gaignard@collabora.com> References: <20220614074947.160316-1-benjamin.gaignard@collabora.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org From: Hans Verkuil Add a new flag that indicates that this control is a dynamically sized array. Also document this flag. Currently dynamically sized arrays are limited to one dimensional arrays, but that might change in the future if there is a need for it. The initial use-case of dynamic arrays are stateless codecs. A frame can be divided in many slices, so you want to provide an array containing slice information for each slice. Typically the number of slices is small, but the standard allow for hundreds or thousands of slices. Dynamic arrays are a good solution since sizing the array for the worst case would waste substantial amounts of memory. Signed-off-by: Hans Verkuil --- .../userspace-api/media/v4l/vidioc-queryctrl.rst | 8 ++++++++ include/uapi/linux/videodev2.h | 1 + 2 files changed, 9 insertions(+) diff --git a/Documentation/userspace-api/media/v4l/vidioc-queryctrl.rst b/Documentation/userspace-api/media/v4l/vidioc-queryctrl.rst index 88f630252d98..a20dfa2a933b 100644 --- a/Documentation/userspace-api/media/v4l/vidioc-queryctrl.rst +++ b/Documentation/userspace-api/media/v4l/vidioc-queryctrl.rst @@ -625,6 +625,14 @@ See also the examples in :ref:`control`. ``V4L2_CTRL_FLAG_GRABBED`` flag when buffers are allocated or streaming is in progress since most drivers do not support changing the format in that case. + * - ``V4L2_CTRL_FLAG_DYNAMIC_ARRAY`` + - 0x0800 + - This control is a dynamically sized 1-dimensional array. It + behaves the same as a regular array, except that the number + of elements as reported by the ``elems`` field is between 1 and + ``dims[0]``. So setting the control with a differently sized + array will change the ``elems`` field when the control is + queried afterwards. Return Value ============ diff --git a/include/uapi/linux/videodev2.h b/include/uapi/linux/videodev2.h index 5311ac4fde35..9018aa984db3 100644 --- a/include/uapi/linux/videodev2.h +++ b/include/uapi/linux/videodev2.h @@ -1890,6 +1890,7 @@ struct v4l2_querymenu { #define V4L2_CTRL_FLAG_HAS_PAYLOAD 0x0100 #define V4L2_CTRL_FLAG_EXECUTE_ON_WRITE 0x0200 #define V4L2_CTRL_FLAG_MODIFY_LAYOUT 0x0400 +#define V4L2_CTRL_FLAG_DYNAMIC_ARRAY 0x0800 /* Query flags, to be ORed with the control ID */ #define V4L2_CTRL_FLAG_NEXT_CTRL 0x80000000 From patchwork Tue Jun 14 07:49:33 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Benjamin Gaignard X-Patchwork-Id: 581860 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B9D0ECCA47A for ; Tue, 14 Jun 2022 07:50:03 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1354874AbiFNHuC (ORCPT ); Tue, 14 Jun 2022 03:50:02 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39144 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1354468AbiFNHt7 (ORCPT ); Tue, 14 Jun 2022 03:49:59 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [IPv6:2a00:1098:0:82:1000:25:2eeb:e5ab]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3AC7D3EAA3; Tue, 14 Jun 2022 00:49:59 -0700 (PDT) Received: from benjamin-XPS-13-9310.. (unknown [IPv6:2a01:e0a:120:3210:4a7b:8d3a:acaa:ec46]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: benjamin.gaignard) by madras.collabora.co.uk (Postfix) with ESMTPSA id 355BA66016A9; Tue, 14 Jun 2022 08:49:57 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1655192997; bh=bowMSxciKZ4e4jd3aI13NZ259r8hIcdS0hJZN8hF4F0=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=am6dIRgB2Z8tcxTQDnF0xQ/hv8i9+hn7Z4CM2Ko7C/xrF/YPjsNcE8jka7UmySIG+ pTCNnoB8HHFsn+v12vg3AwUIk2oaBpwzhUhcqyn6CUltI5MHtdNTFqP/pJZLRn8QWP r1KOWngutNnnvY5dFGRUz6DjhDlVL5swtF/vQqkH9dgJMC7IAyRtYbBxRTJ+hmJTQt agnSEAaAXU3SrTs9/Wa7dOj435ATy5TZ1FUCnS1BYvVzgtcc5pWvs0z3cCf6b86Yhp MyHhPJKr+bdl7Aao0Q+FKsI6FI/7XXocMIlKn3Bj7wehOUYW+aDdBjMCgRR/G5P7kT MmTs6g4eN9o4g== From: Benjamin Gaignard To: mchehab@kernel.org, hverkuil@xs4all.nl, ezequiel@vanguardiasur.com.ar, p.zabel@pengutronix.de, gregkh@linuxfoundation.org, mripard@kernel.org, paul.kocialkowski@bootlin.com, wens@csie.org, jernej.skrabec@gmail.com, samuel@sholland.org, nicolas.dufresne@collabora.com, andrzej.p@collabora.com Cc: linux-media@vger.kernel.org, linux-kernel@vger.kernel.org, linux-rockchip@lists.infradead.org, linux-staging@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, kernel@collabora.com, Hans Verkuil Subject: [PATCH v7 03/17] vivid: add dynamic array test control Date: Tue, 14 Jun 2022 09:49:33 +0200 Message-Id: <20220614074947.160316-4-benjamin.gaignard@collabora.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20220614074947.160316-1-benjamin.gaignard@collabora.com> References: <20220614074947.160316-1-benjamin.gaignard@collabora.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org From: Hans Verkuil Add a dynamic array test control to help test support for this feature. Signed-off-by: Hans Verkuil --- drivers/media/test-drivers/vivid/vivid-ctrls.c | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/drivers/media/test-drivers/vivid/vivid-ctrls.c b/drivers/media/test-drivers/vivid/vivid-ctrls.c index e7516dc1227b..7267892dc18a 100644 --- a/drivers/media/test-drivers/vivid/vivid-ctrls.c +++ b/drivers/media/test-drivers/vivid/vivid-ctrls.c @@ -34,6 +34,7 @@ #define VIVID_CID_U8_4D_ARRAY (VIVID_CID_CUSTOM_BASE + 10) #define VIVID_CID_AREA (VIVID_CID_CUSTOM_BASE + 11) #define VIVID_CID_RO_INTEGER (VIVID_CID_CUSTOM_BASE + 12) +#define VIVID_CID_U32_DYN_ARRAY (VIVID_CID_CUSTOM_BASE + 13) #define VIVID_CID_VIVID_BASE (0x00f00000 | 0xf000) #define VIVID_CID_VIVID_CLASS (0x00f00000 | 1) @@ -189,6 +190,19 @@ static const struct v4l2_ctrl_config vivid_ctrl_u32_array = { .dims = { 1 }, }; +static const struct v4l2_ctrl_config vivid_ctrl_u32_dyn_array = { + .ops = &vivid_user_gen_ctrl_ops, + .id = VIVID_CID_U32_DYN_ARRAY, + .name = "U32 Dynamic Array", + .type = V4L2_CTRL_TYPE_U32, + .flags = V4L2_CTRL_FLAG_DYNAMIC_ARRAY, + .def = 50, + .min = 10, + .max = 90, + .step = 1, + .dims = { 100 }, +}; + static const struct v4l2_ctrl_config vivid_ctrl_u16_matrix = { .ops = &vivid_user_gen_ctrl_ops, .id = VIVID_CID_U16_MATRIX, @@ -1612,6 +1626,7 @@ int vivid_create_controls(struct vivid_dev *dev, bool show_ccs_cap, dev->ro_int32 = v4l2_ctrl_new_custom(hdl_user_gen, &vivid_ctrl_ro_int32, NULL); v4l2_ctrl_new_custom(hdl_user_gen, &vivid_ctrl_area, NULL); v4l2_ctrl_new_custom(hdl_user_gen, &vivid_ctrl_u32_array, NULL); + v4l2_ctrl_new_custom(hdl_user_gen, &vivid_ctrl_u32_dyn_array, NULL); v4l2_ctrl_new_custom(hdl_user_gen, &vivid_ctrl_u16_matrix, NULL); v4l2_ctrl_new_custom(hdl_user_gen, &vivid_ctrl_u8_4d_array, NULL); From patchwork Tue Jun 14 07:49:34 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Benjamin Gaignard X-Patchwork-Id: 581859 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 004C1CCA47A for ; Tue, 14 Jun 2022 07:50:06 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1354925AbiFNHuF (ORCPT ); Tue, 14 Jun 2022 03:50:05 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39154 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1354832AbiFNHuA (ORCPT ); Tue, 14 Jun 2022 03:50:00 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [46.235.227.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 953C43EB99; Tue, 14 Jun 2022 00:49:59 -0700 (PDT) Received: from benjamin-XPS-13-9310.. (unknown [IPv6:2a01:e0a:120:3210:4a7b:8d3a:acaa:ec46]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: benjamin.gaignard) by madras.collabora.co.uk (Postfix) with ESMTPSA id DAA1F66016AF; Tue, 14 Jun 2022 08:49:57 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1655192998; bh=pjNKQqJt+fujWp4j47KE/erfcCEMJ6ylcH5fLNYA0qE=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=ggJtl62OO92tSpb7U3nJhD+Q4TGYNlPbY0qmSok58NJuh/J3FWX6kRX9rSC4ItRdn E6Qj/9R8TvqEjF62zSVvuZ5FrGnu0kWdPoH092d4OUEX4ldYM/IrtIpCRNot0k/Dhy CCIBqEO+hqQXRDbq09P21zR+w032BSVy6pc60Fi/83R/u9Gw7X8+OVPIyMVx8/00EE ZLC/yIqgUkhVZrjGQEDO63+2n6T36Y9F5NU7uLtRvpVsErgIJGmwaFNRm/eblYid38 DidExo0uWA0VhzDqhyaNa1wHMrUmf3DN3CLypJsbAuadSZr2JEPUaabccAANLE8XVp qmcTr+hcuecAg== From: Benjamin Gaignard To: mchehab@kernel.org, hverkuil@xs4all.nl, ezequiel@vanguardiasur.com.ar, p.zabel@pengutronix.de, gregkh@linuxfoundation.org, mripard@kernel.org, paul.kocialkowski@bootlin.com, wens@csie.org, jernej.skrabec@gmail.com, samuel@sholland.org, nicolas.dufresne@collabora.com, andrzej.p@collabora.com Cc: linux-media@vger.kernel.org, linux-kernel@vger.kernel.org, linux-rockchip@lists.infradead.org, linux-staging@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, kernel@collabora.com, Benjamin Gaignard Subject: [PATCH v7 04/17] media: uapi: HEVC: Add missing fields in HEVC controls Date: Tue, 14 Jun 2022 09:49:34 +0200 Message-Id: <20220614074947.160316-5-benjamin.gaignard@collabora.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20220614074947.160316-1-benjamin.gaignard@collabora.com> References: <20220614074947.160316-1-benjamin.gaignard@collabora.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org Complete the HEVC controls with missing fields from H.265 specifications. Even if these fields aren't used by the current mainlined drivers they will be required for (at least) the rkvdec driver. Signed-off-by: Benjamin Gaignard --- version 6: - Add short_term_ref_pic_set_size and long_term_ref_pic_set_size in v4l2_ctrl_hevc_decode_params structure. .../media/v4l/ext-ctrls-codec.rst | 32 +++++++++++++++++++ include/media/hevc-ctrls.h | 8 ++++- 2 files changed, 39 insertions(+), 1 deletion(-) diff --git a/Documentation/userspace-api/media/v4l/ext-ctrls-codec.rst b/Documentation/userspace-api/media/v4l/ext-ctrls-codec.rst index 6183f43f4d73..aa7556e200c9 100644 --- a/Documentation/userspace-api/media/v4l/ext-ctrls-codec.rst +++ b/Documentation/userspace-api/media/v4l/ext-ctrls-codec.rst @@ -2683,6 +2683,16 @@ enum v4l2_mpeg_video_hevc_size_of_length_field - :stub-columns: 0 :widths: 1 1 2 + * - __u8 + - ``video_parameter_set_id`` + - Specifies the value of the vps_video_parameter_set_id of the active VPS + as descibed in section "7.4.3.2.1 General sequence parameter set RBSP semantics" + of H.265 specifications. + * - __u8 + - ``seq_parameter_set_id`` + - Provides an identifier for the SPS for reference by other syntax elements + as descibed in section "7.4.3.2.1 General sequence parameter set RBSP semantics" + of H.265 specifications. * - __u16 - ``pic_width_in_luma_samples`` - @@ -2822,6 +2832,9 @@ enum v4l2_mpeg_video_hevc_size_of_length_field - :stub-columns: 0 :widths: 1 1 2 + * - __u8 + - ``pic_parameter_set_id`` + - Identifies the PPS for reference by other syntax elements. * - __u8 - ``num_extra_slice_header_bits`` - @@ -3048,6 +3061,15 @@ enum v4l2_mpeg_video_hevc_size_of_length_field - * - __u8 - ``ref_idx_l1[V4L2_HEVC_DPB_ENTRIES_NUM_MAX]`` - The list of L1 reference elements as indices in the DPB. + * - __u16 + - ``short_term_ref_pic_set_size`` + - Specifies the size, in bits, of the short-term reference picture set, described as st_ref_pic_set() + in the specification, included in the slice header or SPS (section 7.3.6.1). + * - __u16 + - ``long_term_ref_pic_set_size`` + - Specifies the size, in bits, of the long-term reference picture set include in the slice header + or SPS. It is the number of bits in the conditional block if(long_term_ref_pics_present_flag) + in section 7.3.6.1 of the specification. * - __u8 - ``padding`` - Applications and drivers must set this to zero. @@ -3385,6 +3407,16 @@ enum v4l2_mpeg_video_hevc_size_of_length_field - - ``pic_order_cnt_val`` - PicOrderCntVal as described in section 8.3.1 "Decoding process for picture order count" of the specification. + * - __u16 + - ``short_term_ref_pic_set_size`` + - Specifies the size, in bits, of the short-term reference picture set, of the first slice + described as st_ref_pic_set() in the specification, included in the slice header + or SPS (section 7.3.6.1). + * - __u16 + - ``long_term_ref_pic_set_size`` + - Specifies the size, in bits, of the long-term reference picture set, of the first slice + included in the slice header or SPS. It is the number of bits in the conditional block + if(long_term_ref_pics_present_flag) in section 7.3.6.1 of the specification. * - __u8 - ``num_active_dpb_entries`` - The number of entries in ``dpb``. diff --git a/include/media/hevc-ctrls.h b/include/media/hevc-ctrls.h index 01ccda48d8c5..752a8d10782c 100644 --- a/include/media/hevc-ctrls.h +++ b/include/media/hevc-ctrls.h @@ -58,6 +58,8 @@ enum v4l2_mpeg_video_hevc_start_code { /* The controls are not stable at the moment and will likely be reworked. */ struct v4l2_ctrl_hevc_sps { /* ISO/IEC 23008-2, ITU-T Rec. H.265: Sequence parameter set */ + __u8 video_parameter_set_id; + __u8 seq_parameter_set_id; __u16 pic_width_in_luma_samples; __u16 pic_height_in_luma_samples; __u8 bit_depth_luma_minus8; @@ -108,6 +110,7 @@ struct v4l2_ctrl_hevc_sps { struct v4l2_ctrl_hevc_pps { /* ISO/IEC 23008-2, ITU-T Rec. H.265: Picture parameter set */ + __u8 pic_parameter_set_id; __u8 num_extra_slice_header_bits; __u8 num_ref_idx_l0_default_active_minus1; __u8 num_ref_idx_l1_default_active_minus1; @@ -199,7 +202,8 @@ struct v4l2_ctrl_hevc_slice_params { __u32 slice_segment_addr; __u8 ref_idx_l0[V4L2_HEVC_DPB_ENTRIES_NUM_MAX]; __u8 ref_idx_l1[V4L2_HEVC_DPB_ENTRIES_NUM_MAX]; - + __u16 short_term_ref_pic_set_size; + __u16 long_term_ref_pic_set_size; __u8 padding; /* ISO/IEC 23008-2, ITU-T Rec. H.265: Weighted prediction parameter */ @@ -214,6 +218,8 @@ struct v4l2_ctrl_hevc_slice_params { struct v4l2_ctrl_hevc_decode_params { __s32 pic_order_cnt_val; + __u16 short_term_ref_pic_set_size; + __u16 long_term_ref_pic_set_size; __u8 num_active_dpb_entries; struct v4l2_hevc_dpb_entry dpb[V4L2_HEVC_DPB_ENTRIES_NUM_MAX]; __u8 num_poc_st_curr_before; From patchwork Tue Jun 14 07:49:36 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Benjamin Gaignard X-Patchwork-Id: 581858 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id CFC81C433EF for ; Tue, 14 Jun 2022 07:50:08 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1354954AbiFNHuH (ORCPT ); Tue, 14 Jun 2022 03:50:07 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39186 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1354861AbiFNHuB (ORCPT ); Tue, 14 Jun 2022 03:50:01 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [46.235.227.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id F33713EAA3; Tue, 14 Jun 2022 00:50:00 -0700 (PDT) Received: from benjamin-XPS-13-9310.. (unknown [IPv6:2a01:e0a:120:3210:4a7b:8d3a:acaa:ec46]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: benjamin.gaignard) by madras.collabora.co.uk (Postfix) with ESMTPSA id 51EB466016A3; Tue, 14 Jun 2022 08:49:59 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1655192999; bh=R1RD9/NdT1+j3nmnRHTjtmU1Cs+J8VBHdXjBv2QWTxU=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=ng1ibFCbPBd/TD4AAmpezP4KF/cgTpcHWA5be3EujAR8PiiDdMes7aQ3QSt3EBulO ubhFYQ5y8Azps8Lg3+qQE89596Df5eFkDFN1eY8OvRuzMxnllypyjnvhAuhYLFGSa3 f+1d77sOyiTajulEFCoicMKxMEnjbPXFU03RPZS1aPWFlFqS2X8JZK6kM1PkwPn8ip WTarlH04ST+u3BWWZuep3qBpqSQ+QxSX1KUdgTwXE4IW1HFKoMgU0T6UmDQKYrjt1j 8lB2ALzvCFTaYzoCBN9TeLfXEfdXj8Y5wZQw8I+cCvAqMhCjQmdnM7kKvS+4PRSmZn Ipiy/WrBoarQA== From: Benjamin Gaignard To: mchehab@kernel.org, hverkuil@xs4all.nl, ezequiel@vanguardiasur.com.ar, p.zabel@pengutronix.de, gregkh@linuxfoundation.org, mripard@kernel.org, paul.kocialkowski@bootlin.com, wens@csie.org, jernej.skrabec@gmail.com, samuel@sholland.org, nicolas.dufresne@collabora.com, andrzej.p@collabora.com Cc: linux-media@vger.kernel.org, linux-kernel@vger.kernel.org, linux-rockchip@lists.infradead.org, linux-staging@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, kernel@collabora.com, Benjamin Gaignard Subject: [PATCH v7 06/17] media: uapi: HEVC: Change pic_order_cnt definition in v4l2_hevc_dpb_entry Date: Tue, 14 Jun 2022 09:49:36 +0200 Message-Id: <20220614074947.160316-7-benjamin.gaignard@collabora.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20220614074947.160316-1-benjamin.gaignard@collabora.com> References: <20220614074947.160316-1-benjamin.gaignard@collabora.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org The HEVC specification describes the following: "PicOrderCntVal is derived as follows: PicOrderCntVal = PicOrderCntMsb + slice_pic_order_cnt_lsb The value of PicOrderCntVal shall be in the range of −2^31 to 2^31 − 1, inclusive." To match with these definitions change __u16 pic_order_cnt[2] into __s32 pic_order_cnt_val. Change v4l2_ctrl_hevc_slice_params->slice_pic_order_cnt to __s32 too. Signed-off-by: Benjamin Gaignard --- version 6: - Also change slice_pic_order_cnt type to s32 - Fix comment in Hantro driver Documentation/userspace-api/media/v4l/ext-ctrls-codec.rst | 2 +- drivers/staging/media/hantro/hantro_g2_hevc_dec.c | 7 +++---- drivers/staging/media/hantro/hantro_hevc.c | 2 +- drivers/staging/media/hantro/hantro_hw.h | 4 ++-- drivers/staging/media/sunxi/cedrus/cedrus_h265.c | 4 ++-- include/media/hevc-ctrls.h | 4 ++-- 6 files changed, 11 insertions(+), 12 deletions(-) diff --git a/Documentation/userspace-api/media/v4l/ext-ctrls-codec.rst b/Documentation/userspace-api/media/v4l/ext-ctrls-codec.rst index 160b91537c09..a7803b241612 100644 --- a/Documentation/userspace-api/media/v4l/ext-ctrls-codec.rst +++ b/Documentation/userspace-api/media/v4l/ext-ctrls-codec.rst @@ -3010,7 +3010,7 @@ enum v4l2_mpeg_video_hevc_size_of_length_field - * - __u8 - ``colour_plane_id`` - - * - __u16 + * - __s32 - ``slice_pic_order_cnt`` - * - __u8 diff --git a/drivers/staging/media/hantro/hantro_g2_hevc_dec.c b/drivers/staging/media/hantro/hantro_g2_hevc_dec.c index 5df6f08e26f5..d28653d04d20 100644 --- a/drivers/staging/media/hantro/hantro_g2_hevc_dec.c +++ b/drivers/staging/media/hantro/hantro_g2_hevc_dec.c @@ -390,11 +390,10 @@ static int set_ref(struct hantro_ctx *ctx) !!(pps->flags & V4L2_HEVC_PPS_FLAG_LOOP_FILTER_ACROSS_TILES_ENABLED)); /* - * Write POC count diff from current pic. For frame decoding only compute - * pic_order_cnt[0] and ignore pic_order_cnt[1] used in field-coding. + * Write POC count diff from current pic. */ for (i = 0; i < decode_params->num_active_dpb_entries && i < ARRAY_SIZE(cur_poc); i++) { - char poc_diff = decode_params->pic_order_cnt_val - dpb[i].pic_order_cnt[0]; + char poc_diff = decode_params->pic_order_cnt_val - dpb[i].pic_order_cnt_val; hantro_reg_write(vpu, &cur_poc[i], poc_diff); } @@ -421,7 +420,7 @@ static int set_ref(struct hantro_ctx *ctx) dpb_longterm_e = 0; for (i = 0; i < decode_params->num_active_dpb_entries && i < (V4L2_HEVC_DPB_ENTRIES_NUM_MAX - 1); i++) { - luma_addr = hantro_hevc_get_ref_buf(ctx, dpb[i].pic_order_cnt[0]); + luma_addr = hantro_hevc_get_ref_buf(ctx, dpb[i].pic_order_cnt_val); if (!luma_addr) return -ENOMEM; diff --git a/drivers/staging/media/hantro/hantro_hevc.c b/drivers/staging/media/hantro/hantro_hevc.c index f0b19d8017ba..59152a3e9576 100644 --- a/drivers/staging/media/hantro/hantro_hevc.c +++ b/drivers/staging/media/hantro/hantro_hevc.c @@ -33,7 +33,7 @@ void hantro_hevc_ref_init(struct hantro_ctx *ctx) } dma_addr_t hantro_hevc_get_ref_buf(struct hantro_ctx *ctx, - int poc) + s32 poc) { struct hantro_hevc_dec_hw_ctx *hevc_dec = &ctx->hevc_dec; int i; diff --git a/drivers/staging/media/hantro/hantro_hw.h b/drivers/staging/media/hantro/hantro_hw.h index 52a960f6fa4a..24943c579c79 100644 --- a/drivers/staging/media/hantro/hantro_hw.h +++ b/drivers/staging/media/hantro/hantro_hw.h @@ -133,7 +133,7 @@ struct hantro_hevc_dec_hw_ctx { struct hantro_aux_buf tile_bsd; struct hantro_aux_buf ref_bufs[NUM_REF_PICTURES]; struct hantro_aux_buf scaling_lists; - int ref_bufs_poc[NUM_REF_PICTURES]; + s32 ref_bufs_poc[NUM_REF_PICTURES]; u32 ref_bufs_used; struct hantro_hevc_dec_ctrls ctrls; unsigned int num_tile_cols_allocated; @@ -345,7 +345,7 @@ void hantro_hevc_dec_exit(struct hantro_ctx *ctx); int hantro_g2_hevc_dec_run(struct hantro_ctx *ctx); int hantro_hevc_dec_prepare_run(struct hantro_ctx *ctx); void hantro_hevc_ref_init(struct hantro_ctx *ctx); -dma_addr_t hantro_hevc_get_ref_buf(struct hantro_ctx *ctx, int poc); +dma_addr_t hantro_hevc_get_ref_buf(struct hantro_ctx *ctx, s32 poc); int hantro_hevc_add_ref_buf(struct hantro_ctx *ctx, int poc, dma_addr_t addr); static inline unsigned short hantro_vp9_num_sbs(unsigned short dimension) diff --git a/drivers/staging/media/sunxi/cedrus/cedrus_h265.c b/drivers/staging/media/sunxi/cedrus/cedrus_h265.c index 44f385be9f6c..411601975124 100644 --- a/drivers/staging/media/sunxi/cedrus/cedrus_h265.c +++ b/drivers/staging/media/sunxi/cedrus/cedrus_h265.c @@ -143,8 +143,8 @@ static void cedrus_h265_frame_info_write_dpb(struct cedrus_ctx *ctx, for (i = 0; i < num_active_dpb_entries; i++) { int buffer_index = vb2_find_timestamp(vq, dpb[i].timestamp, 0); u32 pic_order_cnt[2] = { - dpb[i].pic_order_cnt[0], - dpb[i].pic_order_cnt[1] + dpb[i].pic_order_cnt_val, + dpb[i].pic_order_cnt_val }; cedrus_h265_frame_info_write_single(ctx, i, dpb[i].field_pic, diff --git a/include/media/hevc-ctrls.h b/include/media/hevc-ctrls.h index 45734bd8fdfc..01c1795c57a9 100644 --- a/include/media/hevc-ctrls.h +++ b/include/media/hevc-ctrls.h @@ -138,7 +138,7 @@ struct v4l2_hevc_dpb_entry { __u64 timestamp; __u8 flags; __u8 field_pic; - __u16 pic_order_cnt[2]; + __s32 pic_order_cnt_val; __u8 padding[2]; }; @@ -181,7 +181,7 @@ struct v4l2_ctrl_hevc_slice_params { /* ISO/IEC 23008-2, ITU-T Rec. H.265: General slice segment header */ __u8 slice_type; __u8 colour_plane_id; - __u16 slice_pic_order_cnt; + __s32 slice_pic_order_cnt; __u8 num_ref_idx_l0_active_minus1; __u8 num_ref_idx_l1_active_minus1; __u8 collocated_ref_idx; From patchwork Tue Jun 14 07:49:38 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Benjamin Gaignard X-Patchwork-Id: 581856 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E6A58CCA47A for ; Tue, 14 Jun 2022 07:50:18 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1355063AbiFNHuR (ORCPT ); Tue, 14 Jun 2022 03:50:17 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39400 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1352916AbiFNHuK (ORCPT ); Tue, 14 Jun 2022 03:50:10 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [46.235.227.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5A39C3ED14; Tue, 14 Jun 2022 00:50:02 -0700 (PDT) Received: from benjamin-XPS-13-9310.. (unknown [IPv6:2a01:e0a:120:3210:4a7b:8d3a:acaa:ec46]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: benjamin.gaignard) by madras.collabora.co.uk (Postfix) with ESMTPSA id ABE7F66016C6; Tue, 14 Jun 2022 08:50:00 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1655193001; bh=9pSKQA18Agfweno2Lt+d1sp3eAvkWUjpn2lIbIf0yp8=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=NKtB83hOEbRMtz0yIUkqe/phRvP8Mikz1S4ZbBn35ReXkhXbAwQrxy4FIzyeTRULf 2nVDi4761pUcMYlpVuzMsIxodUf87Hg8SwwCmJLmwXGF8LuyaovT4qOO0MdI3JeIhy DAU6BOF5eOKX9StTmjzbNpY3Vem2f+CuS7viuI9CNjHg9G8QvrO9dbAZjB1ZonjEUT LgrbZiA6s1zytarb3heMqQMMt9YFRlHbo6ZiDOB4tQMHanb7v6vjMr/pA/McVf2xht eUBa6BmWuq6krRvS3QGE59Pzp9hANOYNFU8thTuuUZd3/p5fznWusxk1sGk73TDHTU 33d5Cg+nkNyPg== From: Benjamin Gaignard To: mchehab@kernel.org, hverkuil@xs4all.nl, ezequiel@vanguardiasur.com.ar, p.zabel@pengutronix.de, gregkh@linuxfoundation.org, mripard@kernel.org, paul.kocialkowski@bootlin.com, wens@csie.org, jernej.skrabec@gmail.com, samuel@sholland.org, nicolas.dufresne@collabora.com, andrzej.p@collabora.com Cc: linux-media@vger.kernel.org, linux-kernel@vger.kernel.org, linux-rockchip@lists.infradead.org, linux-staging@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, kernel@collabora.com, Benjamin Gaignard Subject: [PATCH v7 08/17] media: uapi: HEVC: Add documentation to uAPI structure Date: Tue, 14 Jun 2022 09:49:38 +0200 Message-Id: <20220614074947.160316-9-benjamin.gaignard@collabora.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20220614074947.160316-1-benjamin.gaignard@collabora.com> References: <20220614074947.160316-1-benjamin.gaignard@collabora.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org Add kernel-doc documentation for all the HEVC structures. Signed-off-by: Benjamin Gaignard --- version 5: - Fix num_short_term_ref_pic_sets and num_long_term_ref_pics_sps documentation .../media/v4l/ext-ctrls-codec.rst | 164 +++++++------ include/media/hevc-ctrls.h | 221 +++++++++++++++++- 2 files changed, 311 insertions(+), 74 deletions(-) diff --git a/Documentation/userspace-api/media/v4l/ext-ctrls-codec.rst b/Documentation/userspace-api/media/v4l/ext-ctrls-codec.rst index 1ccf6dda61b3..06b967de140c 100644 --- a/Documentation/userspace-api/media/v4l/ext-ctrls-codec.rst +++ b/Documentation/userspace-api/media/v4l/ext-ctrls-codec.rst @@ -2695,70 +2695,76 @@ enum v4l2_mpeg_video_hevc_size_of_length_field - of H.265 specifications. * - __u16 - ``pic_width_in_luma_samples`` - - + - Specifies the width of each decoded picture in units of luma samples. * - __u16 - ``pic_height_in_luma_samples`` - - + - Specifies the height of each decoded picture in units of luma samples. * - __u8 - ``bit_depth_luma_minus8`` - - + - Specifies the bit depth of the samples of the luma array. * - __u8 - ``bit_depth_chroma_minus8`` - - + - Specifies the bit depth of the samples of the chroma arrays. * - __u8 - ``log2_max_pic_order_cnt_lsb_minus4`` - - + - Specifies the value of the variable MaxPicOrderCntLsb. * - __u8 - ``sps_max_dec_pic_buffering_minus1`` - - + - Plus 1 specifies the maximum required size of the decoded picture buffer for + the CVS * - __u8 - ``sps_max_num_reorder_pics`` - - + - Indicates the maximum allowed number of pictures. * - __u8 - ``sps_max_latency_increase_plus1`` - - + - Not equal to 0 is used to compute the value of SpsMaxLatencyPictures[i]. * - __u8 - ``log2_min_luma_coding_block_size_minus3`` - - + - Plus 3 specifies the minimum luma coding block size. * - __u8 - ``log2_diff_max_min_luma_coding_block_size`` - - + - Specifies the difference between the maximum and minimum luma coding block size. * - __u8 - ``log2_min_luma_transform_block_size_minus2`` - - + - Plus 2 specifies the minimum luma transform block size. * - __u8 - ``log2_diff_max_min_luma_transform_block_size`` - - + - Specifies the difference between the maximum and minimum luma transform block size. * - __u8 - ``max_transform_hierarchy_depth_inter`` - - + - Specifies the maximum hierarchy depth for transform units of coding units coded + in inter prediction mode. * - __u8 - ``max_transform_hierarchy_depth_intra`` - - + - Specifies the maximum hierarchy depth for transform units of coding units coded in + intra prediction mode. * - __u8 - ``pcm_sample_bit_depth_luma_minus1`` - - + - Specifies the number of bits used to represent each of PCM sample values of the + luma component. * - __u8 - ``pcm_sample_bit_depth_chroma_minus1`` - - + - Specifies the number of bits used to represent each of PCM sample values of + the chroma components. * - __u8 - ``log2_min_pcm_luma_coding_block_size_minus3`` - - + - Plus 3 specifies the minimum size of coding blocks. * - __u8 - ``log2_diff_max_min_pcm_luma_coding_block_size`` - - + - Specifies the difference between the maximum and minimum size of coding blocks. * - __u8 - ``num_short_term_ref_pic_sets`` - - + - Specifies the number of st_ref_pic_set() syntax structures included in the SPS. * - __u8 - ``num_long_term_ref_pics_sps`` - - + - Specifies the number of candidate long-term reference pictures that are + specified in the SPS. * - __u8 - ``chroma_format_idc`` - - + - Specifies the chroma sampling. * - __u8 - ``sps_max_sub_layers_minus1`` - - + - plus 1 specifies the maximum number of temporal sub-layers. * - __u64 - ``flags`` - See :ref:`Sequence Parameter Set Flags ` @@ -2837,7 +2843,8 @@ enum v4l2_mpeg_video_hevc_size_of_length_field - - Identifies the PPS for reference by other syntax elements. * - __u8 - ``num_extra_slice_header_bits`` - - + - Specifies the number of extra slice header bits that are present + in the slice header RBSP for coded pictures referring to the PPS. * - __u8 - ``num_ref_idx_l0_default_active_minus1`` - Specifies the inferred value of num_ref_idx_l0_active_minus1 @@ -2846,37 +2853,42 @@ enum v4l2_mpeg_video_hevc_size_of_length_field - - Specifies the inferred value of num_ref_idx_l1_active_minus1 * - __s8 - ``init_qp_minus26`` - - + - Plus 26 specifies the initial value of SliceQp Y for each slice + referring to the PPS. * - __u8 - ``diff_cu_qp_delta_depth`` - - + - Specifies the difference between the luma coding tree block size + and the minimum luma coding block size of coding units that + convey cu_qp_delta_abs and cu_qp_delta_sign_flag. * - __s8 - ``pps_cb_qp_offset`` - - + - Specify the offsets to the luma quantization parameter Cb. * - __s8 - ``pps_cr_qp_offset`` - - + - Specify the offsets to the luma quantization parameter Cr. * - __u8 - ``num_tile_columns_minus1`` - - + - Plus 1 specifies the number of tile columns partitioning the picture. * - __u8 - ``num_tile_rows_minus1`` - - + - Plus 1 specifies the number of tile rows partitioning the picture. * - __u8 - ``column_width_minus1[20]`` - - + - Plus 1 specifies the width of the i-th tile column in units of + coding tree blocks. * - __u8 - ``row_height_minus1[22]`` - - + - Plus 1 specifies the height of the i-th tile row in units of coding + tree blocks. * - __s8 - ``pps_beta_offset_div2`` - - + - Specify the default deblocking parameter offsets for beta divided by 2. * - __s8 - ``pps_tc_offset_div2`` - - + - Specify the default deblocking parameter offsets for tC divided by 2. * - __u8 - ``log2_parallel_merge_level_minus2`` - - + - Plus 2 specifies the value of the variable Log2ParMrgLevel. * - __u8 - ``padding[4]`` - Applications and drivers must set this to zero. @@ -2998,10 +3010,10 @@ enum v4l2_mpeg_video_hevc_size_of_length_field - - Offset (in bits) to the video data in the current slice data. * - __u8 - ``nal_unit_type`` - - + - Specifies the coding type of the slice (B, P or I). * - __u8 - ``nuh_temporal_id_plus1`` - - + - Minus 1 specifies a temporal identifier for the NAL unit. * - __u8 - ``slice_type`` - @@ -3009,52 +3021,56 @@ enum v4l2_mpeg_video_hevc_size_of_length_field - V4L2_HEVC_SLICE_TYPE_B). * - __u8 - ``colour_plane_id`` - - + - Specifies the colour plane associated with the current slice. * - __s32 - ``slice_pic_order_cnt`` - - + - Specifies the picture order count. * - __u8 - ``num_ref_idx_l0_active_minus1`` - - + - Specifies the maximum reference index for reference picture list 0 + that may be used to decode the slice. * - __u8 - ``num_ref_idx_l1_active_minus1`` - - + - Specifies the maximum reference index for reference picture list 1 + that may be used to decode the slice. * - __u8 - ``collocated_ref_idx`` - - + - Specifies the reference index of the collocated picture used for + temporal motion vector prediction. * - __u8 - ``five_minus_max_num_merge_cand`` - - + - Specifies the maximum number of merging motion vector prediction + candidates supported in the slice subtracted from 5. * - __s8 - ``slice_qp_delta`` - - + - Specifies the initial value of QpY to be used for the coding blocks in the slice. * - __s8 - ``slice_cb_qp_offset`` - - + - Specifies a difference to be added to the value of pps_cb_qp_offset. * - __s8 - ``slice_cr_qp_offset`` - - + - Specifies a difference to be added to the value of pps_cr_qp_offset. * - __s8 - ``slice_act_y_qp_offset`` - - + - screen content extension parameters * - __s8 - ``slice_act_cb_qp_offset`` - - + - screen content extension parameters * - __s8 - ``slice_act_cr_qp_offset`` - - + - screen content extension parameters * - __s8 - ``slice_beta_offset_div2`` - - + - Specify the deblocking parameter offsets for beta divided by 2. * - __s8 - ``slice_tc_offset_div2`` - - + - Specify the deblocking parameter offsets for tC divided by 2. * - __u8 - ``pic_struct`` - - + - Indicates whether a picture should be displayed as a frame or as one or more fields. * - __u32 - ``slice_segment_addr`` - - + - Specifies the address of the first coding tree block in the slice segment. * - __u8 - ``ref_idx_l0[V4L2_HEVC_DPB_ENTRIES_NUM_MAX]`` - The list of L0 reference elements as indices in the DPB. @@ -3219,11 +3235,9 @@ enum v4l2_mpeg_video_hevc_size_of_length_field - - ``field_pic`` - Whether the reference is a field picture or a frame. See :ref:`HEVC dpb field pic Flags ` - * - __u16 - - ``pic_order_cnt[2]`` - - The picture order count of the reference. Only the first element of the - array is used for frame pictures, while the first element identifies the - top field and the second the bottom field in field-coded pictures. + * - __s32 + - ``pic_order_cnt_val`` + - The picture order count of the current picture. * - __u8 - ``padding[2]`` - Applications and drivers must set this to zero. @@ -3298,36 +3312,44 @@ enum v4l2_mpeg_video_hevc_size_of_length_field - :stub-columns: 0 :widths: 1 1 2 - * - __u8 - - ``luma_log2_weight_denom`` - - - * - __s8 - - ``delta_chroma_log2_weight_denom`` - - * - __s8 - ``delta_luma_weight_l0[V4L2_HEVC_DPB_ENTRIES_NUM_MAX]`` - - + - The difference of the weighting factor applied to the luma + prediction value for list 0. * - __s8 - ``luma_offset_l0[V4L2_HEVC_DPB_ENTRIES_NUM_MAX]`` - - + - The additive offset applied to the luma prediction value for list 0. * - __s8 - ``delta_chroma_weight_l0[V4L2_HEVC_DPB_ENTRIES_NUM_MAX][2]`` - - + - The difference of the weighting factor applied to the chroma + prediction value for list 0. * - __s8 - ``chroma_offset_l0[V4L2_HEVC_DPB_ENTRIES_NUM_MAX][2]`` - - + - The difference of the additive offset applied to the chroma + prediction values for list 0. * - __s8 - ``delta_luma_weight_l1[V4L2_HEVC_DPB_ENTRIES_NUM_MAX]`` - - + - The difference of the weighting factor applied to the luma + prediction value for list 1. * - __s8 - ``luma_offset_l1[V4L2_HEVC_DPB_ENTRIES_NUM_MAX]`` - - + - The additive offset applied to the luma prediction value for list 1. * - __s8 - ``delta_chroma_weight_l1[V4L2_HEVC_DPB_ENTRIES_NUM_MAX][2]`` - - + - The difference of the weighting factor applied to the chroma + prediction value for list 1. * - __s8 - ``chroma_offset_l1[V4L2_HEVC_DPB_ENTRIES_NUM_MAX][2]`` - - + - The difference of the additive offset applied to the chroma + prediction values for list 1. + * - __u8 + - ``luma_log2_weight_denom`` + - The base 2 logarithm of the denominator for all luma weighting + factors. + * - __s8 + - ``delta_chroma_log2_weight_denom`` + - The difference of the base 2 logarithm of the denominator for + all chroma weighting factors. * - __u8 - ``padding[6]`` - Applications and drivers must set this to zero. diff --git a/include/media/hevc-ctrls.h b/include/media/hevc-ctrls.h index f3695ab44389..0dbd5d681c28 100644 --- a/include/media/hevc-ctrls.h +++ b/include/media/hevc-ctrls.h @@ -55,9 +55,68 @@ enum v4l2_stateless_hevc_start_code { #define V4L2_HEVC_SPS_FLAG_SPS_TEMPORAL_MVP_ENABLED (1ULL << 7) #define V4L2_HEVC_SPS_FLAG_STRONG_INTRA_SMOOTHING_ENABLED (1ULL << 8) -/* The controls are not stable at the moment and will likely be reworked. */ +/** + * struct v4l2_ctrl_hevc_sps - ITU-T Rec. H.265: Sequence parameter set + * + * @video_parameter_set_id: specifies the value of the + * vps_video_parameter_set_id of the active VPS + * @seq_parameter_set_id: provides an identifier for the SPS for + * reference by other syntax elements + * @pic_width_in_luma_samples: specifies the width of each decoded picture + * in units of luma samples + * @pic_height_in_luma_samples: specifies the height of each decoded picture + * in units of luma samples + * @bit_depth_luma_minus8: specifies the bit depth of the samples of the + * luma array + * @bit_depth_chroma_minus8: specifies the bit depth of the samples of the + * chroma arrays + * @log2_max_pic_order_cnt_lsb_minus4: specifies the value of the variable + * MaxPicOrderCntLsb + * @sps_max_dec_pic_buffering_minus1: plus 1 specifies the maximum required + * size of the decoded picture buffer for + * the CVS + * @sps_max_num_reorder_pics: indicates the maximum allowed number of pictures + * @sps_max_latency_increase_plus1: not equal to 0 is used to compute the + * value of SpsMaxLatencyPictures[i] + * @log2_min_luma_coding_block_size_minus3: plus 3 specifies the minimum + * luma coding block size + * @log2_diff_max_min_luma_coding_block_size: specifies the difference between + * the maximum and minimum luma + * coding block size + * @log2_min_luma_transform_block_size_minus2: plus 2 specifies the minimum luma + * transform block size + * @log2_diff_max_min_luma_transform_block_size: specifies the difference between + * the maximum and minimum luma + * transform block size + * @max_transform_hierarchy_depth_inter: specifies the maximum hierarchy + * depth for transform units of + * coding units coded in inter + * prediction mode + * @max_transform_hierarchy_depth_intra: specifies the maximum hierarchy + * depth for transform units of + * coding units coded in intra + * prediction mode + * @pcm_sample_bit_depth_luma_minus1: specifies the number of bits used to + * represent each of PCM sample values of the + * luma component + * @pcm_sample_bit_depth_chroma_minus1: specifies the number of bits used to + * represent each of PCM sample values of + * the chroma components + * @log2_min_pcm_luma_coding_block_size_minus3: plus 3 specifies the minimum size + * of coding blocks + * @log2_diff_max_min_pcm_luma_coding_block_size: specifies the difference between + * the maximum and minimum size of + * coding blocks + * @num_short_term_ref_pic_sets: specifies the number of st_ref_pic_set() + * syntax structures included in the SPS + * @num_long_term_ref_pics_sps: specifies the number of candidate long-term + * reference pictures that are specified in the SPS + * @chroma_format_idc: specifies the chroma sampling + * @sps_max_sub_layers_minus1: plus 1 specifies the maximum number of temporal + * sub-layers + * @flags: see V4L2_HEVC_SPS_FLAG_{} + */ struct v4l2_ctrl_hevc_sps { - /* ISO/IEC 23008-2, ITU-T Rec. H.265: Sequence parameter set */ __u8 video_parameter_set_id; __u8 seq_parameter_set_id; __u16 pic_width_in_luma_samples; @@ -108,8 +167,43 @@ struct v4l2_ctrl_hevc_sps { #define V4L2_HEVC_PPS_FLAG_DEBLOCKING_FILTER_CONTROL_PRESENT (1ULL << 19) #define V4L2_HEVC_PPS_FLAG_UNIFORM_SPACING (1ULL << 20) +/** + * struct v4l2_ctrl_hevc_pps - ITU-T Rec. H.265: Picture parameter set + * + * @pic_parameter_set_id: identifies the PPS for reference by other + * syntax elements + * @num_extra_slice_header_bits: specifies the number of extra slice header + * bits that are present in the slice header RBSP + * for coded pictures referring to the PPS. + * @num_ref_idx_l0_default_active_minus1: specifies the inferred value of + * num_ref_idx_l0_active_minus1 + * @num_ref_idx_l1_default_active_minus1: specifies the inferred value of + * num_ref_idx_l1_active_minus1 + * @init_qp_minus26: plus 26 specifies the initial value of SliceQp Y for + * each slice referring to the PPS + * @diff_cu_qp_delta_depth: specifies the difference between the luma coding + * tree block size and the minimum luma coding block + * size of coding units that convey cu_qp_delta_abs + * and cu_qp_delta_sign_flag + * @pps_cb_qp_offset: specify the offsets to the luma quantization parameter Cb + * @pps_cr_qp_offset: specify the offsets to the luma quantization parameter Cr + * @num_tile_columns_minus1: plus 1 specifies the number of tile columns + * partitioning the picture + * @num_tile_rows_minus1: plus 1 specifies the number of tile rows partitioning + * the picture + * @column_width_minus1: plus 1 specifies the width of the i-th tile column in + * units of coding tree blocks + * @row_height_minus1: plus 1 specifies the height of the i-th tile row in + * units of coding tree blocks + * @pps_beta_offset_div2: specify the default deblocking parameter offsets for + * beta divided by 2 + * @pps_tc_offset_div2: specify the default deblocking parameter offsets for tC + * divided by 2 + * @log2_parallel_merge_level_minus2: plus 2 specifies the value of the variable + * Log2ParMrgLevel + * @flags: see V4L2_HEVC_PPS_FLAG_{} + */ struct v4l2_ctrl_hevc_pps { - /* ISO/IEC 23008-2, ITU-T Rec. H.265: Picture parameter set */ __u8 pic_parameter_set_id; __u8 num_extra_slice_header_bits; __u8 num_ref_idx_l0_default_active_minus1; @@ -148,6 +242,14 @@ struct v4l2_ctrl_hevc_pps { #define V4L2_HEVC_DPB_ENTRIES_NUM_MAX 16 +/** + * struct v4l2_hevc_dpb_entry - HEVC decoded picture buffer entry + * + * @timestamp: timestamp of the V4L2 capture buffer to use as reference. + * @flags: long term flag for the reference frame + * @field_pic: whether the reference is a field picture or a frame. + * @pic_order_cnt_val: the picture order count of the reference. + */ struct v4l2_hevc_dpb_entry { __u64 timestamp; __u8 flags; @@ -156,6 +258,31 @@ struct v4l2_hevc_dpb_entry { __u8 padding[2]; }; +/** + * struct v4l2_hevc_pred_weight_table - HEVC weighted prediction parameters + * + * @delta_luma_weight_l0: the difference of the weighting factor applied + * to the luma prediction value for list 0 + * @luma_offset_l0: the additive offset applied to the luma prediction value + * for list 0 + * @delta_chroma_weight_l0: the difference of the weighting factor applied + * to the chroma prediction values for list 0 + * @chroma_offset_l0: the difference of the additive offset applied to + * the chroma prediction values for list 0 + * @delta_luma_weight_l1: the difference of the weighting factor applied + * to the luma prediction value for list 1 + * @luma_offset_l1: the additive offset applied to the luma prediction value + * for list 1 + * @delta_chroma_weight_l1: the difference of the weighting factor applied + * to the chroma prediction values for list 1 + * @chroma_offset_l1: the difference of the additive offset applied to + * the chroma prediction values for list 1 + * @luma_log2_weight_denom: the base 2 logarithm of the denominator for + * all luma weighting factors + * @delta_chroma_log2_weight_denom: the difference of the base 2 logarithm + * of the denominator for all chroma + * weighting factors + */ struct v4l2_hevc_pred_weight_table { __s8 delta_luma_weight_l0[V4L2_HEVC_DPB_ENTRIES_NUM_MAX]; __s8 luma_offset_l0[V4L2_HEVC_DPB_ENTRIES_NUM_MAX]; @@ -184,6 +311,50 @@ struct v4l2_hevc_pred_weight_table { #define V4L2_HEVC_SLICE_PARAMS_FLAG_SLICE_LOOP_FILTER_ACROSS_SLICES_ENABLED (1ULL << 8) #define V4L2_HEVC_SLICE_PARAMS_FLAG_DEPENDENT_SLICE_SEGMENT (1ULL << 9) +/** + * v4l2_ctrl_hevc_slice_params - HEVC slice parameters + * + * @bit_size: size (in bits) of the current slice data + * @data_bit_offset: offset (in bits) to the video data in the current slice data + * @nal_unit_type: specifies the coding type of the slice (B, P or I) + * @nuh_temporal_id_plus1: minus 1 specifies a temporal identifier for the NAL unit + * @slice_type: see V4L2_HEVC_SLICE_TYPE_{} + * @colour_plane_id: specifies the colour plane associated with the current slice + * @slice_pic_order_cnt: specifies the picture order count + * @num_ref_idx_l0_active_minus1: specifies the maximum reference index for + * reference picture list 0 that may be used to decode + * the slice + * @num_ref_idx_l1_active_minus1: specifies the maximum reference index for + * reference picture list 1 that may be used to decode + * the slice + * @collocated_ref_idx: specifies the reference index of the collocated picture used + * for temporal motion vector prediction + * @five_minus_max_num_merge_cand: specifies the maximum number of merging + * motion vector prediction candidates supported in + * the slice subtracted from 5 + * @slice_qp_delta: specifies the initial value of QpY to be used for the coding + * blocks in the slice + * @slice_cb_qp_offset: specifies a difference to be added to the value of pps_cb_qp_offset + * @slice_cr_qp_offset: specifies a difference to be added to the value of pps_cr_qp_offset + * @slice_act_y_qp_offset: screen content extension parameters + * @slice_act_cb_qp_offset: screen content extension parameters + * @slice_act_cr_qp_offset: screen content extension parameters + * @slice_beta_offset_div2: specify the deblocking parameter offsets for beta divided by 2 + * @slice_tc_offset_div2: specify the deblocking parameter offsets for tC divided by 2 + * @pic_struct: indicates whether a picture should be displayed as a frame or as one or + * more fields + * @slice_segment_addr: specifies the address of the first coding tree block in + * the slice segment + * @ref_idx_l0: the list of L0 reference elements as indices in the DPB + * @ref_idx_l1: the list of L1 reference elements as indices in the DPB + * @short_term_ref_pic_set_size: specifies the size of short-term reference + * pictures included in the SPS + * @long_term_ref_pic_set_size: specifies the size of long-term reference + * picture include in the SPS + * @pred_weight_table: the prediction weight coefficients for inter-picture + * prediction + * @flags: see V4L2_HEVC_SLICE_PARAMS_FLAG_{} + */ struct v4l2_ctrl_hevc_slice_params { __u32 bit_size; __u32 data_bit_offset; @@ -230,6 +401,28 @@ struct v4l2_ctrl_hevc_slice_params { #define V4L2_HEVC_DECODE_PARAM_FLAG_IDR_PIC 0x2 #define V4L2_HEVC_DECODE_PARAM_FLAG_NO_OUTPUT_OF_PRIOR 0x4 +/** + * struct v4l2_ctrl_hevc_decode_params - HEVC decode parameters + * + * @pic_order_cnt_val: picture order count + * @short_term_ref_pic_set_size: specifies the size of short-term reference + * pictures set included in the SPS of the first slice + * @long_term_ref_pic_set_size: specifies the size of long-term reference + * pictures set include in the SPS of the first slice + * @num_active_dpb_entries: the number of entries in dpb + * @dpb: the decoded picture buffer, for meta-data about reference frames + * @num_poc_st_curr_before: the number of reference pictures in the short-term + * set that come before the current frame + * @num_poc_st_curr_after: the number of reference pictures in the short-term + * set that come after the current frame + * @num_poc_lt_curr: the number of reference pictures in the long-term set + * @poc_st_curr_before: provides the index of the short term before references + * in DPB array + * @poc_st_curr_after: provides the index of the short term after references + * in DPB array + * @poc_lt_curr: provides the index of the long term references in DPB array + * @flags: see V4L2_HEVC_DECODE_PARAM_FLAG_{} + */ struct v4l2_ctrl_hevc_decode_params { __s32 pic_order_cnt_val; __u16 short_term_ref_pic_set_size; @@ -245,6 +438,28 @@ struct v4l2_ctrl_hevc_decode_params { __u64 flags; }; +/** + * struct v4l2_ctrl_hevc_scaling_matrix - HEVC scaling lists parameters + * + * @scaling_list_4x4: scaling list is used for the scaling process for + * transform coefficients. The values on each scaling + * list are expected in raster scan order + * @scaling_list_8x8: scaling list is used for the scaling process for + * transform coefficients. The values on each scaling + * list are expected in raster scan order + * @scaling_list_16x16: scaling list is used for the scaling process for + * transform coefficients. The values on each scaling + * list are expected in raster scan order + * @scaling_list_32x32: scaling list is used for the scaling process for + * transform coefficients. The values on each scaling + * list are expected in raster scan order + * @scaling_list_dc_coef_16x16: scaling list is used for the scaling process + * for transform coefficients. The values on each + * scaling list are expected in raster scan order. + * @scaling_list_dc_coef_32x32: scaling list is used for the scaling process + * for transform coefficients. The values on each + * scaling list are expected in raster scan order. + */ struct v4l2_ctrl_hevc_scaling_matrix { __u8 scaling_list_4x4[6][16]; __u8 scaling_list_8x8[6][64]; From patchwork Tue Jun 14 07:49:39 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Benjamin Gaignard X-Patchwork-Id: 581857 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2E92FC433EF for ; Tue, 14 Jun 2022 07:50:16 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238473AbiFNHuM (ORCPT ); Tue, 14 Jun 2022 03:50:12 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39252 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1354893AbiFNHuD (ORCPT ); Tue, 14 Jun 2022 03:50:03 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [46.235.227.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2C7953ED34; Tue, 14 Jun 2022 00:50:03 -0700 (PDT) Received: from benjamin-XPS-13-9310.. (unknown [IPv6:2a01:e0a:120:3210:4a7b:8d3a:acaa:ec46]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: benjamin.gaignard) by madras.collabora.co.uk (Postfix) with ESMTPSA id 5EBED66016B0; Tue, 14 Jun 2022 08:50:01 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1655193001; bh=x0nxGwrt50+4LgCDX6/bdpXdRkeiHuZS/A3/2NyD25E=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=hmhblfmZyolpNa8tNnzVCAj4BGRekG0veN1JKyw/TYlFEUZ/66iOJtBdI2oPlUK2a esh72LhujUROOuzi4XkUagv3ynXeVHT70W1aAB4J7TnK45ss5tzxI4ux5VwGCbGrOJ PsT9jLzVbs+rce4ZLrTAirVJ4XPegDRwvMix3uk2HyPoM3+8Q5FAbJ392Wk/A0gdiU o6RcUWio/Ec5U77NcbruQVLif5/dPLV3g0rVl26x8fH0AJdRJkK1BSyGfyoocM4J5M /r52IUs3yK7c6fDRqUU5VS6z5rpXcPsAXmIz3IXLMkZ81YXRBZsN8oelLcpbR3A33A X6tFeKMxNmGag== From: Benjamin Gaignard To: mchehab@kernel.org, hverkuil@xs4all.nl, ezequiel@vanguardiasur.com.ar, p.zabel@pengutronix.de, gregkh@linuxfoundation.org, mripard@kernel.org, paul.kocialkowski@bootlin.com, wens@csie.org, jernej.skrabec@gmail.com, samuel@sholland.org, nicolas.dufresne@collabora.com, andrzej.p@collabora.com Cc: linux-media@vger.kernel.org, linux-kernel@vger.kernel.org, linux-rockchip@lists.infradead.org, linux-staging@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, kernel@collabora.com, Benjamin Gaignard Subject: [PATCH v7 09/17] media: uapi: HEVC: Define V4L2_CID_STATELESS_HEVC_SLICE_PARAMS as a dynamic array Date: Tue, 14 Jun 2022 09:49:39 +0200 Message-Id: <20220614074947.160316-10-benjamin.gaignard@collabora.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20220614074947.160316-1-benjamin.gaignard@collabora.com> References: <20220614074947.160316-1-benjamin.gaignard@collabora.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org Make explicit that V4L2_CID_STATELESS_HEVC_SLICE_PARAMS control is a dynamic array control type. Some drivers may be able to receive multiple slices in one control to improve decoding performance. Define the max size of the dynamic that can driver can set in .dims = {}. Signed-off-by: Benjamin Gaignard --- version 7: - Add Jernej patch to set array dims for Cedrus version 6: - Set V4L2_CTRL_FLAG_DYNAMIC_ARRAY flag automatically when using V4L2_CID_STATELESS_HEVC_SLICE_PARAMS control. - Add a define for max slices count Documentation/userspace-api/media/v4l/ext-ctrls-codec.rst | 2 ++ drivers/media/v4l2-core/v4l2-ctrls-defs.c | 1 + drivers/staging/media/sunxi/cedrus/cedrus.c | 1 + include/media/hevc-ctrls.h | 5 +++++ 4 files changed, 9 insertions(+) diff --git a/Documentation/userspace-api/media/v4l/ext-ctrls-codec.rst b/Documentation/userspace-api/media/v4l/ext-ctrls-codec.rst index 06b967de140c..0796b1563daa 100644 --- a/Documentation/userspace-api/media/v4l/ext-ctrls-codec.rst +++ b/Documentation/userspace-api/media/v4l/ext-ctrls-codec.rst @@ -2986,6 +2986,8 @@ enum v4l2_mpeg_video_hevc_size_of_length_field - These bitstream parameters are defined according to :ref:`hevc`. They are described in section 7.4.7 "General slice segment header semantics" of the specification. + This control is a dynamically sized 1-dimensional array, + V4L2_CTRL_FLAG_DYNAMIC_ARRAY flag must be set when using it. .. c:type:: v4l2_ctrl_hevc_slice_params diff --git a/drivers/media/v4l2-core/v4l2-ctrls-defs.c b/drivers/media/v4l2-core/v4l2-ctrls-defs.c index 9f55503cd3d6..d594efbcbb93 100644 --- a/drivers/media/v4l2-core/v4l2-ctrls-defs.c +++ b/drivers/media/v4l2-core/v4l2-ctrls-defs.c @@ -1510,6 +1510,7 @@ void v4l2_ctrl_fill(u32 id, const char **name, enum v4l2_ctrl_type *type, break; case V4L2_CID_STATELESS_HEVC_SLICE_PARAMS: *type = V4L2_CTRL_TYPE_HEVC_SLICE_PARAMS; + *flags |= V4L2_CTRL_FLAG_DYNAMIC_ARRAY; break; case V4L2_CID_STATELESS_HEVC_SCALING_MATRIX: *type = V4L2_CTRL_TYPE_HEVC_SCALING_MATRIX; diff --git a/drivers/staging/media/sunxi/cedrus/cedrus.c b/drivers/staging/media/sunxi/cedrus/cedrus.c index 87be975a72b6..f3391c7c811c 100644 --- a/drivers/staging/media/sunxi/cedrus/cedrus.c +++ b/drivers/staging/media/sunxi/cedrus/cedrus.c @@ -178,6 +178,7 @@ static const struct cedrus_control cedrus_controls[] = { { .cfg = { .id = V4L2_CID_STATELESS_HEVC_SLICE_PARAMS, + .dims = { 1 }, }, .codec = CEDRUS_CODEC_H265, }, diff --git a/include/media/hevc-ctrls.h b/include/media/hevc-ctrls.h index 0dbd5d681c28..140151609c96 100644 --- a/include/media/hevc-ctrls.h +++ b/include/media/hevc-ctrls.h @@ -311,9 +311,14 @@ struct v4l2_hevc_pred_weight_table { #define V4L2_HEVC_SLICE_PARAMS_FLAG_SLICE_LOOP_FILTER_ACROSS_SLICES_ENABLED (1ULL << 8) #define V4L2_HEVC_SLICE_PARAMS_FLAG_DEPENDENT_SLICE_SEGMENT (1ULL << 9) +#define V4L2_HEVC_SLICE_MAX_COUNT 600 + /** * v4l2_ctrl_hevc_slice_params - HEVC slice parameters * + * This control is a dynamically sized 1-dimensional array, + * V4L2_CTRL_FLAG_DYNAMIC_ARRAY flag must be set when using it. + * * @bit_size: size (in bits) of the current slice data * @data_bit_offset: offset (in bits) to the video data in the current slice data * @nal_unit_type: specifies the coding type of the slice (B, P or I) From patchwork Tue Jun 14 07:49:41 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Benjamin Gaignard X-Patchwork-Id: 581855 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id EE7DFC43334 for ; Tue, 14 Jun 2022 07:50:26 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1355016AbiFNHuZ (ORCPT ); Tue, 14 Jun 2022 03:50:25 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39398 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1354995AbiFNHuL (ORCPT ); Tue, 14 Jun 2022 03:50:11 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [IPv6:2a00:1098:0:82:1000:25:2eeb:e5ab]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6A49A3ED06; Tue, 14 Jun 2022 00:50:04 -0700 (PDT) Received: from benjamin-XPS-13-9310.. (unknown [IPv6:2a01:e0a:120:3210:4a7b:8d3a:acaa:ec46]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: benjamin.gaignard) by madras.collabora.co.uk (Postfix) with ESMTPSA id BF2A066016DF; Tue, 14 Jun 2022 08:50:02 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1655193003; bh=ftNAvCRvK+AQGEske0ptTAtK3LtSx8QeJyl1icndO24=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=jc8ZVdrmR1GWgBRmZHbgE3DYdRdyKq7cJJuYQa51B4PsZwEqRmWjtvFr9/HKFimF3 jxK3/CtIpnuYIAjwoh5y3J6gtLWuB7CTSv8aVRXUNXVNTuq28pWFuR9cn2MOtBvAhY /poZHUuY7hbp+kw4PAN0qXKoEq2XEJJKWJ+HJIiiFdXCB8I7R3fDzP8HBeQw2hyw0F awim8H1ZScfp5Gfg5ilJ5Ox+MUUV5Ok4pOmqvnaqYKfZtQHVWwdFqMN2z1JQapUQhP YqYdCSYPj40sp1E81uLwoAAJVQ59oe6gyQH0oqbENlV0q8bLLpShZUcjJkWjnTt5IB jxXYfzEipuShA== From: Benjamin Gaignard To: mchehab@kernel.org, hverkuil@xs4all.nl, ezequiel@vanguardiasur.com.ar, p.zabel@pengutronix.de, gregkh@linuxfoundation.org, mripard@kernel.org, paul.kocialkowski@bootlin.com, wens@csie.org, jernej.skrabec@gmail.com, samuel@sholland.org, nicolas.dufresne@collabora.com, andrzej.p@collabora.com Cc: linux-media@vger.kernel.org, linux-kernel@vger.kernel.org, linux-rockchip@lists.infradead.org, linux-staging@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, kernel@collabora.com, Benjamin Gaignard Subject: [PATCH v7 11/17] media: uapi: Add V4L2_CID_STATELESS_HEVC_ENTRY_POINT_OFFSETS control Date: Tue, 14 Jun 2022 09:49:41 +0200 Message-Id: <20220614074947.160316-12-benjamin.gaignard@collabora.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20220614074947.160316-1-benjamin.gaignard@collabora.com> References: <20220614074947.160316-1-benjamin.gaignard@collabora.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org The number of 'entry point offset' can be very variable. Instead of using a large static array define a v4l2 dynamic array of U32 (V4L2_CTRL_TYPE_U32). The number of entry point offsets is reported by the elems field and in struct v4l2_ctrl_hevc_slice_params.num_entry_point_offsets field. Signed-off-by: Benjamin Gaignard --- .../userspace-api/media/v4l/ext-ctrls-codec.rst | 11 +++++++++++ drivers/media/v4l2-core/v4l2-ctrls-defs.c | 5 +++++ include/media/hevc-ctrls.h | 5 ++++- 3 files changed, 20 insertions(+), 1 deletion(-) diff --git a/Documentation/userspace-api/media/v4l/ext-ctrls-codec.rst b/Documentation/userspace-api/media/v4l/ext-ctrls-codec.rst index 0796b1563daa..05228e280f66 100644 --- a/Documentation/userspace-api/media/v4l/ext-ctrls-codec.rst +++ b/Documentation/userspace-api/media/v4l/ext-ctrls-codec.rst @@ -3010,6 +3010,9 @@ enum v4l2_mpeg_video_hevc_size_of_length_field - * - __u32 - ``data_bit_offset`` - Offset (in bits) to the video data in the current slice data. + * - __u32 + - ``num_entry_point_offsets`` + - Specifies the number of entry point offset syntax elements in the slice header. * - __u8 - ``nal_unit_type`` - Specifies the coding type of the slice (B, P or I). @@ -3150,6 +3153,14 @@ enum v4l2_mpeg_video_hevc_size_of_length_field - \normalsize +``V4L2_CID_STATELESS_HEVC_ENTRY_POINT_OFFSETS (integer)`` + Specifies entry point offsets in bytes. + This control is a dynamically sized array. The number of entry point + offsets is reported by the ``elems`` field. + This bitstream parameter is defined according to :ref:`hevc`. + They are described in section 7.4.7.1 "General slice segment header + semantics" of the specification. + ``V4L2_CID_STATELESS_HEVC_SCALING_MATRIX (struct)`` Specifies the HEVC scaling matrix parameters used for the scaling process for transform coefficients. diff --git a/drivers/media/v4l2-core/v4l2-ctrls-defs.c b/drivers/media/v4l2-core/v4l2-ctrls-defs.c index d594efbcbb93..e22921e7ea61 100644 --- a/drivers/media/v4l2-core/v4l2-ctrls-defs.c +++ b/drivers/media/v4l2-core/v4l2-ctrls-defs.c @@ -1188,6 +1188,7 @@ const char *v4l2_ctrl_get_name(u32 id) case V4L2_CID_STATELESS_HEVC_DECODE_PARAMS: return "HEVC Decode Parameters"; case V4L2_CID_STATELESS_HEVC_DECODE_MODE: return "HEVC Decode Mode"; case V4L2_CID_STATELESS_HEVC_START_CODE: return "HEVC Start Code"; + case V4L2_CID_STATELESS_HEVC_ENTRY_POINT_OFFSETS: return "HEVC Entry Point Offsets"; /* Colorimetry controls */ /* Keep the order of the 'case's the same as in v4l2-controls.h! */ @@ -1518,6 +1519,10 @@ void v4l2_ctrl_fill(u32 id, const char **name, enum v4l2_ctrl_type *type, case V4L2_CID_STATELESS_HEVC_DECODE_PARAMS: *type = V4L2_CTRL_TYPE_HEVC_DECODE_PARAMS; break; + case V4L2_CID_STATELESS_HEVC_ENTRY_POINT_OFFSETS: + *type = V4L2_CTRL_TYPE_U32; + *flags |= V4L2_CTRL_FLAG_DYNAMIC_ARRAY; + break; case V4L2_CID_STATELESS_VP9_COMPRESSED_HDR: *type = V4L2_CTRL_TYPE_VP9_COMPRESSED_HDR; break; diff --git a/include/media/hevc-ctrls.h b/include/media/hevc-ctrls.h index a3c829ef531a..1319cb99ae3f 100644 --- a/include/media/hevc-ctrls.h +++ b/include/media/hevc-ctrls.h @@ -20,6 +20,7 @@ #define V4L2_CID_STATELESS_HEVC_DECODE_PARAMS (V4L2_CID_CODEC_BASE + 1012) #define V4L2_CID_STATELESS_HEVC_DECODE_MODE (V4L2_CID_CODEC_BASE + 1015) #define V4L2_CID_STATELESS_HEVC_START_CODE (V4L2_CID_CODEC_BASE + 1016) +#define V4L2_CID_STATELESS_HEVC_ENTRY_POINT_OFFSETS (V4L2_CID_CODEC_BASE + 1017) /* enum v4l2_ctrl_type type values */ #define V4L2_CTRL_TYPE_HEVC_SPS 0x0120 @@ -318,6 +319,8 @@ struct v4l2_hevc_pred_weight_table { * * @bit_size: size (in bits) of the current slice data * @data_bit_offset: offset (in bits) to the video data in the current slice data + * @num_entry_point_offsets: specifies the number of entry point offset syntax + * elements in the slice header. * @nal_unit_type: specifies the coding type of the slice (B, P or I) * @nuh_temporal_id_plus1: minus 1 specifies a temporal identifier for the NAL unit * @slice_type: see V4L2_HEVC_SLICE_TYPE_{} @@ -360,7 +363,7 @@ struct v4l2_hevc_pred_weight_table { struct v4l2_ctrl_hevc_slice_params { __u32 bit_size; __u32 data_bit_offset; - + __u32 num_entry_point_offsets; /* ISO/IEC 23008-2, ITU-T Rec. H.265: NAL unit header */ __u8 nal_unit_type; __u8 nuh_temporal_id_plus1; From patchwork Tue Jun 14 07:49:45 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Benjamin Gaignard X-Patchwork-Id: 581853 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id DD2E8C433EF for ; Tue, 14 Jun 2022 07:50:34 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1355092AbiFNHub (ORCPT ); Tue, 14 Jun 2022 03:50:31 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39414 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1355007AbiFNHuL (ORCPT ); Tue, 14 Jun 2022 03:50:11 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [46.235.227.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 45B663EF22; Tue, 14 Jun 2022 00:50:07 -0700 (PDT) Received: from benjamin-XPS-13-9310.. (unknown [IPv6:2a01:e0a:120:3210:4a7b:8d3a:acaa:ec46]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: benjamin.gaignard) by madras.collabora.co.uk (Postfix) with ESMTPSA id 7DD4666016F8; Tue, 14 Jun 2022 08:50:05 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1655193006; bh=u1oYFY91lKCaG1IS2p75wfBvd3Ndu0vMqfec7fE7nLk=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Qbtmge5h+PHV1Ma+D2YXzzC9f1Z6lCI4LqHtnkHbdOrjpKTN2I3/m3xQkO1KsT2Oh qyNt4FcLGxIIN1AlA4PI4dbgaTyFDMHMBfTpoZqo1gIhHODLSsRdkQ9Kze3XHQQ+uZ QlFbQpsOQR+dICLmS4cqDOnC8Fw+yRoQ3JAOtfp4gauCMNTOwWIXi9f3WWMXfo928c kZNhYCs1uLSEqGYrwEx3uvbaP55cUcrlF7MOzh/NAo35ATbcKXNjlESaS0SKsNE5+V QYzFktBZpOmBCc7R62+Y1M7xj763vm8Jueg0fGjfBDDfrgShhbvH1nNrnQFbrBadMi qbMpB33mxelKw== From: Benjamin Gaignard To: mchehab@kernel.org, hverkuil@xs4all.nl, ezequiel@vanguardiasur.com.ar, p.zabel@pengutronix.de, gregkh@linuxfoundation.org, mripard@kernel.org, paul.kocialkowski@bootlin.com, wens@csie.org, jernej.skrabec@gmail.com, samuel@sholland.org, nicolas.dufresne@collabora.com, andrzej.p@collabora.com Cc: linux-media@vger.kernel.org, linux-kernel@vger.kernel.org, linux-rockchip@lists.infradead.org, linux-staging@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, kernel@collabora.com, Benjamin Gaignard Subject: [PATCH v7 15/17] media: uapi: HEVC: fix padding in v4l2 control structures Date: Tue, 14 Jun 2022 09:49:45 +0200 Message-Id: <20220614074947.160316-16-benjamin.gaignard@collabora.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20220614074947.160316-1-benjamin.gaignard@collabora.com> References: <20220614074947.160316-1-benjamin.gaignard@collabora.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org Fix padding where needed to remove holes and stay align on cache boundaries Signed-off-by: Benjamin Gaignard --- .../media/v4l/ext-ctrls-codec.rst | 6 +++--- drivers/media/v4l2-core/v4l2-ctrls-core.c | 9 --------- include/media/hevc-ctrls.h | 19 ++++++++++++------- 3 files changed, 15 insertions(+), 19 deletions(-) diff --git a/Documentation/userspace-api/media/v4l/ext-ctrls-codec.rst b/Documentation/userspace-api/media/v4l/ext-ctrls-codec.rst index 05228e280f66..48a8825a001b 100644 --- a/Documentation/userspace-api/media/v4l/ext-ctrls-codec.rst +++ b/Documentation/userspace-api/media/v4l/ext-ctrls-codec.rst @@ -3509,9 +3509,6 @@ enum v4l2_mpeg_video_hevc_size_of_length_field - * - __u8 - ``num_active_dpb_entries`` - The number of entries in ``dpb``. - * - struct :c:type:`v4l2_hevc_dpb_entry` - - ``dpb[V4L2_HEVC_DPB_ENTRIES_NUM_MAX]`` - - The decoded picture buffer, for meta-data about reference frames. * - __u8 - ``num_poc_st_curr_before`` - The number of reference pictures in the short-term set that come before @@ -3535,6 +3532,9 @@ enum v4l2_mpeg_video_hevc_size_of_length_field - - ``poc_lt_curr[V4L2_HEVC_DPB_ENTRIES_NUM_MAX]`` - PocLtCurr as described in section 8.3.2 "Decoding process for reference picture set": provides the index of the long term references in DPB array. + * - struct :c:type:`v4l2_hevc_dpb_entry` + - ``dpb[V4L2_HEVC_DPB_ENTRIES_NUM_MAX]`` + - The decoded picture buffer, for meta-data about reference frames. * - __u64 - ``flags`` - See :ref:`Decode Parameters Flags ` diff --git a/drivers/media/v4l2-core/v4l2-ctrls-core.c b/drivers/media/v4l2-core/v4l2-ctrls-core.c index c5c5407584ff..fb68786c498b 100644 --- a/drivers/media/v4l2-core/v4l2-ctrls-core.c +++ b/drivers/media/v4l2-core/v4l2-ctrls-core.c @@ -824,20 +824,11 @@ static int std_validate_compound(const struct v4l2_ctrl *ctrl, u32 idx, if (p_hevc_decode_params->num_active_dpb_entries > V4L2_HEVC_DPB_ENTRIES_NUM_MAX) return -EINVAL; - - for (i = 0; i < p_hevc_decode_params->num_active_dpb_entries; - i++) { - struct v4l2_hevc_dpb_entry *dpb_entry = - &p_hevc_decode_params->dpb[i]; - - zero_padding(*dpb_entry); - } break; case V4L2_CTRL_TYPE_HEVC_SLICE_PARAMS: p_hevc_slice_params = p; - zero_padding(p_hevc_slice_params->pred_weight_table); zero_padding(*p_hevc_slice_params); break; diff --git a/include/media/hevc-ctrls.h b/include/media/hevc-ctrls.h index efc0412ac41e..9abca1a75bd4 100644 --- a/include/media/hevc-ctrls.h +++ b/include/media/hevc-ctrls.h @@ -133,7 +133,9 @@ struct v4l2_ctrl_hevc_sps { __u8 chroma_format_idc; __u8 sps_max_sub_layers_minus1; + __u8 reserved[6]; __u64 flags; + __u8 padding[24]; }; #define V4L2_HEVC_PPS_FLAG_DEPENDENT_SLICE_SEGMENT_ENABLED (1ULL << 0) @@ -210,9 +212,10 @@ struct v4l2_ctrl_hevc_pps { __s8 pps_beta_offset_div2; __s8 pps_tc_offset_div2; __u8 log2_parallel_merge_level_minus2; + __u8 reserved[9]; - __u8 padding[4]; __u64 flags; + __u8 padding[56]; }; #define V4L2_HEVC_DPB_ENTRY_LONG_TERM_REFERENCE 0x01 @@ -245,8 +248,8 @@ struct v4l2_hevc_dpb_entry { __u64 timestamp; __u8 flags; __u8 field_pic; + __u16 reserved; __s32 pic_order_cnt_val; - __u8 padding[2]; }; /** @@ -285,8 +288,6 @@ struct v4l2_hevc_pred_weight_table { __s8 delta_chroma_weight_l1[V4L2_HEVC_DPB_ENTRIES_NUM_MAX][2]; __s8 chroma_offset_l1[V4L2_HEVC_DPB_ENTRIES_NUM_MAX][2]; - __u8 padding[6]; - __u8 luma_log2_weight_denom; __s8 delta_chroma_log2_weight_denom; }; @@ -381,18 +382,20 @@ struct v4l2_ctrl_hevc_slice_params { /* ISO/IEC 23008-2, ITU-T Rec. H.265: Picture timing SEI message */ __u8 pic_struct; + __u8 reserved0[3]; /* ISO/IEC 23008-2, ITU-T Rec. H.265: General slice segment header */ __u32 slice_segment_addr; __u8 ref_idx_l0[V4L2_HEVC_DPB_ENTRIES_NUM_MAX]; __u8 ref_idx_l1[V4L2_HEVC_DPB_ENTRIES_NUM_MAX]; __u16 short_term_ref_pic_set_size; __u16 long_term_ref_pic_set_size; - __u8 padding; /* ISO/IEC 23008-2, ITU-T Rec. H.265: Weighted prediction parameter */ struct v4l2_hevc_pred_weight_table pred_weight_table; + __u8 reserved1[2]; __u64 flags; + __u8 padding[40]; }; #define V4L2_HEVC_DECODE_PARAM_FLAG_IRAP_PIC 0x1 @@ -408,7 +411,6 @@ struct v4l2_ctrl_hevc_slice_params { * @long_term_ref_pic_set_size: specifies the size of long-term reference * pictures set include in the SPS of the first slice * @num_active_dpb_entries: the number of entries in dpb - * @dpb: the decoded picture buffer, for meta-data about reference frames * @num_poc_st_curr_before: the number of reference pictures in the short-term * set that come before the current frame * @num_poc_st_curr_after: the number of reference pictures in the short-term @@ -419,6 +421,7 @@ struct v4l2_ctrl_hevc_slice_params { * @poc_st_curr_after: provides the index of the short term after references * in DPB array * @poc_lt_curr: provides the index of the long term references in DPB array + * @dpb: the decoded picture buffer, for meta-data about reference frames * @flags: see V4L2_HEVC_DECODE_PARAM_FLAG_{} */ struct v4l2_ctrl_hevc_decode_params { @@ -426,14 +429,16 @@ struct v4l2_ctrl_hevc_decode_params { __u16 short_term_ref_pic_set_size; __u16 long_term_ref_pic_set_size; __u8 num_active_dpb_entries; - struct v4l2_hevc_dpb_entry dpb[V4L2_HEVC_DPB_ENTRIES_NUM_MAX]; __u8 num_poc_st_curr_before; __u8 num_poc_st_curr_after; __u8 num_poc_lt_curr; __u8 poc_st_curr_before[V4L2_HEVC_DPB_ENTRIES_NUM_MAX]; __u8 poc_st_curr_after[V4L2_HEVC_DPB_ENTRIES_NUM_MAX]; __u8 poc_lt_curr[V4L2_HEVC_DPB_ENTRIES_NUM_MAX]; + __u8 reserved[4]; + struct v4l2_hevc_dpb_entry dpb[V4L2_HEVC_DPB_ENTRIES_NUM_MAX]; __u64 flags; + __u8 padding[56]; }; /** From patchwork Tue Jun 14 07:49:46 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Benjamin Gaignard X-Patchwork-Id: 581854 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 49AF9C43334 for ; Tue, 14 Jun 2022 07:50:29 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1355027AbiFNHu1 (ORCPT ); Tue, 14 Jun 2022 03:50:27 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39400 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1354210AbiFNHuQ (ORCPT ); Tue, 14 Jun 2022 03:50:16 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [46.235.227.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 058B13EF2A; Tue, 14 Jun 2022 00:50:08 -0700 (PDT) Received: from benjamin-XPS-13-9310.. (unknown [IPv6:2a01:e0a:120:3210:4a7b:8d3a:acaa:ec46]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: benjamin.gaignard) by madras.collabora.co.uk (Postfix) with ESMTPSA id 311636601709; Tue, 14 Jun 2022 08:50:06 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1655193006; bh=foMCKM0HcDBii6A+qPIk9svG81J6/ASfNN6IIllYc2U=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=PSHz6Y58Jsy3T4WVDy9XQzUy4sjEmDSOT+md0l7EmMQKdRj7sSYRm4zYOlSS38EO2 dAp8ZGEejhi63ek4OQN92kQi5SQOVF0bIzka8MmW5ohEu4pkC1J3lUBopNFz+0H2jq L5gHMPvrXpqchiLZaWLrXYNoiaHZeQbG3RDjTenLHU0/26p1Db2MNrU6uvobp0XjBC 0botGFQNjVG9ropI0M9PTnHKJwljjWZtDsxC4AnL84Hnp5rKX/sTqyXZVud1TnfHYs 7ACHU0uHi9fE3U5S98HuMa9s8egyYnmnOxQe1yUlG0eO4bn/BJNNZvBsdJ9fyI2sM6 XQbpkHAOW8xRQ== From: Benjamin Gaignard To: mchehab@kernel.org, hverkuil@xs4all.nl, ezequiel@vanguardiasur.com.ar, p.zabel@pengutronix.de, gregkh@linuxfoundation.org, mripard@kernel.org, paul.kocialkowski@bootlin.com, wens@csie.org, jernej.skrabec@gmail.com, samuel@sholland.org, nicolas.dufresne@collabora.com, andrzej.p@collabora.com Cc: linux-media@vger.kernel.org, linux-kernel@vger.kernel.org, linux-rockchip@lists.infradead.org, linux-staging@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, kernel@collabora.com, Benjamin Gaignard Subject: [PATCH v7 16/17] media: uapi: Change data_bit_offset definition Date: Tue, 14 Jun 2022 09:49:46 +0200 Message-Id: <20220614074947.160316-17-benjamin.gaignard@collabora.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20220614074947.160316-1-benjamin.gaignard@collabora.com> References: <20220614074947.160316-1-benjamin.gaignard@collabora.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org 'F.7.3.6.1 General slice segment header syntax' section of HEVC specification describes that a slice header always end aligned on byte boundary, therefore we only need to provide the data offset in bytes. Signed-off-by: Benjamin Gaignard --- version 7: - Apply Jernej patches for Cedrus .../media/v4l/ext-ctrls-codec.rst | 4 ++-- .../staging/media/sunxi/cedrus/cedrus_h265.c | 19 ++++++++++++++++++- .../staging/media/sunxi/cedrus/cedrus_video.c | 1 - include/media/hevc-ctrls.h | 4 ++-- 4 files changed, 22 insertions(+), 6 deletions(-) diff --git a/Documentation/userspace-api/media/v4l/ext-ctrls-codec.rst b/Documentation/userspace-api/media/v4l/ext-ctrls-codec.rst index 48a8825a001b..37079581c661 100644 --- a/Documentation/userspace-api/media/v4l/ext-ctrls-codec.rst +++ b/Documentation/userspace-api/media/v4l/ext-ctrls-codec.rst @@ -3008,8 +3008,8 @@ enum v4l2_mpeg_video_hevc_size_of_length_field - - ``bit_size`` - Size (in bits) of the current slice data. * - __u32 - - ``data_bit_offset`` - - Offset (in bits) to the video data in the current slice data. + - ``data_byte_offset`` + - Offset (in bytes) to the video data in the current slice data. * - __u32 - ``num_entry_point_offsets`` - Specifies the number of entry point offset syntax elements in the slice header. diff --git a/drivers/staging/media/sunxi/cedrus/cedrus_h265.c b/drivers/staging/media/sunxi/cedrus/cedrus_h265.c index 411601975124..7b67cb4621cf 100644 --- a/drivers/staging/media/sunxi/cedrus/cedrus_h265.c +++ b/drivers/staging/media/sunxi/cedrus/cedrus_h265.c @@ -317,6 +317,8 @@ static void cedrus_h265_setup(struct cedrus_ctx *ctx, u32 chroma_log2_weight_denom; u32 output_pic_list_index; u32 pic_order_cnt[2]; + u8 *padding; + int count; u32 reg; sps = run->h265.sps; @@ -405,7 +407,22 @@ static void cedrus_h265_setup(struct cedrus_ctx *ctx, /* Initialize bitstream access. */ cedrus_write(dev, VE_DEC_H265_TRIGGER, VE_DEC_H265_TRIGGER_INIT_SWDEC); - cedrus_h265_skip_bits(dev, slice_params->data_bit_offset); + /* + * Cedrus expects that bitstream pointer is actually at the end of the slice header + * instead of start of slice data. Padding is 8 bits at most (one bit set to 1 and + * at most seven bits set to 0), so we have to inspect only one byte before slice data. + */ + padding = (u8 *)vb2_plane_vaddr(&run->src->vb2_buf, 0) + + slice_params->data_byte_offset - 1; + + for (count = 0; count < 8; count++) + if (*padding & (1 << count)) + break; + + /* Include the one bit. */ + count++; + + cedrus_h265_skip_bits(dev, slice_params->data_byte_offset * 8 - count); /* Bitstream parameters. */ diff --git a/drivers/staging/media/sunxi/cedrus/cedrus_video.c b/drivers/staging/media/sunxi/cedrus/cedrus_video.c index 33726175d980..66714609b577 100644 --- a/drivers/staging/media/sunxi/cedrus/cedrus_video.c +++ b/drivers/staging/media/sunxi/cedrus/cedrus_video.c @@ -568,7 +568,6 @@ int cedrus_queue_init(void *priv, struct vb2_queue *src_vq, src_vq->type = V4L2_BUF_TYPE_VIDEO_OUTPUT; src_vq->io_modes = VB2_MMAP | VB2_DMABUF; - src_vq->dma_attrs = DMA_ATTR_NO_KERNEL_MAPPING; src_vq->drv_priv = ctx; src_vq->buf_struct_size = sizeof(struct cedrus_buffer); src_vq->ops = &cedrus_qops; diff --git a/include/media/hevc-ctrls.h b/include/media/hevc-ctrls.h index 9abca1a75bd4..936ff693967b 100644 --- a/include/media/hevc-ctrls.h +++ b/include/media/hevc-ctrls.h @@ -312,7 +312,7 @@ struct v4l2_hevc_pred_weight_table { * V4L2_CTRL_FLAG_DYNAMIC_ARRAY flag must be set when using it. * * @bit_size: size (in bits) of the current slice data - * @data_bit_offset: offset (in bits) to the video data in the current slice data + * @data_byte_offset: offset (in bytes) to the video data in the current slice data * @num_entry_point_offsets: specifies the number of entry point offset syntax * elements in the slice header. * @nal_unit_type: specifies the coding type of the slice (B, P or I) @@ -356,7 +356,7 @@ struct v4l2_hevc_pred_weight_table { */ struct v4l2_ctrl_hevc_slice_params { __u32 bit_size; - __u32 data_bit_offset; + __u32 data_byte_offset; __u32 num_entry_point_offsets; /* ISO/IEC 23008-2, ITU-T Rec. H.265: NAL unit header */ __u8 nal_unit_type;