From patchwork Wed Jan 16 08:21:08 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 155699 Delivered-To: patch@linaro.org Received: by 2002:a02:48:0:0:0:0:0 with SMTP id 69csp377515jaa; Wed, 16 Jan 2019 00:21:23 -0800 (PST) X-Google-Smtp-Source: ALg8bN6jUlpfz7ojgVkHpuzDhwjR7QYAaHc5NMOueAMqUUagVJGt9bOer2TWbhVsEqVPc1c/mvsA X-Received: by 2002:a17:902:bd86:: with SMTP id q6mr8422383pls.16.1547626883863; Wed, 16 Jan 2019 00:21:23 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1547626883; cv=none; d=google.com; s=arc-20160816; b=f/BKQVNNShdxJIlqRJ6WhX5fELfrnsX6Xvt4StQO0vFz3zMNfGKrjO7WqfrZP2wr+e 1lOzwCax67SNktPVydAAJigvG5avapwqFqXYx7kDVey0IrCwHTHNQr+8IR0ZflqonesV IIbSgtKm9zwDDlyWVPH33w52FUqL4VXbyQOeY5sbGne6dkfieppwq79NvfgmIj9Gr+fG rLWaiFC/AGd85Qalus01t0Q9hE10YInfn5OP3Gs79NKtLZJpXhvRJRhMI9dj/cfLqPZV W9eRM2WjYx6gWsWRdWXxwc4CNHDallziYfjhxfJSAk9EPPEs52SgbldEpQOlhuSDYCM1 rtDw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=DN8sKjFf4O+UFXK/DJwxmaNJcVTsvwJ3Eq5nhk+Hpm4=; b=hpxI65/vsAXogiw2TQKNz30q9akF/dm73R3kkhbDgrHmcv1flKAOYYaBp4g20CZmbD G05Zu5f2mPbA6jntgpZ8wWG7FT07U1BSLflwRQD7s6Jy2q29+JtkT0UCzEhXAKIJMG+H N78Whe7iq4nKMgyKTfQzE4mUUEEucHSx7UIqtQ6qw5d2eW6hLFiBxHmlC9vusJhcYRI0 tkybGBHl9WVfSU444isy7BoAXRoDTZEEMvFZ59oIkbcDbKp/hrA7Nu7yIrAwb3J06HFe pIRBM41TsdcC/77uWmF4M5s/yWQKdPqaq5Hqzm6RiB3nnzzZp9na50f+YuPYu9Xroszg jEXg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=LG4OXX5s; spf=pass (google.com: best guess record for domain of linux-gpio-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-gpio-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id e7si1484731pgv.499.2019.01.16.00.21.23; Wed, 16 Jan 2019 00:21:23 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-gpio-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=LG4OXX5s; spf=pass (google.com: best guess record for domain of linux-gpio-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-gpio-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730459AbfAPIVX (ORCPT + 5 others); Wed, 16 Jan 2019 03:21:23 -0500 Received: from mail-lj1-f196.google.com ([209.85.208.196]:35942 "EHLO mail-lj1-f196.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1730280AbfAPIVW (ORCPT ); Wed, 16 Jan 2019 03:21:22 -0500 Received: by mail-lj1-f196.google.com with SMTP id g11-v6so4692741ljk.3 for ; Wed, 16 Jan 2019 00:21:21 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=DN8sKjFf4O+UFXK/DJwxmaNJcVTsvwJ3Eq5nhk+Hpm4=; b=LG4OXX5skaOYsMsApsA++LC1dH0cw1iMiBxA2pPt4l2wnkxLBzR5tSzgeD4TXi3DRE sWSa3ynZwWKLuMPptMNyBH03j4MDBcgu/J+TjI5osPCw8EJ2JH5EL3y6JwWpHUeu+hjQ cr0lQjnxwNYD2MR05JYGpUR+eLjp5+wjXBnag= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=DN8sKjFf4O+UFXK/DJwxmaNJcVTsvwJ3Eq5nhk+Hpm4=; b=OEcCQlMvYUZ4ppkFDT7HRyIDtOAubBE6iwNnROXW59xc/s9itVrN8R+/SgfPS0MaC7 OogW/1DjbEeS652ofhSRKGOygSEPLJKhziE4Sa+3W3mDf0zjf8ODIJl5MIlJTu2Zsn/J 5ASXApwEnx6jZXBow5xDLm+R2JK5pEhaZ679568RSWug09onbgI3gpuOqknNG7QhLi4O yMJv8lFfga0fnxLzue9hhE+/wgpGmbJ+jZn/VELbM4vvRqf+KQGZ4ajdekJgVQ2uIZCH iH8jGLH9Ju3AmbCxab0ECn8mhVJB6HN7g6oranjk7OpfYRnVrh/XBkbRbYMWGEnI1mFl LCuQ== X-Gm-Message-State: AJcUukfqPMjcLp8chThTbC1om9yiyfEA0cH6W9moi6OjsifX5/SK3H08 DZ+lLVm55bppTfwUsAmZnoAsxg== X-Received: by 2002:a2e:2a06:: with SMTP id q6-v6mr5421922ljq.37.1547626880620; Wed, 16 Jan 2019 00:21:20 -0800 (PST) Received: from genomnajs.ideon.se ([85.235.10.227]) by smtp.gmail.com with ESMTPSA id z9sm1035095lfj.79.2019.01.16.00.21.19 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Wed, 16 Jan 2019 00:21:19 -0800 (PST) From: Linus Walleij To: Mark Brown , linux-spi@vger.kernel.org Cc: linux-gpio@vger.kernel.org, Bartosz Golaszewski , linuxarm@huawei.com, Linus Walleij , Jan Kotas Subject: [PATCH 2/4 v3] spi: dw: Fix default polarity of native chipselect Date: Wed, 16 Jan 2019 09:21:08 +0100 Message-Id: <20190116082110.5604-2-linus.walleij@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190116082110.5604-1-linus.walleij@linaro.org> References: <20190116082110.5604-1-linus.walleij@linaro.org> MIME-Version: 1.0 Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org The DW controller also supports platforms specifying native chipselects. When I enforce the use of high CS for drivers opting in for using GPIO descriptors, I inadvertedly switched the driver to also use active high chip select for native chip selects. As it turns out, the DW hardware driving chip selects also thinks it is weird with active low chip selects so all we need to do is remove an inversion in the driver. Cc: Jan Kotas Reported-by: Jan Kotas Tested-by: Jan Kotas Fixes: 9400c41e77b8 ("spi: dw: Convert to use CS GPIO descriptors") Signed-off-by: Linus Walleij --- ChangeLog v1->v3: - Collected Jan's Tested-by ChangeLog v1->v2: - Missed to alter the actually native chip select line control code. I need to be more awake. Janek can you confirm if this in combination with the previous patch solves your problem? --- drivers/spi/spi-dw.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) -- 2.20.1 diff --git a/drivers/spi/spi-dw.c b/drivers/spi/spi-dw.c index f54b498001a9..64164f1a83f4 100644 --- a/drivers/spi/spi-dw.c +++ b/drivers/spi/spi-dw.c @@ -137,11 +137,10 @@ void dw_spi_set_cs(struct spi_device *spi, bool enable) struct dw_spi *dws = spi_controller_get_devdata(spi->controller); struct chip_data *chip = spi_get_ctldata(spi); - /* Chip select logic is inverted from spi_set_cs() */ if (chip && chip->cs_control) - chip->cs_control(!enable); + chip->cs_control(enable); - if (!enable) + if (enable) dw_writel(dws, DW_SPI_SER, BIT(spi->chip_select)); else if (dws->cs_override) dw_writel(dws, DW_SPI_SER, 0); From patchwork Wed Jan 16 08:21:09 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 155700 Delivered-To: patch@linaro.org Received: by 2002:a02:48:0:0:0:0:0 with SMTP id 69csp377772jaa; Wed, 16 Jan 2019 00:21:43 -0800 (PST) X-Google-Smtp-Source: ALg8bN5+S/RfiiSK72esLRsM+wdR5EyyvXug2liAEUmLkmLZvo0MvuejdW37K7fsO+48H06zvOtl X-Received: by 2002:a62:8893:: with SMTP id l141mr8440804pfd.1.1547626903428; Wed, 16 Jan 2019 00:21:43 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1547626903; cv=none; d=google.com; s=arc-20160816; b=A5lM3ZJzbl+iOn9GDuccfJ9SSf6xIaYJ+ZqzhzJpEchqOdfPuyUTe82avkbJRCKcDu tDNcuFlipXa75BP0rsMJiCX0DtXnINmSeL6WDtGcH1yt6m9Xxze0kfUpKBlrAxqJJh2B SaQNLZsVy+wvtTmvTpl8KJwgjOg9VXuijlaRHZeW866vtrP/2vtnrjCNpI0c+NGG3KfX nHCRx9ZoPtvKjOXAVMECF0HG5Qj5i+AhKs5YW6yIT6TDU83kdP+i7120YBIZNffRZWQE Gt6CmGvR/t1edRyrWEEGsykXajEe18B8iHVejwMk+sV11BvjjZfqPTjJxzJcp9w9mdD2 q8ng== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=UPa/YKHzg8QHfVtFHuz+IOXkWhk9XCGi6iwwT/+Ih94=; b=IahQ6mDRJOGDbCDQz1wLQUMdlL8uJPUzrp1SEERRQ+n4a3GhvUDO9i+O36QiGwOwBR ntBa3qFLWbYzJ7sHRPZA//LmvHPwbcXVLYa5JAU8TyaYbld/LVb1uYS+oxQKulc8jNbr 5G5reBqbdMRaGrsi0wC1AHQzwq+0nWpXd7rNRLl1OXzFtnmq4C1txTf8aityey2cXY5r 2YSjmbVLDk7t22X0k/evs0F6X98du1Lb0DgBqbGyuhaoRAE5KvvZbMzBHnh1syWUTsU1 YbUW0gmzESub//6EDlN82uvLO9x/ixHx6D84jCeNM1mUFSN5nrR50itTD6XEFE4hbwlX 0O6w== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=GUIaGw6+; spf=pass (google.com: best guess record for domain of linux-gpio-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-gpio-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id a5si5585033pgg.120.2019.01.16.00.21.43; Wed, 16 Jan 2019 00:21:43 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-gpio-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=GUIaGw6+; spf=pass (google.com: best guess record for domain of linux-gpio-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-gpio-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2388582AbfAPIVZ (ORCPT + 5 others); Wed, 16 Jan 2019 03:21:25 -0500 Received: from mail-lf1-f66.google.com ([209.85.167.66]:37059 "EHLO mail-lf1-f66.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1730345AbfAPIVY (ORCPT ); Wed, 16 Jan 2019 03:21:24 -0500 Received: by mail-lf1-f66.google.com with SMTP id y11so4185395lfj.4 for ; Wed, 16 Jan 2019 00:21:23 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=UPa/YKHzg8QHfVtFHuz+IOXkWhk9XCGi6iwwT/+Ih94=; b=GUIaGw6+Vbc4PwSUs42d9NzRrpbccX+Ic5qi/fuieH8pdTHCaBtlzjCLiZ1w6kuLQR WKftHzbX7U1+tSVsp7ucXSyb+UMTUHIuC4AZPr20Wn2UFpnhoQZiF+CS1xyXFSQHHA2o DqBsbG/huYZquDI3iV/ZyYyGpc7hXz/zCuFEI= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=UPa/YKHzg8QHfVtFHuz+IOXkWhk9XCGi6iwwT/+Ih94=; b=VqR3IxuTAsv6rYAf9SrVkLXUpjVqHZg87f4KB1iVBdKFMkeLzlg1GK7bXkg5BmbKWY 9BY5fnS8dKpkjzRQoS2k8/sQ7LxXB/22TSHhZWWadpFfBGdwV/IaEHsAVQ5aVHlaoIT7 7o7HusPNx0dDjxNA6bp//cY2GlGB3/UntkgxmfeQMHiUKC7pd/+gBNrb41x9wrEMeddy /WSHol95EQp5POBA88YVCz9G8b1kh5Gxa/uoT0Zc2GKSQGNRq/kJQw82lwXmYvN99Xpy EIfZhzzqxmAdkv1tb3VyfqZGLhfdYHrM0YoI0lC5F00Kinr9/JpVS0s7fcNCTx+Ch2vE kZvg== X-Gm-Message-State: AJcUukcXytWOaCUfXi7kfWSQcryWa3VSP/iUjaU0fZ5G/8O9FcSMNzeF zNh3hTg/FnbwkCzNViVvxeo5IQ== X-Received: by 2002:a19:4948:: with SMTP id l8mr6021684lfj.156.1547626882916; Wed, 16 Jan 2019 00:21:22 -0800 (PST) Received: from genomnajs.ideon.se ([85.235.10.227]) by smtp.gmail.com with ESMTPSA id z9sm1035095lfj.79.2019.01.16.00.21.21 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Wed, 16 Jan 2019 00:21:21 -0800 (PST) From: Linus Walleij To: Mark Brown , linux-spi@vger.kernel.org Cc: linux-gpio@vger.kernel.org, Bartosz Golaszewski , linuxarm@huawei.com, Linus Walleij , Wei Yongjun Subject: [PATCH 3/4 v3] spi: cadence: Fix default polarity of native chipselect Date: Wed, 16 Jan 2019 09:21:09 +0100 Message-Id: <20190116082110.5604-3-linus.walleij@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190116082110.5604-1-linus.walleij@linaro.org> References: <20190116082110.5604-1-linus.walleij@linaro.org> MIME-Version: 1.0 Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org The Cadence controller also supports platforms specifying native chipselects. When I enforce the use of high CS for drivers opting in for using GPIO descriptors, I inadvertedly switched the driver to also use active high chip select for native chip selects. Fix this by inverting the logic in the callback for the native chip select. Rename the parameter from "is_high" (which is interpreted as being high when 0, which is confusing, I will not make any drug-related jokes here) to "enabled" which is more intuitive, especially now that it is true when CS is supposed to be enabled. Cc: Wei Yongjun Fixes: cfeefa79dc37 ("spi: cadence: Convert to use CS GPIO descriptors") Signed-off-by: Linus Walleij --- ChangeLog v1->v3: - Resending --- drivers/spi/spi-cadence.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) -- 2.20.1 diff --git a/drivers/spi/spi-cadence.c b/drivers/spi/spi-cadence.c index e332d173dbf9..f635cf073601 100644 --- a/drivers/spi/spi-cadence.c +++ b/drivers/spi/spi-cadence.c @@ -172,16 +172,16 @@ static void cdns_spi_init_hw(struct cdns_spi *xspi) /** * cdns_spi_chipselect - Select or deselect the chip select line * @spi: Pointer to the spi_device structure - * @is_high: Select(0) or deselect (1) the chip select line + * @enable: Select (1) or deselect (0) the chip select line */ -static void cdns_spi_chipselect(struct spi_device *spi, bool is_high) +static void cdns_spi_chipselect(struct spi_device *spi, bool enable) { struct cdns_spi *xspi = spi_master_get_devdata(spi->master); u32 ctrl_reg; ctrl_reg = cdns_spi_read(xspi, CDNS_SPI_CR); - if (is_high) { + if (!enable) { /* Deselect the slave */ ctrl_reg |= CDNS_SPI_CR_SSCTRL; } else {