From patchwork Mon Jun 20 11:44:33 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Shevchenko X-Patchwork-Id: 583484 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 00807C43334 for ; Mon, 20 Jun 2022 11:44:46 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S241984AbiFTLop (ORCPT ); Mon, 20 Jun 2022 07:44:45 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:32784 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S241058AbiFTLop (ORCPT ); Mon, 20 Jun 2022 07:44:45 -0400 Received: from mga06.intel.com (mga06b.intel.com [134.134.136.31]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3ECFD65C3; Mon, 20 Jun 2022 04:44:43 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1655725483; x=1687261483; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=UecaHSuSKGghZGkQQEAI1GlxWKlMWFNNnHK+VeNcMgo=; b=IP/N/EjLJhF/UwejOMVYQEWjgW4vcqfw6SVovH1Iwv/ZchMyYxolvzL6 QQYiW6hEr33HzkkE6a/HPLxsAVUYben8uYg1yEFC7jro0gk4UEeifyQXR sbFaauQlX3xHvsS4wLikGqd8+K4fBp5TPWjyaWP+KCL+iZGLBGNgSZU65 aQTM5JliMS2kl72KpUsP9/KWKiI942KB5J01O9nOOWaElUcKLT6hAjC7h ilR4gn137SQki7MWf4ZO9aSoUjCTzX9t3nZr/Q0BffXqvtp5biP2OQIAy Z4BT2BAzjPw8FqRfBfy53cggzrvLsWoHjNdjM57DNP9pTLEWOMabR5Lca g==; X-IronPort-AV: E=McAfee;i="6400,9594,10380"; a="341555852" X-IronPort-AV: E=Sophos;i="5.92,306,1650956400"; d="scan'208";a="341555852" Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by orsmga104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 Jun 2022 04:44:42 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.92,306,1650956400"; d="scan'208";a="676503093" Received: from black.fi.intel.com ([10.237.72.28]) by FMSMGA003.fm.intel.com with ESMTP; 20 Jun 2022 04:44:40 -0700 Received: by black.fi.intel.com (Postfix, from userid 1003) id B99A214F; Mon, 20 Jun 2022 14:44:45 +0300 (EEST) From: Andy Shevchenko To: Andy Shevchenko , linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Mika Westerberg , Andy Shevchenko , Linus Walleij Subject: [PATCH v1 1/7] pinctrl: intel: Embed struct pingroup into struct intel_pingroup Date: Mon, 20 Jun 2022 14:44:33 +0300 Message-Id: <20220620114439.31491-1-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.35.1 MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Add a new member to the struct intel_pingroup to cover generic pin control group parameters. The idea is to convert all users (one-by-one) to it and drop old members later on. Signed-off-by: Andy Shevchenko Acked-by: Mika Westerberg --- drivers/pinctrl/intel/pinctrl-intel.h | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/drivers/pinctrl/intel/pinctrl-intel.h b/drivers/pinctrl/intel/pinctrl-intel.h index 710341bb67cc..69ff0598263c 100644 --- a/drivers/pinctrl/intel/pinctrl-intel.h +++ b/drivers/pinctrl/intel/pinctrl-intel.h @@ -27,14 +27,15 @@ struct device; * @name: Name of the groups * @pins: All pins in this group * @npins: Number of pins in this groups - * @mode: Native mode in which the group is muxed out @pins. Used if @modes - * is %NULL. + * @grp: Generic data of the pin group (name and pins) + * @mode: Native mode in which the group is muxed out @pins. Used if @modes is %NULL. * @modes: If not %NULL this will hold mode for each pin in @pins */ struct intel_pingroup { const char *name; const unsigned int *pins; size_t npins; + struct pingroup grp; unsigned short mode; const unsigned int *modes; }; @@ -156,15 +157,14 @@ struct intel_community { * a single integer or an array of integers in which case mode is per * pin. */ -#define PIN_GROUP(n, p, m) \ - { \ +#define PIN_GROUP(n, p, m) \ + { \ .name = (n), \ .pins = (p), \ .npins = ARRAY_SIZE((p)), \ - .mode = __builtin_choose_expr( \ - __builtin_constant_p((m)), (m), 0), \ - .modes = __builtin_choose_expr( \ - __builtin_constant_p((m)), NULL, (m)), \ + .grp = PINCTRL_PINGROUP((n), (p), ARRAY_SIZE((p))), \ + .mode = __builtin_choose_expr(__builtin_constant_p((m)), (m), 0), \ + .modes = __builtin_choose_expr(__builtin_constant_p((m)), NULL, (m)), \ } #define FUNCTION(n, g) \ From patchwork Mon Jun 20 11:44:34 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Shevchenko X-Patchwork-Id: 584094 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id EBB1CC433EF for ; Mon, 20 Jun 2022 11:44:45 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S241952AbiFTLop (ORCPT ); Mon, 20 Jun 2022 07:44:45 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:32782 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S240786AbiFTLoo (ORCPT ); Mon, 20 Jun 2022 07:44:44 -0400 Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 26417267D; Mon, 20 Jun 2022 04:44:43 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1655725483; x=1687261483; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=VjOG4QNEdzqs+142WUjAwVeE5Y9mA990EmwcytHHZdM=; b=en+8WrWLoWt4rYkHq9BrPx5OVQJNx8BWbfCbAa3gLaN1MYTFB32Mh/WS H3ctFHS0HTP5CpYfZF27+mj12Zl/RE8ChAgxLIAFppexa3gcbok7cB9mz RXfbdBHOacRZ/CJFlPtfhSdDSq06O6wOQ42C2nGguarHXsTX/SFGGYS6L mp0mh6NLos1uXL4/cXV3VltgLhaiwoFH3BlAnoieEuxfceO/OnCcPfiWi ScNRhT/TVVKM52VvvFcE+iJgli+Hl8XJ9RA4gNYE/rtOfDmxqBFbd+VN4 BhBMMftLJANLNRjVxvAPssh+kwJaiucUzO6gndCSiZH6OtmOma82a1Tmf Q==; X-IronPort-AV: E=McAfee;i="6400,9594,10380"; a="280930274" X-IronPort-AV: E=Sophos;i="5.92,306,1650956400"; d="scan'208";a="280930274" Received: from orsmga006.jf.intel.com ([10.7.209.51]) by orsmga103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 Jun 2022 04:44:42 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.92,306,1650956400"; d="scan'208";a="561913478" Received: from black.fi.intel.com ([10.237.72.28]) by orsmga006.jf.intel.com with ESMTP; 20 Jun 2022 04:44:40 -0700 Received: by black.fi.intel.com (Postfix, from userid 1003) id C814AD9; Mon, 20 Jun 2022 14:44:45 +0300 (EEST) From: Andy Shevchenko To: Andy Shevchenko , linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Mika Westerberg , Andy Shevchenko , Linus Walleij Subject: [PATCH v1 2/7] pinctrl: baytrail: Switch to to embedded struct pingroup Date: Mon, 20 Jun 2022 14:44:34 +0300 Message-Id: <20220620114439.31491-2-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220620114439.31491-1-andriy.shevchenko@linux.intel.com> References: <20220620114439.31491-1-andriy.shevchenko@linux.intel.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Since struct intel_pingroup got a new member, switch the driver to use it. Signed-off-by: Andy Shevchenko --- drivers/pinctrl/intel/pinctrl-baytrail.c | 18 +++++++++--------- 1 file changed, 9 insertions(+), 9 deletions(-) diff --git a/drivers/pinctrl/intel/pinctrl-baytrail.c b/drivers/pinctrl/intel/pinctrl-baytrail.c index 31f8f271628c..67db79f38051 100644 --- a/drivers/pinctrl/intel/pinctrl-baytrail.c +++ b/drivers/pinctrl/intel/pinctrl-baytrail.c @@ -603,7 +603,7 @@ static const char *byt_get_group_name(struct pinctrl_dev *pctldev, { struct intel_pinctrl *vg = pinctrl_dev_get_drvdata(pctldev); - return vg->soc->groups[selector].name; + return vg->soc->groups[selector].grp.name; } static int byt_get_group_pins(struct pinctrl_dev *pctldev, @@ -613,8 +613,8 @@ static int byt_get_group_pins(struct pinctrl_dev *pctldev, { struct intel_pinctrl *vg = pinctrl_dev_get_drvdata(pctldev); - *pins = vg->soc->groups[selector].pins; - *num_pins = vg->soc->groups[selector].npins; + *pins = vg->soc->groups[selector].grp.pins; + *num_pins = vg->soc->groups[selector].grp.npins; return 0; } @@ -662,15 +662,15 @@ static void byt_set_group_simple_mux(struct intel_pinctrl *vg, raw_spin_lock_irqsave(&byt_lock, flags); - for (i = 0; i < group.npins; i++) { + for (i = 0; i < group.grp.npins; i++) { void __iomem *padcfg0; u32 value; - padcfg0 = byt_gpio_reg(vg, group.pins[i], BYT_CONF0_REG); + padcfg0 = byt_gpio_reg(vg, group.grp.pins[i], BYT_CONF0_REG); if (!padcfg0) { dev_warn(vg->dev, "Group %s, pin %i not muxed (no padcfg0)\n", - group.name, i); + group.grp.name, i); continue; } @@ -692,15 +692,15 @@ static void byt_set_group_mixed_mux(struct intel_pinctrl *vg, raw_spin_lock_irqsave(&byt_lock, flags); - for (i = 0; i < group.npins; i++) { + for (i = 0; i < group.grp.npins; i++) { void __iomem *padcfg0; u32 value; - padcfg0 = byt_gpio_reg(vg, group.pins[i], BYT_CONF0_REG); + padcfg0 = byt_gpio_reg(vg, group.grp.pins[i], BYT_CONF0_REG); if (!padcfg0) { dev_warn(vg->dev, "Group %s, pin %i not muxed (no padcfg0)\n", - group.name, i); + group.grp.name, i); continue; } From patchwork Mon Jun 20 11:44:35 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Shevchenko X-Patchwork-Id: 584092 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id CB10ACCA481 for ; Mon, 20 Jun 2022 11:44:48 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S241992AbiFTLor (ORCPT ); Mon, 20 Jun 2022 07:44:47 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:32786 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S241948AbiFTLop (ORCPT ); Mon, 20 Jun 2022 07:44:45 -0400 Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7C9B565EC; Mon, 20 Jun 2022 04:44:43 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1655725483; x=1687261483; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=rteD4TE3BV4pxnQQ1GhigWDMkMMWcX4i7Vp5gxdWb6Y=; b=PuHMlDtDqSjclS7oAapfGIKdJ+DiO2AQcaAWp8xqMcmgNimUQKbFhl52 60XQP3TfK6hgEpxhB1E0bNocVSlJovlz7peaQncXmvl3LT+PJLv0PcJz1 fmkWoIIFGe8fySlAKU63GefUXREtTgJihqeqIlHTFPJXhD+UBcKbNzXjr TnbtmvCaSTY+vF7IYHlqd0nDBcJ0nDLTDWN0ueAx6PMVzs/t4Tm0cna63 w4Qf9xaFFUzm1LDoMzvX/MIIoT73weK5X+iBzM60BC22x4ICg9CyKNyHR RU1d6BLs6aiQmqakL3qWnLwRTRp+2pUMZHISDkGtNi3izKfABpmv1xKbv Q==; X-IronPort-AV: E=McAfee;i="6400,9594,10380"; a="277422407" X-IronPort-AV: E=Sophos;i="5.92,306,1650956400"; d="scan'208";a="277422407" Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by fmsmga102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 Jun 2022 04:44:43 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.92,306,1650956400"; d="scan'208";a="643081684" Received: from black.fi.intel.com ([10.237.72.28]) by fmsmga008.fm.intel.com with ESMTP; 20 Jun 2022 04:44:40 -0700 Received: by black.fi.intel.com (Postfix, from userid 1003) id CB013174; Mon, 20 Jun 2022 14:44:45 +0300 (EEST) From: Andy Shevchenko To: Andy Shevchenko , linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Mika Westerberg , Andy Shevchenko , Linus Walleij Subject: [PATCH v1 3/7] pinctrl: cherryview: Switch to to embedded struct pingroup Date: Mon, 20 Jun 2022 14:44:35 +0300 Message-Id: <20220620114439.31491-3-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220620114439.31491-1-andriy.shevchenko@linux.intel.com> References: <20220620114439.31491-1-andriy.shevchenko@linux.intel.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Since struct intel_pingroup got a new member, switch the driver to use it. Signed-off-by: Andy Shevchenko --- drivers/pinctrl/intel/pinctrl-cherryview.c | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/drivers/pinctrl/intel/pinctrl-cherryview.c b/drivers/pinctrl/intel/pinctrl-cherryview.c index 26b2a425d201..5c4fd16e5b01 100644 --- a/drivers/pinctrl/intel/pinctrl-cherryview.c +++ b/drivers/pinctrl/intel/pinctrl-cherryview.c @@ -627,7 +627,7 @@ static const char *chv_get_group_name(struct pinctrl_dev *pctldev, { struct intel_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); - return pctrl->soc->groups[group].name; + return pctrl->soc->groups[group].grp.name; } static int chv_get_group_pins(struct pinctrl_dev *pctldev, unsigned int group, @@ -635,8 +635,8 @@ static int chv_get_group_pins(struct pinctrl_dev *pctldev, unsigned int group, { struct intel_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); - *pins = pctrl->soc->groups[group].pins; - *npins = pctrl->soc->groups[group].npins; + *pins = pctrl->soc->groups[group].grp.pins; + *npins = pctrl->soc->groups[group].grp.npins; return 0; } @@ -721,16 +721,16 @@ static int chv_pinmux_set_mux(struct pinctrl_dev *pctldev, raw_spin_lock_irqsave(&chv_lock, flags); /* Check first that the pad is not locked */ - for (i = 0; i < grp->npins; i++) { - if (chv_pad_locked(pctrl, grp->pins[i])) { + for (i = 0; i < grp->grp.npins; i++) { + if (chv_pad_locked(pctrl, grp->grp.pins[i])) { raw_spin_unlock_irqrestore(&chv_lock, flags); - dev_warn(dev, "unable to set mode for locked pin %u\n", grp->pins[i]); + dev_warn(dev, "unable to set mode for locked pin %u\n", grp->grp.pins[i]); return -EBUSY; } } - for (i = 0; i < grp->npins; i++) { - int pin = grp->pins[i]; + for (i = 0; i < grp->grp.npins; i++) { + int pin = grp->grp.pins[i]; unsigned int mode; bool invert_oe; u32 value; From patchwork Mon Jun 20 11:44:36 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Shevchenko X-Patchwork-Id: 584093 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4231FCCA479 for ; Mon, 20 Jun 2022 11:44:47 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S241953AbiFTLoq (ORCPT ); Mon, 20 Jun 2022 07:44:46 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:32788 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S241753AbiFTLop (ORCPT ); Mon, 20 Jun 2022 07:44:45 -0400 Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A301565FF; Mon, 20 Jun 2022 04:44:43 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1655725483; x=1687261483; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=U2tG/KTz7ahZRzsolt4qelQbIWRvazZUailTCYJ+mns=; b=K7Dd3zhqtynJf+eDX6kud5C3NURsztDaoHsB25mFIQbz7EZAMD2XJW1k qcQ9DhBdMRhUAMEdkm0AaP51CSl/t7TopMu0yz7t/syQx+4V7k+rZ9yBJ 81FkuRVVzHHIzJEpfxntpiC7epAPU1aEo/UH7n6iq5316dRo6LRopOEgl gIxXRTDqo3uoGN7pV9gGC8/YGQv5U+lAC5dkrYFI6hz9Z1cHaRRGphYYH 8bHI7loY+IIS7ouvBsVOHitvRd8n4IUJRPYtPlAkCHsY1CMWYahEg8YC4 NqaM03ylld41Xa6WANdaSKzBYvSt+WrqSG+qvcxB48vSzHxoMI2l+WZSP Q==; X-IronPort-AV: E=McAfee;i="6400,9594,10380"; a="280604249" X-IronPort-AV: E=Sophos;i="5.92,306,1650956400"; d="scan'208";a="280604249" Received: from orsmga007.jf.intel.com ([10.7.209.58]) by orsmga102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 Jun 2022 04:44:43 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.92,306,1650956400"; d="scan'208";a="584862146" Received: from black.fi.intel.com ([10.237.72.28]) by orsmga007.jf.intel.com with ESMTP; 20 Jun 2022 04:44:41 -0700 Received: by black.fi.intel.com (Postfix, from userid 1003) id D7AE9363; Mon, 20 Jun 2022 14:44:45 +0300 (EEST) From: Andy Shevchenko To: Andy Shevchenko , linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Mika Westerberg , Andy Shevchenko , Linus Walleij Subject: [PATCH v1 4/7] pinctrl: lynxpoint: Switch to to embedded struct pingroup Date: Mon, 20 Jun 2022 14:44:36 +0300 Message-Id: <20220620114439.31491-4-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220620114439.31491-1-andriy.shevchenko@linux.intel.com> References: <20220620114439.31491-1-andriy.shevchenko@linux.intel.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Since struct intel_pingroup got a new member, switch the driver to use it. Signed-off-by: Andy Shevchenko --- drivers/pinctrl/intel/pinctrl-lynxpoint.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/drivers/pinctrl/intel/pinctrl-lynxpoint.c b/drivers/pinctrl/intel/pinctrl-lynxpoint.c index 4fb39eb30902..5d1abee30f8f 100644 --- a/drivers/pinctrl/intel/pinctrl-lynxpoint.c +++ b/drivers/pinctrl/intel/pinctrl-lynxpoint.c @@ -282,7 +282,7 @@ static const char *lp_get_group_name(struct pinctrl_dev *pctldev, { struct intel_pinctrl *lg = pinctrl_dev_get_drvdata(pctldev); - return lg->soc->groups[selector].name; + return lg->soc->groups[selector].grp.name; } static int lp_get_group_pins(struct pinctrl_dev *pctldev, @@ -292,8 +292,8 @@ static int lp_get_group_pins(struct pinctrl_dev *pctldev, { struct intel_pinctrl *lg = pinctrl_dev_get_drvdata(pctldev); - *pins = lg->soc->groups[selector].pins; - *num_pins = lg->soc->groups[selector].npins; + *pins = lg->soc->groups[selector].grp.pins; + *num_pins = lg->soc->groups[selector].grp.npins; return 0; } @@ -366,8 +366,8 @@ static int lp_pinmux_set_mux(struct pinctrl_dev *pctldev, raw_spin_lock_irqsave(&lg->lock, flags); /* Now enable the mux setting for each pin in the group */ - for (i = 0; i < grp->npins; i++) { - void __iomem *reg = lp_gpio_reg(&lg->chip, grp->pins[i], LP_CONFIG1); + for (i = 0; i < grp->grp.npins; i++) { + void __iomem *reg = lp_gpio_reg(&lg->chip, grp->grp.pins[i], LP_CONFIG1); u32 value; value = ioread32(reg); From patchwork Mon Jun 20 11:44:37 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Shevchenko X-Patchwork-Id: 583483 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id F01F8CCA47C for ; Mon, 20 Jun 2022 11:44:47 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S240505AbiFTLor (ORCPT ); Mon, 20 Jun 2022 07:44:47 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:32790 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S241891AbiFTLop (ORCPT ); Mon, 20 Jun 2022 07:44:45 -0400 Received: from mga18.intel.com (mga18.intel.com [134.134.136.126]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2CA05A472; Mon, 20 Jun 2022 04:44:44 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1655725484; x=1687261484; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=75e3MeWkf9pZn4bmqOuCJjx/Rpz/6M0DP33k+LGsEJI=; b=bBLU3mS0wSavOaMjEXFW4Usi/g0iMEgpYQqYMANHBdGtMc+7Kfm7VMHY rpJX0mz4ukkOSWgVc88rPntknMz0A3tJMfEecPTGUYFIkhPhRqF8Zntqg +ZGK11cBrET3BO8nHnNz1NxWBFN1bPoIegpBpxDecQi8F/W/5eVf9mrNO 1L6EbyPt9RWQNc//6RH/BO11Cl316e41pOQHtmnxKmHnjn0Txo0YNVaQm Jk4TelAx7vlxbSslzmeFa58EwXeNoEffBz2sSJHbsFn3g9A8qJ2MaCjVO dpWl7e/bn43LLChtTuVb84KN6C/lQfg/LEViduQ5tkC0LJvt50iGLEAve g==; X-IronPort-AV: E=McAfee;i="6400,9594,10380"; a="262908822" X-IronPort-AV: E=Sophos;i="5.92,306,1650956400"; d="scan'208";a="262908822" Received: from orsmga005.jf.intel.com ([10.7.209.41]) by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 Jun 2022 04:44:42 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.92,306,1650956400"; d="scan'208";a="764069136" Received: from black.fi.intel.com ([10.237.72.28]) by orsmga005.jf.intel.com with ESMTP; 20 Jun 2022 04:44:41 -0700 Received: by black.fi.intel.com (Postfix, from userid 1003) id E25D957F; Mon, 20 Jun 2022 14:44:45 +0300 (EEST) From: Andy Shevchenko To: Andy Shevchenko , linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Mika Westerberg , Andy Shevchenko , Linus Walleij Subject: [PATCH v1 5/7] pinctrl: merrifield: Switch to to embedded struct pingroup Date: Mon, 20 Jun 2022 14:44:37 +0300 Message-Id: <20220620114439.31491-5-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220620114439.31491-1-andriy.shevchenko@linux.intel.com> References: <20220620114439.31491-1-andriy.shevchenko@linux.intel.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Since struct intel_pingroup got a new member, switch the driver to use it. Signed-off-by: Andy Shevchenko --- drivers/pinctrl/intel/pinctrl-merrifield.c | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/drivers/pinctrl/intel/pinctrl-merrifield.c b/drivers/pinctrl/intel/pinctrl-merrifield.c index 3ae141e0b421..5e752818adb4 100644 --- a/drivers/pinctrl/intel/pinctrl-merrifield.c +++ b/drivers/pinctrl/intel/pinctrl-merrifield.c @@ -520,7 +520,7 @@ static const char *mrfld_get_group_name(struct pinctrl_dev *pctldev, { struct mrfld_pinctrl *mp = pinctrl_dev_get_drvdata(pctldev); - return mp->groups[group].name; + return mp->groups[group].grp.name; } static int mrfld_get_group_pins(struct pinctrl_dev *pctldev, unsigned int group, @@ -528,8 +528,8 @@ static int mrfld_get_group_pins(struct pinctrl_dev *pctldev, unsigned int group, { struct mrfld_pinctrl *mp = pinctrl_dev_get_drvdata(pctldev); - *pins = mp->groups[group].pins; - *npins = mp->groups[group].npins; + *pins = mp->groups[group].grp.pins; + *npins = mp->groups[group].grp.npins; return 0; } @@ -604,15 +604,15 @@ static int mrfld_pinmux_set_mux(struct pinctrl_dev *pctldev, * All pins in the groups needs to be accessible and writable * before we can enable the mux for this group. */ - for (i = 0; i < grp->npins; i++) { - if (!mrfld_buf_available(mp, grp->pins[i])) + for (i = 0; i < grp->grp.npins; i++) { + if (!mrfld_buf_available(mp, grp->grp.pins[i])) return -EBUSY; } /* Now enable the mux setting for each pin in the group */ raw_spin_lock_irqsave(&mp->lock, flags); - for (i = 0; i < grp->npins; i++) - mrfld_update_bufcfg(mp, grp->pins[i], bits, mask); + for (i = 0; i < grp->grp.npins; i++) + mrfld_update_bufcfg(mp, grp->grp.pins[i], bits, mask); raw_spin_unlock_irqrestore(&mp->lock, flags); return 0; From patchwork Mon Jun 20 11:44:38 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Shevchenko X-Patchwork-Id: 584091 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 635F8C433EF for ; Mon, 20 Jun 2022 11:44:51 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S240137AbiFTLot (ORCPT ); Mon, 20 Jun 2022 07:44:49 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:32814 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S241993AbiFTLoq (ORCPT ); Mon, 20 Jun 2022 07:44:46 -0400 Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B5B59267D; Mon, 20 Jun 2022 04:44:45 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1655725485; x=1687261485; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=DzFeSHJN21o/a0uqe1taS1DmcnD0Iz7eQe8z3Y7MRb4=; b=T3B0IBNcMEloXH6quvZr3Miek/5Tql9VLCz2wNDA5AlfKMwrhk3toP2p XR7gpb+BpnRkYU4BIxJuwdKSj2AKAG9y3sAzjDxxlhbXFyYoGuawairgr iuIW+bpCclY7W5+0s1nntqFZFk79nhwa46W5lLqGU+fRxqesfVVk9pIRz NvPbH7nRaBM5nvZfHChfDThtI6luS0YQVpM8g9/181a31o0ZQG6sb/HjF MxpiKgAtcFaY6g4i/3VasHmYwGH6asGb3p79UJphjyeyhhFRSKvvMHbxt N5lTw3tCo090QFOgEMqlP50ziWpCOwcVQAEzqa22GLuS8zBP42zCZE6cY g==; X-IronPort-AV: E=McAfee;i="6400,9594,10380"; a="277422414" X-IronPort-AV: E=Sophos;i="5.92,306,1650956400"; d="scan'208";a="277422414" Received: from orsmga004.jf.intel.com ([10.7.209.38]) by fmsmga102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 Jun 2022 04:44:45 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.92,306,1650956400"; d="scan'208";a="714591464" Received: from black.fi.intel.com ([10.237.72.28]) by orsmga004.jf.intel.com with ESMTP; 20 Jun 2022 04:44:43 -0700 Received: by black.fi.intel.com (Postfix, from userid 1003) id E8F3158F; Mon, 20 Jun 2022 14:44:45 +0300 (EEST) From: Andy Shevchenko To: Andy Shevchenko , linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Mika Westerberg , Andy Shevchenko , Linus Walleij Subject: [PATCH v1 6/7] pinctrl: intel: Switch to to embedded struct pingroup Date: Mon, 20 Jun 2022 14:44:38 +0300 Message-Id: <20220620114439.31491-6-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220620114439.31491-1-andriy.shevchenko@linux.intel.com> References: <20220620114439.31491-1-andriy.shevchenko@linux.intel.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Since struct intel_pingroup got a new member, switch the driver to use it. Signed-off-by: Andy Shevchenko --- drivers/pinctrl/intel/pinctrl-intel.c | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/drivers/pinctrl/intel/pinctrl-intel.c b/drivers/pinctrl/intel/pinctrl-intel.c index ffc045f7bf00..0e704f34156a 100644 --- a/drivers/pinctrl/intel/pinctrl-intel.c +++ b/drivers/pinctrl/intel/pinctrl-intel.c @@ -279,7 +279,7 @@ static const char *intel_get_group_name(struct pinctrl_dev *pctldev, { struct intel_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); - return pctrl->soc->groups[group].name; + return pctrl->soc->groups[group].grp.name; } static int intel_get_group_pins(struct pinctrl_dev *pctldev, unsigned int group, @@ -287,8 +287,8 @@ static int intel_get_group_pins(struct pinctrl_dev *pctldev, unsigned int group, { struct intel_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); - *pins = pctrl->soc->groups[group].pins; - *npins = pctrl->soc->groups[group].npins; + *pins = pctrl->soc->groups[group].grp.pins; + *npins = pctrl->soc->groups[group].grp.npins; return 0; } @@ -391,19 +391,19 @@ static int intel_pinmux_set_mux(struct pinctrl_dev *pctldev, * All pins in the groups needs to be accessible and writable * before we can enable the mux for this group. */ - for (i = 0; i < grp->npins; i++) { - if (!intel_pad_usable(pctrl, grp->pins[i])) { + for (i = 0; i < grp->grp.npins; i++) { + if (!intel_pad_usable(pctrl, grp->grp.pins[i])) { raw_spin_unlock_irqrestore(&pctrl->lock, flags); return -EBUSY; } } /* Now enable the mux setting for each pin in the group */ - for (i = 0; i < grp->npins; i++) { + for (i = 0; i < grp->grp.npins; i++) { void __iomem *padcfg0; u32 value; - padcfg0 = intel_get_padcfg(pctrl, grp->pins[i], PADCFG0); + padcfg0 = intel_get_padcfg(pctrl, grp->grp.pins[i], PADCFG0); value = readl(padcfg0); value &= ~PADCFG0_PMODE_MASK; From patchwork Mon Jun 20 11:44:39 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Shevchenko X-Patchwork-Id: 583482 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6E78FC43334 for ; Mon, 20 Jun 2022 11:44:50 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S239977AbiFTLos (ORCPT ); Mon, 20 Jun 2022 07:44:48 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:32812 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S241991AbiFTLoq (ORCPT ); Mon, 20 Jun 2022 07:44:46 -0400 Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8BFB9FE4; Mon, 20 Jun 2022 04:44:45 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1655725485; x=1687261485; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=UdN0g13qcTNPn5ZNJ6qrKqpCS6O6eQthWK04gSFXGyY=; b=IOYPyG6aOJn7vnDbuf1e6HWn5Zx8zX2X8A+0Ig5m9z5HJYijTD4ssn9S y5KUJHH9pna+m30HE1+9B9asDDCOpzqWAxz6daQOKhYyyTGrM2jn8Lmc6 8Acbz4RHLeiAX/37hLqCC4RKnC2940vveK/HdAfZP6NAyGcLgxQxMxEZd vLOop9LUgGqyX8ahI+dIBriv2VZzCBMwt5euFdEYF0JjMVuH6RNa7DKNv BK9sPc8GtEeUiCT6NkZ4AyKQCVklP/vUKfiWto+L9lRlIQiIkmvQ4M/pM eZHwd5kLzYVcGTxvqiPpoizd8UNk1tS1Tn1TNxwdI91rxHsy3OOAUyT1d A==; X-IronPort-AV: E=McAfee;i="6400,9594,10380"; a="280604256" X-IronPort-AV: E=Sophos;i="5.92,306,1650956400"; d="scan'208";a="280604256" Received: from orsmga002.jf.intel.com ([10.7.209.21]) by orsmga102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 Jun 2022 04:44:45 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.92,306,1650956400"; d="scan'208";a="584582457" Received: from black.fi.intel.com ([10.237.72.28]) by orsmga002.jf.intel.com with ESMTP; 20 Jun 2022 04:44:43 -0700 Received: by black.fi.intel.com (Postfix, from userid 1003) id F075759B; Mon, 20 Jun 2022 14:44:45 +0300 (EEST) From: Andy Shevchenko To: Andy Shevchenko , linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Mika Westerberg , Andy Shevchenko , Linus Walleij Subject: [PATCH v1 7/7] pinctrl: intel: Drop no more used members of struct intel_pingroup Date: Mon, 20 Jun 2022 14:44:39 +0300 Message-Id: <20220620114439.31491-7-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220620114439.31491-1-andriy.shevchenko@linux.intel.com> References: <20220620114439.31491-1-andriy.shevchenko@linux.intel.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org There are no more used members in the struct intel_pingroup, drop them. Signed-off-by: Andy Shevchenko --- drivers/pinctrl/intel/pinctrl-intel.h | 9 --------- 1 file changed, 9 deletions(-) diff --git a/drivers/pinctrl/intel/pinctrl-intel.h b/drivers/pinctrl/intel/pinctrl-intel.h index 69ff0598263c..65628423bf63 100644 --- a/drivers/pinctrl/intel/pinctrl-intel.h +++ b/drivers/pinctrl/intel/pinctrl-intel.h @@ -24,17 +24,11 @@ struct device; /** * struct intel_pingroup - Description about group of pins - * @name: Name of the groups - * @pins: All pins in this group - * @npins: Number of pins in this groups * @grp: Generic data of the pin group (name and pins) * @mode: Native mode in which the group is muxed out @pins. Used if @modes is %NULL. * @modes: If not %NULL this will hold mode for each pin in @pins */ struct intel_pingroup { - const char *name; - const unsigned int *pins; - size_t npins; struct pingroup grp; unsigned short mode; const unsigned int *modes; @@ -159,9 +153,6 @@ struct intel_community { */ #define PIN_GROUP(n, p, m) \ { \ - .name = (n), \ - .pins = (p), \ - .npins = ARRAY_SIZE((p)), \ .grp = PINCTRL_PINGROUP((n), (p), ARRAY_SIZE((p))), \ .mode = __builtin_choose_expr(__builtin_constant_p((m)), (m), 0), \ .modes = __builtin_choose_expr(__builtin_constant_p((m)), NULL, (m)), \