From patchwork Tue Jun 21 20:46:35 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 583623 Delivered-To: patch@linaro.org Received: by 2002:a05:7000:5036:0:0:0:0 with SMTP id e22csp2045921mab; Tue, 21 Jun 2022 13:55:43 -0700 (PDT) X-Google-Smtp-Source: AGRyM1uv6oyZY9ZvhYCOE/n1X18OPNyEK/OaTWaP2xHPGPWRoGaFdXPLrb5HTz1SdXjx7DQNUiCM X-Received: by 2002:a05:6214:300d:b0:470:4530:79f1 with SMTP id ke13-20020a056214300d00b00470453079f1mr9501354qvb.121.1655844943556; Tue, 21 Jun 2022 13:55:43 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1655844943; cv=none; d=google.com; s=arc-20160816; b=oqXZwk5g2J6NB6KHIbbcr8qiYCk5AqkHEIZb/iOrPLgPn23ybw72YFSmEHJ4K+5Fqt Id944u5H1KB2HTJhFBp674H66yAsV+EGQDLHR/0KlOYgoC4fNeaUY4PvqyDvNcWF1e3v upuwp6wkpyphYRXU56WvQNUrSnOXbm6pOJcO7XuUoXrER1D2boSBTMnK9V5PF+1IjG5q IEH7lfuS3uprpgcmyWUddVAw2hF5hF4zzxcaN3xkeMK5A4Ofn5S+ysWXcUhQfKBzs6ry vs2aq2DeD/i8gkzFlZiWGt+ljdAE3DKr3Yz4KEdQGlfIEgb3NiZR6DytFoqG37c3WMuJ 6RRQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=rcQQvkjuqgahHehXyIb2ynncqemhUxF2dHu+EZxsI7w=; b=rC8KOBQCVcKe5fghajL2MktQt9Bxng0GmRiCS0CE67NdEwtU09gLebr+NM6n4D7rGf VwIzgiy2EIFKo/w2Kp1R5flsD3aIlQ1uCqdiFAiunQ1d/KVo39XnyCV7ArEBtP1Z+mxI 35k9HM1cobSvEGCx48l62htQS0o9NelrcwSPkP/Akqjf9mJJME1FbKZ0XwnkFoivet2T RTtj6MxT3cOYJCdg6btPP0MWbSkwFWW97nA/rUDIFRj/zrHT9gM52NPEZwQSshVEUWUf 4CQRjBhvgt/bNQuWKW1cpEvE7MGSGGc044PQsfSJMSgsiz4re7QwX6bI2VO7v/3Bbp3P +LWw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=GyS9p8iQ; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id o3-20020ad45c83000000b004705caf87b7si1153542qvh.574.2022.06.21.13.55.43 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Tue, 21 Jun 2022 13:55:43 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=GyS9p8iQ; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:36078 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1o3kuV-0001Ka-13 for patch@linaro.org; Tue, 21 Jun 2022 16:55:43 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:53924) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1o3klw-0006bs-Ac for qemu-devel@nongnu.org; Tue, 21 Jun 2022 16:46:57 -0400 Received: from mail-pg1-x52a.google.com ([2607:f8b0:4864:20::52a]:34391) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1o3klq-000154-R4 for qemu-devel@nongnu.org; Tue, 21 Jun 2022 16:46:52 -0400 Received: by mail-pg1-x52a.google.com with SMTP id g186so14178166pgc.1 for ; Tue, 21 Jun 2022 13:46:46 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=rcQQvkjuqgahHehXyIb2ynncqemhUxF2dHu+EZxsI7w=; b=GyS9p8iQqVYmEYsnQycF/9Clo0dlYdE72tpZhsh9ai2eJvXipPZg3G/zi9kW4ID289 5RWgHm1yjPhzMofr6b5JzcAuL2cjU0gAqTUjil8ZACmqoV418C3PS+xhL+Rv6JNRJw3N wGRmJ4RuOIZENmMs7a3n5grLzR6KnMujpUWTDSppRS9Ujt6vxsBexf8QEQJE8QLRM5Dj fCNvnY+Puitp4X9jVl3hy6IkgbAaQDl8i6Ujx5CAXZOaqRoKdSRYercN7npGLo7rla1D 93cH+abSMJAVrnxwlR7kOqfvuMOtpBzLNlnzKzvynLTi26qI/sB604A4L4c534jRlj7L T0Hw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=rcQQvkjuqgahHehXyIb2ynncqemhUxF2dHu+EZxsI7w=; b=sGcQan479lkOwRxM5ObdwnmtZF15fPhnuttByczpV3yPychHAnp2as3tSTXXaIHP4r KqpqpKhugWJWZ/4J5iWz+7neCBaAEI1hknWKc8Zby9qae+KIpAwxu45fYJwoEX1ia676 Yz4o0GYRycU0xwJWxqpY11l5ciBoi4SVBHH6pw+Tul97LmR4Ds2lgi30CTh/8V3n4sNm 49wVW4T45qbKZBo5ugVXKz6L0A3xqXsJoCFLzGEJMJUNqphc4vK58bw/HcMPMstmUZGj 9a1mO/zYU7QgslpZeSUN89wcNUZawC/DjNGhns6r4hqBeA8r9KQAgX4JlbVMy0qlsSRX teog== X-Gm-Message-State: AJIora9HwPVbceIIqDp5QmoLw4XufPVYfo23zwc+ndgmmLuIOxMv9xQH KKi/UfWk+Lv6Ox3fuZbOQdCb+o6jXYzXzA== X-Received: by 2002:a63:82c1:0:b0:407:65bd:5710 with SMTP id w184-20020a6382c1000000b0040765bd5710mr27545462pgd.76.1655844405314; Tue, 21 Jun 2022 13:46:45 -0700 (PDT) Received: from stoup.. ([2602:47:d49e:3c01:8adc:a144:6ec2:4d71]) by smtp.gmail.com with ESMTPSA id p66-20020a625b45000000b005252defb016sm3649674pfb.122.2022.06.21.13.46.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 21 Jun 2022 13:46:44 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: Matheus Kowalczuk Ferst Subject: [PULL 1/9] tcg/ppc: implement rem[u]_i{32,64} with mod[su][wd] Date: Tue, 21 Jun 2022 13:46:35 -0700 Message-Id: <20220621204643.371397-2-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220621204643.371397-1-richard.henderson@linaro.org> References: <20220621204643.371397-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::52a; envelope-from=richard.henderson@linaro.org; helo=mail-pg1-x52a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Matheus Kowalczuk Ferst Power ISA v3.0 introduced mod[su][wd] insns that can be used to implement rem[u]_i{32,64}. Signed-off-by: Matheus Ferst Signed-off-by: Richard Henderson --- tcg/ppc/tcg-target.h | 4 ++-- tcg/ppc/tcg-target.c.inc | 22 ++++++++++++++++++++++ 2 files changed, 24 insertions(+), 2 deletions(-) diff --git a/tcg/ppc/tcg-target.h b/tcg/ppc/tcg-target.h index e6cf72503f..b5cd225cfa 100644 --- a/tcg/ppc/tcg-target.h +++ b/tcg/ppc/tcg-target.h @@ -83,7 +83,7 @@ extern bool have_vsx; /* optional instructions */ #define TCG_TARGET_HAS_div_i32 1 -#define TCG_TARGET_HAS_rem_i32 0 +#define TCG_TARGET_HAS_rem_i32 have_isa_3_00 #define TCG_TARGET_HAS_rot_i32 1 #define TCG_TARGET_HAS_ext8s_i32 1 #define TCG_TARGET_HAS_ext16s_i32 1 @@ -117,7 +117,7 @@ extern bool have_vsx; #define TCG_TARGET_HAS_extrl_i64_i32 0 #define TCG_TARGET_HAS_extrh_i64_i32 0 #define TCG_TARGET_HAS_div_i64 1 -#define TCG_TARGET_HAS_rem_i64 0 +#define TCG_TARGET_HAS_rem_i64 have_isa_3_00 #define TCG_TARGET_HAS_rot_i64 1 #define TCG_TARGET_HAS_ext8s_i64 1 #define TCG_TARGET_HAS_ext16s_i64 1 diff --git a/tcg/ppc/tcg-target.c.inc b/tcg/ppc/tcg-target.c.inc index de4483e43b..1cbd047ab3 100644 --- a/tcg/ppc/tcg-target.c.inc +++ b/tcg/ppc/tcg-target.c.inc @@ -371,6 +371,8 @@ static bool tcg_target_const_match(int64_t val, TCGType type, int ct) #define MULHWU XO31( 11) #define DIVW XO31(491) #define DIVWU XO31(459) +#define MODSW XO31(779) +#define MODUW XO31(267) #define CMP XO31( 0) #define CMPL XO31( 32) #define LHBRX XO31(790) @@ -403,6 +405,8 @@ static bool tcg_target_const_match(int64_t val, TCGType type, int ct) #define MULHDU XO31( 9) #define DIVD XO31(489) #define DIVDU XO31(457) +#define MODSD XO31(777) +#define MODUD XO31(265) #define LBZX XO31( 87) #define LHZX XO31(279) @@ -2806,6 +2810,14 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, tcg_out32(s, DIVWU | TAB(args[0], args[1], args[2])); break; + case INDEX_op_rem_i32: + tcg_out32(s, MODSW | TAB(args[0], args[1], args[2])); + break; + + case INDEX_op_remu_i32: + tcg_out32(s, MODUW | TAB(args[0], args[1], args[2])); + break; + case INDEX_op_shl_i32: if (const_args[2]) { /* Limit immediate shift count lest we create an illegal insn. */ @@ -2947,6 +2959,12 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, case INDEX_op_divu_i64: tcg_out32(s, DIVDU | TAB(args[0], args[1], args[2])); break; + case INDEX_op_rem_i64: + tcg_out32(s, MODSD | TAB(args[0], args[1], args[2])); + break; + case INDEX_op_remu_i64: + tcg_out32(s, MODUD | TAB(args[0], args[1], args[2])); + break; case INDEX_op_qemu_ld_i32: tcg_out_qemu_ld(s, args, false); @@ -3722,6 +3740,8 @@ static TCGConstraintSetIndex tcg_target_op_def(TCGOpcode op) case INDEX_op_div_i32: case INDEX_op_divu_i32: + case INDEX_op_rem_i32: + case INDEX_op_remu_i32: case INDEX_op_nand_i32: case INDEX_op_nor_i32: case INDEX_op_muluh_i32: @@ -3732,6 +3752,8 @@ static TCGConstraintSetIndex tcg_target_op_def(TCGOpcode op) case INDEX_op_nor_i64: case INDEX_op_div_i64: case INDEX_op_divu_i64: + case INDEX_op_rem_i64: + case INDEX_op_remu_i64: case INDEX_op_mulsh_i64: case INDEX_op_muluh_i64: return C_O1_I2(r, r, r); From patchwork Tue Jun 21 20:46:36 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 583620 Delivered-To: patch@linaro.org Received: by 2002:a05:7000:5036:0:0:0:0 with SMTP id e22csp2043811mab; Tue, 21 Jun 2022 13:52:55 -0700 (PDT) X-Google-Smtp-Source: AGRyM1twnOZS607IWk1XOQ66zs32PS7FBwwdVAONA3udIQnEEmlNgxOT5G6AzgtrgtCKqFwe4wcR X-Received: by 2002:a05:620a:4409:b0:6a7:8480:a89d with SMTP id v9-20020a05620a440900b006a78480a89dmr21159911qkp.9.1655844775248; Tue, 21 Jun 2022 13:52:55 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1655844775; cv=none; d=google.com; s=arc-20160816; b=q/8y7zeyOqAkYkoqnRmE/aZrz7qltw9TXHgYwtnrp+JIHxqScLKDgTPNvFPvVEEgB0 pU+Qi/LFZmSdfbzzd+rSSKKkItEJNHE8X91DUU0tn+o6bxusAMgJ0Uid9JyFimtSEmH+ uOWOJGzvZjXhn4OKy+NuVLf3N7BgjH6j4UmeJHjz8gPOuHl8zdbaXauAsJ0B6nWAWRIH v68hH8lFpK4BpWd/lnm3yOuTCO5SyDYbaaWlZPC3ecWcuXQ6S+KDRcikQN8XHuewUMEu w8fHlO1n0U0iADHaNJk09AcDLjz96ki9UK/yf6VoFxzxrAua1qvAZDVlKO5pz36FJpfn /PMw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=lmSLzTIbm+WJzToIYu7L7rIll0Ev3qx7GQceaN1q5e0=; b=LF+361rWiOyvQ2ilS1bhZOx0GxzHPEjaHp/l4g6h3VoFDot8mBijmXl2cwvgRzb6bg F3JrS2yG+CESTK/L3Dmi2Z17JNfvjQk2YBzB1YEM9gF8dlYKd8VXBqxZ3infl9p2jqqG Ba6xdrGx+8n2J9ZDrpNhWXpzHiE5DTSGmbT7X58yezmKo1QqFgmOYzH1w5q1smXYvN5l H+F3BXi1YY1mn9LiwCH70HrBgz+/cIp3xkSADP0m1VBPQ5AZF/oBPGzkjJGT7wiwux9V YJZmpUoQ1gsde6Vg0ab3sB/UxjiCBIgjDViHhNCMz4CzAQqFQ7/zng9HHgDijYX10hlF T5Nw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=ljeYoYnr; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id k2-20020a0cd682000000b0046b8c458607si8476608qvi.354.2022.06.21.13.52.55 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Tue, 21 Jun 2022 13:52:55 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=ljeYoYnr; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:56148 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1o3krm-0004DB-Ry for patch@linaro.org; Tue, 21 Jun 2022 16:52:54 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:54044) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1o3kly-0006bz-Vc for qemu-devel@nongnu.org; Tue, 21 Jun 2022 16:46:57 -0400 Received: from mail-pf1-x42a.google.com ([2607:f8b0:4864:20::42a]:34645) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1o3klv-00015F-Mr for qemu-devel@nongnu.org; Tue, 21 Jun 2022 16:46:54 -0400 Received: by mail-pf1-x42a.google.com with SMTP id t21so7901455pfq.1 for ; Tue, 21 Jun 2022 13:46:47 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=lmSLzTIbm+WJzToIYu7L7rIll0Ev3qx7GQceaN1q5e0=; b=ljeYoYnrjZKh9qVTzpI0plB0wMr5HaLuUw2dr+DaPGQ/X/vj89jXkWojVI/Ultcdfk umSmn4pHOyPSwY/fknaks2giMHEijfv169uJ5JVcohFlagoPshREAAOeZ7G2sMeT3LGX dK8kXuPCebebIZWa4m9eSy4S5YIZfS1KKLWGR3Cqa2DsfdrBYCMQg/Yx1I5wBCKzyQhi nhe47LJycLzR2uv4U8ZWUqIogzIQbYIO7Cc6NoJPozIBV1lHqpMoKIXDogitYmSGy8ym y5gnjq3LmVAPAgO4wVhv/haF11THElTMlDhXjla9eFETovruIfEdqvGw+EqSuAjcBJCu ++cw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=lmSLzTIbm+WJzToIYu7L7rIll0Ev3qx7GQceaN1q5e0=; b=3igRJchG0QGkbuZML4vlzH6M0kqF1oc+1u5SUlJwEhtwy6N+qHfQ4STe3aONsJSxAS CcdLVF09WPNMOQLbE5SOgGn4WUSy6Enmsd591lOlLbsTBxWdQSlWe8yrmZ4ZZjcL037B TYDlVnt3AJ3v+Tl6GqFKRKzD0cgRo4A4RWcek8iD60vLiBS4AVy3YE9Gp0qIlOs2COe+ kiZglj2o5gd6nWsM6WQ7pFo0Vwv8QERZC8WevCS0gD/+XUCbZTfmUWWseh0Br+bsb/yJ p7Cx+Z4jb5haKNDqvjnUX3TY1Idx0P4noMoTJ2UHcjsGfr/nn6a1znWgJpp8xlKhto0k 6lQQ== X-Gm-Message-State: AJIora8gC/7KBTrXwJIsXZ7sc/lyU6E+s9veuGQT105DZlEHNSJzWaJW 0msUrd3KfFC7oXPUXhYPbhgphe1pGl19JA== X-Received: by 2002:a05:6a00:b81:b0:51c:3bfe:7d89 with SMTP id g1-20020a056a000b8100b0051c3bfe7d89mr31878592pfj.31.1655844406342; Tue, 21 Jun 2022 13:46:46 -0700 (PDT) Received: from stoup.. ([2602:47:d49e:3c01:8adc:a144:6ec2:4d71]) by smtp.gmail.com with ESMTPSA id p66-20020a625b45000000b005252defb016sm3649674pfb.122.2022.06.21.13.46.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 21 Jun 2022 13:46:45 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: Bin Meng , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PULL 2/9] target/avr: Drop avr_cpu_memory_rw_debug() Date: Tue, 21 Jun 2022 13:46:36 -0700 Message-Id: <20220621204643.371397-3-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220621204643.371397-1-richard.henderson@linaro.org> References: <20220621204643.371397-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::42a; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x42a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Bin Meng CPUClass::memory_rw_debug() holds a callback for GDB memory access. If not provided, cpu_memory_rw_debug() is used by the GDB stub. Drop avr_cpu_memory_rw_debug() which does nothing special. Signed-off-by: Bin Meng Reviewed-by: Philippe Mathieu-Daudé Message-Id: <20220322095004.70682-1-bmeng.cn@gmail.com> Signed-off-by: Richard Henderson --- target/avr/cpu.h | 2 -- target/avr/cpu.c | 1 - target/avr/helper.c | 6 ------ 3 files changed, 9 deletions(-) diff --git a/target/avr/cpu.h b/target/avr/cpu.h index d304f33301..96419c0c2b 100644 --- a/target/avr/cpu.h +++ b/target/avr/cpu.h @@ -184,8 +184,6 @@ void avr_cpu_tcg_init(void); void avr_cpu_list(void); int cpu_avr_exec(CPUState *cpu); -int avr_cpu_memory_rw_debug(CPUState *cs, vaddr address, uint8_t *buf, - int len, bool is_write); enum { TB_FLAGS_FULL_ACCESS = 1, diff --git a/target/avr/cpu.c b/target/avr/cpu.c index 5d70e34dd5..05b992ff73 100644 --- a/target/avr/cpu.c +++ b/target/avr/cpu.c @@ -214,7 +214,6 @@ static void avr_cpu_class_init(ObjectClass *oc, void *data) cc->has_work = avr_cpu_has_work; cc->dump_state = avr_cpu_dump_state; cc->set_pc = avr_cpu_set_pc; - cc->memory_rw_debug = avr_cpu_memory_rw_debug; dc->vmsd = &vms_avr_cpu; cc->sysemu_ops = &avr_sysemu_ops; cc->disas_set_info = avr_cpu_disas_set_info; diff --git a/target/avr/helper.c b/target/avr/helper.c index c27f702901..db76452f9a 100644 --- a/target/avr/helper.c +++ b/target/avr/helper.c @@ -93,12 +93,6 @@ void avr_cpu_do_interrupt(CPUState *cs) cs->exception_index = -1; } -int avr_cpu_memory_rw_debug(CPUState *cs, vaddr addr, uint8_t *buf, - int len, bool is_write) -{ - return cpu_memory_rw_debug(cs, addr, buf, len, is_write); -} - hwaddr avr_cpu_get_phys_page_debug(CPUState *cs, vaddr addr) { return addr; /* I assume 1:1 address correspondence */ From patchwork Tue Jun 21 20:46:37 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 583618 Delivered-To: patch@linaro.org Received: by 2002:a05:7000:5036:0:0:0:0 with SMTP id e22csp2043145mab; Tue, 21 Jun 2022 13:51:57 -0700 (PDT) X-Google-Smtp-Source: AGRyM1uqsPg3cjEULPm7WljCoIS8WfLAPKy7gwDygTa9PZw4SNhrcyZJP0ZgN/8IkDyAA+c1EI5U X-Received: by 2002:a05:6214:4109:b0:470:4ba5:2bef with SMTP id kc9-20020a056214410900b004704ba52befmr7406741qvb.121.1655844717196; Tue, 21 Jun 2022 13:51:57 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1655844717; cv=none; d=google.com; s=arc-20160816; b=yRPxiov5nGrmoGSgBWwuw9KTXWjB7IaIefOUhvA7UofTvcPcVyuZ9uihfaXZOkuzYl 3yK+H52I3mZdSSsDaMcyzo+BKChxYgbc6GP6xyIzVxNm4pvzxf1DZP/bc3ZHhhAWjMJH ZqrNWu1N1LPAwKvGYdWpgJxetFEXtdo8EcptRmbaVVzycU+qA32c0wnjR58uZVBwH8S8 qHGhKiljy51aElBTiQcyQ1aR9wdGtLR/VcuQoatlYtjHp5rMOZfdLYGN4ZM9Y+4aco0f cCvgzpBoiBX4jQWGc8gwQFuaGiAq2XVmh+f7N7ySo8l8df3c83MBlRK7rzMVm4T8Mh1g HlqQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=Kk89pZiIJkjmY1JlrO1lZHXZp9wpAsiGbUykO8SGZ9s=; b=d8cAPpovpIZkgfGQ/kbuNoPCkdmmtYh6IxlhyomVK2ykvFn8U/MvPOy8bZCCmPO8pL 0e4rh7Ks1tnG6XkyHkSC+gkogDrwDzq4I+4u3+q/OxYeZ49DVDAmVW4zuNThp8Kyhb2v lpMZj8WrFhQB0+AexLJVZbJeQocXDuX0/C5w+mpXpZBxQIkNQBodJnUON+E+Tr6CL8Ua LnRKBfFbxbVwEULS9yK6ZvTDaW/FEyItRkIlk9hqQd/njGYmDZNvHZSyju3/u6Lph7cv mu8tiAOjrSuvlqiPAgcNFAXlvj478/BtlciC/C8yKfApsvuNl0gw8az851Z1FXci2owo sWGQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=NbMDupjo; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id d14-20020a05622a100e00b002f9372523edsi10345629qte.632.2022.06.21.13.51.57 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Tue, 21 Jun 2022 13:51:57 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=NbMDupjo; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:53674 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1o3kqq-0002bJ-OL for patch@linaro.org; Tue, 21 Jun 2022 16:51:56 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:54040) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1o3kly-0006bx-Va for qemu-devel@nongnu.org; Tue, 21 Jun 2022 16:46:57 -0400 Received: from mail-pj1-x102a.google.com ([2607:f8b0:4864:20::102a]:43697) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1o3klv-00015c-N9 for qemu-devel@nongnu.org; Tue, 21 Jun 2022 16:46:54 -0400 Received: by mail-pj1-x102a.google.com with SMTP id y13-20020a17090a154d00b001eaaa3b9b8dso14646474pja.2 for ; Tue, 21 Jun 2022 13:46:47 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=Kk89pZiIJkjmY1JlrO1lZHXZp9wpAsiGbUykO8SGZ9s=; b=NbMDupjoMKt3KOfb55M1c82xs2jU04MP8t0TUqU4INlrhXysp3kDXPOFVkOeyIxMjv Y8bdiuXwzgVsSZWW01rV6Pt0ql6hRT8uztI2K6e7vG2y8fBW6Pivdlp56Jyep9865oBe SGviWWqpONTvWSumsqHFmK9mg60jexnwjexo+K3suxu+bMBXcz4+lzsMQFkFTteOv0tz riXwhvdJnHNYVodj+ssvzdXqJSAjOr7uVCjtVs63r0Xa3gin75R6sX2bA51mpKdCUc/H yHNhHthL+Wola5zQfMtRiuO7MCXErAijUj1VlHW4fhocUVzXPzkvvZtT6lZIGefX36yX BDiw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=Kk89pZiIJkjmY1JlrO1lZHXZp9wpAsiGbUykO8SGZ9s=; b=7VO1wYTxOM2WQm946MFli0xvaV9C4aGb+NWfOINCXymmuuuLCcwgmFh1dssNTAW/uu j8liXUpsPFpZib8nEbX0RR3HBBA8L8oPrFhKERQP8RaS3FpaOiDBVEgXHRLpW0DSTL4H 4frZNgesJhHBIbz8oQTENGhhutsbNIS6+AMskEhhT4F+JqcIxmF3gF+EAflgkKhCE7Xt Fhq/01fiJanQUq1dg5KzNAa6dftfyxXoJKUSeQmN02eIp1SJXFq9oc4OGshRp9k7WkWY XqRNBH2sI2ioOaZot0zjLqkSPGFX+EnNsBurawXVy3yNjTdiXi9ehtgMSEB04qcObY8u j1rA== X-Gm-Message-State: AJIora9hJO+iV2xEaw/1p9o4Xjnkjb3zh3DGo5vG6K9c+Cnbr1Oq7I/M rT2jpv0Q95vt6ZoR+zre5XKx2lwiZAfJEg== X-Received: by 2002:a17:902:7005:b0:163:ffe7:32eb with SMTP id y5-20020a170902700500b00163ffe732ebmr30714459plk.18.1655844407035; Tue, 21 Jun 2022 13:46:47 -0700 (PDT) Received: from stoup.. ([2602:47:d49e:3c01:8adc:a144:6ec2:4d71]) by smtp.gmail.com with ESMTPSA id p66-20020a625b45000000b005252defb016sm3649674pfb.122.2022.06.21.13.46.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 21 Jun 2022 13:46:46 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PULL 3/9] accel/tcg: Init TCG cflags in vCPU thread handler Date: Tue, 21 Jun 2022 13:46:37 -0700 Message-Id: <20220621204643.371397-4-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220621204643.371397-1-richard.henderson@linaro.org> References: <20220621204643.371397-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::102a; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x102a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Philippe Mathieu-Daudé Move TCG cflags initialization to thread handler. Remove the duplicated assert checks. Signed-off-by: Philippe Mathieu-Daudé Message-Id: <20220323171751.78612-6-philippe.mathieu.daude@gmail.com> Signed-off-by: Richard Henderson --- accel/tcg/tcg-accel-ops-mttcg.c | 5 ++--- accel/tcg/tcg-accel-ops-rr.c | 7 +++---- 2 files changed, 5 insertions(+), 7 deletions(-) diff --git a/accel/tcg/tcg-accel-ops-mttcg.c b/accel/tcg/tcg-accel-ops-mttcg.c index d50239e0e2..ba997f6cfe 100644 --- a/accel/tcg/tcg-accel-ops-mttcg.c +++ b/accel/tcg/tcg-accel-ops-mttcg.c @@ -70,6 +70,8 @@ static void *mttcg_cpu_thread_fn(void *arg) assert(tcg_enabled()); g_assert(!icount_enabled()); + tcg_cpu_init_cflags(cpu, current_machine->smp.max_cpus > 1); + rcu_register_thread(); force_rcu.notifier.notify = mttcg_force_rcu; force_rcu.cpu = cpu; @@ -139,9 +141,6 @@ void mttcg_start_vcpu_thread(CPUState *cpu) { char thread_name[VCPU_THREAD_NAME_SIZE]; - g_assert(tcg_enabled()); - tcg_cpu_init_cflags(cpu, current_machine->smp.max_cpus > 1); - cpu->thread = g_new0(QemuThread, 1); cpu->halt_cond = g_malloc0(sizeof(QemuCond)); qemu_cond_init(cpu->halt_cond); diff --git a/accel/tcg/tcg-accel-ops-rr.c b/accel/tcg/tcg-accel-ops-rr.c index 1a72149f0e..cc8adc2380 100644 --- a/accel/tcg/tcg-accel-ops-rr.c +++ b/accel/tcg/tcg-accel-ops-rr.c @@ -152,7 +152,9 @@ static void *rr_cpu_thread_fn(void *arg) Notifier force_rcu; CPUState *cpu = arg; - assert(tcg_enabled()); + g_assert(tcg_enabled()); + tcg_cpu_init_cflags(cpu, false); + rcu_register_thread(); force_rcu.notify = rr_force_rcu; rcu_add_force_rcu_notifier(&force_rcu); @@ -275,9 +277,6 @@ void rr_start_vcpu_thread(CPUState *cpu) static QemuCond *single_tcg_halt_cond; static QemuThread *single_tcg_cpu_thread; - g_assert(tcg_enabled()); - tcg_cpu_init_cflags(cpu, false); - if (!single_tcg_cpu_thread) { cpu->thread = g_new0(QemuThread, 1); cpu->halt_cond = g_new0(QemuCond, 1); From patchwork Tue Jun 21 20:46:38 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 583621 Delivered-To: patch@linaro.org Received: by 2002:a05:7000:5036:0:0:0:0 with SMTP id e22csp2044399mab; Tue, 21 Jun 2022 13:53:42 -0700 (PDT) X-Google-Smtp-Source: AGRyM1vAvlSOCdoDHK77DpzGH9V2Nk49JmBcxrRCnSYdL5oOXEKHTjPTGoxL71ImICXadetmhYZy X-Received: by 2002:a05:620a:b87:b0:6a7:48d:9d97 with SMTP id k7-20020a05620a0b8700b006a7048d9d97mr21629665qkh.67.1655844822253; Tue, 21 Jun 2022 13:53:42 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1655844822; cv=none; d=google.com; s=arc-20160816; b=FTDwiD3WGl6D0ZhBbOsVwLCYNg4Uhn+6y+7xs9ozumQFqn0w6R8mzpTFFF+nCDcmgx 43I1igLRJ3vhX6kXDfClM3lg4UuVEdtxpjwlduylzEjABBgo0zkQRPsY07WdFE4OPnb9 WCbgU1W9GWedEMeB4+iIud/v2mHXF2RI+gRz4TRO+0eU8zPBVMX3JqY18THosNSxeoYa 9nYxmsEf5CPOFKfgMBlA2SwA6KO7fhHqTfVwro79ah3ZqfnVgCqKKUTG4tQ3A+aF5Pcn KRAwWzmb4reJqMraReZMAhaMdvyxI4UfAoTxcBzkrJiFDrR8vsh5DYq6nkfMocUq7fqf az2w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=1iNW8arog/kBIvl1O8Y+BsdggwiOBBLeU4FAPW4Cogk=; b=vEh7LoGZybX0iyrkAbbC+8Ikuqm1B8pNImGtvESrVOhMrtWmikZMdfEqC6SlcZFNm3 8vVgLbKEIt7FKBMBOBGqYqvR48D2AW4Zhe5d72RxLpW0SDXCReBk1qmI39W+SJFdFfUH RLqfA91ucKkTI32sMf6Sf5c4k6l6QivhjgCnCrUozuuwoTq4sifZwYMqW/KGEavxIkgd iB76BgY65gMPf3QN3HXjY0i7wgOuMnn1/784vhG8NB2dVhESPDHLLXvmFb+28f6PZ74w iVn1+FI2mRmIdxfOBb2a57g2OGoq4Q0rpuEuv9Q6uPigd7isnsG5Cq8Jwe2QJwkagfqF R1pw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=rZ4I7HvD; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id l8-20020a05620a28c800b006a7032548b1si11465735qkp.39.2022.06.21.13.53.42 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Tue, 21 Jun 2022 13:53:42 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=rZ4I7HvD; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:59904 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1o3ksX-0006oA-Ry for patch@linaro.org; Tue, 21 Jun 2022 16:53:41 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:54060) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1o3klz-0006c3-9W for qemu-devel@nongnu.org; Tue, 21 Jun 2022 16:46:57 -0400 Received: from mail-pg1-x532.google.com ([2607:f8b0:4864:20::532]:38637) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1o3klv-00015h-O8 for qemu-devel@nongnu.org; Tue, 21 Jun 2022 16:46:55 -0400 Received: by mail-pg1-x532.google.com with SMTP id e63so12670552pgc.5 for ; Tue, 21 Jun 2022 13:46:48 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=1iNW8arog/kBIvl1O8Y+BsdggwiOBBLeU4FAPW4Cogk=; b=rZ4I7HvDKzSQTXuBodDxS9EnrTnvREZqcGD9p2DYTkhR+tdIpWTv5F2f+8PSPsFs5l 0+2UvkXAm7/r4S0v2BpvVNzBJcvRaztVTyDed2Y4Js2rr6CDp9d8j3hX8PF5Bzei9kBf LzfQY9/XBN06nKDLitMvGPKKMd8QEv88FElfPHkrJJyrJyVRGf/+2Sn+1C5wIkoUo4av cyngexmVggEhA9h3CfXRWVEbT5EXOgdW7YUJRNC3CjYSAhMl/9q3FbkcGsldsMT1ssdd FHW9pK1nvRlCe07obNBF2OP/aLUkO7Y7oC57Gy1RNsnJc52egLj8ayVXq9XhbbHFSh+1 18fA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=1iNW8arog/kBIvl1O8Y+BsdggwiOBBLeU4FAPW4Cogk=; b=6OmhzjiYxCVK1MTk77LGo+4GPy0rYdZJdrUQuWNQKDUZD4QUUSvWhVidtj2OP97LCZ 6yQAtaiPG31OBGkwggx4z0ulAYblNJ9gX4CmyMgpg2GDzR8KZtvPQpBTsEHnUjwcQBVM 5Uesz4jPwdGa2cxVt2O04e+E7G3dj/aQB7Lxpk9R9hOp0EslCbPrISkyrNpFxbng7RWj 4nvhKDx/JbwSOQrRmKgVDG+rJICxbiWBHjZ86755yGRKmdxWukR8yABz395RgoUeOadc OK7L95pI3sQmy0HrBPoxeiCMyoWiIAbOuPUM4h6mOFG7leXhNPPnK8Jf9/IE1TLWmkxb AXGA== X-Gm-Message-State: AJIora+yISNwHF8Y9d77Jx4AkUvdIw32XdLDVtx0fp2ojRybKnU1JJqe 7KEHkv4al6GxR1oZD0+8HczmMvyTJc3vaA== X-Received: by 2002:a63:ae4a:0:b0:40c:2d48:5fda with SMTP id e10-20020a63ae4a000000b0040c2d485fdamr25398560pgp.434.1655844407993; Tue, 21 Jun 2022 13:46:47 -0700 (PDT) Received: from stoup.. ([2602:47:d49e:3c01:8adc:a144:6ec2:4d71]) by smtp.gmail.com with ESMTPSA id p66-20020a625b45000000b005252defb016sm3649674pfb.122.2022.06.21.13.46.47 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 21 Jun 2022 13:46:47 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PULL 4/9] accel/tcg: Reorganize tcg_accel_ops_init() Date: Tue, 21 Jun 2022 13:46:38 -0700 Message-Id: <20220621204643.371397-5-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220621204643.371397-1-richard.henderson@linaro.org> References: <20220621204643.371397-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::532; envelope-from=richard.henderson@linaro.org; helo=mail-pg1-x532.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Philippe Mathieu-Daudé Reorg TCG AccelOpsClass initialization to emphasis icount mode share more code with single-threaded TCG. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Message-Id: <20220323171751.78612-7-philippe.mathieu.daude@gmail.com> Signed-off-by: Richard Henderson --- accel/tcg/tcg-accel-ops.c | 15 ++++++++------- 1 file changed, 8 insertions(+), 7 deletions(-) diff --git a/accel/tcg/tcg-accel-ops.c b/accel/tcg/tcg-accel-ops.c index 684dc5a137..786d90c08f 100644 --- a/accel/tcg/tcg-accel-ops.c +++ b/accel/tcg/tcg-accel-ops.c @@ -97,16 +97,17 @@ static void tcg_accel_ops_init(AccelOpsClass *ops) ops->create_vcpu_thread = mttcg_start_vcpu_thread; ops->kick_vcpu_thread = mttcg_kick_vcpu_thread; ops->handle_interrupt = tcg_handle_interrupt; - } else if (icount_enabled()) { - ops->create_vcpu_thread = rr_start_vcpu_thread; - ops->kick_vcpu_thread = rr_kick_vcpu_thread; - ops->handle_interrupt = icount_handle_interrupt; - ops->get_virtual_clock = icount_get; - ops->get_elapsed_ticks = icount_get; } else { ops->create_vcpu_thread = rr_start_vcpu_thread; ops->kick_vcpu_thread = rr_kick_vcpu_thread; - ops->handle_interrupt = tcg_handle_interrupt; + + if (icount_enabled()) { + ops->handle_interrupt = icount_handle_interrupt; + ops->get_virtual_clock = icount_get; + ops->get_elapsed_ticks = icount_get; + } else { + ops->handle_interrupt = tcg_handle_interrupt; + } } } From patchwork Tue Jun 21 20:46:39 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 583616 Delivered-To: patch@linaro.org Received: by 2002:a05:7000:5036:0:0:0:0 with SMTP id e22csp2041099mab; Tue, 21 Jun 2022 13:49:06 -0700 (PDT) X-Google-Smtp-Source: AGRyM1usg8AYBm1uJRF8rmc/eB2DMbs9Lm92TzIPxJPtOQWuP+1b6Q3bv+GP+3o+9vLxPjxjWegW X-Received: by 2002:a05:620a:150b:b0:6a6:b079:4e40 with SMTP id i11-20020a05620a150b00b006a6b0794e40mr21605633qkk.184.1655844546629; Tue, 21 Jun 2022 13:49:06 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1655844546; cv=none; d=google.com; s=arc-20160816; b=PlAitCaq0e+PXepTKh5p5mSQ+b/9qqkh7jK6cnbm4/pmm1vH7au9LAyQ92/HX7DGbZ agiuVlkymSJdOVKCtOFbc1zum5O1aTtuic2a/SBVL2NV1VO8fHN8eU0hKrqkn91sPCsx G6FKwNR+NMiuRKMeoyFzflQQwfwJseSVZEn8+z9VN7vNpKVrmMw7l4fQ1gG6nR6AFprL q9ni1kMyUUEGZJxeSvsscTAzDoofEV2tHmmo3Q46ZHiWTkl2pogwuSYEo+uYEojc/Z86 I0NvgvdMAXJ13YTPpL79OAwYo7Zhz0v3lMziABCrklo/TNXIp0YzV2qTrRhd7vn1LpxH rZ+Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=7zQvLkFRfY6uiQ/phm8O3aPlVxdTqBvkghprkVFaI2Y=; b=XZbGOdUFG2WkdlwEqohHo9RLd0KQ58U3A8kukaGgzdt/9eZDoCdfkjN1ngY5qrUQ58 5PRpNUT7TMm3zr1TdmU7fDHvqFixmbc0GMHUU0ZOR/U5HOUcgqSDDji9wXeiUi+sLyXH XQGRWjQpDmqmGUgr4T51L522xII4rrT4LE9LmoaedXoTqhMSRNW7idag4G20FepSTnmY sPmOmttGpsDVY3mmZ7zTcoHDTgn4UKFU+m48hjD1mKyZL411xLeutIaetp/gG+xTnkjj FCKNy+PbcCatZEDXk99Yl1VUj5PQwglKiFzCeiE1kbLp846Ip/HB1pwksRvRPmz1uA8g zN/w== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=j6otmGLb; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id j7-20020ae9c207000000b006a6d257a17csi9761930qkg.250.2022.06.21.13.49.06 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Tue, 21 Jun 2022 13:49:06 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=j6otmGLb; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:47252 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1o3ko6-0006dz-7k for patch@linaro.org; Tue, 21 Jun 2022 16:49:06 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:54042) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1o3kly-0006by-Va for qemu-devel@nongnu.org; Tue, 21 Jun 2022 16:46:57 -0400 Received: from mail-pl1-x631.google.com ([2607:f8b0:4864:20::631]:34405) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1o3klv-00015n-NG for qemu-devel@nongnu.org; Tue, 21 Jun 2022 16:46:54 -0400 Received: by mail-pl1-x631.google.com with SMTP id i15so13559627plr.1 for ; Tue, 21 Jun 2022 13:46:50 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=7zQvLkFRfY6uiQ/phm8O3aPlVxdTqBvkghprkVFaI2Y=; b=j6otmGLb/Cw/NVe5L0hwIqVgRGo7+/vJxPZkR/qBGgb4zUS0JxKJZ9nvc47X709CNU uTDchIlSWw233GE+QdK5+uO+6kGpnmuzbpLPdZVnGAIM2N/lnZphNirUCDwpRBeszclY 2aazHLeI3LbgRm/CeksuzNTgdEHklmReppPyFW/YXmoL9gz2pmRnq7khKuGpptI8yQWz 7MbzohW/UPq3/MhjJTxRO6/AMPLygRn4QZcq9f0DbandABDBoPdGi4kojQOWTSuA/aQv owluUDE1tsm+KiCZskm/8yk7KV4VxYfdClHNWUlROJ+g4EYrCFIQVeTEMnGd5XrugrRt +zDw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=7zQvLkFRfY6uiQ/phm8O3aPlVxdTqBvkghprkVFaI2Y=; b=R8XpphgTvOCxIYMpmjkh44Meoe1xbGSAoIuDZSlI3xa/v/YkFaoP7fd5fkanARgzRh UTvCd0E0rNZqo2RphDIOM+z8cxJuFhQpX6qTXDJbxWhJU7ENPLcvvPSSQgnws42RUGEP ap7NxWN7AB2IO9Dyr+C6IoTja3xOICeRsvBOC/oOeNgdZUw76Xf5UGDLK6kyXLsHxBZG YdKsLefXwfua8yk3U5XEsWsorSRKq5nvdJBJPOdq7D0n8NhsKO0OkEFlHRVCelGRheqi tEgQJLDtWnulx+idnu6RJIjXtfp1NW0eLppxvuYa6Q0n8lJmto5zmwXT0/yJrmWGHCos Dl3g== X-Gm-Message-State: AJIora+FRZKPhkis/wa0ukeYKV76T3IPAQfNkM9jQkfpB8TgNJTr0kFh oEre0yCwDgRJBGSSlNjqyZUQscb8TIuqfw== X-Received: by 2002:a17:903:22c6:b0:167:5991:fb63 with SMTP id y6-20020a17090322c600b001675991fb63mr30862376plg.37.1655844409201; Tue, 21 Jun 2022 13:46:49 -0700 (PDT) Received: from stoup.. ([2602:47:d49e:3c01:8adc:a144:6ec2:4d71]) by smtp.gmail.com with ESMTPSA id p66-20020a625b45000000b005252defb016sm3649674pfb.122.2022.06.21.13.46.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 21 Jun 2022 13:46:48 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: Idan Horowitz Subject: [PULL 5/9] qemu-timer: Skip empty timer lists before locking in qemu_clock_deadline_ns_all Date: Tue, 21 Jun 2022 13:46:39 -0700 Message-Id: <20220621204643.371397-6-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220621204643.371397-1-richard.henderson@linaro.org> References: <20220621204643.371397-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::631; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x631.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Idan Horowitz This decreases qemu_clock_deadline_ns_all's share from 23.2% to 13% in a profile of icount-enabled aarch64-softmmu. Signed-off-by: Idan Horowitz Reviewed-by: Richard Henderson Message-Id: <20220114004358.299534-2-idan.horowitz@gmail.com> Signed-off-by: Richard Henderson --- util/qemu-timer.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/util/qemu-timer.c b/util/qemu-timer.c index a670a57881..6a0de33dd2 100644 --- a/util/qemu-timer.c +++ b/util/qemu-timer.c @@ -261,6 +261,9 @@ int64_t qemu_clock_deadline_ns_all(QEMUClockType type, int attr_mask) } QLIST_FOREACH(timer_list, &clock->timerlists, list) { + if (!qatomic_read(&timer_list->active_timers)) { + continue; + } qemu_mutex_lock(&timer_list->active_timers_lock); ts = timer_list->active_timers; /* Skip all external timers */ From patchwork Tue Jun 21 20:46:40 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 583617 Delivered-To: patch@linaro.org Received: by 2002:a05:7000:5036:0:0:0:0 with SMTP id e22csp2041926mab; Tue, 21 Jun 2022 13:50:17 -0700 (PDT) X-Google-Smtp-Source: AGRyM1slFtJjJCRWEPizgLpPp+LtGIiFaE0y/jl7NWhY6UxIoyzSyUdcRhnTyTbYnbhjnLU2RmBK X-Received: by 2002:ad4:5f4c:0:b0:470:4fd3:b091 with SMTP id p12-20020ad45f4c000000b004704fd3b091mr6448981qvg.14.1655844617847; Tue, 21 Jun 2022 13:50:17 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1655844617; cv=none; d=google.com; s=arc-20160816; b=Q4qgMuPwQAe6DAoW0ECRlat7GLe9Hx0OmjthoCmm759mQJ814+Qck7riDS58gWmsWO gCF3XKNOirQ3jXiHBc339C7WSy8O5Rf87ctS5oxvmNF+uPkTRD69QX9eL+gQzbFppt2r yc/vySwguloyAtNg0+ycyEnTA04ZGGQCdem6hfv2SGoltIrQZF6091D2wL0eEVaSQl4b On6Lq7XjggS8XcL6pzy1ICCik0apWXxncVjNrzRFQRtOSWONurJneG0hV6wvyOIp5xI8 dNuAiKHl4jETAXlcMlTAAk5FN8jKADY7N0ArisdH4xW0+MoUUDIhqBUutxN6KFu5Bcif YZvg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=umEK6S/Se+TnFpwCSFqpCewoOtCuj0w1ZzK12Mla/z8=; b=mD5T7OnlGXNcMQblw/H+jcx7+gNpSkVB3RjzzI5Ym5yzXI9k1kDb5w9A2+ufcRCc+z FLVsWg9M/iaRkc8au0+YDMlMSQijM9GOEIuXpP0i2u7PVMKa5pjsx1Pss4bylqjHp/TT IoDPLhGAMqKw3iefi9+V4OcuI3LhjhDbcqo6NRiUyy3T4xv+pHYWd5r/mJAvIHc6QXje sJ5CjwF/OcThLOBdYOzPm3a9DqRHKFcK4h8QMjN5Pdg8pz+czv9tzqdT2RbOgRCrwRfS CqAS25CSASMQfOCRKTB7jkESCdoBSLgC9x0SZJje7XgnNEYUjbRBKYlpyfP97WeR5HIV eVIw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=WKaVfkrd; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id 6-20020a0562140d6600b0046a4b888b03si3928557qvs.544.2022.06.21.13.50.17 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Tue, 21 Jun 2022 13:50:17 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=WKaVfkrd; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:49796 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1o3kpF-0008Qf-BH for patch@linaro.org; Tue, 21 Jun 2022 16:50:17 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:54100) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1o3km1-0006c5-Ed for qemu-devel@nongnu.org; Tue, 21 Jun 2022 16:46:57 -0400 Received: from mail-pf1-x42f.google.com ([2607:f8b0:4864:20::42f]:33551) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1o3klv-00015s-OM for qemu-devel@nongnu.org; Tue, 21 Jun 2022 16:46:56 -0400 Received: by mail-pf1-x42f.google.com with SMTP id n12so7226648pfq.0 for ; Tue, 21 Jun 2022 13:46:51 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=umEK6S/Se+TnFpwCSFqpCewoOtCuj0w1ZzK12Mla/z8=; b=WKaVfkrdsqSPcent4ni6RsPHnU7+UaCMu7aov3WU8yhsIFhdpx4RHxb9vvMhq7Sltv GbyGkzLk+dY0OiDrGypLGksL8PXyMq5ZQuk9DWs2UQyztdl1pcmVFJcvWii1U6yuIQRQ 7FlQpC1b312vbq5B4tAOymxPeGPkMJGZVzoa7ZJ9iKYv2NyhMRZVKyHAzc2nvsxkxGsz KWO/6ZDEoNB7apJnt9pQLKuNHGbJ3ciaXaPZ11vHgqfXNBZnMLt5YPDxSIiLImJbLEX4 rtX12rWZZPKcmmK4klS70PkNLE5tOg8ER4XWAEcZb+GP0RZOyNq+/oOm+0acyny+8tuv KVMg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=umEK6S/Se+TnFpwCSFqpCewoOtCuj0w1ZzK12Mla/z8=; b=RYJGrYs2NhgMlDiGTjKfvf8Ja0T0iwDlybN8hA++cXQ3ODF838SayaQrGct4hdHOyn w0gdyfFkNSoZtfWH3yUYCOzR2zlfn95VQNvpAomj8TV6DQXNQfPV/PR4/88+iWTitTZD DItjYy7cPXzV2GJIb6maqVkQfNGs0VE9u761ZDiH7ccK1UEpZb3qvSgn6cwysOcPoY3F TR5U4ekB5LHJPLbMRWHIb6EqTllFLyRM1XC/eQpJMV3S5jG2ICP1ZY9fEiAlBNyo3PpK Jp38kwKWY8uMimwwpwrWDchI8fyeJsEoXoBk4cJt+YRtGJMkzitVfzRQMU7DxKHvnrKH 193Q== X-Gm-Message-State: AJIora+UjKvsmKQtmF/9IT52rd6tI05tDf9Slh6RDVMu/F8wkiWRR2g7 1VjSki/kmcyy5nYbI7VgdvwzCr3w4rkoTw== X-Received: by 2002:a63:6943:0:b0:40c:3020:d0b with SMTP id e64-20020a636943000000b0040c30200d0bmr24956919pgc.34.1655844410193; Tue, 21 Jun 2022 13:46:50 -0700 (PDT) Received: from stoup.. ([2602:47:d49e:3c01:8adc:a144:6ec2:4d71]) by smtp.gmail.com with ESMTPSA id p66-20020a625b45000000b005252defb016sm3649674pfb.122.2022.06.21.13.46.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 21 Jun 2022 13:46:49 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: Peter Maydell Subject: [PULL 6/9] softmmu: Always initialize xlat in address_space_translate_for_iotlb Date: Tue, 21 Jun 2022 13:46:40 -0700 Message-Id: <20220621204643.371397-7-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220621204643.371397-1-richard.henderson@linaro.org> References: <20220621204643.371397-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::42f; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x42f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" The bug is an uninitialized memory read, along the translate_fail path, which results in garbage being read from iotlb_to_section, which can lead to a crash in io_readx/io_writex. The bug may be fixed by writing any value with zero in ~TARGET_PAGE_MASK, so that the call to iotlb_to_section using the xlat'ed address returns io_mem_unassigned, as desired by the translate_fail path. It is most useful to record the original physical page address, which will eventually be logged by memory_region_access_valid when the access is rejected by unassigned_mem_accepts. Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1065 Signed-off-by: Richard Henderson Reviewed-by: Peter Maydell Message-Id: <20220621153829.366423-1-richard.henderson@linaro.org> --- softmmu/physmem.c | 13 ++++++++++++- 1 file changed, 12 insertions(+), 1 deletion(-) diff --git a/softmmu/physmem.c b/softmmu/physmem.c index fb16be57a6..dc3c3e5f2e 100644 --- a/softmmu/physmem.c +++ b/softmmu/physmem.c @@ -669,7 +669,7 @@ void tcg_iommu_init_notifier_list(CPUState *cpu) /* Called from RCU critical section */ MemoryRegionSection * -address_space_translate_for_iotlb(CPUState *cpu, int asidx, hwaddr addr, +address_space_translate_for_iotlb(CPUState *cpu, int asidx, hwaddr orig_addr, hwaddr *xlat, hwaddr *plen, MemTxAttrs attrs, int *prot) { @@ -678,6 +678,7 @@ address_space_translate_for_iotlb(CPUState *cpu, int asidx, hwaddr addr, IOMMUMemoryRegionClass *imrc; IOMMUTLBEntry iotlb; int iommu_idx; + hwaddr addr = orig_addr; AddressSpaceDispatch *d = qatomic_rcu_read(&cpu->cpu_ases[asidx].memory_dispatch); @@ -722,6 +723,16 @@ address_space_translate_for_iotlb(CPUState *cpu, int asidx, hwaddr addr, return section; translate_fail: + /* + * We should be given a page-aligned address -- certainly + * tlb_set_page_with_attrs() does so. The page offset of xlat + * is used to index sections[], and PHYS_SECTION_UNASSIGNED = 0. + * The page portion of xlat will be logged by memory_region_access_valid() + * when this memory access is rejected, so use the original untranslated + * physical address. + */ + assert((orig_addr & ~TARGET_PAGE_MASK) == 0); + *xlat = orig_addr; return &d->map.sections[PHYS_SECTION_UNASSIGNED]; } From patchwork Tue Jun 21 20:46:41 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 583619 Delivered-To: patch@linaro.org Received: by 2002:a05:7000:5036:0:0:0:0 with SMTP id e22csp2043166mab; Tue, 21 Jun 2022 13:51:59 -0700 (PDT) X-Google-Smtp-Source: AGRyM1sglklTJtjQdGiu93QPoJwP1dDibtnR/wq7s0/YydtgnRhW8f+Hc+NBYq6/W1Zy2ZQpH128 X-Received: by 2002:a05:6214:961:b0:470:3e2c:764f with SMTP id do1-20020a056214096100b004703e2c764fmr12515720qvb.20.1655844719241; Tue, 21 Jun 2022 13:51:59 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1655844719; cv=none; d=google.com; s=arc-20160816; b=gadrN0fpwY5V3tYpuKqgkq2Ui90JFv/FFn4HfykAOCFCrmL4S7yDAaDQDLHrElyH0P UEFQiOZBaRquGWzYv91O1ijlbA2W0R25Crc3GVCrY4A+KJbplXQdvrj8RriRMUUnF6pD zX/dBl3WIVnaZI0/rF07jjN99emJGQMedZNDX6CR7SughPD8k7FVF7wcmsfiD/lfHYdb ERzB/P1AcaM5isAwfoNn1l4r7I9UD2G1ZeNeP3SKyEjuNt2+emd/ye4on1xu/RCtDSL+ iT1LYdGgEOXxPItiCDM2FhBFqwxdcsAm+7su86F2E9S+9sBJub80Y6htNjhq8oCmLK6N PNfA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=OQNphu6lEVBTCzL3EikuxiWNO8eLN6Zl5Gd4LZTqGRA=; b=HpB7Gmxl+0HvB8NLf7oLGXjCunlgdu9zvC0gXD1Z72F1iq6r0VmxRS1EohBShmCNaW P/W8JMG+2bi4XvG3S1l/47jgf3pV5KMGpVHYJjLxZFZrLwaYAcpbs5QgnQWjWHlySTo2 pqdyV5lJIWZrWpK8tnuCPYq81/Ry4kAERHXXPBwDTR+p/OosKKMQZdHbEHhxQcolopHL nNDXHlrNRBSmFntiwYiBjN3LhZ7WUIE2WQTuwlWyR8v1sZqGHZ0i75qSqtouPJdfeLwr iWQPbbP0zzAmtBh5n6KpL1oLzvfw4Oc8nDormNlXjmxfxQ+gAMxCfUgNGTVcKWhOl9YG N7Fw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=W5YbCsFX; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id p1-20020a0cc3c1000000b004646b730ecbsi8301473qvi.68.2022.06.21.13.51.59 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Tue, 21 Jun 2022 13:51:59 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=W5YbCsFX; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:53696 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1o3kqs-0002c2-PL for patch@linaro.org; Tue, 21 Jun 2022 16:51:58 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:54144) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1o3km1-0006dD-VR for qemu-devel@nongnu.org; Tue, 21 Jun 2022 16:46:57 -0400 Received: from mail-pg1-x52d.google.com ([2607:f8b0:4864:20::52d]:41863) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1o3klw-00016E-Om for qemu-devel@nongnu.org; Tue, 21 Jun 2022 16:46:57 -0400 Received: by mail-pg1-x52d.google.com with SMTP id 23so8003716pgc.8 for ; Tue, 21 Jun 2022 13:46:52 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=OQNphu6lEVBTCzL3EikuxiWNO8eLN6Zl5Gd4LZTqGRA=; b=W5YbCsFXe/c/9NW0NQOlICurwY611Hsyi07Zlz3b+se/2ejA8ZsDjNA2Oz782HHpLx oyUwtldoqH2fbbbgJ/TGfIK9bt5XLr/mCwNmUX5V2Q4W/xcVm3KCxAs0wKg+H3CBIjHO RnjJKszstTXLwhXGoT0T3FO+0SN/XsbmRDI1NZxIdn48aOA1+q4/XR4bfCYZi2NhsvhJ HQzuGfWkpaDdMvDM8KTt+HyW0YqIvjdb81wqsiLLUfJrnUpVyiY2KlJ0goDSbfpSSjlB I/povpd/hH5bBRd0WjNkeG6SKbpM5WLYmdjMp14OjYMtdXwOO0EQxAv23bPvWe1O4723 viog== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=OQNphu6lEVBTCzL3EikuxiWNO8eLN6Zl5Gd4LZTqGRA=; b=RXzpZAdJMjheQScNpidhX9DUvkJepzVXMRHZb0MADe0qnk04LLtxwXdlEV3u0O9hXV /oNkqYe+pMh+wo+VMs0CXsBZNPJvpcTAOh6hoUeQAXhpoZQUkCTBqh4IA1Qme0YypWpM aWs6hDQOLHdujlnQoniOaSqQaMqA1oyg9DfrE9ca8bxHdDG+2qKzNVjbT2hYwYD4nB2g JiDG5QRXJVyiE4FeeEdAoW65NmiZLiiuLH/yB9g+WMLtNhOSQQ5eVbxSiahIk+PGJeP7 jeP6P3aewmUeNYlBYfXE0sw4rD6/LnmxI2v6cPMgOE9pf5T+SpdUfhRQobDaDUAxUSY4 8SeQ== X-Gm-Message-State: AJIora8wVqeN+LcestkfUMYAP+jSOuDvNmKbSENeqtVO0oV2C08nkLO0 7PQnnL2m9cH3bym5QBsfjT6N6/HtwZiElQ== X-Received: by 2002:a63:c07:0:b0:405:408:949 with SMTP id b7-20020a630c07000000b0040504080949mr27939058pgl.368.1655844411337; Tue, 21 Jun 2022 13:46:51 -0700 (PDT) Received: from stoup.. ([2602:47:d49e:3c01:8adc:a144:6ec2:4d71]) by smtp.gmail.com with ESMTPSA id p66-20020a625b45000000b005252defb016sm3649674pfb.122.2022.06.21.13.46.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 21 Jun 2022 13:46:50 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: Peter Maydell Subject: [PULL 7/9] util: Merge cacheflush.c and cacheinfo.c Date: Tue, 21 Jun 2022 13:46:41 -0700 Message-Id: <20220621204643.371397-8-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220621204643.371397-1-richard.henderson@linaro.org> References: <20220621204643.371397-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::52d; envelope-from=richard.henderson@linaro.org; helo=mail-pg1-x52d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Combine the two files into cacheflush.c. There's a couple of bits that would be helpful to share between the two, and combining them seems better than exporting the bits. Signed-off-by: Richard Henderson Reviewed-by: Peter Maydell Message-Id: <20220621014837.189139-2-richard.henderson@linaro.org> --- util/cacheflush.c | 202 +++++++++++++++++++++++++++++++++++++++++++++- util/cacheinfo.c | 200 --------------------------------------------- util/meson.build | 2 +- 3 files changed, 202 insertions(+), 202 deletions(-) delete mode 100644 util/cacheinfo.c diff --git a/util/cacheflush.c b/util/cacheflush.c index 4b57186d89..8096afd33c 100644 --- a/util/cacheflush.c +++ b/util/cacheflush.c @@ -1,5 +1,5 @@ /* - * Flush the host cpu caches. + * Info about, and flushing the host cpu caches. * * This work is licensed under the terms of the GNU GPL, version 2 or later. * See the COPYING file in the top-level directory. @@ -9,8 +9,208 @@ #include "qemu/cacheflush.h" #include "qemu/cacheinfo.h" #include "qemu/bitops.h" +#include "qemu/host-utils.h" +#include "qemu/atomic.h" +int qemu_icache_linesize = 0; +int qemu_icache_linesize_log; +int qemu_dcache_linesize = 0; +int qemu_dcache_linesize_log; + +/* + * Operating system specific cache detection mechanisms. + */ + +#if defined(_WIN32) + +static void sys_cache_info(int *isize, int *dsize) +{ + SYSTEM_LOGICAL_PROCESSOR_INFORMATION *buf; + DWORD size = 0; + BOOL success; + size_t i, n; + + /* + * Check for the required buffer size first. Note that if the zero + * size we use for the probe results in success, then there is no + * data available; fail in that case. + */ + success = GetLogicalProcessorInformation(0, &size); + if (success || GetLastError() != ERROR_INSUFFICIENT_BUFFER) { + return; + } + + n = size / sizeof(SYSTEM_LOGICAL_PROCESSOR_INFORMATION); + size = n * sizeof(SYSTEM_LOGICAL_PROCESSOR_INFORMATION); + buf = g_new0(SYSTEM_LOGICAL_PROCESSOR_INFORMATION, n); + if (!GetLogicalProcessorInformation(buf, &size)) { + goto fail; + } + + for (i = 0; i < n; i++) { + if (buf[i].Relationship == RelationCache + && buf[i].Cache.Level == 1) { + switch (buf[i].Cache.Type) { + case CacheUnified: + *isize = *dsize = buf[i].Cache.LineSize; + break; + case CacheInstruction: + *isize = buf[i].Cache.LineSize; + break; + case CacheData: + *dsize = buf[i].Cache.LineSize; + break; + default: + break; + } + } + } + fail: + g_free(buf); +} + +#elif defined(__APPLE__) +# include +static void sys_cache_info(int *isize, int *dsize) +{ + /* There's only a single sysctl for both I/D cache line sizes. */ + long size; + size_t len = sizeof(size); + if (!sysctlbyname("hw.cachelinesize", &size, &len, NULL, 0)) { + *isize = *dsize = size; + } +} +#elif defined(__FreeBSD__) || defined(__FreeBSD_kernel__) +# include +static void sys_cache_info(int *isize, int *dsize) +{ + /* There's only a single sysctl for both I/D cache line sizes. */ + int size; + size_t len = sizeof(size); + if (!sysctlbyname("machdep.cacheline_size", &size, &len, NULL, 0)) { + *isize = *dsize = size; + } +} +#else +/* POSIX */ + +static void sys_cache_info(int *isize, int *dsize) +{ +# ifdef _SC_LEVEL1_ICACHE_LINESIZE + int tmp_isize = (int) sysconf(_SC_LEVEL1_ICACHE_LINESIZE); + if (tmp_isize > 0) { + *isize = tmp_isize; + } +# endif +# ifdef _SC_LEVEL1_DCACHE_LINESIZE + int tmp_dsize = (int) sysconf(_SC_LEVEL1_DCACHE_LINESIZE); + if (tmp_dsize > 0) { + *dsize = tmp_dsize; + } +# endif +} +#endif /* sys_cache_info */ + + +/* + * Architecture (+ OS) specific cache detection mechanisms. + */ + +#if defined(__aarch64__) + +static void arch_cache_info(int *isize, int *dsize) +{ + if (*isize == 0 || *dsize == 0) { + uint64_t ctr; + + /* + * The real cache geometry is in CCSIDR_EL1/CLIDR_EL1/CSSELR_EL1, + * but (at least under Linux) these are marked protected by the + * kernel. However, CTR_EL0 contains the minimum linesize in the + * entire hierarchy, and is used by userspace cache flushing. + */ + asm volatile("mrs\t%0, ctr_el0" : "=r"(ctr)); + if (*isize == 0) { + *isize = 4 << (ctr & 0xf); + } + if (*dsize == 0) { + *dsize = 4 << ((ctr >> 16) & 0xf); + } + } +} + +#elif defined(_ARCH_PPC) && defined(__linux__) +# include "elf.h" + +static void arch_cache_info(int *isize, int *dsize) +{ + if (*isize == 0) { + *isize = qemu_getauxval(AT_ICACHEBSIZE); + } + if (*dsize == 0) { + *dsize = qemu_getauxval(AT_DCACHEBSIZE); + } +} + +#else +static void arch_cache_info(int *isize, int *dsize) { } +#endif /* arch_cache_info */ + +/* + * ... and if all else fails ... + */ + +static void fallback_cache_info(int *isize, int *dsize) +{ + /* If we can only find one of the two, assume they're the same. */ + if (*isize) { + if (*dsize) { + /* Success! */ + } else { + *dsize = *isize; + } + } else if (*dsize) { + *isize = *dsize; + } else { +#if defined(_ARCH_PPC) + /* + * For PPC, we're going to use the cache sizes computed for + * flush_idcache_range. Which means that we must use the + * architecture minimum. + */ + *isize = *dsize = 16; +#else + /* Otherwise, 64 bytes is not uncommon. */ + *isize = *dsize = 64; +#endif + } +} + +static void __attribute__((constructor)) init_cache_info(void) +{ + int isize = 0, dsize = 0; + + sys_cache_info(&isize, &dsize); + arch_cache_info(&isize, &dsize); + fallback_cache_info(&isize, &dsize); + + assert((isize & (isize - 1)) == 0); + assert((dsize & (dsize - 1)) == 0); + + qemu_icache_linesize = isize; + qemu_icache_linesize_log = ctz32(isize); + qemu_dcache_linesize = dsize; + qemu_dcache_linesize_log = ctz32(dsize); + + qatomic64_init(); +} + + +/* + * Architecture (+ OS) specific cache flushing mechanisms. + */ + #if defined(__i386__) || defined(__x86_64__) || defined(__s390__) /* Caches are coherent and do not require flushing; symbol inline. */ diff --git a/util/cacheinfo.c b/util/cacheinfo.c deleted file mode 100644 index ab1644d490..0000000000 --- a/util/cacheinfo.c +++ /dev/null @@ -1,200 +0,0 @@ -/* - * cacheinfo.c - helpers to query the host about its caches - * - * Copyright (C) 2017, Emilio G. Cota - * License: GNU GPL, version 2 or later. - * See the COPYING file in the top-level directory. - */ - -#include "qemu/osdep.h" -#include "qemu/host-utils.h" -#include "qemu/atomic.h" -#include "qemu/cacheinfo.h" - -int qemu_icache_linesize = 0; -int qemu_icache_linesize_log; -int qemu_dcache_linesize = 0; -int qemu_dcache_linesize_log; - -/* - * Operating system specific detection mechanisms. - */ - -#if defined(_WIN32) - -static void sys_cache_info(int *isize, int *dsize) -{ - SYSTEM_LOGICAL_PROCESSOR_INFORMATION *buf; - DWORD size = 0; - BOOL success; - size_t i, n; - - /* Check for the required buffer size first. Note that if the zero - size we use for the probe results in success, then there is no - data available; fail in that case. */ - success = GetLogicalProcessorInformation(0, &size); - if (success || GetLastError() != ERROR_INSUFFICIENT_BUFFER) { - return; - } - - n = size / sizeof(SYSTEM_LOGICAL_PROCESSOR_INFORMATION); - size = n * sizeof(SYSTEM_LOGICAL_PROCESSOR_INFORMATION); - buf = g_new0(SYSTEM_LOGICAL_PROCESSOR_INFORMATION, n); - if (!GetLogicalProcessorInformation(buf, &size)) { - goto fail; - } - - for (i = 0; i < n; i++) { - if (buf[i].Relationship == RelationCache - && buf[i].Cache.Level == 1) { - switch (buf[i].Cache.Type) { - case CacheUnified: - *isize = *dsize = buf[i].Cache.LineSize; - break; - case CacheInstruction: - *isize = buf[i].Cache.LineSize; - break; - case CacheData: - *dsize = buf[i].Cache.LineSize; - break; - default: - break; - } - } - } - fail: - g_free(buf); -} - -#elif defined(__APPLE__) -# include -static void sys_cache_info(int *isize, int *dsize) -{ - /* There's only a single sysctl for both I/D cache line sizes. */ - long size; - size_t len = sizeof(size); - if (!sysctlbyname("hw.cachelinesize", &size, &len, NULL, 0)) { - *isize = *dsize = size; - } -} -#elif defined(__FreeBSD__) || defined(__FreeBSD_kernel__) -# include -static void sys_cache_info(int *isize, int *dsize) -{ - /* There's only a single sysctl for both I/D cache line sizes. */ - int size; - size_t len = sizeof(size); - if (!sysctlbyname("machdep.cacheline_size", &size, &len, NULL, 0)) { - *isize = *dsize = size; - } -} -#else -/* POSIX */ - -static void sys_cache_info(int *isize, int *dsize) -{ -# ifdef _SC_LEVEL1_ICACHE_LINESIZE - int tmp_isize = (int) sysconf(_SC_LEVEL1_ICACHE_LINESIZE); - if (tmp_isize > 0) { - *isize = tmp_isize; - } -# endif -# ifdef _SC_LEVEL1_DCACHE_LINESIZE - int tmp_dsize = (int) sysconf(_SC_LEVEL1_DCACHE_LINESIZE); - if (tmp_dsize > 0) { - *dsize = tmp_dsize; - } -# endif -} -#endif /* sys_cache_info */ - -/* - * Architecture (+ OS) specific detection mechanisms. - */ - -#if defined(__aarch64__) - -static void arch_cache_info(int *isize, int *dsize) -{ - if (*isize == 0 || *dsize == 0) { - uint64_t ctr; - - /* The real cache geometry is in CCSIDR_EL1/CLIDR_EL1/CSSELR_EL1, - but (at least under Linux) these are marked protected by the - kernel. However, CTR_EL0 contains the minimum linesize in the - entire hierarchy, and is used by userspace cache flushing. */ - asm volatile("mrs\t%0, ctr_el0" : "=r"(ctr)); - if (*isize == 0) { - *isize = 4 << (ctr & 0xf); - } - if (*dsize == 0) { - *dsize = 4 << ((ctr >> 16) & 0xf); - } - } -} - -#elif defined(_ARCH_PPC) && defined(__linux__) -# include "elf.h" - -static void arch_cache_info(int *isize, int *dsize) -{ - if (*isize == 0) { - *isize = qemu_getauxval(AT_ICACHEBSIZE); - } - if (*dsize == 0) { - *dsize = qemu_getauxval(AT_DCACHEBSIZE); - } -} - -#else -static void arch_cache_info(int *isize, int *dsize) { } -#endif /* arch_cache_info */ - -/* - * ... and if all else fails ... - */ - -static void fallback_cache_info(int *isize, int *dsize) -{ - /* If we can only find one of the two, assume they're the same. */ - if (*isize) { - if (*dsize) { - /* Success! */ - } else { - *dsize = *isize; - } - } else if (*dsize) { - *isize = *dsize; - } else { -#if defined(_ARCH_PPC) - /* - * For PPC, we're going to use the cache sizes computed for - * flush_idcache_range. Which means that we must use the - * architecture minimum. - */ - *isize = *dsize = 16; -#else - /* Otherwise, 64 bytes is not uncommon. */ - *isize = *dsize = 64; -#endif - } -} - -static void __attribute__((constructor)) init_cache_info(void) -{ - int isize = 0, dsize = 0; - - sys_cache_info(&isize, &dsize); - arch_cache_info(&isize, &dsize); - fallback_cache_info(&isize, &dsize); - - assert((isize & (isize - 1)) == 0); - assert((dsize & (dsize - 1)) == 0); - - qemu_icache_linesize = isize; - qemu_icache_linesize_log = ctz32(isize); - qemu_dcache_linesize = dsize; - qemu_dcache_linesize_log = ctz32(dsize); - - qatomic64_init(); -} diff --git a/util/meson.build b/util/meson.build index 8f16018cd4..4939b0b91c 100644 --- a/util/meson.build +++ b/util/meson.build @@ -27,7 +27,7 @@ util_ss.add(files('envlist.c', 'path.c', 'module.c')) util_ss.add(files('host-utils.c')) util_ss.add(files('bitmap.c', 'bitops.c')) util_ss.add(files('fifo8.c')) -util_ss.add(files('cacheinfo.c', 'cacheflush.c')) +util_ss.add(files('cacheflush.c')) util_ss.add(files('error.c', 'error-report.c')) util_ss.add(files('qemu-print.c')) util_ss.add(files('id.c')) From patchwork Tue Jun 21 20:46:42 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 583624 Delivered-To: patch@linaro.org Received: by 2002:a05:7000:5036:0:0:0:0 with SMTP id e22csp2047775mab; Tue, 21 Jun 2022 13:58:09 -0700 (PDT) X-Google-Smtp-Source: AGRyM1v0HJSgAGCX9LZzKbLY4Y9pCMkqOPGx/cIZz++VpjzqKGE1A0lA+wgAQ1pYGBZSnTN45w+P X-Received: by 2002:a05:620a:2781:b0:6a6:db99:ea07 with SMTP id g1-20020a05620a278100b006a6db99ea07mr21019213qkp.452.1655845088990; Tue, 21 Jun 2022 13:58:08 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1655845088; cv=none; d=google.com; s=arc-20160816; b=IARSKgB9QNQ42CEm5lf1STXHC3q3XQOKCool+ho29rmmnUrUdki45a9aGxYneyN8ev lsyguByQ67CXR78LnaVkN8qVkxfXDXv+kcTyUcQf5AUDJ6KWCrffxUlc+TJN/OM5FWbb YDNKMpUmcARNC8SLTn4OUnwcr730i3EdJ5yUYkd17sjd/1tEYUEy6ve6CRqT6V8R92d5 U5bRKtxbjUJZE1i4DbgwccTNCXsIAz+bcN5ACKPU8Dez3BLEQnlvFzxRVbhrbn816tal qq1/+01L17jP1etXQLMOkGgeZTUXu0sLcHUZVpS2doRKHhbATeYrTCVzAKmOxgxepPF6 P9DQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=gyCp94sx1oZe6nOn8Y4djL6VCvHuh8DxBZPF3P7Jjzk=; b=EsXg6IlIFcyItLZYNHMTtKi6VY1sCGjZLMXvJebMvUp+SV2ZZaIlNPxlJ8SD4SA25Z t9T5E5afYn6OFIhFk5ycG2DRmf3Biii7l+OmzkJizPkPgrJnHts781KMHYwOajJ5KSAo ZMlRWWiUWYIoUq6/lWzc7id/VWQRIZTfg2FCC+KHg/kz2cL6xOtKYxvk2PgJa/bmpHdj 7E2GGylaYaMoqelsZTVnXSoaqTaYmmAIi7XletAqXzcQh3fnKyIgzYroiiAzaH0fTe2g up/RLgHua2icAAN0bLher9No1a0biDj+q9JKIyy2l/NEzK6kM3YKbTaPezG+EeU1DIPu HCbg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=P5uZVO5c; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id gm15-20020a056214268f00b004705178cceasi2061218qvb.388.2022.06.21.13.58.08 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Tue, 21 Jun 2022 13:58:08 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=P5uZVO5c; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:41146 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1o3kwq-0004q1-Ip for patch@linaro.org; Tue, 21 Jun 2022 16:58:08 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:54136) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1o3km1-0006cB-IC for qemu-devel@nongnu.org; Tue, 21 Jun 2022 16:46:57 -0400 Received: from mail-pj1-x1033.google.com ([2607:f8b0:4864:20::1033]:41049) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1o3klx-00016e-K8 for qemu-devel@nongnu.org; Tue, 21 Jun 2022 16:46:57 -0400 Received: by mail-pj1-x1033.google.com with SMTP id g10-20020a17090a708a00b001ea8aadd42bso14681338pjk.0 for ; Tue, 21 Jun 2022 13:46:53 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=gyCp94sx1oZe6nOn8Y4djL6VCvHuh8DxBZPF3P7Jjzk=; b=P5uZVO5c9KH/oIaNhlUD5l12DwX4cDqQqcqgS3oQt5se7HU+Wvglwt8hoqxeIhwLuM CZXWUlyj5MTc2ZZufmd3Epz/oOEtr3ZLHD2vTuDTi5t3WwXG0SsxSW6HTeL3A2c2ZGhE V1h/i11zpYDBBjDxnL8oQAOC8WL6xVFnv+/3UuCsLjWz2WPA0Ob1OQKeb4rCXwi0Ci6y JlgqCkg2179x9mldvQGDCucMY9S+mF95KZsicsJPsd3H9W88w5+vtJknWmFgJDo23iaK isS/7IxAaS0ff5YyKrx/JC55lbBEXVGwuGSnWxQFgdmOO5cu04tSC4kB6CWCCpR0XGvF 2OzA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=gyCp94sx1oZe6nOn8Y4djL6VCvHuh8DxBZPF3P7Jjzk=; b=WxN895dmLSizc3kwcnIa/JwOb+fAdVFKcv2uofSQifUVCSundT9Fw1o+5Tjek/0s+U wAiqF8QacFKEe3wqs/0YTpoQyLRih328mPP4eZonV/B9t+YVQ2F2mnu9b9weuvE7LCkd oXn6s/0d3g+SVVCIUd+hWL2ttTPs39Ox/89AFcA7jVITdbGJzAHPzjp03tGK0pACLZ+Z L4iT+IssWS3VVW/0M5GEIWKAIpDqnctRkEOq72qkC4JfRDtMs2821vMrfnz67njR+2O9 wvLg/ZD9UsZKnnlS8UVMMoE8/UWV4p8Vmx0g5TB4GE2gO3kB8sNNb4WZzVCQi/PnF5LK kDQQ== X-Gm-Message-State: AJIora8/UAKKJE6bsdCecohH4wv3l7FYPbuN7apXW9xBGTlvSTNNKwAi 8/DZGi07wL4ZNqxiyzlazYOgBv+DGi2IHA== X-Received: by 2002:a17:903:268b:b0:16a:17e5:f2a9 with SMTP id jf11-20020a170903268b00b0016a17e5f2a9mr15929725plb.38.1655844412236; Tue, 21 Jun 2022 13:46:52 -0700 (PDT) Received: from stoup.. ([2602:47:d49e:3c01:8adc:a144:6ec2:4d71]) by smtp.gmail.com with ESMTPSA id p66-20020a625b45000000b005252defb016sm3649674pfb.122.2022.06.21.13.46.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 21 Jun 2022 13:46:51 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: Peter Maydell Subject: [PULL 8/9] util/cacheflush: Merge aarch64 ctr_el0 usage Date: Tue, 21 Jun 2022 13:46:42 -0700 Message-Id: <20220621204643.371397-9-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220621204643.371397-1-richard.henderson@linaro.org> References: <20220621204643.371397-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::1033; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x1033.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Merge init_ctr_el0 into arch_cache_info. In flush_idcache_range, use the pre-computed line sizes from the global variables. Use CONFIG_DARWIN in preference to __APPLE__. Signed-off-by: Richard Henderson Reviewed-by: Peter Maydell Message-Id: <20220621014837.189139-3-richard.henderson@linaro.org> --- util/cacheflush.c | 44 +++++++++++++++++++------------------------- 1 file changed, 19 insertions(+), 25 deletions(-) diff --git a/util/cacheflush.c b/util/cacheflush.c index 8096afd33c..01b6cb7583 100644 --- a/util/cacheflush.c +++ b/util/cacheflush.c @@ -70,7 +70,7 @@ static void sys_cache_info(int *isize, int *dsize) g_free(buf); } -#elif defined(__APPLE__) +#elif defined(CONFIG_DARWIN) # include static void sys_cache_info(int *isize, int *dsize) { @@ -117,20 +117,25 @@ static void sys_cache_info(int *isize, int *dsize) * Architecture (+ OS) specific cache detection mechanisms. */ -#if defined(__aarch64__) - +#if defined(__aarch64__) && !defined(CONFIG_DARWIN) +/* Apple does not expose CTR_EL0, so we must use system interfaces. */ +static uint64_t save_ctr_el0; static void arch_cache_info(int *isize, int *dsize) { - if (*isize == 0 || *dsize == 0) { - uint64_t ctr; + uint64_t ctr; - /* - * The real cache geometry is in CCSIDR_EL1/CLIDR_EL1/CSSELR_EL1, - * but (at least under Linux) these are marked protected by the - * kernel. However, CTR_EL0 contains the minimum linesize in the - * entire hierarchy, and is used by userspace cache flushing. - */ - asm volatile("mrs\t%0, ctr_el0" : "=r"(ctr)); + /* + * The real cache geometry is in CCSIDR_EL1/CLIDR_EL1/CSSELR_EL1, + * but (at least under Linux) these are marked protected by the + * kernel. However, CTR_EL0 contains the minimum linesize in the + * entire hierarchy, and is used by userspace cache flushing. + * + * We will also use this value in flush_idcache_range. + */ + asm volatile("mrs\t%0, ctr_el0" : "=r"(ctr)); + save_ctr_el0 = ctr; + + if (*isize == 0 || *dsize == 0) { if (*isize == 0) { *isize = 4 << (ctr & 0xf); } @@ -228,17 +233,6 @@ void flush_idcache_range(uintptr_t rx, uintptr_t rw, size_t len) } #else -/* - * TODO: unify this with cacheinfo.c. - * We want to save the whole contents of CTR_EL0, so that we - * have more than the linesize, but also IDC and DIC. - */ -static uint64_t save_ctr_el0; -static void __attribute__((constructor)) init_ctr_el0(void) -{ - asm volatile("mrs\t%0, ctr_el0" : "=r"(save_ctr_el0)); -} - /* * This is a copy of gcc's __aarch64_sync_cache_range, modified * to fit this three-operand interface. @@ -248,8 +242,8 @@ void flush_idcache_range(uintptr_t rx, uintptr_t rw, size_t len) const unsigned CTR_IDC = 1u << 28; const unsigned CTR_DIC = 1u << 29; const uint64_t ctr_el0 = save_ctr_el0; - const uintptr_t icache_lsize = 4 << extract64(ctr_el0, 0, 4); - const uintptr_t dcache_lsize = 4 << extract64(ctr_el0, 16, 4); + const uintptr_t icache_lsize = qemu_icache_linesize; + const uintptr_t dcache_lsize = qemu_dcache_linesize; uintptr_t p; /* From patchwork Tue Jun 21 20:46:43 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 583622 Delivered-To: patch@linaro.org Received: by 2002:a05:7000:5036:0:0:0:0 with SMTP id e22csp2045229mab; Tue, 21 Jun 2022 13:54:46 -0700 (PDT) X-Google-Smtp-Source: AGRyM1uTIEXKBvAynv1TeIelvw+0efJm5OQsaZyu7NX/o74KfPKP0nStnpN1ltAc7UE+yITzN8kU X-Received: by 2002:a0c:e6a2:0:b0:470:45c8:6a84 with SMTP id j2-20020a0ce6a2000000b0047045c86a84mr9170933qvn.38.1655844886374; Tue, 21 Jun 2022 13:54:46 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1655844886; cv=none; d=google.com; s=arc-20160816; b=zX1gEzCaiJPpkCYRAJQlYBlEn8Jf8S3n0rcpxZFgthmNJyhBQRA271Fvq3YTMxDErG gvvWDbUmxV/JLHPoSYysmma1UUrrR+hFVtyMv1WW53QnWBOwzfWbRyMvrsf+YTn/fumg /xIhvtFq3wHlZimMHl/FI3UrnpwpWKOepKyWiz2apAoA1DpZM5wMTEqo942C1Wh55DAf K+aQCWkvadf9vxQ8Ph4S24DjHRO8KDBEZCVDDgCJMDaJpf/WikFAKZHxmuW2hQ3GPhOQ 5hf+3mi7CNwbeqhTJJSynXPUe91XXSMe0JmffPx9w4Q3G5VhNWlSXezEqtHmGPJ+6dHR 401w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=h3YLx19yslSTTaLGcQTbBkJC0TNZDbNOKWylq2WnPkw=; b=GCJ2rzR5JsFVoJgFEnrbpTu7gdp3rlEZbyFA041GyR8nvJYXk3mF1kwWwZmJ23oQe0 Vvv8Q6RY8YuYfmxAzOhV5Mlk2ujZOqpuw6ssxVjcNeGclrvqwB3qAFGXwBjha9xt/CA7 TX1iLoyPloFcjBAf4vqTIjrlmOhDa0FIFrM9okWC1nQIPxa5if3UCaG+sLs85H8o5sKi lMhbSknfBj8qPsMCq5m1aRUn6Ek52vUrME6iaPm+SLPGS4Lnja2kLDjgaMLxA4gqGj4A 5jVC2Cd2Qvt3x1/hMMt21MKOTCJ/6YHObJugyDS9cTD56U6FRIVIe6pY3h9SbhRaFkjY Xj8A== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=wXRAJgeu; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id y12-20020a05622a120c00b002f91696bb92si9398352qtx.705.2022.06.21.13.54.46 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Tue, 21 Jun 2022 13:54:46 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=wXRAJgeu; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:33582 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1o3ktZ-000855-VU for patch@linaro.org; Tue, 21 Jun 2022 16:54:46 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:54164) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1o3km2-0006dj-W8 for qemu-devel@nongnu.org; Tue, 21 Jun 2022 16:47:01 -0400 Received: from mail-pf1-x432.google.com ([2607:f8b0:4864:20::432]:41911) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1o3kly-00016r-GU for qemu-devel@nongnu.org; Tue, 21 Jun 2022 16:46:58 -0400 Received: by mail-pf1-x432.google.com with SMTP id i64so14160581pfc.8 for ; Tue, 21 Jun 2022 13:46:54 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=h3YLx19yslSTTaLGcQTbBkJC0TNZDbNOKWylq2WnPkw=; b=wXRAJgeu88VAK0d4jbnRHsKr/e7hSkdPgzlcz+QpmuqS3cVaooJ6wm/+BVotY672p+ 80WHm1MqqCa9zvwk9gRaKKsK9yK1R5IrolEeLuFXBQAUUmJgzgdRuGbhuENnRe9srWTF EcJ4/V2jJYwLkH/Z4J1oL6KfnnaPy0tP8AjZkbbMP3M0lgQGjZ0KCDQJFdm7fkfsKNUn gAx158K3//zxJe1xJ8MO1yEAI6tTlzBtiBHG/7P3fakZcDssy0qJHd/xtnhXoEKpUZ8k msjJfq71ufwwyDG+e81YG0qW2+r4Edgp5KOfE+vp5tXo2Sum2QdR26VtLCwcuDXLY0iv 3mfQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=h3YLx19yslSTTaLGcQTbBkJC0TNZDbNOKWylq2WnPkw=; b=cX547mwzw2D9UzfYtIidO32h1ZylcVWDcL4hGsB+V7k4kPG9QNSgO+XAr3xMadGLLN fx6uzQ4rCQISXj6ukUrxd7WUSPoibcSODZa6IDY2ad1/2CbXRhCyno3gg1KlNq7uYCdt SHu3Pw+DLbrOXJwSNcHiqPWgwbth6IN28V0VSOaFxceLq3zybA9kH4lYtlOp2W3A+MZq LjJzIeJVCmdxtSMdDWvpyx++Z/uvlsucSiHfHexaHsPPMB+/XO23FBVPG724h28Pj0Wa +cpGzfKJCfpWDpxmGAU4WRbxB8uC5pnTyOgYcOocg6bCW2uV8h7tlDWON71wQi2qvYIu 8yIw== X-Gm-Message-State: AJIora/QpmM2dYuI4RWY6LEapxe+UMzLFJUrRu/ERys9rV+wwoWK0PKx tBpdi5pbqYB2bkqu00R1FXfT3hOfisCCRg== X-Received: by 2002:a63:4b02:0:b0:3fc:a31a:304 with SMTP id y2-20020a634b02000000b003fca31a0304mr27235325pga.121.1655844413118; Tue, 21 Jun 2022 13:46:53 -0700 (PDT) Received: from stoup.. ([2602:47:d49e:3c01:8adc:a144:6ec2:4d71]) by smtp.gmail.com with ESMTPSA id p66-20020a625b45000000b005252defb016sm3649674pfb.122.2022.06.21.13.46.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 21 Jun 2022 13:46:52 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: Nicholas Piggin , Peter Maydell Subject: [PULL 9/9] util/cacheflush: Optimize flushing when ppc host has coherent icache Date: Tue, 21 Jun 2022 13:46:43 -0700 Message-Id: <20220621204643.371397-10-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220621204643.371397-1-richard.henderson@linaro.org> References: <20220621204643.371397-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::432; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x432.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Nicholas Piggin On linux, the AT_HWCAP bit PPC_FEATURE_ICACHE_SNOOP indicates that we can use a simplified 3 instruction flush sequence. Signed-off-by: Nicholas Piggin Message-Id: <20220519141131.29839-1-npiggin@gmail.com> [rth: update after merging cacheflush.c and cacheinfo.c] Signed-off-by: Richard Henderson Reviewed-by: Peter Maydell Message-Id: <20220621014837.189139-4-richard.henderson@linaro.org> --- util/cacheflush.c | 25 +++++++++++++++++++++++-- 1 file changed, 23 insertions(+), 2 deletions(-) diff --git a/util/cacheflush.c b/util/cacheflush.c index 01b6cb7583..2c2c73e085 100644 --- a/util/cacheflush.c +++ b/util/cacheflush.c @@ -117,6 +117,10 @@ static void sys_cache_info(int *isize, int *dsize) * Architecture (+ OS) specific cache detection mechanisms. */ +#if defined(__powerpc__) +static bool have_coherent_icache; +#endif + #if defined(__aarch64__) && !defined(CONFIG_DARWIN) /* Apple does not expose CTR_EL0, so we must use system interfaces. */ static uint64_t save_ctr_el0; @@ -156,6 +160,7 @@ static void arch_cache_info(int *isize, int *dsize) if (*dsize == 0) { *dsize = qemu_getauxval(AT_DCACHEBSIZE); } + have_coherent_icache = qemu_getauxval(AT_HWCAP) & PPC_FEATURE_ICACHE_SNOOP; } #else @@ -298,8 +303,24 @@ void flush_idcache_range(uintptr_t rx, uintptr_t rw, size_t len) void flush_idcache_range(uintptr_t rx, uintptr_t rw, size_t len) { uintptr_t p, b, e; - size_t dsize = qemu_dcache_linesize; - size_t isize = qemu_icache_linesize; + size_t dsize, isize; + + /* + * Some processors have coherent caches and support a simplified + * flushing procedure. See + * POWER9 UM, 4.6.2.2 Instruction Cache Block Invalidate (icbi) + * https://ibm.ent.box.com/s/tmklq90ze7aj8f4n32er1mu3sy9u8k3k + */ + if (have_coherent_icache) { + asm volatile ("sync\n\t" + "icbi 0,%0\n\t" + "isync" + : : "r"(rx) : "memory"); + return; + } + + dsize = qemu_dcache_linesize; + isize = qemu_icache_linesize; b = rw & ~(dsize - 1); e = (rw + len + dsize - 1) & ~(dsize - 1);