From patchwork Thu Jun 30 09:38:16 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Shevchenko X-Patchwork-Id: 586296 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 754FCC43334 for ; Thu, 30 Jun 2022 09:38:55 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234511AbiF3Jiy (ORCPT ); Thu, 30 Jun 2022 05:38:54 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42472 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233082AbiF3JiT (ORCPT ); Thu, 30 Jun 2022 05:38:19 -0400 Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4983D21806; Thu, 30 Jun 2022 02:38:16 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1656581896; x=1688117896; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=Vj93OUArCPcOzTNax7R55Pn3eOycZ1bTRsIknl2WeMY=; b=FodXDyTfyaIrXHE8mTzvq6B/cEnJoybljYfP6Iw/KEatIfbly86BLmup ZBtYAuAUNDAQA1ibBRsz45eNGSMqe+9iOQHN5pT6wYJKtkV1VjtJg29EL nDmXziKKcENzj4r9Vi3jTbHCFMs6I6PhH3DE5CVWl8kBwIzJr9+2ps404 INIewe1T1e9pJgLQ79+6aQyZ5pNNYqXi7FSjTUxjtvNjCYnDhryXIGLzS SRAMhkWsk7EXEazIemfgG+t2QjVaGsnPfy3SKf10BaSYsICF/j9AgvaxK LDEW+LeYJNh/FZ3FxYYpXgUnor11Konp05y3LrJrjGBtDD9Txe/TMNDa4 Q==; X-IronPort-AV: E=McAfee;i="6400,9594,10393"; a="283399328" X-IronPort-AV: E=Sophos;i="5.92,233,1650956400"; d="scan'208";a="283399328" Received: from orsmga005.jf.intel.com ([10.7.209.41]) by orsmga103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 30 Jun 2022 02:38:15 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.92,233,1650956400"; d="scan'208";a="768062873" Received: from black.fi.intel.com ([10.237.72.28]) by orsmga005.jf.intel.com with ESMTP; 30 Jun 2022 02:38:14 -0700 Received: by black.fi.intel.com (Postfix, from userid 1003) id 54DDD11E; Thu, 30 Jun 2022 12:38:20 +0300 (EEST) From: Andy Shevchenko To: Andy Shevchenko , Greg Kroah-Hartman , linux-serial@vger.kernel.org, linux-kernel@vger.kernel.org Cc: =?utf-8?q?Ilpo_J=C3=A4rvinen?= , Jiri Slaby Subject: [PATCH v1 1/1] serial: 8250_dw: Sort headers alphabetically Date: Thu, 30 Jun 2022 12:38:16 +0300 Message-Id: <20220630093816.28271-1-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.35.1 MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-serial@vger.kernel.org For the sake of better maintenance, sort included headers alphabetically. While at it, split the serial group of headers which makes clear the subsystem the driver belongs to. Signed-off-by: Andy Shevchenko --- drivers/tty/serial/8250/8250_dw.c | 17 +++++++++-------- 1 file changed, 9 insertions(+), 8 deletions(-) diff --git a/drivers/tty/serial/8250/8250_dw.c b/drivers/tty/serial/8250/8250_dw.c index d5df17455f1d..86762593579f 100644 --- a/drivers/tty/serial/8250/8250_dw.c +++ b/drivers/tty/serial/8250/8250_dw.c @@ -9,26 +9,27 @@ * LCR is written whilst busy. If it is, then a busy detect interrupt is * raised, the LCR needs to be rewritten and the uart status register read. */ +#include +#include #include #include #include #include #include -#include -#include +#include #include #include +#include #include -#include -#include -#include -#include -#include #include -#include +#include +#include #include +#include +#include + #include "8250_dwlib.h" /* Offsets for the DesignWare specific registers */