From patchwork Mon Jan 21 23:31:50 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mike Leach X-Patchwork-Id: 156261 Delivered-To: patch@linaro.org Received: by 2002:a02:48:0:0:0:0:0 with SMTP id 69csp6921171jaa; Mon, 21 Jan 2019 15:32:04 -0800 (PST) X-Google-Smtp-Source: ALg8bN6ileF57QDYU7WUHctzLP5VaQ91mdasJ7GrEik2HY7K2mBgwqfF5hMVVKy4YYBNXWjydxsz X-Received: by 2002:a62:4549:: with SMTP id s70mr31130952pfa.233.1548113524713; Mon, 21 Jan 2019 15:32:04 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1548113524; cv=none; d=google.com; s=arc-20160816; b=kHFPGz+IJ3MovRUnvq9SskwCW56BG/a4Yj3cCqt14kF51KFesTHZiIWLN27gQQU2oV eWOEYY2BU+Df6ktytYMjAfGZOpVo1MEQTHYB+cVnpjgfonVGnFOO6pqbyvg14oDm+e2e 1MJjtYOjGRS7xw5cwB3ZPyG4IoANM/r7fdFhUCCbWZPnWe6+QFFH9hdT7TJSwokQ/O+h zY+oQzhTn495fY/WO5kRwple5qREPRC3Rd3Ydx0K3DDCGirFWgWDy221KmnZlA8Rl4Oz jW/IpLnIvlrb5jx95HZU+zzslD4eECAg44+7txuUoKgmqCblPC6VHfNQAUXld4X8DyA+ ajYA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=LW2jwbnHcDjXyjLcAnjP/huOffzJV1JTJ3VHnjGi/n8=; b=LnT8U9YrPo8fLJPkH9B+mdgXet/wZJ+NPab3ecdvPmhCDjmz/0ilEtHTNdPeKpa9BI NyUlJeAyMx1UWNP+F7RMBrHHpbG+2Tj0zrHEYoly2qNb2R/qXe5y2mWc7zadAeC3Ps7b aUtQmti0mG9WKsrTcsrk0o6yLqSKBhyFCV7pk2xc8HTPVyeqIQjwqpz3wmIe4cmkzlrg /m2hV8I1tpPy/QU8FWpYgtb1UlotRbxU+8XPp+lPaQrvCdmEJMRTNp0KSCujs8Aoz4sb Xum4QY1uPqgsPbzHvCdNNNYkF4tfjAFrct95EyBlzS2Ed2UnzXPUcrGk+8Uod6/YhaP4 jxmQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="MUc/9mjz"; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id c125si13846306pfa.216.2019.01.21.15.32.04; Mon, 21 Jan 2019 15:32:04 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="MUc/9mjz"; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728276AbfAUXcD (ORCPT + 27 others); Mon, 21 Jan 2019 18:32:03 -0500 Received: from mail-wm1-f67.google.com ([209.85.128.67]:53325 "EHLO mail-wm1-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727360AbfAUXb7 (ORCPT ); Mon, 21 Jan 2019 18:31:59 -0500 Received: by mail-wm1-f67.google.com with SMTP id d15so12409489wmb.3 for ; Mon, 21 Jan 2019 15:31:57 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=LW2jwbnHcDjXyjLcAnjP/huOffzJV1JTJ3VHnjGi/n8=; b=MUc/9mjz+GnBnDCjTWwdqgwPcPOFls5whXM+lC96NvHuO5Hj/2A3p1srq5lNDAIsHg rer6OPl/mkathxBbk58mPeLDsLHm7wpHQjFCy7Jxq5oaGQTM3TGqrzKobVw1TFL/VTfX +yY01X340knF6xQGoqYmYDHXAGR+nYSNlYBxg= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=LW2jwbnHcDjXyjLcAnjP/huOffzJV1JTJ3VHnjGi/n8=; b=oB2iL/3qD/58bnMT2hc/OomUQ2Xmrhds68VHBoJzT9631iSKJcHKvCPilaYeAScUiY DUuYJ0SmIwAVk/7Kn4ERNHW+sFwTcMA395blf5usXYiOrL6mL+Th7OHObDZJ1NQ/EY5w sJbDDpmQw0ho3HjwxSfweKuh9N/0dL7C8WWzhI0s4oXZUPzCTjBHTp2noJZwTizzlJ0T Dv8ZrXJrUEc+102ylbcLjkPPLlq9JlfLtJlhNqoq56JgYILHjCKp53WoU2YCNKcC8sB+ LOCv0Ut01x5i2Gg9xJetY6JDdeV66Fw2u4B6W4MNVFgmsBvbv5NXhTb/2kB+XZzQvAnj TnuQ== X-Gm-Message-State: AJcUukeTCkqrP54Jf6xUUCazpmEFwv9mRoc6ZK3N6sdlN5+PjuK+IK+B uDkbAE9ERcsDqAKOh4mia7TQsrEcra0= X-Received: by 2002:a1c:4d12:: with SMTP id o18mr1275476wmh.92.1548113516252; Mon, 21 Jan 2019 15:31:56 -0800 (PST) Received: from linaro.org ([2a00:23c5:6815:3901:cf0e:17bd:f425:fac3]) by smtp.gmail.com with ESMTPSA id g67sm106405967wmd.38.2019.01.21.15.31.55 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 21 Jan 2019 15:31:55 -0800 (PST) From: Mike Leach To: linux-kernel@vger.kernel.org Cc: linux@armlinux.org.uk, mathieu.poirier@linaro.org, Mike Leach Subject: [RESEND PATCH v3 1/2] drivers: amba: Updates to component identification for driver matching. Date: Mon, 21 Jan 2019 23:31:50 +0000 Message-Id: <20190121233151.13363-2-mike.leach@linaro.org> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20190121233151.13363-1-mike.leach@linaro.org> References: <20190121233151.13363-1-mike.leach@linaro.org> MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The CoreSight specification (ARM IHI 0029E), updates the ID register requirements for components on an AMBA bus, to cover both traditional ARM Primecell type devices, and newer CoreSight and other components. The Peripheral ID (PID) / Component ID (CID) pair is extended in certain cases to uniquely identify components. CoreSight components related to a single function can share Peripheral ID values, and must be further identified using a Unique Component Identifier (UCI). e.g. the ETM, CTI, PMU and Debug hardware of the A35 all share the same PID. Bits 15:12 of the CID are defined to be the device class. Class 0xF remains for PrimeCell and legacy components. Class 0x9 defines the component as CoreSight (CORESIGHT_CID above) Class 0x0, 0x1, 0xB, 0xE define components that do not have driver support at present. Class 0x2-0x8,0xA and 0xD-0xD are presently reserved. The specification futher defines which classes of device use the standard CID/PID pair, and when additional ID registers are required. The patches provide an update of amba_device and matching code to handle the additional registers required for the Class 0x9 (CoreSight) UCI. The *data pointer in the amba_id is used by the driver to provide extended ID register values for matching. CoreSight components where PID/CID pair is currently sufficient for unique identification need not provide this additional information. Signed-off-by: Mike Leach Reviewed-by: Mathieu Poirier Reviewed-by: Suzuki K Poulose --- drivers/amba/bus.c | 45 +++++++++++++++++++++++++++++++++------- include/linux/amba/bus.h | 32 ++++++++++++++++++++++++++++ 2 files changed, 69 insertions(+), 8 deletions(-) -- 2.19.1 diff --git a/drivers/amba/bus.c b/drivers/amba/bus.c index 41b706403ef7..524296a0eba0 100644 --- a/drivers/amba/bus.c +++ b/drivers/amba/bus.c @@ -26,19 +26,36 @@ #define to_amba_driver(d) container_of(d, struct amba_driver, drv) -static const struct amba_id * -amba_lookup(const struct amba_id *table, struct amba_device *dev) +/* called on periphid match and class 0x9 coresight device. */ +static int +amba_cs_uci_id_match(const struct amba_id *table, struct amba_device *dev) { int ret = 0; + struct amba_cs_uci_id *uci; + + uci = table->data; + /* no table data - return match on periphid */ + if (!uci) + return 1; + + /* test against read devtype and masked devarch value */ + ret = (dev->uci.devtype == uci->devtype) && + ((dev->uci.devarch & uci->devarch_mask) == uci->devarch); + return ret; +} + +static const struct amba_id * +amba_lookup(const struct amba_id *table, struct amba_device *dev) +{ while (table->mask) { - ret = (dev->periphid & table->mask) == table->id; - if (ret) - break; + if (((dev->periphid & table->mask) == table->id) && + ((dev->cid != CORESIGHT_CID) || + (amba_cs_uci_id_match(table, dev)))) + return table; table++; } - - return ret ? table : NULL; + return NULL; } static int amba_match(struct device *dev, struct device_driver *drv) @@ -399,10 +416,22 @@ static int amba_device_try_add(struct amba_device *dev, struct resource *parent) cid |= (readl(tmp + size - 0x10 + 4 * i) & 255) << (i * 8); + if (cid == CORESIGHT_CID) { + /* set the base to the start of the last 4k block */ + void __iomem *csbase = tmp + size - 4096; + + dev->uci.devarch = + readl(csbase + UCI_REG_DEVARCH_OFFSET); + dev->uci.devtype = + readl(csbase + UCI_REG_DEVTYPE_OFFSET) & 0xff; + } + amba_put_disable_pclk(dev); - if (cid == AMBA_CID || cid == CORESIGHT_CID) + if (cid == AMBA_CID || cid == CORESIGHT_CID) { dev->periphid = pid; + dev->cid = cid; + } if (!dev->periphid) ret = -ENODEV; diff --git a/include/linux/amba/bus.h b/include/linux/amba/bus.h index d143c13bed26..8c0f392e4da2 100644 --- a/include/linux/amba/bus.h +++ b/include/linux/amba/bus.h @@ -25,6 +25,36 @@ #define AMBA_CID 0xb105f00d #define CORESIGHT_CID 0xb105900d +/* + * CoreSight Architecture specification updates the ID specification + * for components on the AMBA bus. (ARM IHI 0029E) + * + * Bits 15:12 of the CID are the device class. + * + * Class 0xF remains for PrimeCell and legacy components. (AMBA_CID above) + * Class 0x9 defines the component as CoreSight (CORESIGHT_CID above) + * Class 0x0, 0x1, 0xB, 0xE define components that do not have driver support + * at present. + * Class 0x2-0x8,0xA and 0xD-0xD are presently reserved. + * + * Remaining CID bits stay as 0xb105-00d + */ + +/* + * Class 0x9 components use additional values to form a Unique Component + * Identifier (UCI), where peripheral ID values are identical for different + * components. Passed to the amba bus code from the component driver via + * the amba_id->data pointer. + */ +struct amba_cs_uci_id { + unsigned int devarch; + unsigned int devarch_mask; + unsigned int devtype; +}; + +#define UCI_REG_DEVTYPE_OFFSET 0xFCC +#define UCI_REG_DEVARCH_OFFSET 0xFBC + struct clk; struct amba_device { @@ -32,6 +62,8 @@ struct amba_device { struct resource res; struct clk *pclk; unsigned int periphid; + unsigned int cid; + struct amba_cs_uci_id uci; unsigned int irq[AMBA_NR_IRQS]; char *driver_override; }; From patchwork Mon Jan 21 23:31:51 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mike Leach X-Patchwork-Id: 156262 Delivered-To: patch@linaro.org Received: by 2002:a02:48:0:0:0:0:0 with SMTP id 69csp6921233jaa; Mon, 21 Jan 2019 15:32:08 -0800 (PST) X-Google-Smtp-Source: ALg8bN4+u+6LjUr7MKRuHO+EeQF9ds9reU9OxYd/3/ASbaugN+5kXxAt76wWWiLSVdZTkWvTi7KZ X-Received: by 2002:a62:2fc3:: with SMTP id v186mr31568705pfv.82.1548113528223; Mon, 21 Jan 2019 15:32:08 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1548113528; cv=none; d=google.com; s=arc-20160816; b=WhQMkLHzyaeIeuIZjRpPZFsoM6KS10nJ2GnmIsnae6fZGEDHukuNcwU63+4pkSin+k JKIReL+2szao4gGHCe6kzj7Ecv2gL7LM+H0ZNDF31XtkdeldOJceHTcm7wrfFsHAlXdK 7nUT3ZsTX6Trl9BAJUKFperqztEbzy7y0P+rKGFvLM4mUs+xao5DxrYyLS0uKkt8AzPr D9XUoJlDsSYgzqJDZ6hGDTxxzzFeByVz+VTHVz6UJh1EldJO+HmvCv+raH96nNpv6QDE XG4xU4Ueq8MXlPHX/Uaivm+SyHfzU2FipxXz+AtAqR5IU0OdcfJQzn+5snwqF/yFrhN8 3CTw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=1HJyAt+qP5edrfnptK21T5j6QfkO3OmLidMh2M63/mc=; b=FhxNHv4KONc5UawCK0lW+XzpN4xWIsXRIwUD6FeF6YpyWmjo1FBUGIGIKAE6mgGstK EqGbfUWevCU3NCYmnInHUMNotzcE+cfCQJeMgR5eus3zwEudgJhXV6NVsu6iRk9eaSWC 8yjGi6Q0nQ4zKh4w3ze4m2DV3VtU9KzuKKiGw5lcbOQn3Me183rOeC7kpS1tAOHCbWZF cIoDJSpf+Y/zZPZrYcBj+i47Ot7WTL6v6EXHFaCS+z6zJ4C4C+LkIYtyycKYMtu2ncDN VANeoaQWepqM7yVGpFDgtynsGj4MARtF0t3VaW7rpLviq9ILfyTvAKu34r7XePXuuFow Re+A== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=U32GaGTH; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id c125si13846306pfa.216.2019.01.21.15.32.07; Mon, 21 Jan 2019 15:32:08 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=U32GaGTH; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728238AbfAUXcC (ORCPT + 27 others); Mon, 21 Jan 2019 18:32:02 -0500 Received: from mail-wm1-f66.google.com ([209.85.128.66]:56313 "EHLO mail-wm1-f66.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726027AbfAUXb7 (ORCPT ); Mon, 21 Jan 2019 18:31:59 -0500 Received: by mail-wm1-f66.google.com with SMTP id y139so12332141wmc.5 for ; Mon, 21 Jan 2019 15:31:58 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=1HJyAt+qP5edrfnptK21T5j6QfkO3OmLidMh2M63/mc=; b=U32GaGTHLvp3n3NO7lW7yF5E/zXYuLwg72UkHyRixcRoto3R+l8yHU33mfuE/gdwqD 3LehgWEtA0XvKiryr4PPmSOn458dXmIcIF7T3W08ZUJ7dJZuXARTMM8CjpEUfbJsaFes EcGE83+4XQLXpKwE11LRZAI7hMpMdzcN0c7/s= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=1HJyAt+qP5edrfnptK21T5j6QfkO3OmLidMh2M63/mc=; b=dpJR7Iosjr0oq+WuG9UdmkSpD01mcPfsJ/RXAk6Xqi/Kh8EW+NZpAhPQEUPSaL9nNR qGRWLLXRl470xjwBdj4fvuutVH6qXjC5lPPp7Vj5jWeOHdRV83tI/QEGdaxUm83x1Ks0 W4RKnX3/9YdY46/29AgxahCRi1D6JZqIQS3DNM50bOlcpEAYPmVc7psvnUyt5hJjsk3s kMfjQVLv97ebl8bdWZHGEhX32tn2v5nXVJtHUU9QbrLh+lGEphsLKZ/uTfIMbL+96B+v Q9RLic0ZfjvcWmdq5S/Fm1a94MXlQjGr9p/brRRTbbHG7UHutrPeDT01BK8dziLtnBzW O0hg== X-Gm-Message-State: AJcUukfeBvU8gX3x35vYyrwMHGmm9HiTJ8J+ox2KRlqdLLYQpcVaoA6p mHF0p0H5A/2bUkjD5xLTIm6cu4O7MqE= X-Received: by 2002:a1c:df46:: with SMTP id w67mr1235680wmg.51.1548113517072; Mon, 21 Jan 2019 15:31:57 -0800 (PST) Received: from linaro.org ([2a00:23c5:6815:3901:cf0e:17bd:f425:fac3]) by smtp.gmail.com with ESMTPSA id g67sm106405967wmd.38.2019.01.21.15.31.56 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 21 Jan 2019 15:31:56 -0800 (PST) From: Mike Leach To: linux-kernel@vger.kernel.org Cc: linux@armlinux.org.uk, mathieu.poirier@linaro.org, Mike Leach Subject: [RESEND PATCH v3 2/2] coresight: etmv4: Update ID register table to add UCI support Date: Mon, 21 Jan 2019 23:31:51 +0000 Message-Id: <20190121233151.13363-3-mike.leach@linaro.org> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20190121233151.13363-1-mike.leach@linaro.org> References: <20190121233151.13363-1-mike.leach@linaro.org> MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Updates the ID register tables to contain a UCI entry for the A35 ETM device to allow correct matching of driver in the amba bus code. Signed-off-by: Mike Leach Reviewed-by: Mathieu Poirier Reviewed-by: Suzuki K Poulose --- drivers/hwtracing/coresight/coresight-etm4x.c | 18 +++++++++++++++++- 1 file changed, 17 insertions(+), 1 deletion(-) -- 2.19.1 diff --git a/drivers/hwtracing/coresight/coresight-etm4x.c b/drivers/hwtracing/coresight/coresight-etm4x.c index 53e2fb6e86f6..2fb8054e43ab 100644 --- a/drivers/hwtracing/coresight/coresight-etm4x.c +++ b/drivers/hwtracing/coresight/coresight-etm4x.c @@ -1073,12 +1073,28 @@ static int etm4_probe(struct amba_device *adev, const struct amba_id *id) .mask = 0x000fffff, \ } +static struct amba_cs_uci_id uci_id_etm4[] = { + { + /* ETMv4 UCI data */ + .devarch = 0x47704a13, + .devarch_mask = 0xfff0ffff, + .devtype = 0x00000013, + } +}; + +#define ETM4x_AMBA_UCI_ID(pid) \ + { \ + .id = pid, \ + .mask = 0x000fffff, \ + .data = uci_id_etm4, \ + } + static const struct amba_id etm4_ids[] = { ETM4x_AMBA_ID(0x000bb95d), /* Cortex-A53 */ ETM4x_AMBA_ID(0x000bb95e), /* Cortex-A57 */ ETM4x_AMBA_ID(0x000bb95a), /* Cortex-A72 */ ETM4x_AMBA_ID(0x000bb959), /* Cortex-A73 */ - ETM4x_AMBA_ID(0x000bb9da), /* Cortex-A35 */ + ETM4x_AMBA_UCI_ID(0x000bb9da), /* Cortex-A35 */ {}, };