From patchwork Tue Jul 12 12:44:16 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stephan Gerhold X-Patchwork-Id: 590490 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id ABF2EC43334 for ; Tue, 12 Jul 2022 12:46:08 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233143AbiGLMqH (ORCPT ); Tue, 12 Jul 2022 08:46:07 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33412 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233009AbiGLMqH (ORCPT ); Tue, 12 Jul 2022 08:46:07 -0400 Received: from mx.kernkonzept.com (serv1.kernkonzept.com [IPv6:2a01:4f8:1c1c:b490::2]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9DA529C250; Tue, 12 Jul 2022 05:46:03 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=kernkonzept.com; s=mx1; h=Content-Transfer-Encoding:MIME-Version:References :In-Reply-To:Message-Id:Date:Subject:Cc:To:From:Sender:Reply-To:Content-Type: Content-ID:Content-Description:Resent-Date:Resent-From:Resent-Sender: Resent-To:Resent-Cc:Resent-Message-ID:List-Id:List-Help:List-Unsubscribe: List-Subscribe:List-Post:List-Owner:List-Archive; bh=wLTu5R0bMBexGvXQzyRvZoCbGHAp+yrP/3lcKB0xOHw=; b=lQrUDo8TGoc8yjK2gtp6gTG7Ok wvLQJWbh5r11DKR9McYPGJfIR7XFE1ht7aSXB5rOUKTUVpt1cJrDCt3tUmUBjY3v/5Txvymh3tuFp WNs8s3YkyXh1dUh/7qp6TvP6s0FoQzCiOl73y2InfGC3GymilofHcq964G9ZYXfd0/mkKVQ6l2JcG Zw/CntsX+ae/tRzUlRm1KItSB4AuJD3n2ADPZ8iyfQSupq7EPpU2zH/ARLPklMdWRpdp/3DGEa8rt DgzLxvjOfAF3ennkRdmX+RdV079b/O/nbGso0EGhCfLSfnpXk5tkSzGG2y7P2kSYEBNTaK40oMt19 ZO0QPc9A==; Received: from [10.22.3.24] (helo=kernkonzept.com) by mx.kernkonzept.com with esmtpsa (TLS1.3:ECDHE_X25519__RSA_PSS_RSAE_SHA256__AES_256_GCM:256) (Exim 4.94.2) id 1oBFGy-0087Gb-Ea; Tue, 12 Jul 2022 14:45:52 +0200 From: Stephan Gerhold To: Bjorn Andersson Cc: Andy Gross , Konrad Dybcio , Mathieu Poirier , Rob Herring , Krzysztof Kozlowski , Sireesh Kodali , Luca Weiss , Stephan Gerhold , linux-arm-msm@vger.kernel.org, linux-remoteproc@vger.kernel.org, devicetree@vger.kernel.org, Stephan Gerhold Subject: [PATCH 1/6] arm64: dts: qcom: msm8916: Drop MSS fallback compatible Date: Tue, 12 Jul 2022 14:44:16 +0200 Message-Id: <20220712124421.3129206-2-stephan.gerhold@kernkonzept.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20220712124421.3129206-1-stephan.gerhold@kernkonzept.com> References: <20220712124421.3129206-1-stephan.gerhold@kernkonzept.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org MSM8916 was originally using the "qcom,q6v5-pil" compatible for the MSS remoteproc. Later it was decided to use SoC-specific compatibles instead, so "qcom,msm8916-mss-pil" is now the preferred compatible. Commit 60a05ed059a0 ("arm64: dts: qcom: msm8916: Add MSM8916-specific compatibles to SCM/MSS") updated the MSM8916 device tree to make use of the new compatible but still kept the old "qcom,q6v5-pil" as fallback. This is inconsistent with other SoCs and conflicts with the description in the binding documentation (which says that only one compatible should be present). Also, it has no functional advantage since older kernels could not handle this DT anyway (e.g. "power-domains" in the MSS node is only supported by kernels that also support "qcom,msm8916-mss-pil"). Make this consistent with other SoCs by using only the "qcom,msm8916-mss-pil" compatible. Fixes: 60a05ed059a0 ("arm64: dts: qcom: msm8916: Add MSM8916-specific compatibles to SCM/MSS") Signed-off-by: Stephan Gerhold --- This fixes the following dtbs_check warning after the DT schema conversion: remoteproc@4080000: compatible: 'oneOf' conditional failed, one must be fixed: ['qcom,msm8916-mss-pil', 'qcom,q6v5-pil'] is too long, or 'qcom,q6v5-pil' was expected From schema: remoteproc/qcom,msm8916-mss-pil.yaml --- arch/arm64/boot/dts/qcom/msm8916.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi index 05472510e29d..07b23e0730d9 100644 --- a/arch/arm64/boot/dts/qcom/msm8916.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi @@ -1329,7 +1329,7 @@ bam_dmux_dma: dma-controller@4044000 { }; mpss: remoteproc@4080000 { - compatible = "qcom,msm8916-mss-pil", "qcom,q6v5-pil"; + compatible = "qcom,msm8916-mss-pil"; reg = <0x04080000 0x100>, <0x04020000 0x040>; From patchwork Tue Jul 12 12:44:17 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stephan Gerhold X-Patchwork-Id: 590489 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 10E76CCA485 for ; Tue, 12 Jul 2022 12:46:10 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233100AbiGLMqI (ORCPT ); Tue, 12 Jul 2022 08:46:08 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33436 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233077AbiGLMqH (ORCPT ); Tue, 12 Jul 2022 08:46:07 -0400 Received: from mx.kernkonzept.com (serv1.kernkonzept.com [IPv6:2a01:4f8:1c1c:b490::2]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id CBDF2A6F1A; Tue, 12 Jul 2022 05:46:03 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=kernkonzept.com; s=mx1; h=Content-Transfer-Encoding:MIME-Version:References :In-Reply-To:Message-Id:Date:Subject:Cc:To:From:Sender:Reply-To:Content-Type: Content-ID:Content-Description:Resent-Date:Resent-From:Resent-Sender: Resent-To:Resent-Cc:Resent-Message-ID:List-Id:List-Help:List-Unsubscribe: List-Subscribe:List-Post:List-Owner:List-Archive; bh=SBHY2YRnc3DwPOFm0IbOP7TfNQwfYgJKf7D1yLiGzHg=; b=BWqHtQodIylsbUahLiM8bvlygl DRqMrokgQt46WOW+rRl7lB/pR14F7XH1euzwY/vO3+7iuY4HW9tKxLRPfz9KwhIvUv/LUINiOLWLW V/f5nGPfyxm5D/9VqRAeY/5IOkYieqZMVd5+VdDw0rUQqqySjFOzjhZIwM2sLklHLbvNtRR0Mw6PD +LMsQ8mmPmm3sIKyTDRyxeNyvAHZRaw9N4oslUVdzz4WriA4Z2jL+WQHJTUAaLxTDGJRg4gOu4apk C74wRqe7Ll/pnbryQs40/6Bbl7e2rG7w4zo77rhCkCAx/9yMjylLXUCjnA2p3eY7ZVp7Y5uEukO7t S90XXy8w==; Received: from [10.22.3.24] (helo=kernkonzept.com) by mx.kernkonzept.com with esmtpsa (TLS1.3:ECDHE_X25519__RSA_PSS_RSAE_SHA256__AES_256_GCM:256) (Exim 4.94.2) id 1oBFH0-0087Gb-Bo; Tue, 12 Jul 2022 14:45:54 +0200 From: Stephan Gerhold To: Bjorn Andersson Cc: Andy Gross , Konrad Dybcio , Mathieu Poirier , Rob Herring , Krzysztof Kozlowski , Sireesh Kodali , Luca Weiss , Stephan Gerhold , linux-arm-msm@vger.kernel.org, linux-remoteproc@vger.kernel.org, devicetree@vger.kernel.org, Stephan Gerhold Subject: [PATCH 2/6] dt-bindings: remoteproc: qcom,q6v5: Move MSM8916 to schema Date: Tue, 12 Jul 2022 14:44:17 +0200 Message-Id: <20220712124421.3129206-3-stephan.gerhold@kernkonzept.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20220712124421.3129206-1-stephan.gerhold@kernkonzept.com> References: <20220712124421.3129206-1-stephan.gerhold@kernkonzept.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org qcom,q6v5.txt covers multiple SoCs with quite different binding requirements. Converting this into one DT schema would require several if statements, making the DT schema overall harder to read and understand. To avoid this, follow the example of SC7180/SC7280 and split "qcom,msm8916-mss-pil" (and the equivalent deprecated "qcom,q6v5-pil" compatible) into a separate DT schema. The schema is somewhat based on the one for SC7180/SC7280 but adjusted for the old platforms. Compared to the old plain text bindings, add missing documentation for the "bam-dmux" subnode and recommend one particular approach to specify the MBA/MPSS "memory-region" (the other one is marked as deprecated). Cc: Sireesh Kodali Signed-off-by: Stephan Gerhold --- Like Sibi's patch series for SC7180/SC7820 [1] this is somewhat related to Sireesh's series that converts all of qcom,q6v5.txt [2] (with a lot of if statements). However, this series focuses on MSM8916/MSM8974 (or actually MSM8909) only. [1]: https://lore.kernel.org/linux-arm-msm/1657020721-24939-1-git-send-email-quic_sibis@quicinc.com/ [2]: https://lore.kernel.org/linux-arm-msm/20220511161602.117772-7-sireeshkodali1@gmail.com/ --- .../remoteproc/qcom,msm8916-mss-pil.yaml | 246 ++++++++++++++++++ .../bindings/remoteproc/qcom,q6v5.txt | 19 -- 2 files changed, 246 insertions(+), 19 deletions(-) create mode 100644 Documentation/devicetree/bindings/remoteproc/qcom,msm8916-mss-pil.yaml diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,msm8916-mss-pil.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,msm8916-mss-pil.yaml new file mode 100644 index 000000000000..3968348dc982 --- /dev/null +++ b/Documentation/devicetree/bindings/remoteproc/qcom,msm8916-mss-pil.yaml @@ -0,0 +1,246 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/remoteproc/qcom,msm8916-mss-pil.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm MSM8916 MSS Peripheral Image Loader (and similar) + +maintainers: + - Stephan Gerhold + +description: + This document describes the hardware for a component that loads and boots + firmware on the Qualcomm MSM8916 Modem Hexagon Core (and similar). + +properties: + compatible: + oneOf: + - enum: + - qcom,msm8916-mss-pil + + - const: qcom,q6v5-pil + description: Deprecated, prefer using qcom,msm8916-mss-pil + deprecated: true + + reg: + items: + - description: MSS QDSP6 registers + - description: RMB registers + + reg-names: + items: + - const: qdsp6 + - const: rmb + + interrupts: + items: + - description: Watchdog interrupt + - description: Fatal interrupt + - description: Ready interrupt + - description: Handover interrupt + - description: Stop acknowledge interrupt + + interrupt-names: + items: + - const: wdog + - const: fatal + - const: ready + - const: handover + - const: stop-ack + + clocks: + items: + - description: Configuration interface (AXI) clock + - description: Configuration bus (AHB) clock + - description: Boot ROM (AHB) clock + - description: XO proxy clock (control handed over after startup) + + clock-names: + items: + - const: iface + - const: bus + - const: mem + - const: xo + + power-domains: + items: + - description: CX proxy power domain (control handed over after startup) + - description: MX proxy power domain (control handed over after startup) + + power-domain-names: + items: + - const: cx + - const: mx + + pll-supply: + description: PLL proxy supply (control handed over after startup) + + resets: + items: + - description: MSS restart control + + reset-names: + items: + - const: mss_restart + + qcom,smem-states: + $ref: /schemas/types.yaml#/definitions/phandle-array + description: States used by the AP to signal the Hexagon core + items: + - description: Stop modem + + qcom,smem-state-names: + description: Names of the states used by the AP to signal the Hexagon core + items: + - const: stop + + qcom,halt-regs: + $ref: /schemas/types.yaml#/definitions/phandle-array + description: + Halt registers are used to halt transactions of various sub-components + within MSS. + items: + - items: + - description: phandle to TCSR syscon region + - description: offset to the Q6 halt register + - description: offset to the modem halt register + - description: offset to the nc halt register + + memory-region: + items: + - description: MBA reserved region + - description: MPSS reserved region + + firmware-name: + $ref: /schemas/types.yaml#/definitions/string-array + items: + - description: Name of MBA firmware + - description: Name of modem firmware + + bam-dmux: + $ref: /schemas/net/qcom,bam-dmux.yaml# + description: + Qualcomm BAM Data Multiplexer (provides network interface to the modem) + + smd-edge: + $ref: qcom,smd-edge.yaml# + description: + Qualcomm SMD subnode which represents communication edge, channels + and devices related to the DSP. + + properties: + label: + enum: + - modem + - hexagon + + # Deprecated properties + cx-supply: + description: CX power domain regulator supply (prefer using power-domains) + deprecated: true + mx-supply: + description: MX power domain regulator supply (prefer using power-domains) + deprecated: true + mba: + type: object + description: + MBA reserved region (prefer using memory-region with two items) + properties: + memory-region: true + required: + - memory-region + deprecated: true + mpss: + type: object + description: + MPSS reserved region (prefer using memory-region with two items) + properties: + memory-region: true + required: + - memory-region + deprecated: true + +required: + - compatible + - reg + - reg-names + - interrupts + - interrupt-names + - clocks + - clock-names + - pll-supply + - resets + - reset-names + - qcom,halt-regs + - qcom,smem-states + - qcom,smem-state-names + - smd-edge + +# Fallbacks for deprecated properties +allOf: + - oneOf: + - required: + - memory-region + - required: + - mba + - mpss + deprecated: true + - oneOf: + - required: + - power-domains + - power-domain-names + - required: + - cx-supply + - mx-supply + deprecated: true + +additionalProperties: false + +examples: + - | + #include + #include + #include + + remoteproc_mpss: remoteproc@4080000 { + compatible = "qcom,msm8916-mss-pil"; + reg = <0x04080000 0x100>, <0x04020000 0x40>; + reg-names = "qdsp6", "rmb"; + + interrupts-extended = <&intc GIC_SPI 24 IRQ_TYPE_EDGE_RISING>, + <&hexagon_smp2p_in 0 IRQ_TYPE_EDGE_RISING>, + <&hexagon_smp2p_in 1 IRQ_TYPE_EDGE_RISING>, + <&hexagon_smp2p_in 2 IRQ_TYPE_EDGE_RISING>, + <&hexagon_smp2p_in 3 IRQ_TYPE_EDGE_RISING>; + interrupt-names = "wdog", "fatal", "ready", "handover", "stop-ack"; + + qcom,smem-states = <&hexagon_smp2p_out 0>; + qcom,smem-state-names = "stop"; + qcom,halt-regs = <&tcsr 0x18000 0x19000 0x1a000>; + + clocks = <&gcc GCC_MSS_CFG_AHB_CLK>, + <&gcc GCC_MSS_Q6_BIMC_AXI_CLK>, + <&gcc GCC_BOOT_ROM_AHB_CLK>, + <&xo_board>; + clock-names = "iface", "bus", "mem", "xo"; + + power-domains = <&rpmpd MSM8916_VDDCX>, <&rpmpd MSM8916_VDDMX>; + power-domain-names = "cx", "mx"; + pll-supply = <&pm8916_l7>; + + resets = <&scm 0>; + reset-names = "mss_restart"; + + memory-region = <&mba_mem>, <&mpss_mem>; + + smd-edge { + interrupts = ; + + qcom,smd-edge = <0>; + qcom,ipc = <&apcs 8 12>; + qcom,remote-pid = <1>; + + label = "hexagon"; + }; + }; diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt b/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt index d0a75443e27e..3beb01da134b 100644 --- a/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt +++ b/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt @@ -7,10 +7,8 @@ on the Qualcomm Hexagon core. Usage: required Value type: Definition: must be one of: - "qcom,q6v5-pil", "qcom,ipq8074-wcss-pil" "qcom,qcs404-wcss-pil" - "qcom,msm8916-mss-pil", "qcom,msm8974-mss-pil" "qcom,msm8996-mss-pil" "qcom,msm8998-mss-pil" @@ -37,10 +35,8 @@ on the Qualcomm Hexagon core. Value type: Definition: The interrupts needed depends on the the compatible string: - qcom,q6v5-pil: qcom,ipq8074-wcss-pil: qcom,qcs404-wcss-pil: - qcom,msm8916-mss-pil: qcom,msm8974-mss-pil: must be "wdog", "fatal", "ready", "handover", "stop-ack" qcom,msm8996-mss-pil: @@ -72,8 +68,6 @@ on the Qualcomm Hexagon core. "gcc_axim_cbcr", "lcc_ahbfabric_cbc", "tcsr_lcc_cbc", "lcc_abhs_cbc", "lcc_tcm_slave_cbc", "lcc_abhm_cbc", "lcc_axim_cbc", "lcc_bcr_sleep" - qcom,q6v5-pil: - qcom,msm8916-mss-pil: qcom,msm8974-mss-pil: must be "iface", "bus", "mem", "xo" qcom,msm8996-mss-pil: @@ -112,17 +106,6 @@ should be referenced as follows: Definition: reference to the reserved-memory for the mba region followed by the mpss region -For the compatible strings below the following supplies are required: - "qcom,q6v5-pil" - "qcom,msm8916-mss-pil", -- cx-supply: (deprecated, use power domain instead) -- mx-supply: (deprecated, use power domain instead) -- pll-supply: - Usage: required - Value type: - Definition: reference to the regulators to be held on behalf of the - booting of the Hexagon core - For the compatible string below the following supplies are required: "qcom,msm8974-mss-pil" - cx-supply: (deprecated, use power domain instead) @@ -161,8 +144,6 @@ For the compatible string below the following supplies are required: Definition: The power-domains needed depend on the compatible string: qcom,ipq8074-wcss-pil: no power-domain names required - qcom,q6v5-pil: - qcom,msm8916-mss-pil: qcom,msm8974-mss-pil: qcom,msm8996-mss-pil: qcom,msm8998-mss-pil: From patchwork Tue Jul 12 12:44:18 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stephan Gerhold X-Patchwork-Id: 589868 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id BDA0BCCA489 for ; Tue, 12 Jul 2022 12:46:10 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233186AbiGLMqJ (ORCPT ); Tue, 12 Jul 2022 08:46:09 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33438 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233086AbiGLMqH (ORCPT ); Tue, 12 Jul 2022 08:46:07 -0400 Received: from mx.kernkonzept.com (serv1.kernkonzept.com [IPv6:2a01:4f8:1c1c:b490::2]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id BDA23AEF71; Tue, 12 Jul 2022 05:46:04 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=kernkonzept.com; s=mx1; h=Content-Transfer-Encoding:MIME-Version:References :In-Reply-To:Message-Id:Date:Subject:Cc:To:From:Sender:Reply-To:Content-Type: Content-ID:Content-Description:Resent-Date:Resent-From:Resent-Sender: Resent-To:Resent-Cc:Resent-Message-ID:List-Id:List-Help:List-Unsubscribe: List-Subscribe:List-Post:List-Owner:List-Archive; bh=+7dkK/pDud7VFmBz87gdVKEZhqtJamWBLWakUNW4Tso=; b=UuclXiH6qfp1RGZZGUx9NWxyMW pRHkY8+bmzXSoMMJDeiidmW0/U8x7ytqDKdzUFCJjjgTy2ndWs5YfUvyIfRk+nFplBYGKN4946pZE JMST5jSGqEkCJKNqPiIoYV3VzBIDBjMS0e2ia9MYy5yMJkRQoLaY3iP5aNJlqFIPIPCYZ/ARQMZ3Z Ucz0pqzljrvkYcTNFGNGTPehQxosbOzZJeDPyhxItdaC1/dJBjEwwDRbFGb7RUw1e7OBhEHmw5es/ Cj6++On3tDK22hqnGy1UHPaA+DSYoEJevzpk+YTIAOBFWhrEoJpIETA4JoL2AT9vpVC4uZTArW/Od TRUzVsxQ==; Received: from [10.22.3.24] (helo=kernkonzept.com) by mx.kernkonzept.com with esmtpsa (TLS1.3:ECDHE_X25519__RSA_PSS_RSAE_SHA256__AES_256_GCM:256) (Exim 4.94.2) id 1oBFH2-0087Gb-Ab; Tue, 12 Jul 2022 14:45:56 +0200 From: Stephan Gerhold To: Bjorn Andersson Cc: Andy Gross , Konrad Dybcio , Mathieu Poirier , Rob Herring , Krzysztof Kozlowski , Sireesh Kodali , Luca Weiss , Stephan Gerhold , linux-arm-msm@vger.kernel.org, linux-remoteproc@vger.kernel.org, devicetree@vger.kernel.org, Stephan Gerhold Subject: [PATCH 3/6] ARM: dts: qcom: msm8974: Disable remoteprocs by default Date: Tue, 12 Jul 2022 14:44:18 +0200 Message-Id: <20220712124421.3129206-4-stephan.gerhold@kernkonzept.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20220712124421.3129206-1-stephan.gerhold@kernkonzept.com> References: <20220712124421.3129206-1-stephan.gerhold@kernkonzept.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org The remoteproc configuration in qcom-msm8974.dtsi is incomplete because it lacks the regulator supplies that should be added in the board DT files. Some of the msm8974 boards are currently missing the regulator supplies and should have the remoteprocs disabled to avoid making use of the incomplete configuration. This also fixes dtbs_check warnings after moving "qcom,msm8974-mss-pil" to DT schema, which rightfully complains that the -supply properties are missing for some boards: qcom-apq8074-dragonboard.dtb: remoteproc@fc880000: 'pll-supply' is a required property From schema: remoteproc/qcom,msm8916-mss-pil.yaml remoteproc@fc880000: 'mss-supply' is a required property From schema: remoteproc/qcom,msm8916-mss-pil.yaml remoteproc@fc880000: 'oneOf' conditional failed, one must be fixed: 'power-domains' is a required property 'power-domain-names' is a required property, or 'cx-supply' is a required property 'mx-supply' is a required property Cc: Luca Weiss Cc: Konrad Dybcio Fixes: f300826d27be ("ARM: dts: qcom-msm8974: Sort and clean up nodes") Signed-off-by: Stephan Gerhold --- arch/arm/boot/dts/qcom-msm8974.dtsi | 4 ++++ arch/arm/boot/dts/qcom-msm8974pro-fairphone-fp2.dts | 2 ++ arch/arm/boot/dts/qcom-msm8974pro-samsung-klte.dts | 2 ++ 3 files changed, 8 insertions(+) diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi b/arch/arm/boot/dts/qcom-msm8974.dtsi index 814ad0b46232..35246bd02132 100644 --- a/arch/arm/boot/dts/qcom-msm8974.dtsi +++ b/arch/arm/boot/dts/qcom-msm8974.dtsi @@ -1172,6 +1172,8 @@ remoteproc_mss: remoteproc@fc880000 { qcom,smem-states = <&modem_smp2p_out 0>; qcom,smem-state-names = "stop"; + status = "disabled"; + mba { memory-region = <&mba_region>; }; @@ -1639,6 +1641,8 @@ remoteproc_adsp: remoteproc@fe200000 { qcom,smem-states = <&adsp_smp2p_out 0>; qcom,smem-state-names = "stop"; + status = "disabled"; + smd-edge { interrupts = ; diff --git a/arch/arm/boot/dts/qcom-msm8974pro-fairphone-fp2.dts b/arch/arm/boot/dts/qcom-msm8974pro-fairphone-fp2.dts index 58cb2ce1e4df..8a6b8e4de887 100644 --- a/arch/arm/boot/dts/qcom-msm8974pro-fairphone-fp2.dts +++ b/arch/arm/boot/dts/qcom-msm8974pro-fairphone-fp2.dts @@ -147,10 +147,12 @@ wcnss { }; &remoteproc_adsp { + status = "okay"; cx-supply = <&pm8841_s2>; }; &remoteproc_mss { + status = "okay"; cx-supply = <&pm8841_s2>; mss-supply = <&pm8841_s3>; mx-supply = <&pm8841_s1>; diff --git a/arch/arm/boot/dts/qcom-msm8974pro-samsung-klte.dts b/arch/arm/boot/dts/qcom-msm8974pro-samsung-klte.dts index d6b2300a8223..577cbffad010 100644 --- a/arch/arm/boot/dts/qcom-msm8974pro-samsung-klte.dts +++ b/arch/arm/boot/dts/qcom-msm8974pro-samsung-klte.dts @@ -457,10 +457,12 @@ fuelgauge_pin: fuelgauge-int-pin { }; &remoteproc_adsp { + status = "okay"; cx-supply = <&pma8084_s2>; }; &remoteproc_mss { + status = "okay"; cx-supply = <&pma8084_s2>; mss-supply = <&pma8084_s6>; mx-supply = <&pma8084_s1>; From patchwork Tue Jul 12 12:44:19 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stephan Gerhold X-Patchwork-Id: 590488 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9209BCCA48C for ; Tue, 12 Jul 2022 12:46:11 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233201AbiGLMqK (ORCPT ); Tue, 12 Jul 2022 08:46:10 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33436 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229762AbiGLMqI (ORCPT ); Tue, 12 Jul 2022 08:46:08 -0400 Received: from mx.kernkonzept.com (serv1.kernkonzept.com [IPv6:2a01:4f8:1c1c:b490::2]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6ECA99C250; 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Tue, 12 Jul 2022 14:45:58 +0200 From: Stephan Gerhold To: Bjorn Andersson Cc: Andy Gross , Konrad Dybcio , Mathieu Poirier , Rob Herring , Krzysztof Kozlowski , Sireesh Kodali , Luca Weiss , Stephan Gerhold , linux-arm-msm@vger.kernel.org, linux-remoteproc@vger.kernel.org, devicetree@vger.kernel.org, Stephan Gerhold Subject: [PATCH 4/6] dt-bindings: remoteproc: qcom,msm8916-mss-pil: Add MSM8974 Date: Tue, 12 Jul 2022 14:44:19 +0200 Message-Id: <20220712124421.3129206-5-stephan.gerhold@kernkonzept.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20220712124421.3129206-1-stephan.gerhold@kernkonzept.com> References: <20220712124421.3129206-1-stephan.gerhold@kernkonzept.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org The "qcom,msm8974-mss-pil" binding is still similar enough to MSM8916 to be covered by the same DT schema. The only difference is the additional "mss-supply", which can be easily handled using a single if statement. Signed-off-by: Stephan Gerhold --- Note: I generated this patch on top of Sibi's series [1] to avoid conflicts later (I expect it will be picked up first). [1]: https://lore.kernel.org/linux-arm-msm/1657020721-24939-1-git-send-email-quic_sibis@quicinc.com/ --- .../remoteproc/qcom,msm8916-mss-pil.yaml | 16 ++++++++++++++++ .../devicetree/bindings/remoteproc/qcom,q6v5.txt | 16 ---------------- 2 files changed, 16 insertions(+), 16 deletions(-) diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,msm8916-mss-pil.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,msm8916-mss-pil.yaml index 3968348dc982..ca7146551ba9 100644 --- a/Documentation/devicetree/bindings/remoteproc/qcom,msm8916-mss-pil.yaml +++ b/Documentation/devicetree/bindings/remoteproc/qcom,msm8916-mss-pil.yaml @@ -18,6 +18,7 @@ properties: oneOf: - enum: - qcom,msm8916-mss-pil + - qcom,msm8974-mss-pil - const: qcom,q6v5-pil description: Deprecated, prefer using qcom,msm8916-mss-pil @@ -76,6 +77,9 @@ properties: pll-supply: description: PLL proxy supply (control handed over after startup) + mss-supply: + description: MSS power domain supply (only valid for qcom,msm8974-mss-pil) + resets: items: - description: MSS restart control @@ -177,6 +181,18 @@ required: - qcom,smem-state-names - smd-edge +# mss-supply is only valid (and required) for MSM8974 +if: + properties: + compatible: + const: qcom,msm8974-mss-pil +then: + required: + - mss-supply +else: + properties: + mss-supply: false + # Fallbacks for deprecated properties allOf: - oneOf: diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt b/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt index 3beb01da134b..9366ef087209 100644 --- a/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt +++ b/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt @@ -9,7 +9,6 @@ on the Qualcomm Hexagon core. Definition: must be one of: "qcom,ipq8074-wcss-pil" "qcom,qcs404-wcss-pil" - "qcom,msm8974-mss-pil" "qcom,msm8996-mss-pil" "qcom,msm8998-mss-pil" "qcom,sdm845-mss-pil" @@ -37,7 +36,6 @@ on the Qualcomm Hexagon core. string: qcom,ipq8074-wcss-pil: qcom,qcs404-wcss-pil: - qcom,msm8974-mss-pil: must be "wdog", "fatal", "ready", "handover", "stop-ack" qcom,msm8996-mss-pil: qcom,msm8998-mss-pil: @@ -68,8 +66,6 @@ on the Qualcomm Hexagon core. "gcc_axim_cbcr", "lcc_ahbfabric_cbc", "tcsr_lcc_cbc", "lcc_abhs_cbc", "lcc_tcm_slave_cbc", "lcc_abhm_cbc", "lcc_axim_cbc", "lcc_bcr_sleep" - qcom,msm8974-mss-pil: - must be "iface", "bus", "mem", "xo" qcom,msm8996-mss-pil: must be "iface", "bus", "mem", "xo", "gpll0_mss", "snoc_axi", "mnoc_axi", "pnoc", "qdss" @@ -106,17 +102,6 @@ should be referenced as follows: Definition: reference to the reserved-memory for the mba region followed by the mpss region -For the compatible string below the following supplies are required: - "qcom,msm8974-mss-pil" -- cx-supply: (deprecated, use power domain instead) -- mss-supply: -- mx-supply: (deprecated, use power domain instead) -- pll-supply: - Usage: required - Value type: - Definition: reference to the regulators to be held on behalf of the - booting of the Hexagon core - For the compatible string below the following supplies are required: "qcom,qcs404-wcss-pil" - cx-supply: @@ -144,7 +129,6 @@ For the compatible string below the following supplies are required: Definition: The power-domains needed depend on the compatible string: qcom,ipq8074-wcss-pil: no power-domain names required - qcom,msm8974-mss-pil: qcom,msm8996-mss-pil: qcom,msm8998-mss-pil: must be "cx", "mx" From patchwork Tue Jul 12 12:44:20 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stephan Gerhold X-Patchwork-Id: 589867 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1853ECCA482 for ; Tue, 12 Jul 2022 12:46:12 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233209AbiGLMqL (ORCPT ); Tue, 12 Jul 2022 08:46:11 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33474 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233130AbiGLMqJ (ORCPT ); Tue, 12 Jul 2022 08:46:09 -0400 Received: from mx.kernkonzept.com (serv1.kernkonzept.com [IPv6:2a01:4f8:1c1c:b490::2]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 758ED9D516; Tue, 12 Jul 2022 05:46:08 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=kernkonzept.com; s=mx1; h=Content-Transfer-Encoding:MIME-Version:References :In-Reply-To:Message-Id:Date:Subject:Cc:To:From:Sender:Reply-To:Content-Type: Content-ID:Content-Description:Resent-Date:Resent-From:Resent-Sender: Resent-To:Resent-Cc:Resent-Message-ID:List-Id:List-Help:List-Unsubscribe: List-Subscribe:List-Post:List-Owner:List-Archive; bh=EvmLaXrCu9LcndP7fv5DcCdqX9s8LkLkrJ8JE7e8V5Q=; b=FWjIv1phnEdRTCJ15t5BcBmQew VBt+zMFLxsnt29lzFL1DFml0/TPcx5IVf3CLCbn0G0tiY/ZT0CJ2nAxUV/rTzTJR7G10iTJ7jRoF6 fscQo6BRd4wdOplb5y1kGT98IWvtHGBwek37SLaU1hYfRgOR1qp399pBbuDjUkMNXayue1iCk2s7p ReoFmnzVfVwYw+UkPHSH9zpmbB68sWuBYPAXcuBOVcvqVP3PL0JClJCViO5on+csPGXiddpfY6Ime muGXeWcaK0j13AWj+ff0pr5HP5bNuT0aM3DRwr34yMl/09RM7nNH4MBTsVXszdDeNw8inwWjStnPT S2nuITRQ==; Received: from [10.22.3.24] (helo=kernkonzept.com) by mx.kernkonzept.com with esmtpsa (TLS1.3:ECDHE_X25519__RSA_PSS_RSAE_SHA256__AES_256_GCM:256) (Exim 4.94.2) id 1oBFH6-0087Gb-7m; Tue, 12 Jul 2022 14:46:00 +0200 From: Stephan Gerhold To: Bjorn Andersson Cc: Andy Gross , Konrad Dybcio , Mathieu Poirier , Rob Herring , Krzysztof Kozlowski , Sireesh Kodali , Luca Weiss , Stephan Gerhold , linux-arm-msm@vger.kernel.org, linux-remoteproc@vger.kernel.org, devicetree@vger.kernel.org, Stephan Gerhold Subject: [PATCH 5/6] dt-bindings: remoteproc: qcom,q6v5-pil: Add MSM8909 Date: Tue, 12 Jul 2022 14:44:20 +0200 Message-Id: <20220712124421.3129206-6-stephan.gerhold@kernkonzept.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20220712124421.3129206-1-stephan.gerhold@kernkonzept.com> References: <20220712124421.3129206-1-stephan.gerhold@kernkonzept.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Document the "qcom,msm8909-mss-pil" compatible for the modem remote processor on MSM8909. It is used pretty much exactly like the existing one for MSM8916. Signed-off-by: Stephan Gerhold Acked-by: Krzysztof Kozlowski --- .../devicetree/bindings/remoteproc/qcom,msm8916-mss-pil.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,msm8916-mss-pil.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,msm8916-mss-pil.yaml index ca7146551ba9..ef268005a57a 100644 --- a/Documentation/devicetree/bindings/remoteproc/qcom,msm8916-mss-pil.yaml +++ b/Documentation/devicetree/bindings/remoteproc/qcom,msm8916-mss-pil.yaml @@ -17,6 +17,7 @@ properties: compatible: oneOf: - enum: + - qcom,msm8909-mss-pil - qcom,msm8916-mss-pil - qcom,msm8974-mss-pil From patchwork Tue Jul 12 12:44:21 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stephan Gerhold X-Patchwork-Id: 590487 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7B0B3CCA47C for ; Tue, 12 Jul 2022 12:46:13 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233130AbiGLMqM (ORCPT ); Tue, 12 Jul 2022 08:46:12 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33526 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233216AbiGLMqL (ORCPT ); Tue, 12 Jul 2022 08:46:11 -0400 Received: from mx.kernkonzept.com (serv1.kernkonzept.com [IPv6:2a01:4f8:1c1c:b490::2]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1A3B99D516; Tue, 12 Jul 2022 05:46:10 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=kernkonzept.com; s=mx1; h=Content-Transfer-Encoding:MIME-Version:References :In-Reply-To:Message-Id:Date:Subject:Cc:To:From:Sender:Reply-To:Content-Type: Content-ID:Content-Description:Resent-Date:Resent-From:Resent-Sender: Resent-To:Resent-Cc:Resent-Message-ID:List-Id:List-Help:List-Unsubscribe: List-Subscribe:List-Post:List-Owner:List-Archive; bh=C7DbLRbpXMyCj1Q5o2dItOE2QtxA2TFViSasGpGNT8A=; b=noMebIsnOHWlnAj3FbV8akvwMT g1cZJw8JwiG/Xa3vUZlAqzDO3Aph2IAeawfKPlgqM6YS8lMFtlBgqm5Z2A5cRmug9du7OOwGbqdE2 UDyQBhpe5rgxF98hyEgcUGcvs8NM0eA/R7dJupZzhzdC+36NOl3OArm7/03tGhXxS1pNwpeaz/0+F cHyOW8flGwdgxbTBvYW5MJNMJnsa5DJLTnibbrRzHraBHG2dDujFx4CLA4Gs5wwIbevEF8nDRIqV+ 1+2MxphWY4xU9SFYUPTcmBdjQagOqG7e0lTejGnSB4d355z3QBiX881Y4Q1vfzoBsNc3xBqnrP6fN YEBz5ccQ==; Received: from [10.22.3.24] (helo=kernkonzept.com) by mx.kernkonzept.com with esmtpsa (TLS1.3:ECDHE_X25519__RSA_PSS_RSAE_SHA256__AES_256_GCM:256) (Exim 4.94.2) id 1oBFH8-0087Gb-6S; Tue, 12 Jul 2022 14:46:02 +0200 From: Stephan Gerhold To: Bjorn Andersson Cc: Andy Gross , Konrad Dybcio , Mathieu Poirier , Rob Herring , Krzysztof Kozlowski , Sireesh Kodali , Luca Weiss , Stephan Gerhold , linux-arm-msm@vger.kernel.org, linux-remoteproc@vger.kernel.org, devicetree@vger.kernel.org, Stephan Gerhold Subject: [PATCH 6/6] remoteproc: qcom_q6v5_mss: Add support for MSM8909 Date: Tue, 12 Jul 2022 14:44:21 +0200 Message-Id: <20220712124421.3129206-7-stephan.gerhold@kernkonzept.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20220712124421.3129206-1-stephan.gerhold@kernkonzept.com> References: <20220712124421.3129206-1-stephan.gerhold@kernkonzept.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Port the initialization sequence necessary for booting the modem remote processor on the MSM8909 SoC from Qualcomm's msm-3.10 release [1]. The sequence is actually similar to the existing one for MSM8996 and MSM8998 except that there is no separate QDSP6SS_MEM_PWR_CTL register and most of the "memories" are enabled at once instead of sequentially. To reuse the existing code just insert some if statements where needed and add a configuration similar to the one from MSM8916. [1]: https://git.codelinaro.org/clo/la/kernel/msm-3.10/-/commit/56dcedc8dac8abff6b007f76a29430b2d0a44704 Signed-off-by: Stephan Gerhold --- drivers/remoteproc/qcom_q6v5_mss.c | 123 +++++++++++++++++++++-------- 1 file changed, 90 insertions(+), 33 deletions(-) diff --git a/drivers/remoteproc/qcom_q6v5_mss.c b/drivers/remoteproc/qcom_q6v5_mss.c index af217de75e4d..31f561619b19 100644 --- a/drivers/remoteproc/qcom_q6v5_mss.c +++ b/drivers/remoteproc/qcom_q6v5_mss.c @@ -110,6 +110,9 @@ #define QDSS_BHS_ON BIT(21) #define QDSS_LDO_BYP BIT(22) +/* QDSP6v55 parameters */ +#define QDSP6V55_MEM_BITS GENMASK(16, 8) + /* QDSP6v56 parameters */ #define QDSP6v56_LDO_BYP BIT(25) #define QDSP6v56_BHS_ON BIT(24) @@ -233,6 +236,7 @@ struct q6v5 { }; enum { + MSS_MSM8909, MSS_MSM8916, MSS_MSM8974, MSS_MSM8996, @@ -686,13 +690,14 @@ static int q6v5proc_reset(struct q6v5 *qproc) return ret; } goto pbl_wait; - } else if (qproc->version == MSS_MSM8996 || + } else if (qproc->version == MSS_MSM8909 || + qproc->version == MSS_MSM8996 || qproc->version == MSS_MSM8998) { - int mem_pwr_ctl; - /* Override the ACC value if required */ - writel(QDSP6SS_ACC_OVERRIDE_VAL, - qproc->reg_base + QDSP6SS_STRAP_ACC); + if (qproc->version != MSS_MSM8909) + /* Override the ACC value if required */ + writel(QDSP6SS_ACC_OVERRIDE_VAL, + qproc->reg_base + QDSP6SS_STRAP_ACC); /* Assert resets, stop core */ val = readl(qproc->reg_base + QDSP6SS_RESET_REG); @@ -724,36 +729,53 @@ static int q6v5proc_reset(struct q6v5 *qproc) val |= QDSP6v56_LDO_BYP; writel(val, qproc->reg_base + QDSP6SS_PWR_CTL_REG); - /* Deassert QDSP6 compiler memory clamp */ - val = readl(qproc->reg_base + QDSP6SS_PWR_CTL_REG); - val &= ~QDSP6v56_CLAMP_QMC_MEM; - writel(val, qproc->reg_base + QDSP6SS_PWR_CTL_REG); - - /* Deassert memory peripheral sleep and L2 memory standby */ - val |= Q6SS_L2DATA_STBY_N | Q6SS_SLP_RET_N; - writel(val, qproc->reg_base + QDSP6SS_PWR_CTL_REG); - - /* Turn on L1, L2, ETB and JU memories 1 at a time */ - if (qproc->version == MSS_MSM8996) { - mem_pwr_ctl = QDSP6SS_MEM_PWR_CTL; - i = 19; + if (qproc->version != MSS_MSM8909) { + int mem_pwr_ctl; + + /* Deassert QDSP6 compiler memory clamp */ + val = readl(qproc->reg_base + QDSP6SS_PWR_CTL_REG); + val &= ~QDSP6v56_CLAMP_QMC_MEM; + writel(val, qproc->reg_base + QDSP6SS_PWR_CTL_REG); + + /* Deassert memory peripheral sleep and L2 memory standby */ + val |= Q6SS_L2DATA_STBY_N | Q6SS_SLP_RET_N; + writel(val, qproc->reg_base + QDSP6SS_PWR_CTL_REG); + + /* Turn on L1, L2, ETB and JU memories 1 at a time */ + if (qproc->version == MSS_MSM8996) { + mem_pwr_ctl = QDSP6SS_MEM_PWR_CTL; + i = 19; + } else { + /* MSS_MSM8998 */ + mem_pwr_ctl = QDSP6V6SS_MEM_PWR_CTL; + i = 28; + } + val = readl(qproc->reg_base + mem_pwr_ctl); + for (; i >= 0; i--) { + val |= BIT(i); + writel(val, qproc->reg_base + mem_pwr_ctl); + /* + * Read back value to ensure the write is done then + * wait for 1us for both memory peripheral and data + * array to turn on. + */ + val |= readl(qproc->reg_base + mem_pwr_ctl); + udelay(1); + } } else { - /* MSS_MSM8998 */ - mem_pwr_ctl = QDSP6V6SS_MEM_PWR_CTL; - i = 28; - } - val = readl(qproc->reg_base + mem_pwr_ctl); - for (; i >= 0; i--) { - val |= BIT(i); - writel(val, qproc->reg_base + mem_pwr_ctl); - /* - * Read back value to ensure the write is done then - * wait for 1us for both memory peripheral and data - * array to turn on. - */ - val |= readl(qproc->reg_base + mem_pwr_ctl); - udelay(1); + /* Turn on memories */ + val = readl(qproc->reg_base + QDSP6SS_PWR_CTL_REG); + val |= Q6SS_SLP_RET_N | Q6SS_L2DATA_STBY_N | + Q6SS_ETB_SLP_NRET_N | QDSP6V55_MEM_BITS; + writel(val, qproc->reg_base + QDSP6SS_PWR_CTL_REG); + + /* Turn on L2 banks 1 at a time */ + for (i = 0; i <= 7; i++) { + val |= BIT(i); + writel(val, qproc->reg_base + QDSP6SS_PWR_CTL_REG); + } } + /* Remove word line clamp */ val = readl(qproc->reg_base + QDSP6SS_PWR_CTL_REG); val &= ~QDSP6v56_CLAMP_WL; @@ -2198,6 +2220,40 @@ static const struct rproc_hexagon_res msm8996_mss = { .version = MSS_MSM8996, }; +static const struct rproc_hexagon_res msm8909_mss = { + .hexagon_mba_image = "mba.mbn", + .proxy_supply = (struct qcom_mss_reg_res[]) { + { + .supply = "pll", + .uA = 100000, + }, + {} + }, + .proxy_clk_names = (char*[]){ + "xo", + NULL + }, + .active_clk_names = (char*[]){ + "iface", + "bus", + "mem", + NULL + }, + .proxy_pd_names = (char*[]){ + "mx", + "cx", + NULL + }, + .need_mem_protection = false, + .has_alt_reset = false, + .has_mba_logs = false, + .has_spare_reg = false, + .has_qaccept_regs = false, + .has_ext_cntl_regs = false, + .has_vq6 = false, + .version = MSS_MSM8909, +}; + static const struct rproc_hexagon_res msm8916_mss = { .hexagon_mba_image = "mba.mbn", .proxy_supply = (struct qcom_mss_reg_res[]) { @@ -2298,6 +2354,7 @@ static const struct rproc_hexagon_res msm8974_mss = { static const struct of_device_id q6v5_of_match[] = { { .compatible = "qcom,q6v5-pil", .data = &msm8916_mss}, + { .compatible = "qcom,msm8909-mss-pil", .data = &msm8909_mss}, { .compatible = "qcom,msm8916-mss-pil", .data = &msm8916_mss}, { .compatible = "qcom,msm8974-mss-pil", .data = &msm8974_mss}, { .compatible = "qcom,msm8996-mss-pil", .data = &msm8996_mss},