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[2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id d14-20020a05600c34ce00b0039747cf8354sm19236198wmq.39.2022.07.26.09.32.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 26 Jul 2022 09:32:09 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Cc: "Michael S. Tsirkin" , Marcel Apfelbaum Subject: [PATCH 1/2] pci: Remove unused pci_get_*_by_mask() functions Date: Tue, 26 Jul 2022 17:32:05 +0100 Message-Id: <20220726163206.1780707-2-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220726163206.1780707-1-peter.maydell@linaro.org> References: <20220726163206.1780707-1-peter.maydell@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32d; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x32d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" The helper functions pci_get_{byte,word,long,quad}_by_mask() were added in 2012 in commit c9f50cea70a1596. In the decade since we have never added a single use of them. The helpers clearly aren't that helpful, so drop them rather than carrying around dead code. Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson --- include/hw/pci/pci.h | 28 ---------------------------- 1 file changed, 28 deletions(-) diff --git a/include/hw/pci/pci.h b/include/hw/pci/pci.h index b54b6ef88fc..c79144bc5ef 100644 --- a/include/hw/pci/pci.h +++ b/include/hw/pci/pci.h @@ -692,13 +692,6 @@ pci_set_byte_by_mask(uint8_t *config, uint8_t mask, uint8_t reg) pci_set_byte(config, (~mask & val) | (mask & rval)); } -static inline uint8_t -pci_get_byte_by_mask(uint8_t *config, uint8_t mask) -{ - uint8_t val = pci_get_byte(config); - return (val & mask) >> ctz32(mask); -} - static inline void pci_set_word_by_mask(uint8_t *config, uint16_t mask, uint16_t reg) { @@ -707,13 +700,6 @@ pci_set_word_by_mask(uint8_t *config, uint16_t mask, uint16_t reg) pci_set_word(config, (~mask & val) | (mask & rval)); } -static inline uint16_t -pci_get_word_by_mask(uint8_t *config, uint16_t mask) -{ - uint16_t val = pci_get_word(config); - return (val & mask) >> ctz32(mask); -} - static inline void pci_set_long_by_mask(uint8_t *config, uint32_t mask, uint32_t reg) { @@ -722,13 +708,6 @@ pci_set_long_by_mask(uint8_t *config, uint32_t mask, uint32_t reg) pci_set_long(config, (~mask & val) | (mask & rval)); } -static inline uint32_t -pci_get_long_by_mask(uint8_t *config, uint32_t mask) -{ - uint32_t val = pci_get_long(config); - return (val & mask) >> ctz32(mask); -} - static inline void pci_set_quad_by_mask(uint8_t *config, uint64_t mask, uint64_t reg) { @@ -737,13 +716,6 @@ pci_set_quad_by_mask(uint8_t *config, uint64_t mask, uint64_t reg) pci_set_quad(config, (~mask & val) | (mask & rval)); } -static inline uint64_t -pci_get_quad_by_mask(uint8_t *config, uint64_t mask) -{ - uint64_t val = pci_get_quad(config); - return (val & mask) >> ctz32(mask); -} - PCIDevice *pci_new_multifunction(int devfn, bool multifunction, const char *name); PCIDevice *pci_new(int devfn, const char *name); From patchwork Tue Jul 26 16:32:06 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 593460 Delivered-To: patch@linaro.org Received: by 2002:a05:7000:b811:0:0:0:0 with SMTP id fc17csp3733171mab; Tue, 26 Jul 2022 10:21:07 -0700 (PDT) X-Google-Smtp-Source: AGRyM1vJ0H0aVvrpyvxttVcGnOR+DWpawmrpKasNFFdBAUvhKire+UwslJ4KzbBMkhsmFSi30RU8 X-Received: by 2002:a05:620a:4306:b0:6a9:7122:edb2 with SMTP id u6-20020a05620a430600b006a97122edb2mr13738672qko.502.1658856067748; Tue, 26 Jul 2022 10:21:07 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1658856067; cv=none; d=google.com; s=arc-20160816; b=IgxgntKmEIeWePQxsbvT9iqH6catPxM1mywc4/Q+LEfmaTEYtkpFED3B2BZDyZY30s C3CArgIuKWQr6q7XU28gi52HxOp2Jnsln/gpqsxrhSj1AJUJIIcX/4ywcKSMZYlc2URj rt9y82y62Y8jSi7fw6VqjNtf95uZtMZIxylxUUWxnb5TcjImSI6L66turaoTD/Ld+7sx RAtysMHBeFKDZqG93Wxk0cA/Vr7Emwg1MaAzpygEXiudAZ2gSSEck6JaqYVzREmtkOvt Iun0rzyItQI8MvRBxSi4EC6PQn7PCebAs/H0gHKRCY/2mB1DfIWZewLP4QTWwWGNJYbj s+Qw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=JfWxJ00rIlfds3jFPlwG4e1sYuE0E+4UdrBr43y55Zw=; b=0T7PwKzz0x27Yov4KEd6JE+/QWMqZoHzaeZaFZlEkEe1HhtaVpc+KNzhd3dI7YZc3O IRMi+Jfj0TWiBEPS2wMYLe5cd1yNdwIC6Ne6U6y702ldlVFhZi+QtmsTx9+RxSzqgz97 pycWeqb0hUi1O7093ArCstN5husAtFssbKMTiotzeJC9g84GUF6yAfeJs9gLXQc0Mty6 ywG9IAJmrQLGIBEdGmuWJnVDKWpxzWn0rLJsCdWBLqN8mazyiY2LzGSGHDbuUAQx6Qae KCBd8wuBJnHzDD54CKwF58BmeiikgMaO2PIqjk5c6B6NPHH34StDqfyHJ30JnKe+5yzB pK5g== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=dr+20bMl; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id d14-20020a05600c34ce00b0039747cf8354sm19236198wmq.39.2022.07.26.09.32.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 26 Jul 2022 09:32:10 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Cc: "Michael S. Tsirkin" , Marcel Apfelbaum Subject: [PATCH 2/2] pci: Sanity check mask argument to pci_set_*_by_mask() Date: Tue, 26 Jul 2022 17:32:06 +0100 Message-Id: <20220726163206.1780707-3-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220726163206.1780707-1-peter.maydell@linaro.org> References: <20220726163206.1780707-1-peter.maydell@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32e; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x32e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Coverity complains that in functions like pci_set_word_by_mask() we might end up shifting by more than 31 bits. This is true, but only if the caller passes in a zero mask. Help Coverity out by asserting that the mask argument is valid. Fixes: CID 1487168 Signed-off-by: Peter Maydell Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson --- Note that only 1 of these 4 functions is used, and that only in 2 places in the codebase. In both cases the mask argument is a compile-time constant. --- include/hw/pci/pci.h | 20 ++++++++++++++++---- 1 file changed, 16 insertions(+), 4 deletions(-) diff --git a/include/hw/pci/pci.h b/include/hw/pci/pci.h index c79144bc5ef..0392b947b8b 100644 --- a/include/hw/pci/pci.h +++ b/include/hw/pci/pci.h @@ -688,7 +688,10 @@ static inline void pci_set_byte_by_mask(uint8_t *config, uint8_t mask, uint8_t reg) { uint8_t val = pci_get_byte(config); - uint8_t rval = reg << ctz32(mask); + uint8_t rval; + + assert(mask & 0xff); + rval = reg << ctz32(mask); pci_set_byte(config, (~mask & val) | (mask & rval)); } @@ -696,7 +699,10 @@ static inline void pci_set_word_by_mask(uint8_t *config, uint16_t mask, uint16_t reg) { uint16_t val = pci_get_word(config); - uint16_t rval = reg << ctz32(mask); + uint16_t rval; + + assert(mask & 0xffff); + rval = reg << ctz32(mask); pci_set_word(config, (~mask & val) | (mask & rval)); } @@ -704,7 +710,10 @@ static inline void pci_set_long_by_mask(uint8_t *config, uint32_t mask, uint32_t reg) { uint32_t val = pci_get_long(config); - uint32_t rval = reg << ctz32(mask); + uint32_t rval; + + assert(mask); + rval = reg << ctz32(mask); pci_set_long(config, (~mask & val) | (mask & rval)); } @@ -712,7 +721,10 @@ static inline void pci_set_quad_by_mask(uint8_t *config, uint64_t mask, uint64_t reg) { uint64_t val = pci_get_quad(config); - uint64_t rval = reg << ctz32(mask); + uint64_t rval; + + assert(mask); + rval = reg << ctz32(mask); pci_set_quad(config, (~mask & val) | (mask & rval)); }