From patchwork Fri Feb 1 10:04:20 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 157190 Delivered-To: patch@linaro.org Received: by 2002:a02:48:0:0:0:0:0 with SMTP id 69csp202061jaa; Fri, 1 Feb 2019 02:04:28 -0800 (PST) X-Google-Smtp-Source: AHgI3IbIoUcPPC+u8WoPggLb2thrqqNFy+JwnpQAaJPHsg3T90iK4Mb3zt5kG4tARUuroTSEQTeT X-Received: by 2002:a63:7a16:: with SMTP id v22mr1638893pgc.68.1549015468905; Fri, 01 Feb 2019 02:04:28 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1549015468; cv=none; d=google.com; s=arc-20160816; b=nBTalL9l9D0rC/dN28ywViZkZajCsPZ3JoWoJ7LGlPnL1k75hhPnjCX7xG4YGoM+LK 8CLemaeMk/A3UB7dH6vt8pLlmPfQ8y7CYhGTJqt4DSsxN9vsdcap8wdNeNOUbSNE+xtL 3DoREEzaHT1tzXcYi8X8iAEnOTYoTtl23WKprnfSaAnnoo8tBTcmOgqipmM4eSvmq5oJ CjRJl+jntg2te9D6Zjvu064Cf3QQSON0ulaSfYUeH1CCluuynl8+AylRJrhTZOV99KT/ V9H+Se7pZMnT/chNySlUNOsF6YOfbzDeSfwJqDdlYC6pVv+3p+aHKeHhOaUSMyOY3YdH 4Upw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :message-id:date:subject:cc:to:from:dkim-signature; bh=qTqjDdI4/9bt0VuW3/iTUWoBQxKuywYtQ/zFacF4SdY=; b=gQr6z00loxNJnr5uTeAQlWzMAn2Kp2mY8asaIz7vLLjJTdggZz3kchBwBNlpmqmnOA NFNttf3v1WsfgO0uXMatT7D8S/qyNce4u4BY+LEXxOZ9csQiDGapa1ZGithCnaV0I2OL F5zMLVKfTHoY/NxdYav9kKihAOrykm5k3EDP/vp8gdtmXnoYSvsd44zvpTTwmYLKrS0G 672ut4KVKSx2Qm4OC2vgKSdsVT8PmDVvpuqj+ne8pgV4Eo5nDXLq3O8fRmHc6nLq+Wh/ NFPxMz5mYYIumKug9AQdOG0sUEdr3WhMyRQzV3iMelqJHZlhyZ8D0ncMmCrkneGlzIvx pUbg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=QCQRNF5e; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id c17si3152789pfb.81.2019.02.01.02.04.28; Fri, 01 Feb 2019 02:04:28 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=QCQRNF5e; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728634AbfBAKE1 (ORCPT + 7 others); Fri, 1 Feb 2019 05:04:27 -0500 Received: from mail-lj1-f195.google.com ([209.85.208.195]:34404 "EHLO mail-lj1-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728567AbfBAKE1 (ORCPT ); Fri, 1 Feb 2019 05:04:27 -0500 Received: by mail-lj1-f195.google.com with SMTP id u89-v6so5330821lje.1 for ; Fri, 01 Feb 2019 02:04:26 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=qTqjDdI4/9bt0VuW3/iTUWoBQxKuywYtQ/zFacF4SdY=; b=QCQRNF5eHPezUaOigAdJv7iwUUf6HEfwl06sNifS1sw697q/1aB9qx6mD9vf5pxcnH mrIY+58Z/GOsMbOedQ+BTB5HsIT2rlfBsqtlJvLk6pqk0fnX/PW10DJ3gE+WvRZmpseu 1OpL4UCOE1vRgB/SldWhcn1WIBv8Qx95n53R4= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=qTqjDdI4/9bt0VuW3/iTUWoBQxKuywYtQ/zFacF4SdY=; b=nbBS+fq5QeI4crklGJSGyg9IdkoPsiy1H85ka+K3PXEOhRNGsxJlqPEhCLNUvIkbaM 2fHPY6UvyH+PrjEDgkBKgUasCbaaqwl32IAHUppTasA8w9mcxoFW94PxwacG0A+JXFez utsa/CRRZDrp7XeyqB9zDh9g6oLabGuhgR4M55GrNRymCm7S8KHPIzyH/q27plvwHH4o l0CiQmg5IwVB3NpZ2WZtugXyoxGEpVn3gz6iqgfSUdDKA9Pvs/Wekm9VhF1iqe8RdFL7 CZfxuZcS8DOsqtCLAwt3eeSZkmM5HuYB2XckRsK57buRgrSFxfSr0B/BGFzw9SdJfWCt FOMA== X-Gm-Message-State: AHQUAuaOW3Yqk4DLSsTab4ZjpPF6ibzDqERWxGplaKnPAy9jtlbYOd4H g9snWvXewQxkOYvGngsc9N+6eg== X-Received: by 2002:a2e:3a10:: with SMTP id h16-v6mr26574711lja.184.1549015465123; Fri, 01 Feb 2019 02:04:25 -0800 (PST) Received: from linux.local (c-ae7b71d5.014-348-6c756e10.bbcust.telenor.se. [213.113.123.174]) by smtp.gmail.com with ESMTPSA id g15sm1279197lfb.1.2019.02.01.02.04.23 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Fri, 01 Feb 2019 02:04:24 -0800 (PST) From: Linus Walleij To: David Woodhouse , Brian Norris , Boris Brezillon , Marek Vasut , Richard Weinberger , linux-mtd@lists.infradead.org Cc: Linus Walleij , devicetree@vger.kernel.org Subject: [PATCH 1/2] mtd: add DT bindings for the Intel IXP4xx Flash Date: Fri, 1 Feb 2019 11:04:20 +0100 Message-Id: <20190201100421.27504-1-linus.walleij@linaro.org> X-Mailer: git-send-email 2.20.1 MIME-Version: 1.0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org This adds device tree bindings for the Intel IXP4xx flash controller, a simple physmap which however need a specific big-endian or mixed-endian access pattern to the memory. Cc: devicetree@vger.kernel.org Signed-off-by: Linus Walleij --- .../bindings/mtd/intel,ixp4xx-flash.txt | 22 +++++++++++++++++++ 1 file changed, 22 insertions(+) create mode 100644 Documentation/devicetree/bindings/mtd/intel,ixp4xx-flash.txt -- 2.20.1 Reviewed-by: Rob Herring diff --git a/Documentation/devicetree/bindings/mtd/intel,ixp4xx-flash.txt b/Documentation/devicetree/bindings/mtd/intel,ixp4xx-flash.txt new file mode 100644 index 000000000000..4bdcb92ae381 --- /dev/null +++ b/Documentation/devicetree/bindings/mtd/intel,ixp4xx-flash.txt @@ -0,0 +1,22 @@ +Flash device on Intel IXP4xx SoC + +This flash is regular CFI compatible (Intel or AMD extended) flash chips with +specific big-endian or mixed-endian memory access pattern. + +Required properties: +- compatible : must be "intel,ixp4xx-flash", "cfi-flash"; +- reg : memory address for the flash chip +- bank-width : width in bytes of flash interface, should be <2> + +For the rest of the properties, see mtd-physmap.txt. + +The device tree may optionally contain sub-nodes describing partitions of the +address space. See partition.txt for more detail. + +Example: + +flash@50000000 { + compatible = "intel,ixp4xx-flash", "cfi-flash"; + reg = <0x50000000 0x01000000>; + bank-width = <2>; +};