From patchwork Fri Aug 5 12:21:59 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Pali_Roh=C3=A1r?= X-Patchwork-Id: 595667 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id AD3F5C3F6B0 for ; Fri, 5 Aug 2022 12:22:29 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237634AbiHEMW2 (ORCPT ); Fri, 5 Aug 2022 08:22:28 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60568 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S240661AbiHEMWZ (ORCPT ); Fri, 5 Aug 2022 08:22:25 -0400 Received: from ams.source.kernel.org (ams.source.kernel.org [145.40.68.75]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C1247B9B for ; Fri, 5 Aug 2022 05:22:24 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id 7425FB82866 for ; Fri, 5 Aug 2022 12:22:23 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id E6190C433D7; Fri, 5 Aug 2022 12:22:21 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1659702142; bh=QqMenMtuuDz9IMUdXlJREV9LB27AexWX4PM5ieA0+6o=; h=From:To:Cc:Subject:Date:From; b=E8E8YwXW2mqxe/LRXEGW9zoRu8l6QVnpUuCfGhiCCtuvlW6J0Wn4wL6XKuo4q9+5l IRz+4I1+kXQH8h7Krnzs/tC1jGc/aI2zBw62J0Z87+vWJ9OQmNm9iKz66RuA0U6i35 szCCBAc5HxwRZufI9Ty2Tx6sWwk6QZmwDPcVAs/ifGHv5S0jxgvBXpQkWTWa2LI3m4 gRkyyc39YrvMZvE6cev3ZuDz0yYJRau+tMYmStyR/H49Fa/Bw5tnEAeKOgATRGaxg8 8+GEFvFSl0CJfqZfAgUyl39HXsrYDMNR6yIB8O7lyA0uqFM+emIUPFSKdz45T3Btsz zhhC9VH1e6MQw== Received: by pali.im (Postfix) id 1B91E82D; Fri, 5 Aug 2022 14:22:19 +0200 (CEST) From: =?utf-8?q?Pali_Roh=C3=A1r?= To: Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Linus Walleij Cc: =?utf-8?q?Marek_Beh=C3=BAn?= , linux-arm-kernel@lists.infradead.org, linux-gpio@vger.kernel.org Subject: [PATCH v2 1/4] pinctrl: armada-37xx: Add missing GPIO-only pins Date: Fri, 5 Aug 2022 14:21:59 +0200 Message-Id: <20220805122202.23174-1-pali@kernel.org> X-Mailer: git-send-email 2.20.1 MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org gpio1_5 and gpio2_2 are GPIO-only pins. Add them into MPP groups table so they are properly exported as valid pin numbers. Fixes: 87466ccd9401 ("pinctrl: armada-37xx: Add pin controller support for Armada 37xx") Signed-off-by: Pali Rohár --- drivers/pinctrl/mvebu/pinctrl-armada-37xx.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c b/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c index a140b6bfbfaa..2b44c634ccb5 100644 --- a/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c +++ b/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c @@ -122,6 +122,16 @@ struct armada_37xx_pinctrl { .funcs = {_func1, _func2} \ } +#define PIN_GRP_GPIO_0(_name, _start, _nr) \ + { \ + .name = _name, \ + .start_pin = _start, \ + .npins = _nr, \ + .reg_mask = 0, \ + .val = {0}, \ + .funcs = {"gpio"} \ + } + #define PIN_GRP_GPIO(_name, _start, _nr, _mask, _func1) \ { \ .name = _name, \ @@ -179,6 +189,7 @@ static struct armada_37xx_pin_group armada_37xx_nb_groups[] = { "pwm", "led"), PIN_GRP_GPIO("pmic1", 7, 1, BIT(7), "pmic"), PIN_GRP_GPIO("pmic0", 6, 1, BIT(8), "pmic"), + PIN_GRP_GPIO_0("gpio1_5", 5, 1), PIN_GRP_GPIO("i2c2", 2, 2, BIT(9), "i2c"), PIN_GRP_GPIO("i2c1", 0, 2, BIT(10), "i2c"), PIN_GRP_GPIO("spi_cs1", 17, 1, BIT(12), "spi"), @@ -195,6 +206,7 @@ static struct armada_37xx_pin_group armada_37xx_nb_groups[] = { static struct armada_37xx_pin_group armada_37xx_sb_groups[] = { PIN_GRP_GPIO("usb32_drvvbus0", 0, 1, BIT(0), "drvbus"), PIN_GRP_GPIO("usb2_drvvbus1", 1, 1, BIT(1), "drvbus"), + PIN_GRP_GPIO_0("gpio2_2", 2, 1), PIN_GRP_GPIO("sdio_sb", 24, 6, BIT(2), "sdio"), PIN_GRP_GPIO("rgmii", 6, 12, BIT(3), "mii"), PIN_GRP_GPIO("smi", 18, 2, BIT(4), "smi"), From patchwork Fri Aug 5 12:22:00 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Pali_Roh=C3=A1r?= X-Patchwork-Id: 595920 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3F0C7C25B08 for ; Fri, 5 Aug 2022 12:22:30 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237660AbiHEMW3 (ORCPT ); Fri, 5 Aug 2022 08:22:29 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60566 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S240671AbiHEMWZ (ORCPT ); Fri, 5 Aug 2022 08:22:25 -0400 Received: from ams.source.kernel.org (ams.source.kernel.org [145.40.68.75]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id ACAB6B02 for ; Fri, 5 Aug 2022 05:22:24 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id 68663B828AC for ; Fri, 5 Aug 2022 12:22:23 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id EE384C4347C; Fri, 5 Aug 2022 12:22:21 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1659702142; bh=b9e6f7QyGeXEQipqkQe1Q41JGjIlUd+dl7sHDQm0Ydk=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=AL//8Tj3FjVfZYalJJP/aVwVEmAdJouVah4hhxuD+9x2XaPW75jr1jPZdMjANUZIr Pa502tpQZJDZJqpHihD4hUnV/XHhVy+39rtoEyLEBuDxSGXbShnaxyr74R0RopwX7A wKHwvFlwWcxdnk7hrH8m6IpPqACgvjsAlCpmwtwWj/CXcGmCHXOoIVrJTga686a05b nd4dlCmEniIIABRvirNOcfOY8iPjMFqYbZjJI3cja6Jjq10lA2yEMJUs8D+Oyod64z ZVwcgNZvhrMkqEeuKQwHLvqUISRiK2aUkvL5Na/9hR3TR37NfKodJ2PiDAc28j7WEO r4FVOUvvj0caw== Received: by pali.im (Postfix) id 6D972941; Fri, 5 Aug 2022 14:22:19 +0200 (CEST) From: =?utf-8?q?Pali_Roh=C3=A1r?= To: Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Linus Walleij Cc: =?utf-8?q?Marek_Beh=C3=BAn?= , linux-arm-kernel@lists.infradead.org, linux-gpio@vger.kernel.org Subject: [PATCH v2 2/4] pinctrl: armada-37xx: Fix definitions for MPP pins 20-22 Date: Fri, 5 Aug 2022 14:22:00 +0200 Message-Id: <20220805122202.23174-2-pali@kernel.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20220805122202.23174-1-pali@kernel.org> References: <20220805122202.23174-1-pali@kernel.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org All 3 MPP pins (20, 21 and 22) can be configured individually and also can be configured to GPIO functions. Fix definitions for these MPP pins in existing pin groups. After this change GPIO function can be enabled just for one of these 3 pins. Fixes: 87466ccd9401 ("pinctrl: armada-37xx: Add pin controller support for Armada 37xx") Signed-off-by: Pali Rohár --- drivers/pinctrl/mvebu/pinctrl-armada-37xx.c | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c b/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c index 2b44c634ccb5..e5e5f0ea0e77 100644 --- a/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c +++ b/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c @@ -213,9 +213,11 @@ static struct armada_37xx_pin_group armada_37xx_sb_groups[] = { PIN_GRP_GPIO("pcie1", 3, 1, BIT(5), "pcie"), /* this actually controls "pcie1_reset" */ PIN_GRP_GPIO("pcie1_clkreq", 4, 1, BIT(9), "pcie"), PIN_GRP_GPIO("pcie1_wakeup", 5, 1, BIT(10), "pcie"), - PIN_GRP_GPIO("ptp", 20, 3, BIT(11) | BIT(12) | BIT(13), "ptp"), - PIN_GRP("ptp_clk", 21, 1, BIT(6), "ptp", "mii"), - PIN_GRP("ptp_trig", 22, 1, BIT(7), "ptp", "mii"), + PIN_GRP_GPIO("ptp", 20, 1, BIT(11), "ptp"), + PIN_GRP_GPIO_3("ptp_clk", 21, 1, BIT(6) | BIT(12), 0, BIT(6), BIT(12), + "ptp", "mii"), + PIN_GRP_GPIO_3("ptp_trig", 22, 1, BIT(7) | BIT(13), 0, BIT(7), BIT(13), + "ptp", "mii"), PIN_GRP_GPIO_3("mii_col", 23, 1, BIT(8) | BIT(14), 0, BIT(8), BIT(14), "mii", "mii_err"), }; From patchwork Fri Aug 5 12:22:01 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Pali_Roh=C3=A1r?= X-Patchwork-Id: 595666 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 09E49C25B0C for ; Fri, 5 Aug 2022 12:22:31 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S240645AbiHEMWa (ORCPT ); Fri, 5 Aug 2022 08:22:30 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60584 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S240695AbiHEMW0 (ORCPT ); Fri, 5 Aug 2022 08:22:26 -0400 Received: from ams.source.kernel.org (ams.source.kernel.org [145.40.68.75]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4CE51D6C for ; Fri, 5 Aug 2022 05:22:25 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id E37A1B828AF for ; Fri, 5 Aug 2022 12:22:23 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 6E635C43141; Fri, 5 Aug 2022 12:22:22 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1659702142; bh=vn2WUAHXHsGKqG8gx4eiUN1YZXYE9u0alZ+b+BqHmrc=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=CtQeO32aRLqO9+w82Hnf5qznoVF09qVAciLzX/GGJDxgfG9TVmcDn1/v30nv1x1YE kbEpDumT9M5EXHS+ntYBZQy34mwVUzHWV3MqT2/rPtOHyWC2L8pd62k8RF8+jOtmoQ ooaccg9kjd5uw2dRM8d1tGp7eUxmcrFBKOIBXHoVRvc8v++jESTngKpIxhEECtzXkh lAma4bbHOHUfmwmLkgUfj51n+3VTal1XnBN9U8GNHP6A7V5/JhTUE/12ndRsxRmqZf Cy0JSPnzceXTi6/0OSEV59MUFvN+iBfsJE+/XEClbDedgrjg+hk/A0BM7P0Od2p3Vv pedOodH1X/edA== Received: by pali.im (Postfix) id CE15E96D; Fri, 5 Aug 2022 14:22:19 +0200 (CEST) From: =?utf-8?q?Pali_Roh=C3=A1r?= To: Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Linus Walleij Cc: =?utf-8?q?Marek_Beh=C3=BAn?= , linux-arm-kernel@lists.infradead.org, linux-gpio@vger.kernel.org Subject: [PATCH v2 3/4] pinctrl: armada-37xx: Checks for errors in gpio_request_enable callback Date: Fri, 5 Aug 2022 14:22:01 +0200 Message-Id: <20220805122202.23174-3-pali@kernel.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20220805122202.23174-1-pali@kernel.org> References: <20220805122202.23174-1-pali@kernel.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Now when all MPP pins are properly defined and every MPP pin has GPIO function, always checks for errors in armada_37xx_gpio_request_enable() function when calling armada_37xx_pmx_set_by_name(). Function armada_37xx_pmx_set_by_name() should not return "not supported" error anymore for any GPIO pin when requesting GPIO mode. Fixes: 87466ccd9401 ("pinctrl: armada-37xx: Add pin controller support for Armada 37xx") Signed-off-by: Pali Rohár --- Changes in v2: * add missing int ret; --- drivers/pinctrl/mvebu/pinctrl-armada-37xx.c | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c b/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c index e5e5f0ea0e77..3227f70922fc 100644 --- a/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c +++ b/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c @@ -500,11 +500,15 @@ static int armada_37xx_gpio_request_enable(struct pinctrl_dev *pctldev, struct armada_37xx_pinctrl *info = pinctrl_dev_get_drvdata(pctldev); struct armada_37xx_pin_group *group; int grp = 0; + int ret; dev_dbg(info->dev, "requesting gpio %d\n", offset); - while ((group = armada_37xx_find_next_grp_by_pin(info, offset, &grp))) - armada_37xx_pmx_set_by_name(pctldev, "gpio", group); + while ((group = armada_37xx_find_next_grp_by_pin(info, offset, &grp))) { + ret = armada_37xx_pmx_set_by_name(pctldev, "gpio", group); + if (ret) + return ret; + } return 0; } From patchwork Fri Aug 5 12:22:02 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Pali_Roh=C3=A1r?= X-Patchwork-Id: 595921 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9C26CC25B06 for ; Fri, 5 Aug 2022 12:22:30 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S240152AbiHEMWa (ORCPT ); Fri, 5 Aug 2022 08:22:30 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60582 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S240676AbiHEMW0 (ORCPT ); Fri, 5 Aug 2022 08:22:26 -0400 Received: from ams.source.kernel.org (ams.source.kernel.org [IPv6:2604:1380:4601:e00::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 52ACAE74 for ; Fri, 5 Aug 2022 05:22:25 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id 0DB6DB828B0 for ; Fri, 5 Aug 2022 12:22:24 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 8A561C43142; Fri, 5 Aug 2022 12:22:22 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1659702142; bh=uaT7n1Hd/gr9DCqS4OpUxjqFwYoxHR6+Y3niYA4mBeQ=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Yj68D56oWgr52vEBrwP0t4J4f0u/0eTdCRFusSsO0mT84Kq1fudMkYZv+5EJ+S4M2 ntN6XEXI8vox5Qudd9TunnPpXEytEJR3RnTQ3to+uhKgO7LOS26zE/apLNowpeqY0u 0AYZKvaUpcAAgSs0MqdrmQOyMHxrmOOf0XxeFPymNX9CL0a1ezTKgU0cSB9ECCN5+1 NRIEBygkzdmDQiZwWZnuABY5ExIvzNDH1t+fzOkZrdvpCXqMTfd+xvgmBIkW7iDUyP K8qBlnHfrRmwb78AE3LfCpcV8p/hMCvgKIE3c1htCy+xDZbm8C/cRXo33rgbWUnb40 8M9piAQ6VOlnQ== Received: by pali.im (Postfix) id 383AEA52; Fri, 5 Aug 2022 14:22:20 +0200 (CEST) From: =?utf-8?q?Pali_Roh=C3=A1r?= To: Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Linus Walleij Cc: =?utf-8?q?Marek_Beh=C3=BAn?= , linux-arm-kernel@lists.infradead.org, linux-gpio@vger.kernel.org Subject: [PATCH v2 4/4] pinctrl: armada-37xx: Remove unused macro PIN_GRP() Date: Fri, 5 Aug 2022 14:22:02 +0200 Message-Id: <20220805122202.23174-4-pali@kernel.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20220805122202.23174-1-pali@kernel.org> References: <20220805122202.23174-1-pali@kernel.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Macro PIN_GRP() is not used, remove it. Signed-off-by: Pali Rohár --- drivers/pinctrl/mvebu/pinctrl-armada-37xx.c | 10 ---------- 1 file changed, 10 deletions(-) diff --git a/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c b/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c index 3227f70922fc..3f76899eb8e3 100644 --- a/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c +++ b/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c @@ -112,16 +112,6 @@ struct armada_37xx_pinctrl { struct armada_37xx_pm_state pm; }; -#define PIN_GRP(_name, _start, _nr, _mask, _func1, _func2) \ - { \ - .name = _name, \ - .start_pin = _start, \ - .npins = _nr, \ - .reg_mask = _mask, \ - .val = {0, _mask}, \ - .funcs = {_func1, _func2} \ - } - #define PIN_GRP_GPIO_0(_name, _start, _nr) \ { \ .name = _name, \