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[82.243.161.21]) by smtp.googlemail.com with ESMTPSA id q12sm4702470wmf.2.2019.02.03.02.47.38 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Sun, 03 Feb 2019 02:47:40 -0800 (PST) From: Jerome Brunet To: Neil Armstrong , Stephen Boyd , Michael Turquette Cc: Jerome Brunet , Kevin Hilman , linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, linux-amlogic@lists.infradead.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH] clk: meson: fix pll settings calculation with arm32 Date: Sun, 3 Feb 2019 11:47:16 +0100 Message-Id: <20190203104716.10479-1-jbrunet@baylibre.com> X-Mailer: git-send-email 2.20.1 MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org fix undefined reference to `__aeabi_uldivmod' when dividing u64 on arm32. Fixes: 496c0462b46f ("clk: meson: pll: update driver for the g12a") Signed-off-by: Jerome Brunet --- Neil, Feel free to squash this with the offending change. If you prefer, I can submit a v7. Cheers Jerome drivers/clk/meson/clk-pll.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- 2.20.1 diff --git a/drivers/clk/meson/clk-pll.c b/drivers/clk/meson/clk-pll.c index 7946d21a4ff4..41e16dd7272a 100644 --- a/drivers/clk/meson/clk-pll.c +++ b/drivers/clk/meson/clk-pll.c @@ -151,7 +151,7 @@ static unsigned int meson_clk_get_pll_range_m(unsigned long rate, if (__pll_round_closest_mult(pll)) return DIV_ROUND_CLOSEST_ULL(val, parent_rate); - return val / parent_rate; + return div_u64(val, parent_rate); } static int meson_clk_get_pll_range_index(unsigned long rate,