From patchwork Sat Aug 13 15:44:09 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?QXLEsW7DpyDDnE5BTA==?= X-Patchwork-Id: 597121 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5E217C25B0F for ; Sat, 13 Aug 2022 15:45:29 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S239854AbiHMPp0 (ORCPT ); Sat, 13 Aug 2022 11:45:26 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58078 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S239843AbiHMPpZ (ORCPT ); Sat, 13 Aug 2022 11:45:25 -0400 Received: from sender4-op-o14.zoho.com (sender4-op-o14.zoho.com [136.143.188.14]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 37F4124BEC; Sat, 13 Aug 2022 08:45:22 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1660405481; cv=none; d=zohomail.com; s=zohoarc; b=f5XP1KzAb9JAcwx5vN+MD6abC72s4JGh3j50rwj8uMx5sdM49vUyN/krozKh0gKKVwbAeLU1WiUvs9yVzDEIBuszV83nd3V7fTB/sv2cRNTpsPstuGZihGrsztQlR0CsXZOTXucDnZe2F7/6xs1FrzA9wYzJ5Jem2IHiHJLYpmU= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1660405481; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:MIME-Version:Message-ID:References:Subject:To; bh=yGdam4HCk0JO9lv/W5n08OUCBsZPnrBx9o3iHj6VyIo=; b=AHDc3AXSkFV0X3Qxj2UQUU5QFevfZVoNivZzoUcm8aMuHL8kyVaoEzf6CPEwk7SuR0UMLrFEqSwdYu44Ck9WQNRpbZiJsllthax0KvtdAMat2HBezKQEmssxf1wheIP0ZjNTOfBbZtEi24K5Am8wGZcnzAJ/Ak//Mpd8WNfvsiU= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass header.i=arinc9.com; spf=pass smtp.mailfrom=arinc.unal@arinc9.com; dmarc=pass header.from= DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; t=1660405481; s=zmail; d=arinc9.com; i=arinc.unal@arinc9.com; h=From:From:To:To:Cc:Cc:Subject:Subject:Date:Date:Message-Id:Message-Id:In-Reply-To:References:MIME-Version:Content-Type:Content-Transfer-Encoding:Reply-To; bh=yGdam4HCk0JO9lv/W5n08OUCBsZPnrBx9o3iHj6VyIo=; b=BkW1p8qBrz8Oi+PA8s3k+IuJ9XXy1f5SzF01ahBDg3ShP0EL0PDhh5aiQivtxwH7 pr9kRsLAdguHmwJe9qUOpZhfESbGLXZwrXGM63hCJMQ1nV4T2gCv/aiCixtMpd5GXY+ PguBrPVi0L2wuxR6j9iGdlGQIMjv019hLpstuEXQ= Received: from arinc9-PC.lan (85.117.236.245 [85.117.236.245]) by mx.zohomail.com with SMTPS id 1660405479705512.3045871969838; Sat, 13 Aug 2022 08:44:39 -0700 (PDT) From: =?utf-8?b?QXLEsW7DpyDDnE5BTA==?= To: Andrew Lunn , Vivien Didelot , Florian Fainelli , Vladimir Oltean , "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Matthias Brugger , Sean Wang , Landen Chao , DENG Qingfang , Frank Wunderlich , Luiz Angelo Daros de Luca , Sander Vanheule , =?utf-8?q?Ren=C3=A9_van_Dorst?= , Daniel Golle , erkin.bozoglu@xeront.com, Sergio Paracuellos Cc: netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-kernel@vger.kernel.org, =?utf-8?b?QXLEsW7DpyDDnE5BTA==?= Subject: [PATCH v2 1/7] dt-bindings: net: dsa: mediatek,mt7530: make trivial changes Date: Sat, 13 Aug 2022 18:44:09 +0300 Message-Id: <20220813154415.349091-2-arinc.unal@arinc9.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220813154415.349091-1-arinc.unal@arinc9.com> References: <20220813154415.349091-1-arinc.unal@arinc9.com> MIME-Version: 1.0 X-ZohoMailClient: External Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Make trivial changes on the binding. - Update title to include MT7531 switch. - Add me as a maintainer. List maintainers in alphabetical order by first name. - Add description to compatible strings. - Stretch descriptions up to the 80 character limit. - Remove quotes from $ref: "dsa.yaml#". Signed-off-by: Arınç ÜNAL Reviewed-by: Rob Herring --- .../bindings/net/dsa/mediatek,mt7530.yaml | 36 ++++++++++++------- 1 file changed, 24 insertions(+), 12 deletions(-) diff --git a/Documentation/devicetree/bindings/net/dsa/mediatek,mt7530.yaml b/Documentation/devicetree/bindings/net/dsa/mediatek,mt7530.yaml index 17ab6c69ecc7..edf48e917173 100644 --- a/Documentation/devicetree/bindings/net/dsa/mediatek,mt7530.yaml +++ b/Documentation/devicetree/bindings/net/dsa/mediatek,mt7530.yaml @@ -4,12 +4,13 @@ $id: http://devicetree.org/schemas/net/dsa/mediatek,mt7530.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Mediatek MT7530 Ethernet switch +title: Mediatek MT7530 and MT7531 Ethernet Switches maintainers: - - Sean Wang + - Arınç ÜNAL - Landen Chao - DENG Qingfang + - Sean Wang description: | Port 5 of mt7530 and mt7621 switch is muxed between: @@ -61,10 +62,21 @@ description: | properties: compatible: - enum: - - mediatek,mt7530 - - mediatek,mt7531 - - mediatek,mt7621 + oneOf: + - description: + Standalone MT7530 and multi-chip module MT7530 in MT7623AI SoC + items: + - const: mediatek,mt7530 + + - description: + Standalone MT7531 + items: + - const: mediatek,mt7531 + + - description: + Multi-chip module MT7530 in MT7621AT, MT7621DAT and MT7621ST SoCs + items: + - const: mediatek,mt7621 reg: maxItems: 1 @@ -79,7 +91,7 @@ properties: gpio-controller: type: boolean description: - if defined, MT7530's LED controller will run on GPIO mode. + If defined, MT7530's LED controller will run on GPIO mode. "#interrupt-cells": const: 1 @@ -92,8 +104,8 @@ properties: io-supply: description: Phandle to the regulator node necessary for the I/O power. - See Documentation/devicetree/bindings/regulator/mt6323-regulator.txt - for details for the regulator setup on these boards. + See Documentation/devicetree/bindings/regulator/mt6323-regulator.txt for + details for the regulator setup on these boards. mediatek,mcm: type: boolean @@ -110,8 +122,8 @@ properties: resets: description: - Phandle pointing to the system reset controller with line index for - the ethsys. + Phandle pointing to the system reset controller with line index for the + ethsys. maxItems: 1 patternProperties: @@ -148,7 +160,7 @@ required: - reg allOf: - - $ref: "dsa.yaml#" + - $ref: dsa.yaml# - if: required: - mediatek,mcm From patchwork Sat Aug 13 15:44:12 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?QXLEsW7DpyDDnE5BTA==?= X-Patchwork-Id: 597120 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id DFC41C19F2D for ; Sat, 13 Aug 2022 15:45:48 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S239868AbiHMPpr (ORCPT ); Sat, 13 Aug 2022 11:45:47 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58898 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S239901AbiHMPpm (ORCPT ); Sat, 13 Aug 2022 11:45:42 -0400 Received: from sender4-op-o14.zoho.com (sender4-op-o14.zoho.com [136.143.188.14]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id EDF532FFE4; Sat, 13 Aug 2022 08:45:32 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1660405501; cv=none; d=zohomail.com; s=zohoarc; b=ErqpvuYoieUM4bDr40iitvrnhevKZD1muIBJaJW10Cvzxuvzfeaab4OIRdOIlzAWGlaXSVad4cFrChjbEys+XdiRoCZtgz6wnoBgE2Sl/Bi4JYDSMvvaaXMpvDfA4Cw9HdzRge8DW7VtMqzmpI6KWu7duCg+NWit3QjyKYzLNqQ= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1660405501; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:MIME-Version:Message-ID:References:Subject:To; bh=2jeVUYQX9J/2owiK6eAWTqPnBtbCS5zQ8DbyaccFKw4=; b=dgyzKOuqGpcvUgaeqi8tLo9TqVzFnNp5sfyuvARuehEijDND8GpMGGAMz7qrywxcROGC72cj0AiD8bsi28I7gRWM902Mes0/jV3wCQbf1oY2eoV+ZxbcVRtnKnJPjJ6oNrp4qUVoXciwLzvBVsnW+ZX8Q/9memcs8OihdMLJKrs= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass header.i=arinc9.com; spf=pass smtp.mailfrom=arinc.unal@arinc9.com; dmarc=pass header.from= DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; t=1660405501; s=zmail; d=arinc9.com; i=arinc.unal@arinc9.com; h=From:From:To:To:Cc:Cc:Subject:Subject:Date:Date:Message-Id:Message-Id:In-Reply-To:References:MIME-Version:Content-Type:Content-Transfer-Encoding:Reply-To; bh=2jeVUYQX9J/2owiK6eAWTqPnBtbCS5zQ8DbyaccFKw4=; b=HIhGksqYfYrSyXo1fZDr2KdRk1HnkOVjwFMiLGaNpe6G3o+wZP4G2wf6kcvHvhfl rqIOt/5yM0gDAVmUPHVC8OpuZ5vOgH1BADx7n5oPP+Lj5LJNuF0aLGXZkdVTFMM843s PQLbrJWGgmfOT1u50KrebK6zKfktkSQhZnr7kEMo= Received: from arinc9-PC.lan (85.117.236.245 [85.117.236.245]) by mx.zohomail.com with SMTPS id 1660405500648584.308589731525; Sat, 13 Aug 2022 08:45:00 -0700 (PDT) From: =?utf-8?b?QXLEsW7DpyDDnE5BTA==?= To: Andrew Lunn , Vivien Didelot , Florian Fainelli , Vladimir Oltean , "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Matthias Brugger , Sean Wang , Landen Chao , DENG Qingfang , Frank Wunderlich , Luiz Angelo Daros de Luca , Sander Vanheule , =?utf-8?q?Ren=C3=A9_van_Dorst?= , Daniel Golle , erkin.bozoglu@xeront.com, Sergio Paracuellos Cc: netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-kernel@vger.kernel.org, =?utf-8?b?QXLEsW7DpyDDnE5BTA==?= Subject: [PATCH v2 4/7] dt-bindings: net: dsa: mediatek,mt7530: define port binding per compatible Date: Sat, 13 Aug 2022 18:44:12 +0300 Message-Id: <20220813154415.349091-5-arinc.unal@arinc9.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220813154415.349091-1-arinc.unal@arinc9.com> References: <20220813154415.349091-1-arinc.unal@arinc9.com> MIME-Version: 1.0 X-ZohoMailClient: External Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Define DSA port binding under each compatible device as each device requires different values for certain properties. Signed-off-by: Arınç ÜNAL --- .../bindings/net/dsa/mediatek,mt7530.yaml | 116 +++++++++++++----- 1 file changed, 87 insertions(+), 29 deletions(-) diff --git a/Documentation/devicetree/bindings/net/dsa/mediatek,mt7530.yaml b/Documentation/devicetree/bindings/net/dsa/mediatek,mt7530.yaml index cc87f48d4d07..ff51a2f6875f 100644 --- a/Documentation/devicetree/bindings/net/dsa/mediatek,mt7530.yaml +++ b/Documentation/devicetree/bindings/net/dsa/mediatek,mt7530.yaml @@ -130,35 +130,6 @@ properties: ethsys. maxItems: 1 -patternProperties: - "^(ethernet-)?ports$": - type: object - - patternProperties: - "^(ethernet-)?port@[0-9]+$": - type: object - description: Ethernet switch ports - - unevaluatedProperties: false - - properties: - reg: - description: - Port address described must be 5 or 6 for CPU port and from 0 - to 5 for user ports. - - allOf: - - $ref: dsa-port.yaml# - - if: - properties: - label: - items: - - const: cpu - then: - required: - - reg - - phy-mode - required: - compatible - reg @@ -189,6 +160,35 @@ allOf: - core-supply - io-supply + patternProperties: + "^(ethernet-)?ports$": + type: object + + patternProperties: + "^(ethernet-)?port@[0-9]+$": + type: object + description: Ethernet switch ports + + unevaluatedProperties: false + + properties: + reg: + description: + Port address described must be 5 or 6 for CPU port and from + 0 to 5 for user ports. + + allOf: + - $ref: dsa-port.yaml# + - if: + properties: + label: + items: + - const: cpu + then: + required: + - reg + - phy-mode + - if: properties: compatible: @@ -198,6 +198,35 @@ allOf: properties: mediatek,mcm: false + patternProperties: + "^(ethernet-)?ports$": + type: object + + patternProperties: + "^(ethernet-)?port@[0-9]+$": + type: object + description: Ethernet switch ports + + unevaluatedProperties: false + + properties: + reg: + description: + Port address described must be 5 or 6 for CPU port and from + 0 to 5 for user ports. + + allOf: + - $ref: dsa-port.yaml# + - if: + properties: + label: + items: + - const: cpu + then: + required: + - reg + - phy-mode + - if: properties: compatible: @@ -207,6 +236,35 @@ allOf: required: - mediatek,mcm + patternProperties: + "^(ethernet-)?ports$": + type: object + + patternProperties: + "^(ethernet-)?port@[0-9]+$": + type: object + description: Ethernet switch ports + + unevaluatedProperties: false + + properties: + reg: + description: + Port address described must be 5 or 6 for CPU port and from + 0 to 5 for user ports. + + allOf: + - $ref: dsa-port.yaml# + - if: + properties: + label: + items: + - const: cpu + then: + required: + - reg + - phy-mode + unevaluatedProperties: false examples: From patchwork Sat Aug 13 15:44:13 2022 Content-Type: text/plain; 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bh=jsLNwKu69dMoowXkaVBPR2TlA1Lu17rBjhIrh9GsaeU=; b=SRMEhb/h5L6+dlrsVv6DPRaXYXEM4U0TpzWSqh1iM7yNYEOxqTdPNi9iIiIdKA5G XhYQvb6Iw/1/Ex2zWzDsdmtzEhGKLutHpzGpvhvzFsONThLpqdAarrZzrvbIyDik+nq k7Tj1gcIv9U7R+eTT6l8P9gInbL+OcaBE89kMMtg= Received: from arinc9-PC.lan (85.117.236.245 [85.117.236.245]) by mx.zohomail.com with SMTPS id 1660405507469429.1380002259672; Sat, 13 Aug 2022 08:45:07 -0700 (PDT) From: =?utf-8?b?QXLEsW7DpyDDnE5BTA==?= To: Andrew Lunn , Vivien Didelot , Florian Fainelli , Vladimir Oltean , "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Matthias Brugger , Sean Wang , Landen Chao , DENG Qingfang , Frank Wunderlich , Luiz Angelo Daros de Luca , Sander Vanheule , =?utf-8?q?Ren=C3=A9_van_Dorst?= , Daniel Golle , erkin.bozoglu@xeront.com, Sergio Paracuellos Cc: netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-kernel@vger.kernel.org, =?utf-8?b?QXLEsW7DpyDDnE5BTA==?= Subject: [PATCH v2 5/7] dt-bindings: net: dsa: mediatek,mt7530: remove unnecesary lines Date: Sat, 13 Aug 2022 18:44:13 +0300 Message-Id: <20220813154415.349091-6-arinc.unal@arinc9.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220813154415.349091-1-arinc.unal@arinc9.com> References: <20220813154415.349091-1-arinc.unal@arinc9.com> MIME-Version: 1.0 X-ZohoMailClient: External Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Remove unnecessary lines as they are already included from the referred dsa.yaml. Signed-off-by: Arınç ÜNAL --- .../bindings/net/dsa/mediatek,mt7530.yaml | 27 ------------------- 1 file changed, 27 deletions(-) diff --git a/Documentation/devicetree/bindings/net/dsa/mediatek,mt7530.yaml b/Documentation/devicetree/bindings/net/dsa/mediatek,mt7530.yaml index ff51a2f6875f..a27cb4fa490f 100644 --- a/Documentation/devicetree/bindings/net/dsa/mediatek,mt7530.yaml +++ b/Documentation/devicetree/bindings/net/dsa/mediatek,mt7530.yaml @@ -162,15 +162,8 @@ allOf: patternProperties: "^(ethernet-)?ports$": - type: object - patternProperties: "^(ethernet-)?port@[0-9]+$": - type: object - description: Ethernet switch ports - - unevaluatedProperties: false - properties: reg: description: @@ -178,7 +171,6 @@ allOf: 0 to 5 for user ports. allOf: - - $ref: dsa-port.yaml# - if: properties: label: @@ -186,7 +178,6 @@ allOf: - const: cpu then: required: - - reg - phy-mode - if: @@ -200,15 +191,8 @@ allOf: patternProperties: "^(ethernet-)?ports$": - type: object - patternProperties: "^(ethernet-)?port@[0-9]+$": - type: object - description: Ethernet switch ports - - unevaluatedProperties: false - properties: reg: description: @@ -216,7 +200,6 @@ allOf: 0 to 5 for user ports. allOf: - - $ref: dsa-port.yaml# - if: properties: label: @@ -224,7 +207,6 @@ allOf: - const: cpu then: required: - - reg - phy-mode - if: @@ -238,15 +220,8 @@ allOf: patternProperties: "^(ethernet-)?ports$": - type: object - patternProperties: "^(ethernet-)?port@[0-9]+$": - type: object - description: Ethernet switch ports - - unevaluatedProperties: false - properties: reg: description: @@ -254,7 +229,6 @@ allOf: 0 to 5 for user ports. allOf: - - $ref: dsa-port.yaml# - if: properties: label: @@ -262,7 +236,6 @@ allOf: - const: cpu then: required: - - reg - phy-mode unevaluatedProperties: false From patchwork Sat Aug 13 15:44:15 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?QXLEsW7DpyDDnE5BTA==?= X-Patchwork-Id: 597118 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2CFA5C25B0F for ; Sat, 13 Aug 2022 15:46:37 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S239970AbiHMPqg (ORCPT ); Sat, 13 Aug 2022 11:46:36 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60130 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S239974AbiHMPqL (ORCPT ); Sat, 13 Aug 2022 11:46:11 -0400 Received: from sender4-op-o14.zoho.com (sender4-op-o14.zoho.com [136.143.188.14]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C93CE357E8; Sat, 13 Aug 2022 08:45:53 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1660405521; cv=none; d=zohomail.com; s=zohoarc; b=RLsdr3Yo716LCnIomaVyK4mCMUM7m4YtXAxHYSPrYOe9cpXKpnp5VPeerLCMFvHsLEJ2v5WB+5xAAT8Xf+zh/xOEJURMMO7HDxz0BF+m2ZWdMK7oUiuDv/lJIgEhS68NGsrUylukoE+Lp5G2ziOiP9J08zdQIvVIEiXXcxlt6OA= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1660405521; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:MIME-Version:Message-ID:References:Subject:To; bh=j22i5MR9w029DUAEHN8kKSEghHmcDwTXP1TjeGZr3iE=; b=VJGyfk7UEPTBXitTAZfKzAI+yBHOiGG0EPIoycbCKAOJK30YIvYHXEOfOMTMmj/GGPRVqJl3bnLh7BK0bsgKFEqwwO++NwU9P2zYU124gvlOooPoPavNNHEbIOME1feXsMnppB851UGnWNOrrSM26X2HLLw0vHR6DcKAuQ4rc5U= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass header.i=arinc9.com; spf=pass smtp.mailfrom=arinc.unal@arinc9.com; dmarc=pass header.from= DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; t=1660405521; s=zmail; d=arinc9.com; i=arinc.unal@arinc9.com; h=From:From:To:To:Cc:Cc:Subject:Subject:Date:Date:Message-Id:Message-Id:In-Reply-To:References:MIME-Version:Content-Type:Content-Transfer-Encoding:Reply-To; bh=j22i5MR9w029DUAEHN8kKSEghHmcDwTXP1TjeGZr3iE=; b=fiemmpknnmCY91rP8RGfJi0DaAClw47eDcCWZBbuyr8KbquGGCgV3kGTnSkff11l XcBnt2W5qMQLz5DoUzdSMpFO0I2qiUMyKHC1B0oFdKl/3XM9noKqLbkiSsZnPSuEIcI MHIRpSzRCV6dwXNA9aHyxia0TKQCw9Tlv06vTL44= Received: from arinc9-PC.lan (85.117.236.245 [85.117.236.245]) by mx.zohomail.com with SMTPS id 1660405521013543.4864287339316; Sat, 13 Aug 2022 08:45:21 -0700 (PDT) From: =?utf-8?b?QXLEsW7DpyDDnE5BTA==?= To: Andrew Lunn , Vivien Didelot , Florian Fainelli , Vladimir Oltean , "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Matthias Brugger , Sean Wang , Landen Chao , DENG Qingfang , Frank Wunderlich , Luiz Angelo Daros de Luca , Sander Vanheule , =?utf-8?q?Ren=C3=A9_van_Dorst?= , Daniel Golle , erkin.bozoglu@xeront.com, Sergio Paracuellos Cc: netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-kernel@vger.kernel.org, =?utf-8?b?QXLEsW7DpyDDnE5BTA==?= Subject: [PATCH v2 7/7] dt-bindings: net: dsa: mediatek, mt7530: update binding description Date: Sat, 13 Aug 2022 18:44:15 +0300 Message-Id: <20220813154415.349091-8-arinc.unal@arinc9.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220813154415.349091-1-arinc.unal@arinc9.com> References: <20220813154415.349091-1-arinc.unal@arinc9.com> MIME-Version: 1.0 X-ZohoMailClient: External Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Update the description of the binding. - Describe the switches, which SoCs they are in, or if they are standalone. - Explain the various ways of configuring MT7530's port 5. - Remove phy-mode = "rgmii-txid" from description. Same code path is followed for delayed rgmii and rgmii phy-mode on mtk_eth_soc.c. Signed-off-by: Arınç ÜNAL --- .../bindings/net/dsa/mediatek,mt7530.yaml | 97 ++++++++++++------- 1 file changed, 62 insertions(+), 35 deletions(-) diff --git a/Documentation/devicetree/bindings/net/dsa/mediatek,mt7530.yaml b/Documentation/devicetree/bindings/net/dsa/mediatek,mt7530.yaml index 530ef5a75a2f..cf6340d072df 100644 --- a/Documentation/devicetree/bindings/net/dsa/mediatek,mt7530.yaml +++ b/Documentation/devicetree/bindings/net/dsa/mediatek,mt7530.yaml @@ -13,41 +13,68 @@ maintainers: - Sean Wang description: | - Port 5 of mt7530 and mt7621 switch is muxed between: - 1. GMAC5: GMAC5 can interface with another external MAC or PHY. - 2. PHY of port 0 or port 4: PHY interfaces with an external MAC like 2nd GMAC - of the SOC. Used in many setups where port 0/4 becomes the WAN port. - Note: On a MT7621 SOC with integrated switch: 2nd GMAC can only connected to - GMAC5 when the gpios for RGMII2 (GPIO 22-33) are not used and not - connected to external component! - - Port 5 modes/configurations: - 1. Port 5 is disabled and isolated: An external phy can interface to the 2nd - GMAC of the SOC. - In the case of a build-in MT7530 switch, port 5 shares the RGMII bus with 2nd - GMAC and an optional external phy. Mind the GPIO/pinctl settings of the SOC! - 2. Port 5 is muxed to PHY of port 0/4: Port 0/4 interfaces with 2nd GMAC. - It is a simple MAC to PHY interface, port 5 needs to be setup for xMII mode - and RGMII delay. - 3. Port 5 is muxed to GMAC5 and can interface to an external phy. - Port 5 becomes an extra switch port. - Only works on platform where external phy TX<->RX lines are swapped. - Like in the Ubiquiti ER-X-SFP. - 4. Port 5 is muxed to GMAC5 and interfaces with the 2nd GAMC as 2nd CPU port. - Currently a 2nd CPU port is not supported by DSA code. - - Depending on how the external PHY is wired: - 1. normal: The PHY can only connect to 2nd GMAC but not to the switch - 2. swapped: RGMII TX, RX are swapped; external phy interface with the switch as - a ethernet port. But can't interface to the 2nd GMAC. - - Based on the DT the port 5 mode is configured. - - Driver tries to lookup the phy-handle of the 2nd GMAC of the master device. - When phy-handle matches PHY of port 0 or 4 then port 5 set-up as mode 2. - phy-mode must be set, see also example 2 below! - * mt7621: phy-mode = "rgmii-txid"; - * mt7623: phy-mode = "rgmii"; + There are two versions of MT7530, standalone and in a multi-chip module. + + MT7530 is a part of the multi-chip module in MT7620AN, MT7620DA, MT7620DAN, + MT7620NN, MT7621AT, MT7621DAT, MT7621ST and MT7623AI SoCs. + + MT7530 in MT7620AN, MT7620DA, MT7620DAN and MT7620NN SoCs has got 10/100 PHYs + and the switch registers are directly mapped into SoC's memory map rather than + using MDIO. There is currently no support for this. + + There is only the standalone version of MT7531. + + Port 5 on MT7530 has got various ways of configuration. + + For standalone MT7530: + + - Port 5 can be used as a CPU port. + + - PHY 0 or 4 of the switch can be muxed to connect to the gmac of the SoC + which port 5 is wired to. Usually used for connecting the wan port + directly to the CPU to achieve 2 Gbps routing in total. + + The driver looks up the reg on the ethernet-phy node which the phy-handle + property refers to on the gmac node to mux the specified phy. + + The driver requires the gmac of the SoC to have "mediatek,eth-mac" as the + compatible string and the reg must be 1. So, for now, only gmac1 of an + MediaTek SoC can benefit this. Banana Pi BPI-R2 suits this. + Check out example 5 for a similar configuration. + + - Port 5 can be wired to an external phy. Port 5 becomes a DSA slave. + Check out example 7 for a similar configuration. + + For multi-chip module MT7530: + + - Port 5 can be used as a CPU port. + + - PHY 0 or 4 of the switch can be muxed to connect to gmac1 of the SoC. + Usually used for connecting the wan port directly to the CPU to achieve 2 + Gbps routing in total. + + The driver looks up the reg on the ethernet-phy node which the phy-handle + property refers to on the gmac node to mux the specified phy. + + For the MT7621 SoCs, rgmii2 group must be claimed with rgmii2 function. + Check out example 5. + + - In case of an external phy wired to gmac1 of the SoC, port 5 must not be + enabled. + + In case of muxing PHY 0 or 4, the external phy must not be enabled. + + For the MT7621 SoCs, rgmii2 group must be claimed with rgmii2 function. + Check out example 6. + + - Port 5 can be muxed to an external phy. Port 5 becomes a DSA slave. + The external phy must be wired TX to TX to gmac1 of the SoC for this to + work. Ubiquiti EdgeRouter X SFP is wired this way. + + Muxing PHY 0 or 4 won't work when the external phy is connected TX to TX. + + For the MT7621 SoCs, rgmii2 group must be claimed with gpio function. + Check out example 7. properties: compatible: