From patchwork Wed Feb 6 04:35:15 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 157552 Delivered-To: patch@linaro.org Received: by 2002:a02:48:0:0:0:0:0 with SMTP id 69csp5974546jaa; Tue, 5 Feb 2019 20:36:04 -0800 (PST) X-Google-Smtp-Source: AHgI3IZK98CTIDvYUxmzamH9E9m8R6jO6CKnKZSmPXVRGRCAAe0/jNgJ9TupCorUN8s/cRMwwv4P X-Received: by 2002:a81:4cd2:: with SMTP id z201mr7215122ywa.161.1549427764272; Tue, 05 Feb 2019 20:36:04 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1549427764; cv=none; d=google.com; s=arc-20160816; b=CnphfeVf/wRBKeEwm4J6QzOsUoDCkZnbl8LBRfGjE5gZrrb7GouWtqnBNZh2mHsjbL dNFKnxJack/9SG2HrtuHpDHytTB6n+hToP3pvxQRb5xXTN7aktS9/Fuui8RDS94xeVk4 i5/RvYEgZim433xGidWMXw6CGiARt97c1S+X2j6IMeF0EH8DWsa1pUfeb+u4HS2DvHTT ne76ZDP/e8wfoyLjO31i2TSKYx5TLWrKGfgS9GNGyBqYEXCtI6Z64fIHRHFjxOVmUMDE bi3oU8Ftd2Jk0nB/m8TRq1/8bK2U252Q9XkNZofsXf5u8EsSEdxNTNKuVg9x8E2go7Rx Ce0Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:subject:references:in-reply-to :message-id:date:to:from:dkim-signature; bh=lOehrnojtFNyYlkb98dSPwcNQ32zwCOQaPJmEznAG20=; b=VJYB+O3DmLrrkBfurmS/Pd5O/ayf/4uI37/9WVrDfAUSIsXF0M2CIip/iM81B1fCs0 qF3zaqNqz4bZO9kSgTKkt6k7Yg5+gpAtpGWJlt27jm7lJ/Pauv5HUTb1AhFQtuGr5uEv igM6O60TFOQybdD1NjJP0YzeU6vUq5LMAUFs9DPyrVs46RpXcqOv9+yAXhdScauUakyB O9yRYNvjbBV68LY/9OS3CZos5vRCCR5CMngK+egi2sK9gGUAa24ZK5P1Q5gx/GK7AC9T LmVSbRS1RgPeC3KpI+bIDZv5WzU5Ba6v/ZcO9L35eNPfvaLitm3ze7ZO+YRwoYaIT9MY fD6Q== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=cFsorDID; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[81.133.38.158]) by smtp.gmail.com with ESMTPSA id x186sm30255006wmg.41.2019.02.05.20.35.24 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Tue, 05 Feb 2019 20:35:24 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Date: Wed, 6 Feb 2019 04:35:15 +0000 Message-Id: <20190206043516.11462-2-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.2 In-Reply-To: <20190206043516.11462-1-richard.henderson@linaro.org> References: <20190206043516.11462-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::334 Subject: [Qemu-devel] [PULL 1/2] tcg: add early clober modifier in atomic16_cmpxchg on aarch64 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, Catherine Ho Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Catherine Ho Without this patch, gcc might up the Input/Output registers and cause unpredictable error. Fixes: 1ec182c33379 ("target/arm: Convert to HAVE_CMPXCHG128") Signed-off-by: Catherine Ho Message-Id: <1548838794-23757-1-git-send-email-catherine.hecx@gmail.com> Signed-off-by: Richard Henderson --- include/qemu/atomic128.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- 2.17.2 diff --git a/include/qemu/atomic128.h b/include/qemu/atomic128.h index a6af22ff10..ddd0d55d31 100644 --- a/include/qemu/atomic128.h +++ b/include/qemu/atomic128.h @@ -68,7 +68,7 @@ static inline Int128 atomic16_cmpxchg(Int128 *ptr, Int128 cmp, Int128 new) "cbnz %w[tmp], 0b\n" "1:" : [mem] "+m"(*ptr), [tmp] "=&r"(tmp), - [oldl] "=&r"(oldl), [oldh] "=r"(oldh) + [oldl] "=&r"(oldl), [oldh] "=&r"(oldh) : [cmpl] "r"(cmpl), [cmph] "r"(cmph), [newl] "r"(newl), [newh] "r"(newh) : "memory", "cc"); From patchwork Wed Feb 6 04:35:16 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 157553 Delivered-To: patch@linaro.org Received: by 2002:a02:48:0:0:0:0:0 with SMTP id 69csp5974566jaa; Tue, 5 Feb 2019 20:36:06 -0800 (PST) X-Google-Smtp-Source: AHgI3IaJcVcJc45FgfJxngbYcz9jx4DF1CJc20JREEsMXNOAPvevRSGc4o2vE9PH2WaIIHkLybS7 X-Received: by 2002:a81:6246:: with SMTP id w67mr7018120ywb.60.1549427765949; Tue, 05 Feb 2019 20:36:05 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1549427765; cv=none; d=google.com; s=arc-20160816; b=NqrstuZIL6VxY5R8RqZGdTpTSw5g4/mOWgOVuH8A/8zZWUvk9ZEHDXRaDPVH/kU9wH LTHGBJPCpiNcxr1GF4TxZbBEvITnyrhkVfRT3ME35+iy0BxR4nnDbJxR790966rk3VzS okgg5AnF0vpq/9d0jiWOJz1qnvaIOkJohSLCogIXosvwF4Be/nUToIoAV6pVCOBKB6G1 Jwas35wY7kWrpXYess70pmIIsBzCSbMzU36H/O73MjVTrXMwWFdFJC759rHST0EtLd9n 11Ee6t4d0faW5v9PfAvJEOzAPK2COQ3TOOjtJ1+zExI/aqsg5F+8H47/IiLAzIOQZjUs fbBg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:subject:references:in-reply-to :message-id:date:to:from:dkim-signature; bh=G7xyjQ5I4ikKCmR0R0iMN0Nm7+eGJ4RmAdhai8noOjI=; b=okklgfSOKqUdWB++GKFJNWj1lAIC8gTFbI4huNJs9wJUwr/32o07oDKSgFqUNK+44Y Qn+fnAUWrH+/RtgN+xZaG1UKkvo9RrTTcqCajrJEKs4J8UIgR5eyrQNg8YOIMhOuie3+ poHcopyvdiPFtI4r5A7pedWOLVabBY3wa9OlSkOFvaoEoRnsAVQxyr3+p5jQhGnZWgzy ycMr6ON8WqIgLI14AYM0MNb0weSTQsWm02r7a2cVvm3L29Pu5zryapflPS6rgL++qxkM c6IfNjg0ndTT/VClqfrU70peoCWzqmkF/29MWxlujwj2TJn3JYuU2Cmz1KISmNPZI7p1 NfvA== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=xEWay8Z1; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[81.133.38.158]) by smtp.gmail.com with ESMTPSA id x186sm30255006wmg.41.2019.02.05.20.35.26 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Tue, 05 Feb 2019 20:35:26 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Date: Wed, 6 Feb 2019 04:35:16 +0000 Message-Id: <20190206043516.11462-3-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.2 In-Reply-To: <20190206043516.11462-1-richard.henderson@linaro.org> References: <20190206043516.11462-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::334 Subject: [Qemu-devel] [PULL 2/2] accel/tcg: Consider cluster index in tb_lookup__cpu_state() X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Peter Maydell In commit f7b78602fdc6c6e4be we added the CPU cluster number to the cflags field of the TB hash; this included adding it to the value kept in tb->cflags, since we pass that field directly into the hash calculation in some places. Unfortunately we forgot to check whether other parts of the code were doing comparisons against tb->cflags that would need to be updated. It turns out that there is exactly one such place: the tb_lookup__cpu_state() function checks whether the TB it has found in the tb_jmp_cache has a tb->cflags matching the cf_mask that is passed in. The tb->cflags has the cluster_index in it but the cf_mask does not. Hoist the "add cluster index to the cf_mask" code up from tb_htable_lookup() to tb_lookup__cpu_state() so it can be considered in the "did this TB match in the jmp cache" condition, as well as when we do the full hash lookup by physical PC, flags, etc. (tb_htable_lookup() is only called from tb_lookup__cpu_state(), so this change doesn't require any further knock-on changes.) Fixes: f7b78602fdc6c6e4be ("accel/tcg: Add cluster number to TCG TB hash") Tested-by: Cleber Rosa Tested-by: Mark Cave-Ayland Reported-by: Howard Spoelstra Reported-by: Cleber Rosa Signed-off-by: Peter Maydell Message-Id: <20190205151810.571-1-peter.maydell@linaro.org> Reviewed-by: Richard Henderson Signed-off-by: Richard Henderson --- include/exec/tb-lookup.h | 4 ++++ accel/tcg/cpu-exec.c | 3 --- 2 files changed, 4 insertions(+), 3 deletions(-) -- 2.17.2 diff --git a/include/exec/tb-lookup.h b/include/exec/tb-lookup.h index 492cb68289..26921b6daf 100644 --- a/include/exec/tb-lookup.h +++ b/include/exec/tb-lookup.h @@ -28,6 +28,10 @@ tb_lookup__cpu_state(CPUState *cpu, target_ulong *pc, target_ulong *cs_base, cpu_get_tb_cpu_state(env, pc, cs_base, flags); hash = tb_jmp_cache_hash_func(*pc); tb = atomic_rcu_read(&cpu->tb_jmp_cache[hash]); + + cf_mask &= ~CF_CLUSTER_MASK; + cf_mask |= cpu->cluster_index << CF_CLUSTER_SHIFT; + if (likely(tb && tb->pc == *pc && tb->cs_base == *cs_base && diff --git a/accel/tcg/cpu-exec.c b/accel/tcg/cpu-exec.c index 7cf1292546..60d87d5a19 100644 --- a/accel/tcg/cpu-exec.c +++ b/accel/tcg/cpu-exec.c @@ -325,9 +325,6 @@ TranslationBlock *tb_htable_lookup(CPUState *cpu, target_ulong pc, struct tb_desc desc; uint32_t h; - cf_mask &= ~CF_CLUSTER_MASK; - cf_mask |= cpu->cluster_index << CF_CLUSTER_SHIFT; - desc.env = (CPUArchState *)cpu->env_ptr; desc.cs_base = cs_base; desc.flags = flags;