From patchwork Mon Aug 22 23:32:57 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 599233 Delivered-To: patch@linaro.org Received: by 2002:a05:7000:4388:0:0:0:0 with SMTP id w8csp2041758mae; Mon, 22 Aug 2022 16:53:50 -0700 (PDT) X-Google-Smtp-Source: AA6agR5kllNtqA4I+/k81qLqKNh+h65YWamS1zCA+aQMLWzTzbkrp38B/seaDLeoXIRjOmmKeVL4 X-Received: by 2002:a05:6214:c6c:b0:496:2772:3217 with SMTP id t12-20020a0562140c6c00b0049627723217mr17849195qvj.105.1661212430732; Mon, 22 Aug 2022 16:53:50 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1661212430; cv=none; d=google.com; s=arc-20160816; b=XxCNCy6NFRb2RvGgRrnLhTtOLHeTCsD2hob4h9P5kJYYgXmLjZGxfGMi8bnKhn7+j7 CdWagigGY0R1TSPvma4mJonirWwNlbmOsQRZbXcderZrYCi1vdh+ZSxoGD5fR8f3lyLC CDwMGfPqbTvRsMhKTG0WFTjY2NPFR8by89TwzYeqOLc4ZsHcQxZyPOQ+KHCVnacKru6M jMAKi6EOTWpDLuY3GhlKkV+3GNrZp16hnu0J4fUpn8wrt8oLL5/JDIQxyKAsTqNQ+qsU 89s2QVb+bI8DKniDuHio1Pn4UrPwAxWOy6Yh9nyc4u4PLx9LFykSOJMzoZd5fSCMJnF0 IsVQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=nqq51of1Uw+NqxfwJPSf3L4cXjdgw4EFZNmf1jtw0gc=; b=0jICfcnLl/mf50gqYaZBIwST+g4VqDhToFrhLJ8EWAKQyEvFkeSAZa+x4SVZwbfCw6 Ki6yx05TKhGd4S1GjcWY5luzuyq1J/jpm8FJeGkk+mjVd/beHSOE5o78bU8oHebzNi5x yEsEjMmI4kCTB4v77Gd/UHk817O6n/rkQ+RLlLFt+6EfCtJEtOaAMuwoh8GbvVo/vhgF YSmGh0alBAnCPWsgc+/saewVE4fnq8eoizF1JSizzsFxniJe6hC3/vwxPn3NE0cWfAqM ylLUPvKKOqtzzlBS0qepYqUUQBsjJQs9TazmkJuSyapQIBgu5O5qySCMurQifwEwAuDI Osyw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=H2JIp7N6; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id r15-20020a05620a298f00b006bb0cc69fb9si5953807qkp.419.2022.08.22.16.53.50 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Mon, 22 Aug 2022 16:53:50 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=H2JIp7N6; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:52480 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1oQHEs-0000xb-93 for patch@linaro.org; Mon, 22 Aug 2022 19:53:50 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:41734) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1oQGv6-0005f2-Sl for qemu-devel@nongnu.org; Mon, 22 Aug 2022 19:33:26 -0400 Received: from mail-pj1-x102e.google.com ([2607:f8b0:4864:20::102e]:44735) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1oQGv5-0007EC-6O for qemu-devel@nongnu.org; Mon, 22 Aug 2022 19:33:24 -0400 Received: by mail-pj1-x102e.google.com with SMTP id r15-20020a17090a1bcf00b001fabf42a11cso12913935pjr.3 for ; Mon, 22 Aug 2022 16:33:22 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc; bh=nqq51of1Uw+NqxfwJPSf3L4cXjdgw4EFZNmf1jtw0gc=; b=H2JIp7N66noHLD+kY9DnbFTfQ7OSrU9aTw+QomlB5bmnMqJo2KPDtMDOhCSTQR40E6 JPtm9doB6PpfS1+hCyu5OK0J26X85I5XfQOTI2tIomtxnFgVj4M7jlmBYA+y5Ck+DYnh eULXEFpmf2XCXg/CEPXnNUriYQ8nRlZVdubHTkV73GRMknwecEp8VcnGflmxMR5I0Zsn XncMacOS5KgrtbhbTh3++N0nf4IDBe7SbaC/FrVB/Cfoa+CzfOuI2tfRmvUNLsKgskAh brYM8Zr5NozGDkGuV793z8CuV6652IQgN2P4fqwuLSUAQznh77JT11BO+1hqReIKcaCR BoxQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc; bh=nqq51of1Uw+NqxfwJPSf3L4cXjdgw4EFZNmf1jtw0gc=; b=rtumStbEaB9KlCRBVIrzFDZxDyu/oe7htzVLAwQaUz72bvkzN5xFbDC9rD/CMk2wkY eXJR/meZ2F+gvXsCY94NGJSPeOjDB0JdPFawVffDcVFMf3ebnGA267gC4yUzDn+b0AxF 8HXjmkDEjM75yJ9M7k4HD7JTw2NHs0p7oxrC3Xn72GZ7P4sUyD095fIoRf5VtXuPUNnt wg5Xa0nYntleLFXjKXjQXg+nlYnkR3xZWHKeYzHyaiMWH6V6JG7hjxUz2HbYjp/nGRyK pAEUSR0TeFgPiBpTK07tw9THFHTzArmmNLrDibQfvfzPRSG42S0xMiGHXcDzAe1B+ELU sIqQ== X-Gm-Message-State: ACgBeo3T+s4lKzlrg+l5KOBVyoRFOrHh3xiN7DJcY2IQyYOeV28xZTeX UVsy0+NjmOu3eIPScfYGy3ATGfxhzfZm0Q== X-Received: by 2002:a17:902:f550:b0:172:fe5d:aa0a with SMTP id h16-20020a170902f55000b00172fe5daa0amr1484369plf.170.1661211201767; Mon, 22 Aug 2022 16:33:21 -0700 (PDT) Received: from stoup.. ([2602:47:d49d:ec01:c3f1:b74f:5edd:63af]) by smtp.gmail.com with ESMTPSA id 82-20020a621555000000b0053655af14easm5133124pfv.45.2022.08.22.16.33.20 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 22 Aug 2022 16:33:21 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH 01/22] target/i386: Return bool from disas_insn Date: Mon, 22 Aug 2022 16:32:57 -0700 Message-Id: <20220822233318.1728621-2-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220822233318.1728621-1-richard.henderson@linaro.org> References: <20220822233318.1728621-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::102e; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x102e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Instead of returning the new pc, which is present in DisasContext, return true if an insn was translated. This is false when we detect a page crossing and must undo the insn under translation. Signed-off-by: Richard Henderson --- target/i386/tcg/translate.c | 42 +++++++++++++++++++------------------ 1 file changed, 22 insertions(+), 20 deletions(-) diff --git a/target/i386/tcg/translate.c b/target/i386/tcg/translate.c index a9a9a9de6e..2bdbfc6ddf 100644 --- a/target/i386/tcg/translate.c +++ b/target/i386/tcg/translate.c @@ -4552,7 +4552,7 @@ static void gen_sse(CPUX86State *env, DisasContext *s, int b) /* convert one instruction. s->base.is_jmp is set if the translation must be stopped. Return the next pc value */ -static target_ulong disas_insn(DisasContext *s, CPUState *cpu) +static bool disas_insn(DisasContext *s, CPUState *cpu) { CPUX86State *env = cpu->env_ptr; int b, prefixes; @@ -4582,12 +4582,13 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu) return s->pc; case 2: /* Restore state that may affect the next instruction. */ + s->pc = s->base.pc_next; s->cc_op_dirty = orig_cc_op_dirty; s->cc_op = orig_cc_op; s->base.num_insns--; tcg_remove_ops_after(s->prev_insn_end); s->base.is_jmp = DISAS_TOO_MANY; - return s->base.pc_next; + return false; default: g_assert_not_reached(); } @@ -8496,13 +8497,13 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu) default: goto unknown_op; } - return s->pc; + return true; illegal_op: gen_illegal_opcode(s); - return s->pc; + return true; unknown_op: gen_unknown_opcode(env, s); - return s->pc; + return true; } void tcg_x86_init(void) @@ -8667,7 +8668,6 @@ static void i386_tr_insn_start(DisasContextBase *dcbase, CPUState *cpu) static void i386_tr_translate_insn(DisasContextBase *dcbase, CPUState *cpu) { DisasContext *dc = container_of(dcbase, DisasContext, base); - target_ulong pc_next; #ifdef TARGET_VSYSCALL_PAGE /* @@ -8680,21 +8680,23 @@ static void i386_tr_translate_insn(DisasContextBase *dcbase, CPUState *cpu) } #endif - pc_next = disas_insn(dc, cpu); - dc->base.pc_next = pc_next; + if (disas_insn(dc, cpu)) { + target_ulong pc_next = dc->pc; + dc->base.pc_next = pc_next; - if (dc->base.is_jmp == DISAS_NEXT) { - if (dc->flags & (HF_TF_MASK | HF_INHIBIT_IRQ_MASK)) { - /* - * If single step mode, we generate only one instruction and - * generate an exception. - * If irq were inhibited with HF_INHIBIT_IRQ_MASK, we clear - * the flag and abort the translation to give the irqs a - * chance to happen. - */ - dc->base.is_jmp = DISAS_TOO_MANY; - } else if (!is_same_page(&dc->base, pc_next)) { - dc->base.is_jmp = DISAS_TOO_MANY; + if (dc->base.is_jmp == DISAS_NEXT) { + if (dc->flags & (HF_TF_MASK | HF_INHIBIT_IRQ_MASK)) { + /* + * If single step mode, we generate only one instruction and + * generate an exception. + * If irq were inhibited with HF_INHIBIT_IRQ_MASK, we clear + * the flag and abort the translation to give the irqs a + * chance to happen. + */ + dc->base.is_jmp = DISAS_TOO_MANY; + } else if (!is_same_page(&dc->base, pc_next)) { + dc->base.is_jmp = DISAS_TOO_MANY; + } } } } From patchwork Mon Aug 22 23:32:58 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 599222 Delivered-To: patch@linaro.org Received: by 2002:a05:7000:4388:0:0:0:0 with SMTP id w8csp2038191mae; Mon, 22 Aug 2022 16:44:23 -0700 (PDT) X-Google-Smtp-Source: AA6agR5OP9tWjc8PARvZXzHja7ld5Pd53ERy/GqQUSSmh1MSFIWG4DP7dGKy/G1LCsZJ8miSRsS/ X-Received: by 2002:a05:6214:27ee:b0:496:f17b:7459 with SMTP id jt14-20020a05621427ee00b00496f17b7459mr3523748qvb.101.1661211863675; Mon, 22 Aug 2022 16:44:23 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1661211863; cv=none; d=google.com; s=arc-20160816; b=zSLYaTddzl+DTLvsOlV9EN5rUIdjKrvWTyJGZmSUeloCGsI979ncb73CxdLLRfoNhP om1kMGLzNypISsAK1Ik+XCfsIxkZq7yn5vHJxA0K63+JTXaI3g0wSL8BOMkwPwXIkWmT +Bs/ABFe/YPY79cUh4/uE/YY060WKcbe7dmU9zHeZjfh/QCKahWG9SyPAmFJodo4j4WZ YrmlLB4USSShhGmq25atHaPGHhMrMTTL5fM4d3m1W7NJcK83uwRn7fkuF9jD69K+g3EZ OK4joxFxYBcf3YQZYiYOBZRzuTRGs9OHGzqfjMMTOYw7RVEiAtRCc+zGBBWDS9qm8cuE kH3g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=hfnfb8LitWZ0KHDEFtzpnt/n/IbHJVoM5UOy23HOnjo=; b=FgEXg7uF/WQohkTWx5etuWvCfOz46TKDCs7csbF8HsnP00tTBqPyMQHXeMTaoTnElN ju0UtE9yGplT68uhsGl7Y6JVDeHsVbKgtxwTeWKSm4GvWd+4vxwEyyx+Uv3KZgBRTzpT L9WSutYjTw+ufAgBveDKmPovfr95lf/bcNYSs2D8JIwBmNurrnwTf1UT+zBindfdQT4z VBeuKg+x2HxSOcW9abaLa8JXsr5MmESAMegqXqlk37K4EUYSacS1KFR59rPyTgejns2u AqdDSrN5XDQIb4BvlC0HL5i26n/gp5kD4CSZTCyTaZ5Y/jp4EX8FeoUVLmOvODDQNVFi 7yvQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=ZSzZd+g+; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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([2602:47:d49d:ec01:c3f1:b74f:5edd:63af]) by smtp.gmail.com with ESMTPSA id 82-20020a621555000000b0053655af14easm5133124pfv.45.2022.08.22.16.33.21 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 22 Aug 2022 16:33:22 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH 02/22] target/i386: Remove cur_eip argument to gen_exception Date: Mon, 22 Aug 2022 16:32:58 -0700 Message-Id: <20220822233318.1728621-3-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220822233318.1728621-1-richard.henderson@linaro.org> References: <20220822233318.1728621-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::436; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x436.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" All callers pass s->base.pc_next - s->cs_base, which we can just as well compute within the function. Note the special case of EXCP_VSYSCALL in which s->cs_base didn't have the subtraction, but cs_base is always zero in 64-bit mode, when vsyscall is used. Signed-off-by: Richard Henderson --- target/i386/tcg/translate.c | 26 +++++++++++++------------- 1 file changed, 13 insertions(+), 13 deletions(-) diff --git a/target/i386/tcg/translate.c b/target/i386/tcg/translate.c index 2bdbfc6ddf..f6a861e10c 100644 --- a/target/i386/tcg/translate.c +++ b/target/i386/tcg/translate.c @@ -1332,10 +1332,10 @@ static void gen_helper_fp_arith_STN_ST0(int op, int opreg) } } -static void gen_exception(DisasContext *s, int trapno, target_ulong cur_eip) +static void gen_exception(DisasContext *s, int trapno) { gen_update_cc_op(s); - gen_jmp_im(s, cur_eip); + gen_jmp_im(s, s->base.pc_next - s->cs_base); gen_helper_raise_exception(cpu_env, tcg_const_i32(trapno)); s->base.is_jmp = DISAS_NORETURN; } @@ -1344,13 +1344,13 @@ static void gen_exception(DisasContext *s, int trapno, target_ulong cur_eip) the instruction is known, but it isn't allowed in the current cpu mode. */ static void gen_illegal_opcode(DisasContext *s) { - gen_exception(s, EXCP06_ILLOP, s->base.pc_next - s->cs_base); + gen_exception(s, EXCP06_ILLOP); } /* Generate #GP for the current instruction. */ static void gen_exception_gpf(DisasContext *s) { - gen_exception(s, EXCP0D_GPF, s->base.pc_next - s->cs_base); + gen_exception(s, EXCP0D_GPF); } /* Check for cpl == 0; if not, raise #GP and return false. */ @@ -3148,7 +3148,7 @@ static void gen_sse(CPUX86State *env, DisasContext *s, int b) } /* simple MMX/SSE operation */ if (s->flags & HF_TS_MASK) { - gen_exception(s, EXCP07_PREX, s->base.pc_next - s->cs_base); + gen_exception(s, EXCP07_PREX); return; } if (s->flags & HF_EM_MASK) { @@ -5929,7 +5929,7 @@ static bool disas_insn(DisasContext *s, CPUState *cpu) if (s->flags & (HF_EM_MASK | HF_TS_MASK)) { /* if CR0.EM or CR0.TS are set, generate an FPU exception */ /* XXX: what to do if illegal op ? */ - gen_exception(s, EXCP07_PREX, s->base.pc_next - s->cs_base); + gen_exception(s, EXCP07_PREX); break; } modrm = x86_ldub_code(env, s); @@ -7154,7 +7154,7 @@ static bool disas_insn(DisasContext *s, CPUState *cpu) goto illegal_op; val = x86_ldub_code(env, s); if (val == 0) { - gen_exception(s, EXCP00_DIVZ, s->base.pc_next - s->cs_base); + gen_exception(s, EXCP00_DIVZ); } else { gen_helper_aam(cpu_env, tcg_const_i32(val)); set_cc_op(s, CC_OP_LOGICB); @@ -7188,7 +7188,7 @@ static bool disas_insn(DisasContext *s, CPUState *cpu) case 0x9b: /* fwait */ if ((s->flags & (HF_MP_MASK | HF_TS_MASK)) == (HF_MP_MASK | HF_TS_MASK)) { - gen_exception(s, EXCP07_PREX, s->base.pc_next - s->cs_base); + gen_exception(s, EXCP07_PREX); } else { gen_helper_fwait(cpu_env); } @@ -8245,7 +8245,7 @@ static bool disas_insn(DisasContext *s, CPUState *cpu) goto illegal_op; } if ((s->flags & HF_EM_MASK) || (s->flags & HF_TS_MASK)) { - gen_exception(s, EXCP07_PREX, s->base.pc_next - s->cs_base); + gen_exception(s, EXCP07_PREX); break; } gen_lea_modrm(env, s, modrm); @@ -8258,7 +8258,7 @@ static bool disas_insn(DisasContext *s, CPUState *cpu) goto illegal_op; } if ((s->flags & HF_EM_MASK) || (s->flags & HF_TS_MASK)) { - gen_exception(s, EXCP07_PREX, s->base.pc_next - s->cs_base); + gen_exception(s, EXCP07_PREX); break; } gen_lea_modrm(env, s, modrm); @@ -8270,7 +8270,7 @@ static bool disas_insn(DisasContext *s, CPUState *cpu) goto illegal_op; } if (s->flags & HF_TS_MASK) { - gen_exception(s, EXCP07_PREX, s->base.pc_next - s->cs_base); + gen_exception(s, EXCP07_PREX); break; } gen_lea_modrm(env, s, modrm); @@ -8283,7 +8283,7 @@ static bool disas_insn(DisasContext *s, CPUState *cpu) goto illegal_op; } if (s->flags & HF_TS_MASK) { - gen_exception(s, EXCP07_PREX, s->base.pc_next - s->cs_base); + gen_exception(s, EXCP07_PREX); break; } gen_helper_update_mxcsr(cpu_env); @@ -8674,7 +8674,7 @@ static void i386_tr_translate_insn(DisasContextBase *dcbase, CPUState *cpu) * Detect entry into the vsyscall page and invoke the syscall. */ if ((dc->base.pc_next & TARGET_PAGE_MASK) == TARGET_VSYSCALL_PAGE) { - gen_exception(dc, EXCP_VSYSCALL, dc->base.pc_next); + gen_exception(dc, EXCP_VSYSCALL); dc->base.pc_next = dc->pc + 1; return; } From patchwork Mon Aug 22 23:32:59 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 599224 Delivered-To: patch@linaro.org Received: by 2002:a05:7000:4388:0:0:0:0 with SMTP id w8csp2039496mae; Mon, 22 Aug 2022 16:47:54 -0700 (PDT) X-Google-Smtp-Source: AA6agR4sB4IyqpDc/zgGePs/i2P+mdG5WjWzuXDzrTDULuJfHdslBiAbEGMPTv6TQerTXf33kz8K X-Received: by 2002:ac8:5fcc:0:b0:343:4dd6:b388 with SMTP id k12-20020ac85fcc000000b003434dd6b388mr17379668qta.586.1661212074078; Mon, 22 Aug 2022 16:47:54 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1661212074; cv=none; d=google.com; s=arc-20160816; b=uH2NJTpgg3qYKJd7HJlGcLcKr1V3KtSngMrHHPwaZ6wgXkHtKXjtAcdVJuNspJxlFo L8o8k2LjcYLRYxuE9xLkDHCSlRGjQYo6RAWjmlvW0r5LoSsgRfHysubeTl8+oLkrIx4F 1cEJCVyrSDqL1Skp6xovWfZc68WsS5H3AeCdub7oDRjWPanum5wAmLt0ha1e+/BV51AK 4zkBpgHmupuUqFy20eDs+28pdjD6tRse9Ehj5cqizvBbRzEH2j76cKkEpl3/oZWGaijo JXGgotPL94ThbF7elhOGReA/XUCsX7lJXTl/DF59ez7khFqLuMb+qF0kKFXVR69yHxGe N7zQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=I0Ab1V06eTSd++du4BEeVdBOxUXl44KJmulBDPQpHyo=; b=cX4nbIScvY8Znil7GeQjzk2+lTXS3akMg2sW1jCwjOnI6AUykRKaH+lPjzDgrsXoJz Aum3AtDVD4AVCaCjibbJU0Ch9CS6R1MihGH/jEq7MHnmnYndVirZIjKDC++CJkMGr1fK 64iTmxpv/GDlZ2pg1TcV8gnVHXT1YPMCgSqJeNcWGafexXXK6/gnkGCFBG6EAC/AhxWn wo9WLbyriGXVrrJNZ8Sy6oNHt27YJPEwSbWwD5JBmLL3rbsb0fEnj/b1y/8Q8FJzqHcL 8vMoALevyJwUy7NNT6XKq45ffcIBpjlrY9A/5BsHGsq0zE7Ugm/gMPJpB1hZJR9iVaxI LEnA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=vy7AWQbX; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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([2602:47:d49d:ec01:c3f1:b74f:5edd:63af]) by smtp.gmail.com with ESMTPSA id 82-20020a621555000000b0053655af14easm5133124pfv.45.2022.08.22.16.33.22 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 22 Aug 2022 16:33:23 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH 03/22] target/i386: Remove cur_eip, next_eip arguments to gen_interrupt Date: Mon, 22 Aug 2022 16:32:59 -0700 Message-Id: <20220822233318.1728621-4-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220822233318.1728621-1-richard.henderson@linaro.org> References: <20220822233318.1728621-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::1036; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x1036.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" All callers pass s->base.pc_next and s->pc, which we can just as well compute within the function. Signed-off-by: Richard Henderson --- target/i386/tcg/translate.c | 13 ++++++------- 1 file changed, 6 insertions(+), 7 deletions(-) diff --git a/target/i386/tcg/translate.c b/target/i386/tcg/translate.c index f6a861e10c..d3b16ea28c 100644 --- a/target/i386/tcg/translate.c +++ b/target/i386/tcg/translate.c @@ -2602,13 +2602,12 @@ static void gen_unknown_opcode(CPUX86State *env, DisasContext *s) /* an interrupt is different from an exception because of the privilege checks */ -static void gen_interrupt(DisasContext *s, int intno, - target_ulong cur_eip, target_ulong next_eip) +static void gen_interrupt(DisasContext *s, int intno) { gen_update_cc_op(s); - gen_jmp_im(s, cur_eip); - gen_helper_raise_interrupt(cpu_env, tcg_const_i32(intno), - tcg_const_i32(next_eip - cur_eip)); + gen_jmp_im(s, s->base.pc_next - s->cs_base); + gen_helper_raise_interrupt(cpu_env, tcg_constant_i32(intno), + tcg_constant_i32(s->pc - s->base.pc_next)); s->base.is_jmp = DISAS_NORETURN; } @@ -7194,12 +7193,12 @@ static bool disas_insn(DisasContext *s, CPUState *cpu) } break; case 0xcc: /* int3 */ - gen_interrupt(s, EXCP03_INT3, s->base.pc_next - s->cs_base, s->pc - s->cs_base); + gen_interrupt(s, EXCP03_INT3); break; case 0xcd: /* int N */ val = x86_ldub_code(env, s); if (check_vm86_iopl(s)) { - gen_interrupt(s, val, s->base.pc_next - s->cs_base, s->pc - s->cs_base); + gen_interrupt(s, val); } break; case 0xce: /* into */ From patchwork Mon Aug 22 23:33:00 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 599226 Delivered-To: patch@linaro.org Received: by 2002:a05:7000:4388:0:0:0:0 with SMTP id w8csp2039916mae; Mon, 22 Aug 2022 16:48:55 -0700 (PDT) X-Google-Smtp-Source: AA6agR5B4mHC4fmmq1sWcEDmwhyO0E+6srPsBegeiwlITSXHKirzay3bXcDRF75YA75OfnBJ0pZn X-Received: by 2002:a05:620a:385:b0:6bb:5a16:54fc with SMTP id q5-20020a05620a038500b006bb5a1654fcmr14178964qkm.46.1661212135728; Mon, 22 Aug 2022 16:48:55 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1661212135; cv=none; d=google.com; s=arc-20160816; b=f9lU/brHh4w2P2cSfhLRTgYpN+Fjd8xmvw9Eex/9X1aB/L2x9a69DzhR9vIyQzbr1o ObgyZ6Fx48N5WVqa6dml/y/vTiq3YsWVgPyIZHh4IM5xOxzgKHzDoT6Qytnd/YJ94JoQ 0BOBGtzFYSoppGGQoUERIq6y8lQSI/KXAZep/5HRco9UKwxiSIi/MHAuoWgr0xVsvV2g G6BU9iA8uPDaTWUxgm9AzDk2lVZJUmcZ4VoO5VadGM2MdRmCdoitR3Mq3gqchgLRQ/aI twyqMb8YQdcH9Pbjj3r58LQ/bMqn8yP70wwNdO3C4Akb7lvkUGVoRNul5AiDXA0iWxJ+ nvhQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=xieXJDbaGMET8lCcNrHn8au1fAE3fNDPoQPAmokw8bA=; b=Rs07SGq8O/sEcSgiXg4Rdsv19CYTa+Qs929sHVTJY3IuVfZHA3VsaTQaxC291k5YHX dSIt+K3sXtpI4CjeGTi2lRBCtsxkLp5uxhVjlHmdpqXFRKcMe706PusaRCCF3TPJ7HJq KlNOhx6bhFJW0w8b0Ghm6scJfIcZTaNtbc662IzX42z/ORR3jg80KlRkYP0Q4MlvV7be ntGXITG5ey89LlK3v+rrjMIGRPsgeY1wXkE1rZq1q8fuBuTsVT1hWdcum4ZvHz8RPFVS FVS7t23teQ8OG1ZOXpSlD0HRmbjw9CJCs4Lfg7GzQ3zu7RjXq8q9gIV7QSeD+5Myeit2 cgSA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Wj78MifH; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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([2602:47:d49d:ec01:c3f1:b74f:5edd:63af]) by smtp.gmail.com with ESMTPSA id 82-20020a621555000000b0053655af14easm5133124pfv.45.2022.08.22.16.33.23 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 22 Aug 2022 16:33:24 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH 04/22] target/i386: Create gen_update_eip_cur Date: Mon, 22 Aug 2022 16:33:00 -0700 Message-Id: <20220822233318.1728621-5-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220822233318.1728621-1-richard.henderson@linaro.org> References: <20220822233318.1728621-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::52f; envelope-from=richard.henderson@linaro.org; helo=mail-pg1-x52f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Like gen_update_cc_op, sync EIP before doing something that could raise an exception. Replace all gen_jmp_im that use s->base.pc_next. Signed-off-by: Richard Henderson --- target/i386/tcg/translate.c | 52 ++++++++++++++++++++----------------- 1 file changed, 28 insertions(+), 24 deletions(-) diff --git a/target/i386/tcg/translate.c b/target/i386/tcg/translate.c index d3b16ea28c..78b7641786 100644 --- a/target/i386/tcg/translate.c +++ b/target/i386/tcg/translate.c @@ -511,10 +511,14 @@ static inline void gen_op_st_rm_T0_A0(DisasContext *s, int idx, int d) } } -static inline void gen_jmp_im(DisasContext *s, target_ulong pc) +static void gen_jmp_im(DisasContext *s, target_ulong pc) { - tcg_gen_movi_tl(s->tmp0, pc); - gen_op_jmp_v(s->tmp0); + gen_op_jmp_v(tcg_constant_tl(pc)); +} + +static void gen_update_eip_cur(DisasContext *s) +{ + gen_jmp_im(s, s->base.pc_next - s->cs_base); } /* Compute SEG:REG into A0. SEG is selected from the override segment @@ -703,7 +707,7 @@ static bool gen_check_io(DisasContext *s, MemOp ot, TCGv_i32 port, target_ulong next_eip = s->pc - s->cs_base; gen_update_cc_op(s); - gen_jmp_im(s, cur_eip); + gen_update_eip_cur(s); if (s->prefix & (PREFIX_REPZ | PREFIX_REPNZ)) { svm_flags |= SVM_IOIO_REP_MASK; } @@ -1335,7 +1339,7 @@ static void gen_helper_fp_arith_STN_ST0(int op, int opreg) static void gen_exception(DisasContext *s, int trapno) { gen_update_cc_op(s); - gen_jmp_im(s, s->base.pc_next - s->cs_base); + gen_update_eip_cur(s); gen_helper_raise_exception(cpu_env, tcg_const_i32(trapno)); s->base.is_jmp = DISAS_NORETURN; } @@ -2605,7 +2609,7 @@ static void gen_unknown_opcode(CPUX86State *env, DisasContext *s) static void gen_interrupt(DisasContext *s, int intno) { gen_update_cc_op(s); - gen_jmp_im(s, s->base.pc_next - s->cs_base); + gen_update_eip_cur(s); gen_helper_raise_interrupt(cpu_env, tcg_constant_i32(intno), tcg_constant_i32(s->pc - s->base.pc_next)); s->base.is_jmp = DISAS_NORETURN; @@ -6683,7 +6687,7 @@ static bool disas_insn(DisasContext *s, CPUState *cpu) do_lret: if (PE(s) && !VM86(s)) { gen_update_cc_op(s); - gen_jmp_im(s, s->base.pc_next - s->cs_base); + gen_update_eip_cur(s); gen_helper_lret_protected(cpu_env, tcg_const_i32(dflag - 1), tcg_const_i32(val)); } else { @@ -7179,7 +7183,7 @@ static bool disas_insn(DisasContext *s, CPUState *cpu) } if (prefixes & PREFIX_REPZ) { gen_update_cc_op(s); - gen_jmp_im(s, s->base.pc_next - s->cs_base); + gen_update_eip_cur(s); gen_helper_pause(cpu_env, tcg_const_i32(s->pc - s->base.pc_next)); s->base.is_jmp = DISAS_NORETURN; } @@ -7205,7 +7209,7 @@ static bool disas_insn(DisasContext *s, CPUState *cpu) if (CODE64(s)) goto illegal_op; gen_update_cc_op(s); - gen_jmp_im(s, s->base.pc_next - s->cs_base); + gen_update_eip_cur(s); gen_helper_into(cpu_env, tcg_const_i32(s->pc - s->base.pc_next)); break; #ifdef WANT_ICEBP @@ -7312,7 +7316,7 @@ static bool disas_insn(DisasContext *s, CPUState *cpu) case 0x132: /* rdmsr */ if (check_cpl0(s)) { gen_update_cc_op(s); - gen_jmp_im(s, s->base.pc_next - s->cs_base); + gen_update_eip_cur(s); if (b & 2) { gen_helper_rdmsr(cpu_env); } else { @@ -7324,7 +7328,7 @@ static bool disas_insn(DisasContext *s, CPUState *cpu) break; case 0x131: /* rdtsc */ gen_update_cc_op(s); - gen_jmp_im(s, s->base.pc_next - s->cs_base); + gen_update_eip_cur(s); if (tb_cflags(s->base.tb) & CF_USE_ICOUNT) { gen_io_start(); } @@ -7335,7 +7339,7 @@ static bool disas_insn(DisasContext *s, CPUState *cpu) break; case 0x133: /* rdpmc */ gen_update_cc_op(s); - gen_jmp_im(s, s->base.pc_next - s->cs_base); + gen_update_eip_cur(s); gen_helper_rdpmc(cpu_env); s->base.is_jmp = DISAS_NORETURN; break; @@ -7365,7 +7369,7 @@ static bool disas_insn(DisasContext *s, CPUState *cpu) case 0x105: /* syscall */ /* XXX: is it usable in real mode ? */ gen_update_cc_op(s); - gen_jmp_im(s, s->base.pc_next - s->cs_base); + gen_update_eip_cur(s); gen_helper_syscall(cpu_env, tcg_const_i32(s->pc - s->base.pc_next)); /* TF handling for the syscall insn is different. The TF bit is checked after the syscall insn completes. This allows #DB to not be @@ -7391,13 +7395,13 @@ static bool disas_insn(DisasContext *s, CPUState *cpu) #endif case 0x1a2: /* cpuid */ gen_update_cc_op(s); - gen_jmp_im(s, s->base.pc_next - s->cs_base); + gen_update_eip_cur(s); gen_helper_cpuid(cpu_env); break; case 0xf4: /* hlt */ if (check_cpl0(s)) { gen_update_cc_op(s); - gen_jmp_im(s, s->base.pc_next - s->cs_base); + gen_update_eip_cur(s); gen_helper_hlt(cpu_env, tcg_const_i32(s->pc - s->base.pc_next)); s->base.is_jmp = DISAS_NORETURN; } @@ -7494,7 +7498,7 @@ static bool disas_insn(DisasContext *s, CPUState *cpu) goto illegal_op; } gen_update_cc_op(s); - gen_jmp_im(s, s->base.pc_next - s->cs_base); + gen_update_eip_cur(s); tcg_gen_mov_tl(s->A0, cpu_regs[R_EAX]); gen_extu(s->aflag, s->A0); gen_add_A0_ds_seg(s); @@ -7506,7 +7510,7 @@ static bool disas_insn(DisasContext *s, CPUState *cpu) goto illegal_op; } gen_update_cc_op(s); - gen_jmp_im(s, s->base.pc_next - s->cs_base); + gen_update_eip_cur(s); gen_helper_mwait(cpu_env, tcg_const_i32(s->pc - s->base.pc_next)); s->base.is_jmp = DISAS_NORETURN; break; @@ -7584,7 +7588,7 @@ static bool disas_insn(DisasContext *s, CPUState *cpu) break; } gen_update_cc_op(s); - gen_jmp_im(s, s->base.pc_next - s->cs_base); + gen_update_eip_cur(s); gen_helper_vmrun(cpu_env, tcg_const_i32(s->aflag - 1), tcg_const_i32(s->pc - s->base.pc_next)); tcg_gen_exit_tb(NULL, 0); @@ -7596,7 +7600,7 @@ static bool disas_insn(DisasContext *s, CPUState *cpu) goto illegal_op; } gen_update_cc_op(s); - gen_jmp_im(s, s->base.pc_next - s->cs_base); + gen_update_eip_cur(s); gen_helper_vmmcall(cpu_env); break; @@ -7608,7 +7612,7 @@ static bool disas_insn(DisasContext *s, CPUState *cpu) break; } gen_update_cc_op(s); - gen_jmp_im(s, s->base.pc_next - s->cs_base); + gen_update_eip_cur(s); gen_helper_vmload(cpu_env, tcg_const_i32(s->aflag - 1)); break; @@ -7620,7 +7624,7 @@ static bool disas_insn(DisasContext *s, CPUState *cpu) break; } gen_update_cc_op(s); - gen_jmp_im(s, s->base.pc_next - s->cs_base); + gen_update_eip_cur(s); gen_helper_vmsave(cpu_env, tcg_const_i32(s->aflag - 1)); break; @@ -7646,7 +7650,7 @@ static bool disas_insn(DisasContext *s, CPUState *cpu) break; } gen_update_cc_op(s); - gen_jmp_im(s, s->base.pc_next - s->cs_base); + gen_update_eip_cur(s); gen_helper_clgi(cpu_env); break; @@ -7792,7 +7796,7 @@ static bool disas_insn(DisasContext *s, CPUState *cpu) goto illegal_op; } gen_update_cc_op(s); - gen_jmp_im(s, s->base.pc_next - s->cs_base); + gen_update_eip_cur(s); if (tb_cflags(s->base.tb) & CF_USE_ICOUNT) { gen_io_start(); } @@ -8705,7 +8709,7 @@ static void i386_tr_tb_stop(DisasContextBase *dcbase, CPUState *cpu) DisasContext *dc = container_of(dcbase, DisasContext, base); if (dc->base.is_jmp == DISAS_TOO_MANY) { - gen_jmp_im(dc, dc->base.pc_next - dc->cs_base); + gen_update_eip_cur(dc); gen_eob(dc); } } From patchwork Mon Aug 22 23:33:01 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 599230 Delivered-To: patch@linaro.org Received: by 2002:a05:7000:4388:0:0:0:0 with SMTP id w8csp2041099mae; Mon, 22 Aug 2022 16:51:53 -0700 (PDT) X-Google-Smtp-Source: AA6agR7atfAHUbRv6ivxHIjwf4o1NN3oerQ4vTDKg3t4LTQaYJsKDwEDIS2d6RG0eJgJwafwc6Vv X-Received: by 2002:a05:622a:309:b0:344:c3f0:3773 with SMTP id q9-20020a05622a030900b00344c3f03773mr4282687qtw.121.1661212313240; Mon, 22 Aug 2022 16:51:53 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1661212313; cv=none; d=google.com; s=arc-20160816; b=zAkvW1VC+BMofdoOHzNve/9JYzLTCdhYrQ+wjWmHQkZSXNlIMxp3tlHjcwug0FWC9t lgNFVvCRM4KpZGziWmzr9+uO5IorM77E/GUSqwsJcC6mr49VrRcg8QWsPA1LyaZPCMJl ox9JJ0rdMqRGPocfpiKJIDAcz5G2//jQAtb/gISvxpJN+G3KO83fiLDiYPb1o6mXbyr1 dChTgrPUaf9PpdfhBGGzuNzc9A+b3AmZJD8i73VzijtIf5PSSMEDOSTcY8VKRa1H8//m atd7ZbCYiuQ6LMaLQWqfhuOmOaa5YOSksB3WE8i3WHyYRN86QoZO5N58jmkuz+qIOHyj J6BQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=9Pm+6x2/2C6OfnomcGaCxiJb7v+oW6I+7rzdNDZUItE=; b=kmPWOaaOKkmvRZY8zhjb/f+k+A71TiquZTyVmTcjT4iX8T8lOWnYg2dC6HGd8omt3n dFHq9CYfwBj4h/J6HUhxmDkNANRPWXvg1JgzXZYkbIC0dD0wv1UT+rDWoM6l4Vj8hIf4 zpG4wufDY58+kic3KAw0QdZgbUARKb7DCgAJhUMNm3jRjHhvtTbD9dOkXmx7lBsHJx88 K+7l4md8pwLCOt8O5CkDD8kvm9EIwNqdfvDPJH/8P+n4LmawKYLk3R4MMJiG1+Nbt0Kg SP9VXOhOwxKcLnTDdjn9OYn2/6FbOyYoONwl3sC9/EtYHIwzoxMDtEaJwhnw4WBqsHDr uL5g== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=w2BRFLPO; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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([2602:47:d49d:ec01:c3f1:b74f:5edd:63af]) by smtp.gmail.com with ESMTPSA id 82-20020a621555000000b0053655af14easm5133124pfv.45.2022.08.22.16.33.25 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 22 Aug 2022 16:33:25 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH 05/22] target/i386: Create gen_update_eip_next Date: Mon, 22 Aug 2022 16:33:01 -0700 Message-Id: <20220822233318.1728621-6-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220822233318.1728621-1-richard.henderson@linaro.org> References: <20220822233318.1728621-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::634; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x634.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Sync EIP before exiting a translation block. Replace all gen_jmp_im that use s->pc. Signed-off-by: Richard Henderson --- target/i386/tcg/translate.c | 45 ++++++++++++++++++++----------------- 1 file changed, 25 insertions(+), 20 deletions(-) diff --git a/target/i386/tcg/translate.c b/target/i386/tcg/translate.c index 78b7641786..36883410e0 100644 --- a/target/i386/tcg/translate.c +++ b/target/i386/tcg/translate.c @@ -521,6 +521,11 @@ static void gen_update_eip_cur(DisasContext *s) gen_jmp_im(s, s->base.pc_next - s->cs_base); } +static void gen_update_eip_next(DisasContext *s) +{ + gen_jmp_im(s, s->pc - s->cs_base); +} + /* Compute SEG:REG into A0. SEG is selected from the override segment (OVR_SEG) and the default segment (DEF_SEG). OVR_SEG may be -1 to indicate no override. */ @@ -5562,7 +5567,7 @@ static bool disas_insn(DisasContext *s, CPUState *cpu) gen_pop_update(s, ot); /* Note that reg == R_SS in gen_movl_seg_T0 always sets is_jmp. */ if (s->base.is_jmp) { - gen_jmp_im(s, s->pc - s->cs_base); + gen_update_eip_next(s); if (reg == R_SS) { s->flags &= ~HF_TF_MASK; gen_eob_inhibit_irq(s, true); @@ -5577,7 +5582,7 @@ static bool disas_insn(DisasContext *s, CPUState *cpu) gen_movl_seg_T0(s, (b >> 3) & 7); gen_pop_update(s, ot); if (s->base.is_jmp) { - gen_jmp_im(s, s->pc - s->cs_base); + gen_update_eip_next(s); gen_eob(s); } break; @@ -5628,7 +5633,7 @@ static bool disas_insn(DisasContext *s, CPUState *cpu) gen_movl_seg_T0(s, reg); /* Note that reg == R_SS in gen_movl_seg_T0 always sets is_jmp. */ if (s->base.is_jmp) { - gen_jmp_im(s, s->pc - s->cs_base); + gen_update_eip_next(s); if (reg == R_SS) { s->flags &= ~HF_TF_MASK; gen_eob_inhibit_irq(s, true); @@ -5835,7 +5840,7 @@ static bool disas_insn(DisasContext *s, CPUState *cpu) /* then put the data */ gen_op_mov_reg_v(s, ot, reg, s->T1); if (s->base.is_jmp) { - gen_jmp_im(s, s->pc - s->cs_base); + gen_update_eip_next(s); gen_eob(s); } break; @@ -6891,7 +6896,7 @@ static bool disas_insn(DisasContext *s, CPUState *cpu) gen_pop_update(s, ot); set_cc_op(s, CC_OP_EFLAGS); /* abort translation because TF/AC flag may change */ - gen_jmp_im(s, s->pc - s->cs_base); + gen_update_eip_next(s); gen_eob(s); } break; @@ -7227,7 +7232,7 @@ static bool disas_insn(DisasContext *s, CPUState *cpu) if (check_iopl(s)) { gen_helper_sti(cpu_env); /* interruptions are enabled only the first insn after sti */ - gen_jmp_im(s, s->pc - s->cs_base); + gen_update_eip_next(s); gen_eob_inhibit_irq(s, true); } break; @@ -7303,7 +7308,7 @@ static bool disas_insn(DisasContext *s, CPUState *cpu) } gen_set_label(l3); - gen_jmp_im(s, next_eip); + gen_update_eip_next(s); tcg_gen_br(l2); gen_set_label(l1); @@ -7321,7 +7326,7 @@ static bool disas_insn(DisasContext *s, CPUState *cpu) gen_helper_rdmsr(cpu_env); } else { gen_helper_wrmsr(cpu_env); - gen_jmp_im(s, s->pc - s->cs_base); + gen_update_eip_next(s); gen_eob(s); } } @@ -7521,7 +7526,7 @@ static bool disas_insn(DisasContext *s, CPUState *cpu) goto illegal_op; } gen_helper_clac(cpu_env); - gen_jmp_im(s, s->pc - s->cs_base); + gen_update_eip_next(s); gen_eob(s); break; @@ -7531,7 +7536,7 @@ static bool disas_insn(DisasContext *s, CPUState *cpu) goto illegal_op; } gen_helper_stac(cpu_env); - gen_jmp_im(s, s->pc - s->cs_base); + gen_update_eip_next(s); gen_eob(s); break; @@ -7576,7 +7581,7 @@ static bool disas_insn(DisasContext *s, CPUState *cpu) tcg_gen_trunc_tl_i32(s->tmp2_i32, cpu_regs[R_ECX]); gen_helper_xsetbv(cpu_env, s->tmp2_i32, s->tmp1_i64); /* End TB because translation flags may change. */ - gen_jmp_im(s, s->pc - s->cs_base); + gen_update_eip_next(s); gen_eob(s); break; @@ -7638,7 +7643,7 @@ static bool disas_insn(DisasContext *s, CPUState *cpu) } gen_update_cc_op(s); gen_helper_stgi(cpu_env); - gen_jmp_im(s, s->pc - s->cs_base); + gen_update_eip_next(s); gen_eob(s); break; @@ -7677,7 +7682,7 @@ static bool disas_insn(DisasContext *s, CPUState *cpu) tcg_gen_ext32u_tl(s->A0, cpu_regs[R_EAX]); } gen_helper_flush_page(cpu_env, s->A0); - gen_jmp_im(s, s->pc - s->cs_base); + gen_update_eip_next(s); gen_eob(s); break; @@ -7761,7 +7766,7 @@ static bool disas_insn(DisasContext *s, CPUState *cpu) tcg_gen_andi_tl(s->T1, s->T1, ~0xe); tcg_gen_or_tl(s->T0, s->T0, s->T1); gen_helper_write_crN(cpu_env, tcg_constant_i32(0), s->T0); - gen_jmp_im(s, s->pc - s->cs_base); + gen_update_eip_next(s); gen_eob(s); break; @@ -7772,7 +7777,7 @@ static bool disas_insn(DisasContext *s, CPUState *cpu) gen_svm_check_intercept(s, SVM_EXIT_INVLPG); gen_lea_modrm(env, s, modrm); gen_helper_flush_page(cpu_env, s->A0); - gen_jmp_im(s, s->pc - s->cs_base); + gen_update_eip_next(s); gen_eob(s); break; @@ -8172,7 +8177,7 @@ static bool disas_insn(DisasContext *s, CPUState *cpu) gen_svm_check_intercept(s, SVM_EXIT_WRITE_CR0 + reg); gen_op_mov_v_reg(s, ot, s->T0, rm); gen_helper_write_crN(cpu_env, tcg_constant_i32(reg), s->T0); - gen_jmp_im(s, s->pc - s->cs_base); + gen_update_eip_next(s); gen_eob(s); } else { gen_svm_check_intercept(s, SVM_EXIT_READ_CR0 + reg); @@ -8207,7 +8212,7 @@ static bool disas_insn(DisasContext *s, CPUState *cpu) gen_op_mov_v_reg(s, ot, s->T0, rm); tcg_gen_movi_i32(s->tmp2_i32, reg); gen_helper_set_dr(cpu_env, s->tmp2_i32, s->T0); - gen_jmp_im(s, s->pc - s->cs_base); + gen_update_eip_next(s); gen_eob(s); } else { gen_svm_check_intercept(s, SVM_EXIT_READ_DR0 + reg); @@ -8222,7 +8227,7 @@ static bool disas_insn(DisasContext *s, CPUState *cpu) gen_svm_check_intercept(s, SVM_EXIT_WRITE_CR0); gen_helper_clts(cpu_env); /* abort block because static cpu state changed */ - gen_jmp_im(s, s->pc - s->cs_base); + gen_update_eip_next(s); gen_eob(s); } break; @@ -8320,7 +8325,7 @@ static bool disas_insn(DisasContext *s, CPUState *cpu) /* XRSTOR is how MPX is enabled, which changes how we translate. Thus we need to end the TB. */ gen_update_cc_op(s); - gen_jmp_im(s, s->pc - s->cs_base); + gen_update_eip_next(s); gen_eob(s); break; @@ -8454,7 +8459,7 @@ static bool disas_insn(DisasContext *s, CPUState *cpu) g_assert_not_reached(); #else gen_update_cc_op(s); - gen_jmp_im(s, s->pc - s->cs_base); + gen_update_eip_next(s); gen_helper_rsm(cpu_env); #endif /* CONFIG_USER_ONLY */ gen_eob(s); From patchwork Mon Aug 22 23:33:02 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 599220 Delivered-To: patch@linaro.org Received: by 2002:a05:7000:4388:0:0:0:0 with SMTP id w8csp2037609mae; Mon, 22 Aug 2022 16:42:49 -0700 (PDT) X-Google-Smtp-Source: AA6agR6WgkuSE+hoRgkdx4JCjEQpCrhKapVFgdvItgSQoPtS5qHuXNjgLYvndvYfsbP6hAVnEgg7 X-Received: by 2002:a05:6214:23ca:b0:474:2411:b482 with SMTP id hr10-20020a05621423ca00b004742411b482mr17535201qvb.128.1661211769670; Mon, 22 Aug 2022 16:42:49 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1661211769; cv=none; d=google.com; s=arc-20160816; b=ReNZ9Svg4RvT0ZiXd/LxlmiLhMbkQ0RU4xa1vUgM7X3N2a9YoZpSpsW8XVaAyqwEp5 tcYnDX/seOU8II3EosfYOPr23tWrIOscjC1tTc/KNgCx7vRtqYnJRAwGHUPRVfujDElK FYu92PrtozF//WFC92c0Jb2inA3UQla1dOk0DQQBH5q9/AjatMkaIHFyvjXarR20nSnx dxLLEVWIssJi0BJo4Bfy2wdNL1b0u7BT9irFGRhKe9wWtayAATpp5CltaJDScmu25kEC tE9mRv9FA9hkYlHWvnfo6OXLpbryf/Tghw6Y30PUAlZTcm4X+qVYyCAVO0CvsJbBmM/M i42A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=Cfuu6TL6rDe8aq8wLymEDU+hmx0te8Z/lEdyanUGYGQ=; b=OdtS3u/W9uKnlr4raq9iHZwR5sv5lSl6DnwiqLCbzK9f4FQN/8W9Vy+8zs5FG0NNas JroH1GmUdgmBnh0yG+nCPp4VImvSXgcLcWoekd0VjnEFiY13YVoEhD5k++XXkV7RHAa8 F9h36zw0lAdou59mW52ifMYgGe8tePIPNHhVVIUf6ApcoqPXFx7IDdv1XY3fTUc6OAWX TT64SYlr1AkzC7vgdV+j6qwMT8rpyH4Hx5ChtxmMxG3I3KmUuwreAFq3ywGG4nSohaVn oUJGWejMw1fyt+Qd9PmPoYduoA3AwnSW5KmaJ6Mug/eqTMvFCbimSn0Dr/V7N8JloB7w fcIw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=uUuurCgI; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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([2602:47:d49d:ec01:c3f1:b74f:5edd:63af]) by smtp.gmail.com with ESMTPSA id 82-20020a621555000000b0053655af14easm5133124pfv.45.2022.08.22.16.33.26 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 22 Aug 2022 16:33:26 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH 06/22] target/i386: Introduce DISAS_EOB* Date: Mon, 22 Aug 2022 16:33:02 -0700 Message-Id: <20220822233318.1728621-7-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220822233318.1728621-1-richard.henderson@linaro.org> References: <20220822233318.1728621-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::429; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x429.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Add a few DISAS_TARGET_* aliases to reduce the number of calls to gen_eob() and gen_eob_inhibit_irq(). So far, only update i386_tr_translate_insn for exiting the block because of single-step or previous inhibit irq. Signed-off-by: Richard Henderson --- target/i386/tcg/translate.c | 23 +++++++++++++++++++++-- 1 file changed, 21 insertions(+), 2 deletions(-) diff --git a/target/i386/tcg/translate.c b/target/i386/tcg/translate.c index 36883410e0..579ba37e76 100644 --- a/target/i386/tcg/translate.c +++ b/target/i386/tcg/translate.c @@ -132,6 +132,10 @@ typedef struct DisasContext { TCGOp *prev_insn_end; } DisasContext; +#define DISAS_EOB_ONLY DISAS_TARGET_0 +#define DISAS_EOB_NEXT DISAS_TARGET_1 +#define DISAS_EOB_INHIBIT_IRQ DISAS_TARGET_2 + /* The environment in which user-only runs is constrained. */ #ifdef CONFIG_USER_ONLY #define PE(S) true @@ -8701,7 +8705,7 @@ static void i386_tr_translate_insn(DisasContextBase *dcbase, CPUState *cpu) * the flag and abort the translation to give the irqs a * chance to happen. */ - dc->base.is_jmp = DISAS_TOO_MANY; + dc->base.is_jmp = DISAS_EOB_NEXT; } else if (!is_same_page(&dc->base, pc_next)) { dc->base.is_jmp = DISAS_TOO_MANY; } @@ -8713,9 +8717,24 @@ static void i386_tr_tb_stop(DisasContextBase *dcbase, CPUState *cpu) { DisasContext *dc = container_of(dcbase, DisasContext, base); - if (dc->base.is_jmp == DISAS_TOO_MANY) { + switch (dc->base.is_jmp) { + case DISAS_NORETURN: + break; + case DISAS_TOO_MANY: + case DISAS_EOB_NEXT: + gen_update_cc_op(dc); gen_update_eip_cur(dc); + /* fall through */ + case DISAS_EOB_ONLY: gen_eob(dc); + break; + case DISAS_EOB_INHIBIT_IRQ: + gen_update_cc_op(dc); + gen_update_eip_cur(dc); + gen_eob_inhibit_irq(dc, true); + break; + default: + g_assert_not_reached(); } } From patchwork Mon Aug 22 23:33:03 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 599223 Delivered-To: patch@linaro.org Received: by 2002:a05:7000:4388:0:0:0:0 with SMTP id w8csp2039082mae; Mon, 22 Aug 2022 16:46:43 -0700 (PDT) X-Google-Smtp-Source: AA6agR7mlhhXnJoeMz0qy9L2BnJxG8GHgP+tPkfqlo9A1DfvJUgbTi7IuxiCPoB7It8A/Vcq38dd X-Received: by 2002:a05:6214:1ccc:b0:496:ab6b:7089 with SMTP id g12-20020a0562141ccc00b00496ab6b7089mr18194299qvd.18.1661212003707; Mon, 22 Aug 2022 16:46:43 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1661212003; cv=none; d=google.com; s=arc-20160816; b=JiRfG9tQ5xnCiJwTLxt6f/9vcGoKdctHfy8bZmTGJmhv/fxp6Y1dv+ixi+H0De1Bec pZdnmYcbhDoArvJIvnFGl2NbkfIw0Hixxr1/ef2BswYLmpOkDwMB+TDuRLWsTXNlEZ2y DDKNo9mxhZ/Arbr1QhNtGuGpyOYNTW0mM1Br+TTDiqvqIBYYclQ2K7IEb5RkfRijxrR2 q/LEC+sviWWrh4r/zdOBf6/sVcc1pvCg7HSrCX5wOiGSMhunh1mHRHo8KCc4xr4yWhi3 UMLElO1J2xEgSQ3p6kpuZOQwsb5stctZdztSy5jHB7/98K/uhFV89AbzZP4CxKqw6hVm XJxA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=jKb8loPtKw8T5KNmqMg72+z1tROhcSAfpg6d4iTJR78=; b=mcp3GwGKaRETvidl4I15DeHy6Ksq862ikIffnh9XF3VWDqjXqTgOwRXdrIqyqWn1HG AWsvV87Eugu/gruTfmQXpxOeuaHgZD7dmNsDcMRFAw9Ois5n0FV9x8F0pSaTtZlaTUY6 MkScRhPOrumu8yDlk4WLbJW5WiPHGhiRmjRlkNvASsv0VBpz/dZnwHseJhzLWwAUOst0 BTIg8M+g8CzchP4FXU/NX3LRIoQ/2u9D920G1rhVdaPnua2mOhYvTkjxcF1miK56k3dH N8vHjgZ4aIdN4OrdVkS6Hw8EFXf0W6Q/ZnHWNJ6MYy+KwlUhfiDz1L++XLToZ7sKAe7B sgHg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=huNmScgE; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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([2602:47:d49d:ec01:c3f1:b74f:5edd:63af]) by smtp.gmail.com with ESMTPSA id 82-20020a621555000000b0053655af14easm5133124pfv.45.2022.08.22.16.33.27 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 22 Aug 2022 16:33:28 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH 07/22] target/i386: Use DISAS_EOB* in gen_movl_seg_T0 Date: Mon, 22 Aug 2022 16:33:03 -0700 Message-Id: <20220822233318.1728621-8-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220822233318.1728621-1-richard.henderson@linaro.org> References: <20220822233318.1728621-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::436; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x436.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Set is_jmp properly in gen_movl_seg_T0, so that the callers need to nothing special. Signed-off-by: Richard Henderson --- target/i386/tcg/translate.c | 36 +++++------------------------------- 1 file changed, 5 insertions(+), 31 deletions(-) diff --git a/target/i386/tcg/translate.c b/target/i386/tcg/translate.c index 579ba37e76..4dc8f4c1f8 100644 --- a/target/i386/tcg/translate.c +++ b/target/i386/tcg/translate.c @@ -2432,13 +2432,15 @@ static void gen_movl_seg_T0(DisasContext *s, X86Seg seg_reg) because ss32 may change. For R_SS, translation must always stop as a special handling must be done to disable hardware interrupts for the next instruction */ - if (seg_reg == R_SS || (CODE32(s) && seg_reg < R_FS)) { - s->base.is_jmp = DISAS_TOO_MANY; + if (seg_reg == R_SS) { + s->base.is_jmp = DISAS_EOB_INHIBIT_IRQ; + } else if (CODE32(s) && seg_reg < R_FS) { + s->base.is_jmp = DISAS_EOB_NEXT; } } else { gen_op_movl_seg_T0_vm(s, seg_reg); if (seg_reg == R_SS) { - s->base.is_jmp = DISAS_TOO_MANY; + s->base.is_jmp = DISAS_EOB_INHIBIT_IRQ; } } } @@ -5569,26 +5571,12 @@ static bool disas_insn(DisasContext *s, CPUState *cpu) ot = gen_pop_T0(s); gen_movl_seg_T0(s, reg); gen_pop_update(s, ot); - /* Note that reg == R_SS in gen_movl_seg_T0 always sets is_jmp. */ - if (s->base.is_jmp) { - gen_update_eip_next(s); - if (reg == R_SS) { - s->flags &= ~HF_TF_MASK; - gen_eob_inhibit_irq(s, true); - } else { - gen_eob(s); - } - } break; case 0x1a1: /* pop fs */ case 0x1a9: /* pop gs */ ot = gen_pop_T0(s); gen_movl_seg_T0(s, (b >> 3) & 7); gen_pop_update(s, ot); - if (s->base.is_jmp) { - gen_update_eip_next(s); - gen_eob(s); - } break; /**************************/ @@ -5635,16 +5623,6 @@ static bool disas_insn(DisasContext *s, CPUState *cpu) goto illegal_op; gen_ldst_modrm(env, s, modrm, MO_16, OR_TMP0, 0); gen_movl_seg_T0(s, reg); - /* Note that reg == R_SS in gen_movl_seg_T0 always sets is_jmp. */ - if (s->base.is_jmp) { - gen_update_eip_next(s); - if (reg == R_SS) { - s->flags &= ~HF_TF_MASK; - gen_eob_inhibit_irq(s, true); - } else { - gen_eob(s); - } - } break; case 0x8c: /* mov Gv, seg */ modrm = x86_ldub_code(env, s); @@ -5843,10 +5821,6 @@ static bool disas_insn(DisasContext *s, CPUState *cpu) gen_movl_seg_T0(s, op); /* then put the data */ gen_op_mov_reg_v(s, ot, reg, s->T1); - if (s->base.is_jmp) { - gen_update_eip_next(s); - gen_eob(s); - } break; /************************/ From patchwork Mon Aug 22 23:33:04 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 599227 Delivered-To: patch@linaro.org Received: by 2002:a05:7000:4388:0:0:0:0 with SMTP id w8csp2040601mae; Mon, 22 Aug 2022 16:50:35 -0700 (PDT) X-Google-Smtp-Source: AA6agR6qqeF8TxUu6kx1vY/Knuj9UbLAwDUD/OagAjrjxw80Reu6yinsfoVqD8Rs+MZ5XDXUr8Sy X-Received: by 2002:a05:6214:2346:b0:496:ae16:f602 with SMTP id hu6-20020a056214234600b00496ae16f602mr17763259qvb.37.1661212234978; Mon, 22 Aug 2022 16:50:34 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1661212234; cv=none; d=google.com; s=arc-20160816; b=tF2AAvyrPM6KSz973V7xsDgcrCWTWZuDyJ5G1qHFiXlCGmRlv2fJ5LBQgiNE5Hc2Yb LkCQTdRmY6Pigjaycov960R3xCEdrrq0AKF/QDXC4AQlmBs4RwypQyZP4tDFJbrDU8vn 5dnm8K1IOq+KQ+pJ2COJjBflRc9Tc5UvvePUXK6v9+0NhOUm4NcmE93igQ+D4Vk9iUx0 Lqoxy8QQfJS/C/qp3IPy8Ifs4mN7PRW+zouiQCURhAybpXZa/8CX6wrD0ma75fZGks1f NZuhgbyyVNpYmPQqK1v3k2EbpKuhio3IMptsgTrkXvpeCCpQbxi40J1xiIrh9kbPYbIG SPLg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=oqjsX/TV9fFb0FKaIyHXMo7pwCHH1A0NzKkq/LQYAFc=; b=cx2cxr1Thrgy6X1Z97tP5ONm8kpYNROq77PItScTWgVT/X4UM8lJIdNm0pHQXjDeuP z4OQjEXvF0jnhkQnaF5HV1SoMCWXIVsNk6c1ferRYQ9w/MFUAkAit1HtrWr3SxNjwyN3 ZaxaZGhBbMscfXry3qaAbDgUGUGfBY1noBsQ0ldkuXJiQ0zQ5GmXkuCFTGoVzPtCaRDJ PdxSMp4CElq/Qs3Y2HymgePeG7sq5MFXVgTwfr1DmOg25IeI7hu3egzvI/nfh/gkddnn MiayvkXjaVq7H1RVlp/ia0bzXRNjuf6sTYy+qUKmmZ/FTbTzLsF38e9QDCVU7vOvZbCW p2GA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="KpyMfWf/"; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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([2602:47:d49d:ec01:c3f1:b74f:5edd:63af]) by smtp.gmail.com with ESMTPSA id 82-20020a621555000000b0053655af14easm5133124pfv.45.2022.08.22.16.33.28 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 22 Aug 2022 16:33:29 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH 08/22] target/i386: Use DISAS_EOB_NEXT Date: Mon, 22 Aug 2022 16:33:04 -0700 Message-Id: <20220822233318.1728621-9-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220822233318.1728621-1-richard.henderson@linaro.org> References: <20220822233318.1728621-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::52f; envelope-from=richard.henderson@linaro.org; helo=mail-pg1-x52f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Replace sequences of gen_update_cc_op, gen_update_eip_next, and gen_eob with the new is_jmp enumerator. Signed-off-by: Richard Henderson --- target/i386/tcg/translate.c | 40 ++++++++++++------------------------- 1 file changed, 13 insertions(+), 27 deletions(-) diff --git a/target/i386/tcg/translate.c b/target/i386/tcg/translate.c index 4dc8f4c1f8..73e4330fc0 100644 --- a/target/i386/tcg/translate.c +++ b/target/i386/tcg/translate.c @@ -6874,8 +6874,7 @@ static bool disas_insn(DisasContext *s, CPUState *cpu) gen_pop_update(s, ot); set_cc_op(s, CC_OP_EFLAGS); /* abort translation because TF/AC flag may change */ - gen_update_eip_next(s); - gen_eob(s); + s->base.is_jmp = DISAS_EOB_NEXT; } break; case 0x9e: /* sahf */ @@ -7304,8 +7303,7 @@ static bool disas_insn(DisasContext *s, CPUState *cpu) gen_helper_rdmsr(cpu_env); } else { gen_helper_wrmsr(cpu_env); - gen_update_eip_next(s); - gen_eob(s); + s->base.is_jmp = DISAS_EOB_NEXT; } } break; @@ -7504,8 +7502,7 @@ static bool disas_insn(DisasContext *s, CPUState *cpu) goto illegal_op; } gen_helper_clac(cpu_env); - gen_update_eip_next(s); - gen_eob(s); + s->base.is_jmp = DISAS_EOB_NEXT; break; case 0xcb: /* stac */ @@ -7514,8 +7511,7 @@ static bool disas_insn(DisasContext *s, CPUState *cpu) goto illegal_op; } gen_helper_stac(cpu_env); - gen_update_eip_next(s); - gen_eob(s); + s->base.is_jmp = DISAS_EOB_NEXT; break; CASE_MODRM_MEM_OP(1): /* sidt */ @@ -7559,8 +7555,7 @@ static bool disas_insn(DisasContext *s, CPUState *cpu) tcg_gen_trunc_tl_i32(s->tmp2_i32, cpu_regs[R_ECX]); gen_helper_xsetbv(cpu_env, s->tmp2_i32, s->tmp1_i64); /* End TB because translation flags may change. */ - gen_update_eip_next(s); - gen_eob(s); + s->base.is_jmp = DISAS_EOB_NEXT; break; case 0xd8: /* VMRUN */ @@ -7621,8 +7616,7 @@ static bool disas_insn(DisasContext *s, CPUState *cpu) } gen_update_cc_op(s); gen_helper_stgi(cpu_env); - gen_update_eip_next(s); - gen_eob(s); + s->base.is_jmp = DISAS_EOB_NEXT; break; case 0xdd: /* CLGI */ @@ -7660,8 +7654,7 @@ static bool disas_insn(DisasContext *s, CPUState *cpu) tcg_gen_ext32u_tl(s->A0, cpu_regs[R_EAX]); } gen_helper_flush_page(cpu_env, s->A0); - gen_update_eip_next(s); - gen_eob(s); + s->base.is_jmp = DISAS_EOB_NEXT; break; CASE_MODRM_MEM_OP(2): /* lgdt */ @@ -7744,8 +7737,7 @@ static bool disas_insn(DisasContext *s, CPUState *cpu) tcg_gen_andi_tl(s->T1, s->T1, ~0xe); tcg_gen_or_tl(s->T0, s->T0, s->T1); gen_helper_write_crN(cpu_env, tcg_constant_i32(0), s->T0); - gen_update_eip_next(s); - gen_eob(s); + s->base.is_jmp = DISAS_EOB_NEXT; break; CASE_MODRM_MEM_OP(7): /* invlpg */ @@ -7755,8 +7747,7 @@ static bool disas_insn(DisasContext *s, CPUState *cpu) gen_svm_check_intercept(s, SVM_EXIT_INVLPG); gen_lea_modrm(env, s, modrm); gen_helper_flush_page(cpu_env, s->A0); - gen_update_eip_next(s); - gen_eob(s); + s->base.is_jmp = DISAS_EOB_NEXT; break; case 0xf8: /* swapgs */ @@ -8155,8 +8146,7 @@ static bool disas_insn(DisasContext *s, CPUState *cpu) gen_svm_check_intercept(s, SVM_EXIT_WRITE_CR0 + reg); gen_op_mov_v_reg(s, ot, s->T0, rm); gen_helper_write_crN(cpu_env, tcg_constant_i32(reg), s->T0); - gen_update_eip_next(s); - gen_eob(s); + s->base.is_jmp = DISAS_EOB_NEXT; } else { gen_svm_check_intercept(s, SVM_EXIT_READ_CR0 + reg); gen_helper_read_crN(s->T0, cpu_env, tcg_constant_i32(reg)); @@ -8190,8 +8180,7 @@ static bool disas_insn(DisasContext *s, CPUState *cpu) gen_op_mov_v_reg(s, ot, s->T0, rm); tcg_gen_movi_i32(s->tmp2_i32, reg); gen_helper_set_dr(cpu_env, s->tmp2_i32, s->T0); - gen_update_eip_next(s); - gen_eob(s); + s->base.is_jmp = DISAS_EOB_NEXT; } else { gen_svm_check_intercept(s, SVM_EXIT_READ_DR0 + reg); tcg_gen_movi_i32(s->tmp2_i32, reg); @@ -8205,8 +8194,7 @@ static bool disas_insn(DisasContext *s, CPUState *cpu) gen_svm_check_intercept(s, SVM_EXIT_WRITE_CR0); gen_helper_clts(cpu_env); /* abort block because static cpu state changed */ - gen_update_eip_next(s); - gen_eob(s); + s->base.is_jmp = DISAS_EOB_NEXT; } break; /* MMX/3DNow!/SSE/SSE2/SSE3/SSSE3/SSE4 support */ @@ -8302,9 +8290,7 @@ static bool disas_insn(DisasContext *s, CPUState *cpu) gen_helper_xrstor(cpu_env, s->A0, s->tmp1_i64); /* XRSTOR is how MPX is enabled, which changes how we translate. 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([2602:47:d49d:ec01:c3f1:b74f:5edd:63af]) by smtp.gmail.com with ESMTPSA id 82-20020a621555000000b0053655af14easm5133124pfv.45.2022.08.22.16.33.30 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 22 Aug 2022 16:33:31 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH 09/22] target/i386: USe DISAS_EOB_ONLY Date: Mon, 22 Aug 2022 16:33:05 -0700 Message-Id: <20220822233318.1728621-10-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220822233318.1728621-1-richard.henderson@linaro.org> References: <20220822233318.1728621-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::102c; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x102c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Replace lone calls to gen_eob() with the new enumerator. Signed-off-by: Richard Henderson --- target/i386/tcg/translate.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/target/i386/tcg/translate.c b/target/i386/tcg/translate.c index 73e4330fc0..1dc3ff67ae 100644 --- a/target/i386/tcg/translate.c +++ b/target/i386/tcg/translate.c @@ -6687,7 +6687,7 @@ static bool disas_insn(DisasContext *s, CPUState *cpu) /* add stack offset */ gen_stack_update(s, val + (2 << dflag)); } - gen_eob(s); + s->base.is_jmp = DISAS_EOB_ONLY; break; case 0xcb: /* lret */ val = 0; @@ -6705,7 +6705,7 @@ static bool disas_insn(DisasContext *s, CPUState *cpu) tcg_const_i32(s->pc - s->cs_base)); } set_cc_op(s, CC_OP_EFLAGS); - gen_eob(s); + s->base.is_jmp = DISAS_EOB_ONLY; break; case 0xe8: /* call im */ { @@ -7291,7 +7291,7 @@ static bool disas_insn(DisasContext *s, CPUState *cpu) gen_set_label(l1); gen_jmp_im(s, tval); gen_set_label(l2); - gen_eob(s); + s->base.is_jmp = DISAS_EOB_ONLY; } break; case 0x130: /* wrmsr */ @@ -7332,7 +7332,7 @@ static bool disas_insn(DisasContext *s, CPUState *cpu) gen_exception_gpf(s); } else { gen_helper_sysenter(cpu_env); - gen_eob(s); + s->base.is_jmp = DISAS_EOB_ONLY; } break; case 0x135: /* sysexit */ @@ -7343,7 +7343,7 @@ static bool disas_insn(DisasContext *s, CPUState *cpu) gen_exception_gpf(s); } else { gen_helper_sysexit(cpu_env, tcg_const_i32(dflag - 1)); - gen_eob(s); + s->base.is_jmp = DISAS_EOB_ONLY; } break; #ifdef TARGET_X86_64 @@ -8426,7 +8426,7 @@ static bool disas_insn(DisasContext *s, CPUState *cpu) gen_update_eip_next(s); gen_helper_rsm(cpu_env); #endif /* CONFIG_USER_ONLY */ - gen_eob(s); + s->base.is_jmp = DISAS_EOB_ONLY; break; case 0x1b8: /* SSE4.2 popcnt */ if ((prefixes & (PREFIX_REPZ | PREFIX_LOCK | PREFIX_REPNZ)) != From patchwork Mon Aug 22 23:33:06 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 599234 Delivered-To: patch@linaro.org Received: by 2002:a05:7000:4388:0:0:0:0 with SMTP id w8csp2041845mae; Mon, 22 Aug 2022 16:54:06 -0700 (PDT) X-Google-Smtp-Source: AA6agR5OEp5PaJvc7irJUhEe9lDnKL25GrLA0VesG004evcZg6J1RVHNjnCAmzGjvMumgWnRgtvM X-Received: by 2002:a0c:802c:0:b0:478:de2c:9b6f with SMTP id 41-20020a0c802c000000b00478de2c9b6fmr17754034qva.89.1661212446107; Mon, 22 Aug 2022 16:54:06 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1661212446; cv=none; d=google.com; s=arc-20160816; b=mbNjgkoNeLXgNNnChbk37FVvFAWpfGxnCzLQ13S5D9XPvTcapuFCVQ7p9KAEeYTP5G MkDicqSBNRG1upOY7pHwnIDyBtCYM65fPPrRWDZeDrsjkd3PeXS4ntKCNEu7NDxCscEt AehWQGT1N53w8XLq5EjxZ1djBy1Z/nLM4iqh2BxsFhLQPapMC5T+xlO86D6WeebbUSj4 mY9ew5OlBbnMZqN+RkMc7Xz6eMcUIkPOLGxbxW3giC6u3gTFrX+hE7713CTvPRS8R1tW awiGyFonE60ppMeLH0OjX6r5rZAshRBTqodRJErp0658nAevJYtzz9bG/p03tDfImDbm aB7g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=+OJB/KgYLATLASrlEThWGbrHHghDFAhGZdOzeh5O3nA=; b=uFtwL8g0AxQMEUU0yyMLbtMq0Si0l93M9ImA9YwK36FcPdRhC/P3bFmByr/ENiPFjg tcB3UPiPCmiICdjCdNfEZOQN+jYFIhjERUHcnL8NNUuwW4syxUYIn6dOFDk8D0NgQKGY azEVherj3iFs3kN0ZFKs5D8fLjJyPERstfqVQSyNsHJNHbFGX7ZZXR8ob3WIHAGHqqo3 gLdqwkQsruJ2vXbTf6bPqvvicSuLJNRBxUG0La4cvaoGslpAjlnzIHQR0u/wAxVAUUGS KD8XOR4+8Lirsatg9liEqOjihA54Yr3KdyvmlKdim2b31qxmU5y9bvRE+jWidKRRMC7c IE5g== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=xLtk26nh; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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([2602:47:d49d:ec01:c3f1:b74f:5edd:63af]) by smtp.gmail.com with ESMTPSA id 82-20020a621555000000b0053655af14easm5133124pfv.45.2022.08.22.16.33.31 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 22 Aug 2022 16:33:32 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH 10/22] target/i386: Create cur_insn_len, cur_insn_len_i32 Date: Mon, 22 Aug 2022 16:33:06 -0700 Message-Id: <20220822233318.1728621-11-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220822233318.1728621-1-richard.henderson@linaro.org> References: <20220822233318.1728621-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::52f; envelope-from=richard.henderson@linaro.org; helo=mail-pg1-x52f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Create common routines for computing the length of the insn. Signed-off-by: Richard Henderson --- target/i386/tcg/translate.c | 31 +++++++++++++++++++------------ 1 file changed, 19 insertions(+), 12 deletions(-) diff --git a/target/i386/tcg/translate.c b/target/i386/tcg/translate.c index 1dc3ff67ae..ee8e87a617 100644 --- a/target/i386/tcg/translate.c +++ b/target/i386/tcg/translate.c @@ -530,6 +530,16 @@ static void gen_update_eip_next(DisasContext *s) gen_jmp_im(s, s->pc - s->cs_base); } +static int cur_insn_len(DisasContext *s) +{ + return s->pc - s->base.pc_next; +} + +static TCGv_i32 cur_insn_len_i32(DisasContext *s) +{ + return tcg_constant_i32(cur_insn_len(s)); +} + /* Compute SEG:REG into A0. SEG is selected from the override segment (OVR_SEG) and the default segment (DEF_SEG). OVR_SEG may be -1 to indicate no override. */ @@ -712,9 +722,6 @@ static bool gen_check_io(DisasContext *s, MemOp ot, TCGv_i32 port, gen_helper_check_io(cpu_env, port, tcg_constant_i32(1 << ot)); } if (GUEST(s)) { - target_ulong cur_eip = s->base.pc_next - s->cs_base; - target_ulong next_eip = s->pc - s->cs_base; - gen_update_cc_op(s); gen_update_eip_cur(s); if (s->prefix & (PREFIX_REPZ | PREFIX_REPNZ)) { @@ -723,7 +730,7 @@ static bool gen_check_io(DisasContext *s, MemOp ot, TCGv_i32 port, svm_flags |= 1 << (SVM_IOIO_SIZE_SHIFT + ot); gen_helper_svm_check_io(cpu_env, port, tcg_constant_i32(svm_flags), - tcg_constant_i32(next_eip - cur_eip)); + cur_insn_len_i32(s)); } return true; #endif @@ -2028,7 +2035,7 @@ static uint64_t advance_pc(CPUX86State *env, DisasContext *s, int num_bytes) } s->pc += num_bytes; - if (unlikely(s->pc - s->base.pc_next > X86_MAX_INSN_LENGTH)) { + if (unlikely(cur_insn_len(s) > X86_MAX_INSN_LENGTH)) { /* If the instruction's 16th byte is on a different page than the 1st, a * page fault on the second page wins over the general protection fault * caused by the instruction being too long. @@ -2622,7 +2629,7 @@ static void gen_interrupt(DisasContext *s, int intno) gen_update_cc_op(s); gen_update_eip_cur(s); gen_helper_raise_interrupt(cpu_env, tcg_constant_i32(intno), - tcg_constant_i32(s->pc - s->base.pc_next)); + cur_insn_len_i32(s)); s->base.is_jmp = DISAS_NORETURN; } @@ -7166,7 +7173,7 @@ static bool disas_insn(DisasContext *s, CPUState *cpu) if (prefixes & PREFIX_REPZ) { gen_update_cc_op(s); gen_update_eip_cur(s); - gen_helper_pause(cpu_env, tcg_const_i32(s->pc - s->base.pc_next)); + gen_helper_pause(cpu_env, cur_insn_len_i32(s)); s->base.is_jmp = DISAS_NORETURN; } break; @@ -7192,7 +7199,7 @@ static bool disas_insn(DisasContext *s, CPUState *cpu) goto illegal_op; gen_update_cc_op(s); gen_update_eip_cur(s); - gen_helper_into(cpu_env, tcg_const_i32(s->pc - s->base.pc_next)); + gen_helper_into(cpu_env, cur_insn_len_i32(s)); break; #ifdef WANT_ICEBP case 0xf1: /* icebp (undocumented, exits to external debugger) */ @@ -7351,7 +7358,7 @@ static bool disas_insn(DisasContext *s, CPUState *cpu) /* XXX: is it usable in real mode ? */ gen_update_cc_op(s); gen_update_eip_cur(s); - gen_helper_syscall(cpu_env, tcg_const_i32(s->pc - s->base.pc_next)); + gen_helper_syscall(cpu_env, cur_insn_len_i32(s)); /* TF handling for the syscall insn is different. The TF bit is checked after the syscall insn completes. This allows #DB to not be generated after one has entered CPL0 if TF is set in FMASK. */ @@ -7383,7 +7390,7 @@ static bool disas_insn(DisasContext *s, CPUState *cpu) if (check_cpl0(s)) { gen_update_cc_op(s); gen_update_eip_cur(s); - gen_helper_hlt(cpu_env, tcg_const_i32(s->pc - s->base.pc_next)); + gen_helper_hlt(cpu_env, cur_insn_len_i32(s)); s->base.is_jmp = DISAS_NORETURN; } break; @@ -7492,7 +7499,7 @@ static bool disas_insn(DisasContext *s, CPUState *cpu) } gen_update_cc_op(s); gen_update_eip_cur(s); - gen_helper_mwait(cpu_env, tcg_const_i32(s->pc - s->base.pc_next)); + gen_helper_mwait(cpu_env, cur_insn_len_i32(s)); s->base.is_jmp = DISAS_NORETURN; break; @@ -7568,7 +7575,7 @@ static bool disas_insn(DisasContext *s, CPUState *cpu) gen_update_cc_op(s); gen_update_eip_cur(s); gen_helper_vmrun(cpu_env, tcg_const_i32(s->aflag - 1), - tcg_const_i32(s->pc - s->base.pc_next)); + cur_insn_len_i32(s)); tcg_gen_exit_tb(NULL, 0); s->base.is_jmp = DISAS_NORETURN; break; From patchwork Mon Aug 22 23:33:07 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 599448 Delivered-To: patch@linaro.org Received: by 2002:a05:7000:4388:0:0:0:0 with SMTP id w8csp2052505mae; Mon, 22 Aug 2022 17:10:19 -0700 (PDT) X-Google-Smtp-Source: AA6agR4LQGqP0zzzzaAo2o8QZ6jL4W/aMAgrHJJrU8csBIhJRAVW9e518Vf0UJMsW/prXbSuzAWb X-Received: by 2002:a05:622a:50c:b0:344:8b06:4e92 with SMTP id l12-20020a05622a050c00b003448b064e92mr17226500qtx.569.1661213419034; Mon, 22 Aug 2022 17:10:19 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1661213419; cv=none; d=google.com; s=arc-20160816; b=sDkri/06uPOZhoYescLRkaDJFy7hMVAz6RL1DY0LOk/GsTubzrDcXqRNGLXbeRst83 sOgtrrBueBMS8U08VAOcYAlzz/vojKoRezcw6ivn1VJGSxDBwNJ8jI/QmJHDeGNlQcxk B6lA9x2stMKKg+nQrQngOyE3SY8YnjPja5rxFUNz5Vb2QkRxqjNZgYYFawte/w9LX+nM DBbae3VGDM0ogJ31eAFlGJI6X3a9GbLexpHBVdzVyd5hG/6Eo9q3DA9lhyQt8WD+23q0 JFG57KvtvY/mSOSBSprtkwgBwPR//Qj4AXx/nIcr8DWXLhbsskHxMqZQCeNs1Se0gFA/ HV/w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=9Arjo42FMfgOHUOKPnaNXPkKeSDs2OlIA7G2pgMh604=; b=I6rNXCbaOTRqy2fLbImZgtKKStmz+wgW8kzVXi8cGnMuTPH2LQ2zmpgwtlwTmDU7Ot d997RuFVA8ZHnV+Cq6GpEe4ur9hr3xe143kyF4uf8fNkIvFjM3ESehiZbOO3c/aDpmDf g6SS9cq8EsxmdTEtJrF2vn5wDzunlpRFSQ14OtFYebI2eG4NTiAv36qj4UhHE9BWMscp oG6ZtPi/3ZEnde5Xg9v0AibMx2YOBwAG/vxCdanf/Ld80RJrp3BHBU3uvO7Gud7z1Hwi u3THXve1Z9pQ46zbxK+CKn0Rc20T1noBe5BLHUPIPWOi+aX58+ecE2sslE31+mVASgKg 4e5Q== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="oRJcB4J/"; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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([2602:47:d49d:ec01:c3f1:b74f:5edd:63af]) by smtp.gmail.com with ESMTPSA id 82-20020a621555000000b0053655af14easm5133124pfv.45.2022.08.22.16.33.32 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 22 Aug 2022 16:33:33 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH 11/22] target/i386: Remove cur_eip, next_eip arguments to gen_repz* Date: Mon, 22 Aug 2022 16:33:07 -0700 Message-Id: <20220822233318.1728621-12-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220822233318.1728621-1-richard.henderson@linaro.org> References: <20220822233318.1728621-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::634; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x634.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" All callers pass s->base.pc_next and s->pc, which we can just as well compute within the functions. Pull out common helpers and reduce the amount of code under macros. Signed-off-by: Richard Henderson --- target/i386/tcg/translate.c | 116 ++++++++++++++++++------------------ 1 file changed, 57 insertions(+), 59 deletions(-) diff --git a/target/i386/tcg/translate.c b/target/i386/tcg/translate.c index ee8e87a617..38f4589fd2 100644 --- a/target/i386/tcg/translate.c +++ b/target/i386/tcg/translate.c @@ -736,7 +736,7 @@ static bool gen_check_io(DisasContext *s, MemOp ot, TCGv_i32 port, #endif } -static inline void gen_movs(DisasContext *s, MemOp ot) +static void gen_movs(DisasContext *s, MemOp ot) { gen_string_movl_A0_ESI(s); gen_op_ld_v(s, ot, s->T0, s->A0); @@ -1156,18 +1156,18 @@ static inline void gen_jcc1(DisasContext *s, int b, TCGLabel *l1) /* XXX: does not work with gdbstub "ice" single step - not a serious problem */ -static TCGLabel *gen_jz_ecx_string(DisasContext *s, target_ulong next_eip) +static TCGLabel *gen_jz_ecx_string(DisasContext *s) { TCGLabel *l1 = gen_new_label(); TCGLabel *l2 = gen_new_label(); gen_op_jnz_ecx(s, s->aflag, l1); gen_set_label(l2); - gen_jmp_tb(s, next_eip, 1); + gen_jmp_tb(s, s->pc - s->cs_base, 1); gen_set_label(l1); return l2; } -static inline void gen_stos(DisasContext *s, MemOp ot) +static void gen_stos(DisasContext *s, MemOp ot) { gen_op_mov_v_reg(s, MO_32, s->T0, R_EAX); gen_string_movl_A0_EDI(s); @@ -1176,7 +1176,7 @@ static inline void gen_stos(DisasContext *s, MemOp ot) gen_op_add_reg_T0(s, s->aflag, R_EDI); } -static inline void gen_lods(DisasContext *s, MemOp ot) +static void gen_lods(DisasContext *s, MemOp ot) { gen_string_movl_A0_ESI(s); gen_op_ld_v(s, ot, s->T0, s->A0); @@ -1185,7 +1185,7 @@ static inline void gen_lods(DisasContext *s, MemOp ot) gen_op_add_reg_T0(s, s->aflag, R_ESI); } -static inline void gen_scas(DisasContext *s, MemOp ot) +static void gen_scas(DisasContext *s, MemOp ot) { gen_string_movl_A0_EDI(s); gen_op_ld_v(s, ot, s->T1, s->A0); @@ -1194,7 +1194,7 @@ static inline void gen_scas(DisasContext *s, MemOp ot) gen_op_add_reg_T0(s, s->aflag, R_EDI); } -static inline void gen_cmps(DisasContext *s, MemOp ot) +static void gen_cmps(DisasContext *s, MemOp ot) { gen_string_movl_A0_EDI(s); gen_op_ld_v(s, ot, s->T1, s->A0); @@ -1222,7 +1222,7 @@ static void gen_bpt_io(DisasContext *s, TCGv_i32 t_port, int ot) } } -static inline void gen_ins(DisasContext *s, MemOp ot) +static void gen_ins(DisasContext *s, MemOp ot) { gen_string_movl_A0_EDI(s); /* Note: we must do this dummy write first to be restartable in @@ -1238,7 +1238,7 @@ static inline void gen_ins(DisasContext *s, MemOp ot) gen_bpt_io(s, s->tmp2_i32, ot); } -static inline void gen_outs(DisasContext *s, MemOp ot) +static void gen_outs(DisasContext *s, MemOp ot) { gen_string_movl_A0_ESI(s); gen_op_ld_v(s, ot, s->T0, s->A0); @@ -1252,42 +1252,49 @@ static inline void gen_outs(DisasContext *s, MemOp ot) gen_bpt_io(s, s->tmp2_i32, ot); } -/* same method as Valgrind : we generate jumps to current or next - instruction */ -#define GEN_REPZ(op) \ -static inline void gen_repz_ ## op(DisasContext *s, MemOp ot, \ - target_ulong cur_eip, target_ulong next_eip) \ -{ \ - TCGLabel *l2; \ - gen_update_cc_op(s); \ - l2 = gen_jz_ecx_string(s, next_eip); \ - gen_ ## op(s, ot); \ - gen_op_add_reg_im(s, s->aflag, R_ECX, -1); \ - /* a loop would cause two single step exceptions if ECX = 1 \ - before rep string_insn */ \ - if (s->repz_opt) \ - gen_op_jz_ecx(s, s->aflag, l2); \ - gen_jmp(s, cur_eip); \ +/* Generate jumps to current or next instruction */ +static void gen_repz(DisasContext *s, MemOp ot, + void (*fn)(DisasContext *s, MemOp ot)) +{ + TCGLabel *l2; + gen_update_cc_op(s); + l2 = gen_jz_ecx_string(s); + fn(s, ot); + gen_op_add_reg_im(s, s->aflag, R_ECX, -1); + /* + * A loop would cause two single step exceptions if ECX = 1 + * before rep string_insn + */ + if (s->repz_opt) { + gen_op_jz_ecx(s, s->aflag, l2); + } + gen_jmp(s, s->base.pc_next - s->cs_base); } -#define GEN_REPZ2(op) \ -static inline void gen_repz_ ## op(DisasContext *s, MemOp ot, \ - target_ulong cur_eip, \ - target_ulong next_eip, \ - int nz) \ -{ \ - TCGLabel *l2; \ - gen_update_cc_op(s); \ - l2 = gen_jz_ecx_string(s, next_eip); \ - gen_ ## op(s, ot); \ - gen_op_add_reg_im(s, s->aflag, R_ECX, -1); \ - gen_update_cc_op(s); \ - gen_jcc1(s, (JCC_Z << 1) | (nz ^ 1), l2); \ - if (s->repz_opt) \ - gen_op_jz_ecx(s, s->aflag, l2); \ - gen_jmp(s, cur_eip); \ +#define GEN_REPZ(op) \ + static inline void gen_repz_ ## op(DisasContext *s, MemOp ot) \ + { gen_repz(s, ot, gen_##op); } + +static void gen_repz2(DisasContext *s, MemOp ot, int nz, + void (*fn)(DisasContext *s, MemOp ot)) +{ + TCGLabel *l2; + gen_update_cc_op(s); + l2 = gen_jz_ecx_string(s); + fn(s, ot); + gen_op_add_reg_im(s, s->aflag, R_ECX, -1); + gen_update_cc_op(s); + gen_jcc1(s, (JCC_Z << 1) | (nz ^ 1), l2); + if (s->repz_opt) { + gen_op_jz_ecx(s, s->aflag, l2); + } + gen_jmp(s, s->base.pc_next - s->cs_base); } +#define GEN_REPZ2(op) \ + static inline void gen_repz_ ## op(DisasContext *s, MemOp ot, int nz) \ + { gen_repz2(s, ot, nz, gen_##op); } + GEN_REPZ(movs) GEN_REPZ(stos) GEN_REPZ(lods) @@ -6475,8 +6482,7 @@ static bool disas_insn(DisasContext *s, CPUState *cpu) case 0xa5: ot = mo_b_d(b, dflag); if (prefixes & (PREFIX_REPZ | PREFIX_REPNZ)) { - gen_repz_movs(s, ot, s->base.pc_next - s->cs_base, - s->pc - s->cs_base); + gen_repz_movs(s, ot); } else { gen_movs(s, ot); } @@ -6486,8 +6492,7 @@ static bool disas_insn(DisasContext *s, CPUState *cpu) case 0xab: ot = mo_b_d(b, dflag); if (prefixes & (PREFIX_REPZ | PREFIX_REPNZ)) { - gen_repz_stos(s, ot, s->base.pc_next - s->cs_base, - s->pc - s->cs_base); + gen_repz_stos(s, ot); } else { gen_stos(s, ot); } @@ -6496,8 +6501,7 @@ static bool disas_insn(DisasContext *s, CPUState *cpu) case 0xad: ot = mo_b_d(b, dflag); if (prefixes & (PREFIX_REPZ | PREFIX_REPNZ)) { - gen_repz_lods(s, ot, s->base.pc_next - s->cs_base, - s->pc - s->cs_base); + gen_repz_lods(s, ot); } else { gen_lods(s, ot); } @@ -6506,11 +6510,9 @@ static bool disas_insn(DisasContext *s, CPUState *cpu) case 0xaf: ot = mo_b_d(b, dflag); if (prefixes & PREFIX_REPNZ) { - gen_repz_scas(s, ot, s->base.pc_next - s->cs_base, - s->pc - s->cs_base, 1); + gen_repz_scas(s, ot, 1); } else if (prefixes & PREFIX_REPZ) { - gen_repz_scas(s, ot, s->base.pc_next - s->cs_base, - s->pc - s->cs_base, 0); + gen_repz_scas(s, ot, 0); } else { gen_scas(s, ot); } @@ -6520,11 +6522,9 @@ static bool disas_insn(DisasContext *s, CPUState *cpu) case 0xa7: ot = mo_b_d(b, dflag); if (prefixes & PREFIX_REPNZ) { - gen_repz_cmps(s, ot, s->base.pc_next - s->cs_base, - s->pc - s->cs_base, 1); + gen_repz_cmps(s, ot, 1); } else if (prefixes & PREFIX_REPZ) { - gen_repz_cmps(s, ot, s->base.pc_next - s->cs_base, - s->pc - s->cs_base, 0); + gen_repz_cmps(s, ot, 0); } else { gen_cmps(s, ot); } @@ -6542,8 +6542,7 @@ static bool disas_insn(DisasContext *s, CPUState *cpu) gen_io_start(); } if (prefixes & (PREFIX_REPZ | PREFIX_REPNZ)) { - gen_repz_ins(s, ot, s->base.pc_next - s->cs_base, - s->pc - s->cs_base); + gen_repz_ins(s, ot); /* jump generated by gen_repz_ins */ } else { gen_ins(s, ot); @@ -6564,8 +6563,7 @@ static bool disas_insn(DisasContext *s, CPUState *cpu) gen_io_start(); } if (prefixes & (PREFIX_REPZ | PREFIX_REPNZ)) { - gen_repz_outs(s, ot, s->base.pc_next - s->cs_base, - s->pc - s->cs_base); + gen_repz_outs(s, ot); /* jump generated by gen_repz_outs */ } else { gen_outs(s, ot); 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([2602:47:d49d:ec01:c3f1:b74f:5edd:63af]) by smtp.gmail.com with ESMTPSA id 82-20020a621555000000b0053655af14easm5133124pfv.45.2022.08.22.16.33.34 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 22 Aug 2022 16:33:34 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH 12/22] target/i386: Introduce DISAS_JUMP Date: Mon, 22 Aug 2022 16:33:08 -0700 Message-Id: <20220822233318.1728621-13-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220822233318.1728621-1-richard.henderson@linaro.org> References: <20220822233318.1728621-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::52c; envelope-from=richard.henderson@linaro.org; helo=mail-pg1-x52c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Drop the unused dest argument to gen_jr(). Remove most of the calls to gen_jr, and use DISAS_JUMP. Remove some unused loads of eip for lcall and ljmp. Signed-off-by: Richard Henderson --- target/i386/tcg/translate.c | 24 +++++++++++++----------- 1 file changed, 13 insertions(+), 11 deletions(-) diff --git a/target/i386/tcg/translate.c b/target/i386/tcg/translate.c index 38f4589fd2..367a7a335a 100644 --- a/target/i386/tcg/translate.c +++ b/target/i386/tcg/translate.c @@ -135,6 +135,7 @@ typedef struct DisasContext { #define DISAS_EOB_ONLY DISAS_TARGET_0 #define DISAS_EOB_NEXT DISAS_TARGET_1 #define DISAS_EOB_INHIBIT_IRQ DISAS_TARGET_2 +#define DISAS_JUMP DISAS_TARGET_3 /* The environment in which user-only runs is constrained. */ #ifdef CONFIG_USER_ONLY @@ -222,7 +223,7 @@ STUB_HELPER(wrmsr, TCGv_env env) #endif static void gen_eob(DisasContext *s); -static void gen_jr(DisasContext *s, TCGv dest); +static void gen_jr(DisasContext *s); static void gen_jmp(DisasContext *s, target_ulong eip); static void gen_jmp_tb(DisasContext *s, target_ulong eip, int tb_num); static void gen_op(DisasContext *s1, int op, MemOp ot, int d); @@ -2360,7 +2361,7 @@ static void gen_goto_tb(DisasContext *s, int tb_num, target_ulong eip) } else { /* jump to another page */ gen_jmp_im(s, eip); - gen_jr(s, s->tmp0); + gen_jr(s); } } @@ -2729,7 +2730,7 @@ static void gen_eob(DisasContext *s) } /* Jump to register */ -static void gen_jr(DisasContext *s, TCGv dest) +static void gen_jr(DisasContext *s) { do_gen_eob_worker(s, false, false, true); } @@ -5171,7 +5172,7 @@ static bool disas_insn(DisasContext *s, CPUState *cpu) gen_push_v(s, s->T1); gen_op_jmp_v(s->T0); gen_bnd_jmp(s); - gen_jr(s, s->T0); + s->base.is_jmp = DISAS_JUMP; break; case 3: /* lcall Ev */ if (mod == 3) { @@ -5192,8 +5193,7 @@ static bool disas_insn(DisasContext *s, CPUState *cpu) tcg_const_i32(dflag - 1), tcg_const_i32(s->pc - s->cs_base)); } - tcg_gen_ld_tl(s->tmp4, cpu_env, offsetof(CPUX86State, eip)); - gen_jr(s, s->tmp4); + s->base.is_jmp = DISAS_JUMP; break; case 4: /* jmp Ev */ if (dflag == MO_16) { @@ -5201,7 +5201,7 @@ static bool disas_insn(DisasContext *s, CPUState *cpu) } gen_op_jmp_v(s->T0); gen_bnd_jmp(s); - gen_jr(s, s->T0); + s->base.is_jmp = DISAS_JUMP; break; case 5: /* ljmp Ev */ if (mod == 3) { @@ -5219,8 +5219,7 @@ static bool disas_insn(DisasContext *s, CPUState *cpu) gen_op_movl_seg_T0_vm(s, R_CS); gen_op_jmp_v(s->T1); } - tcg_gen_ld_tl(s->tmp4, cpu_env, offsetof(CPUX86State, eip)); - gen_jr(s, s->tmp4); + s->base.is_jmp = DISAS_JUMP; break; case 6: /* push Ev */ gen_push_v(s, s->T0); @@ -6660,7 +6659,7 @@ static bool disas_insn(DisasContext *s, CPUState *cpu) /* Note that gen_pop_T0 uses a zero-extending load. */ gen_op_jmp_v(s->T0); gen_bnd_jmp(s); - gen_jr(s, s->T0); + s->base.is_jmp = DISAS_JUMP; break; case 0xc3: /* ret */ ot = gen_pop_T0(s); @@ -6668,7 +6667,7 @@ static bool disas_insn(DisasContext *s, CPUState *cpu) /* Note that gen_pop_T0 uses a zero-extending load. */ gen_op_jmp_v(s->T0); gen_bnd_jmp(s); - gen_jr(s, s->T0); + s->base.is_jmp = DISAS_JUMP; break; case 0xca: /* lret im */ val = x86_ldsw_code(env, s); @@ -8698,6 +8697,9 @@ static void i386_tr_tb_stop(DisasContextBase *dcbase, CPUState *cpu) gen_update_eip_cur(dc); gen_eob_inhibit_irq(dc, true); break; + case DISAS_JUMP: + gen_jr(dc); + break; default: g_assert_not_reached(); } From patchwork Mon Aug 22 23:33:09 2022 Content-Type: text/plain; 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([2602:47:d49d:ec01:c3f1:b74f:5edd:63af]) by smtp.gmail.com with ESMTPSA id 82-20020a621555000000b0053655af14easm5133124pfv.45.2022.08.22.16.33.35 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 22 Aug 2022 16:33:36 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH 13/22] target/i386: Truncate values for lcall_real to i32 Date: Mon, 22 Aug 2022 16:33:09 -0700 Message-Id: <20220822233318.1728621-14-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220822233318.1728621-1-richard.henderson@linaro.org> References: <20220822233318.1728621-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::52f; envelope-from=richard.henderson@linaro.org; helo=mail-pg1-x52f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Use i32 not int or tl for eip and cs arguments. Signed-off-by: Richard Henderson --- target/i386/helper.h | 2 +- target/i386/tcg/seg_helper.c | 6 ++---- target/i386/tcg/translate.c | 3 ++- 3 files changed, 5 insertions(+), 6 deletions(-) diff --git a/target/i386/helper.h b/target/i386/helper.h index ac3b4d1ee3..39a3c24182 100644 --- a/target/i386/helper.h +++ b/target/i386/helper.h @@ -37,7 +37,7 @@ DEF_HELPER_2(lldt, void, env, int) DEF_HELPER_2(ltr, void, env, int) DEF_HELPER_3(load_seg, void, env, int, int) DEF_HELPER_4(ljmp_protected, void, env, int, tl, tl) -DEF_HELPER_5(lcall_real, void, env, int, tl, int, int) +DEF_HELPER_5(lcall_real, void, env, i32, i32, int, i32) DEF_HELPER_5(lcall_protected, void, env, int, tl, int, tl) DEF_HELPER_2(iret_real, void, env, int) DEF_HELPER_3(iret_protected, void, env, int, int) diff --git a/target/i386/tcg/seg_helper.c b/target/i386/tcg/seg_helper.c index bffd82923f..539189b4d1 100644 --- a/target/i386/tcg/seg_helper.c +++ b/target/i386/tcg/seg_helper.c @@ -1504,14 +1504,12 @@ void helper_ljmp_protected(CPUX86State *env, int new_cs, target_ulong new_eip, } /* real mode call */ -void helper_lcall_real(CPUX86State *env, int new_cs, target_ulong new_eip1, - int shift, int next_eip) +void helper_lcall_real(CPUX86State *env, uint32_t new_cs, uint32_t new_eip, + int shift, uint32_t next_eip) { - int new_eip; uint32_t esp, esp_mask; target_ulong ssp; - new_eip = new_eip1; esp = env->regs[R_ESP]; esp_mask = get_sp_mask(env->segs[R_SS].flags); ssp = env->segs[R_SS].base; diff --git a/target/i386/tcg/translate.c b/target/i386/tcg/translate.c index 367a7a335a..13577f5d7b 100644 --- a/target/i386/tcg/translate.c +++ b/target/i386/tcg/translate.c @@ -5189,7 +5189,8 @@ static bool disas_insn(DisasContext *s, CPUState *cpu) tcg_const_tl(s->pc - s->cs_base)); } else { tcg_gen_trunc_tl_i32(s->tmp2_i32, s->T0); - gen_helper_lcall_real(cpu_env, s->tmp2_i32, s->T1, + tcg_gen_trunc_tl_i32(s->tmp3_i32, s->T1); + gen_helper_lcall_real(cpu_env, s->tmp2_i32, s->tmp3_i32, tcg_const_i32(dflag - 1), tcg_const_i32(s->pc - s->cs_base)); } From patchwork Mon Aug 22 23:33:10 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 599245 Delivered-To: patch@linaro.org Received: by 2002:a05:7000:4388:0:0:0:0 with SMTP id w8csp2042679mae; Mon, 22 Aug 2022 16:56:12 -0700 (PDT) X-Google-Smtp-Source: AA6agR5i2PdGqaXBh1TLmuTTT/LxHYImFP/4Su3fbparr/ktWbYENxOCfP/+tqwbsxqufXiIlRPa X-Received: by 2002:a05:6214:230d:b0:495:d36e:f60c with SMTP id gc13-20020a056214230d00b00495d36ef60cmr18029024qvb.55.1661212572685; Mon, 22 Aug 2022 16:56:12 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1661212572; cv=none; d=google.com; s=arc-20160816; b=wNfXQcOT/zhhuaEnZesgV7M121QUOsayT2eZcD3inFkgjKSvpil/uNSh1EIsRLXi4D /R4DnDE77v+xj22UH+UKHdbj/3q4jM5Jq2O2r9e4XPYT5X3GMDVJCsGTXf/AAdCfC9n8 olkMAkVZuPRbi+zIWnFCZOjm8v+PT0RmnnJcIlkH/YrrwkE/OZ+4C+dvNFZJzUBPesEd wxOLLOH7DBrhwaVjV88WksdT5SWHvD2wM+1jLNik5XC7aywRipYEvMYJ6aOb4NsGqTPb Hl7l0LVvp/ke8UZaff52cfYddSwDFLhoKxWYHtlGZhx6JGYSuCXTKuY6r0zovfbaep0k Xmsw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=3+r7ENE17P6x6oNam3ERs0Fe6mXrQa7o5OMdmOs7Dek=; b=tJEytT/hEIb1FkKW8oRrn9NuT1EoE3QPwAOS+zMDAcCqoBOA8Egum+j26m0qKJi8+M 9U0z/ipE4/almTBvE0LpQY5kX1Hq8sNaumAn/o9sSVCtlNkJSQeZ7ZzWbCrM8CoI6Lp+ qC290J4UG+WosiQjqv2sf8ZZP1GwH9Z6Tdvdbuv+3gV5M8gEsUSsY1GO8zhgCG61Ft37 3Dh02QPfYcCAJE193yfkjs9WyNRZ5hQPrLfJD1VjQ0G1gPa4z/EZH24VHAl8tYe7WpSc 7T5mkIGXicg+NGo+EeGIbSDogZ2baA3Kp5ItGEsLr8NxuZOgp6uwNSWwv3FrH66G93Qc LBcQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Za7FP29l; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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([2602:47:d49d:ec01:c3f1:b74f:5edd:63af]) by smtp.gmail.com with ESMTPSA id 82-20020a621555000000b0053655af14easm5133124pfv.45.2022.08.22.16.33.37 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 22 Aug 2022 16:33:38 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH 14/22] target/i386: Create eip_next_* Date: Mon, 22 Aug 2022 16:33:10 -0700 Message-Id: <20220822233318.1728621-15-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220822233318.1728621-1-richard.henderson@linaro.org> References: <20220822233318.1728621-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::1032; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x1032.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Create helpers for loading the address of the next insn. Use tcg_constant_* in adjacent code where convenient. Signed-off-by: Richard Henderson --- target/i386/tcg/translate.c | 44 +++++++++++++++++++------------------ 1 file changed, 23 insertions(+), 21 deletions(-) diff --git a/target/i386/tcg/translate.c b/target/i386/tcg/translate.c index 13577f5d7b..47d6cd2fce 100644 --- a/target/i386/tcg/translate.c +++ b/target/i386/tcg/translate.c @@ -541,6 +541,16 @@ static TCGv_i32 cur_insn_len_i32(DisasContext *s) return tcg_constant_i32(cur_insn_len(s)); } +static TCGv_i32 eip_next_i32(DisasContext *s) +{ + return tcg_constant_i32(s->pc - s->cs_base); +} + +static TCGv eip_next_tl(DisasContext *s) +{ + return tcg_constant_tl(s->pc - s->cs_base); +} + /* Compute SEG:REG into A0. SEG is selected from the override segment (OVR_SEG) and the default segment (DEF_SEG). OVR_SEG may be -1 to indicate no override. */ @@ -1213,12 +1223,9 @@ static void gen_bpt_io(DisasContext *s, TCGv_i32 t_port, int ot) /* user-mode cpu should not be in IOBPT mode */ g_assert_not_reached(); #else - TCGv_i32 t_size = tcg_const_i32(1 << ot); - TCGv t_next = tcg_const_tl(s->pc - s->cs_base); - + TCGv_i32 t_size = tcg_constant_i32(1 << ot); + TCGv t_next = eip_next_tl(s); gen_helper_bpt_io(cpu_env, t_port, t_size, t_next); - tcg_temp_free_i32(t_size); - tcg_temp_free(t_next); #endif /* CONFIG_USER_ONLY */ } } @@ -5167,9 +5174,7 @@ static bool disas_insn(DisasContext *s, CPUState *cpu) if (dflag == MO_16) { tcg_gen_ext16u_tl(s->T0, s->T0); } - next_eip = s->pc - s->cs_base; - tcg_gen_movi_tl(s->T1, next_eip); - gen_push_v(s, s->T1); + gen_push_v(s, eip_next_tl(s)); gen_op_jmp_v(s->T0); gen_bnd_jmp(s); s->base.is_jmp = DISAS_JUMP; @@ -5185,14 +5190,14 @@ static bool disas_insn(DisasContext *s, CPUState *cpu) if (PE(s) && !VM86(s)) { tcg_gen_trunc_tl_i32(s->tmp2_i32, s->T0); gen_helper_lcall_protected(cpu_env, s->tmp2_i32, s->T1, - tcg_const_i32(dflag - 1), - tcg_const_tl(s->pc - s->cs_base)); + tcg_constant_i32(dflag - 1), + eip_next_tl(s)); } else { tcg_gen_trunc_tl_i32(s->tmp2_i32, s->T0); tcg_gen_trunc_tl_i32(s->tmp3_i32, s->T1); gen_helper_lcall_real(cpu_env, s->tmp2_i32, s->tmp3_i32, - tcg_const_i32(dflag - 1), - tcg_const_i32(s->pc - s->cs_base)); + tcg_constant_i32(dflag - 1), + eip_next_i32(s)); } s->base.is_jmp = DISAS_JUMP; break; @@ -5215,7 +5220,7 @@ static bool disas_insn(DisasContext *s, CPUState *cpu) if (PE(s) && !VM86(s)) { tcg_gen_trunc_tl_i32(s->tmp2_i32, s->T0); gen_helper_ljmp_protected(cpu_env, s->tmp2_i32, s->T1, - tcg_const_tl(s->pc - s->cs_base)); + eip_next_tl(s)); } else { gen_op_movl_seg_T0_vm(s, R_CS); gen_op_jmp_v(s->T1); @@ -6706,8 +6711,8 @@ static bool disas_insn(DisasContext *s, CPUState *cpu) } gen_helper_iret_real(cpu_env, tcg_const_i32(dflag - 1)); } else { - gen_helper_iret_protected(cpu_env, tcg_const_i32(dflag - 1), - tcg_const_i32(s->pc - s->cs_base)); + gen_helper_iret_protected(cpu_env, tcg_constant_i32(dflag - 1), + eip_next_i32(s)); } set_cc_op(s, CC_OP_EFLAGS); s->base.is_jmp = DISAS_EOB_ONLY; @@ -6719,15 +6724,13 @@ static bool disas_insn(DisasContext *s, CPUState *cpu) } else { tval = (int16_t)insn_get(env, s, MO_16); } - next_eip = s->pc - s->cs_base; - tval += next_eip; + tval += s->pc - s->cs_base; if (dflag == MO_16) { tval &= 0xffff; } else if (!CODE64(s)) { tval &= 0xffffffff; } - tcg_gen_movi_tl(s->T0, next_eip); - gen_push_v(s, s->T0); + gen_push_v(s, eip_next_tl(s)); gen_bnd_jmp(s); gen_jmp(s, tval); } @@ -7261,8 +7264,7 @@ static bool disas_insn(DisasContext *s, CPUState *cpu) TCGLabel *l1, *l2, *l3; tval = (int8_t)insn_get(env, s, MO_8); - next_eip = s->pc - s->cs_base; - tval += next_eip; + tval += s->pc - s->cs_base; if (dflag == MO_16) { tval &= 0xffff; } From patchwork Mon Aug 22 23:33:11 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 599248 Delivered-To: patch@linaro.org Received: by 2002:a05:7000:4388:0:0:0:0 with SMTP id w8csp2044130mae; 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([2602:47:d49d:ec01:c3f1:b74f:5edd:63af]) by smtp.gmail.com with ESMTPSA id 82-20020a621555000000b0053655af14easm5133124pfv.45.2022.08.22.16.33.39 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 22 Aug 2022 16:33:39 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH 15/22] target/i386: Use DISAS_TOO_MANY to exit after gen_io_start Date: Mon, 22 Aug 2022 16:33:11 -0700 Message-Id: <20220822233318.1728621-16-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220822233318.1728621-1-richard.henderson@linaro.org> References: <20220822233318.1728621-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::62c; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x62c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" We can set is_jmp early, using only one if, and let that be overwritten by gen_repz_* etc. Signed-off-by: Richard Henderson --- target/i386/tcg/translate.c | 42 +++++++++---------------------------- 1 file changed, 10 insertions(+), 32 deletions(-) diff --git a/target/i386/tcg/translate.c b/target/i386/tcg/translate.c index 47d6cd2fce..cacd52c50f 100644 --- a/target/i386/tcg/translate.c +++ b/target/i386/tcg/translate.c @@ -5492,14 +5492,12 @@ static bool disas_insn(DisasContext *s, CPUState *cpu) } if (tb_cflags(s->base.tb) & CF_USE_ICOUNT) { gen_io_start(); + s->base.is_jmp = DISAS_TOO_MANY; } gen_helper_rdrand(s->T0, cpu_env); rm = (modrm & 7) | REX_B(s); gen_op_mov_reg_v(s, dflag, rm, s->T0); set_cc_op(s, CC_OP_EFLAGS); - if (tb_cflags(s->base.tb) & CF_USE_ICOUNT) { - gen_jmp(s, s->pc - s->cs_base); - } break; default: @@ -6545,15 +6543,12 @@ static bool disas_insn(DisasContext *s, CPUState *cpu) } if (tb_cflags(s->base.tb) & CF_USE_ICOUNT) { gen_io_start(); + s->base.is_jmp = DISAS_TOO_MANY; } if (prefixes & (PREFIX_REPZ | PREFIX_REPNZ)) { gen_repz_ins(s, ot); - /* jump generated by gen_repz_ins */ } else { gen_ins(s, ot); - if (tb_cflags(s->base.tb) & CF_USE_ICOUNT) { - gen_jmp(s, s->pc - s->cs_base); - } } break; case 0x6e: /* outsS */ @@ -6566,15 +6561,12 @@ static bool disas_insn(DisasContext *s, CPUState *cpu) } if (tb_cflags(s->base.tb) & CF_USE_ICOUNT) { gen_io_start(); + s->base.is_jmp = DISAS_TOO_MANY; } if (prefixes & (PREFIX_REPZ | PREFIX_REPNZ)) { gen_repz_outs(s, ot); - /* jump generated by gen_repz_outs */ } else { gen_outs(s, ot); - if (tb_cflags(s->base.tb) & CF_USE_ICOUNT) { - gen_jmp(s, s->pc - s->cs_base); - } } break; @@ -6591,13 +6583,11 @@ static bool disas_insn(DisasContext *s, CPUState *cpu) } if (tb_cflags(s->base.tb) & CF_USE_ICOUNT) { gen_io_start(); + s->base.is_jmp = DISAS_TOO_MANY; } gen_helper_in_func(ot, s->T1, s->tmp2_i32); gen_op_mov_reg_v(s, ot, R_EAX, s->T1); gen_bpt_io(s, s->tmp2_i32, ot); - if (tb_cflags(s->base.tb) & CF_USE_ICOUNT) { - gen_jmp(s, s->pc - s->cs_base); - } break; case 0xe6: case 0xe7: @@ -6609,14 +6599,12 @@ static bool disas_insn(DisasContext *s, CPUState *cpu) } if (tb_cflags(s->base.tb) & CF_USE_ICOUNT) { gen_io_start(); + s->base.is_jmp = DISAS_TOO_MANY; } gen_op_mov_v_reg(s, ot, s->T1, R_EAX); tcg_gen_trunc_tl_i32(s->tmp3_i32, s->T1); gen_helper_out_func(ot, s->tmp2_i32, s->tmp3_i32); gen_bpt_io(s, s->tmp2_i32, ot); - if (tb_cflags(s->base.tb) & CF_USE_ICOUNT) { - gen_jmp(s, s->pc - s->cs_base); - } break; case 0xec: case 0xed: @@ -6628,13 +6616,11 @@ static bool disas_insn(DisasContext *s, CPUState *cpu) } if (tb_cflags(s->base.tb) & CF_USE_ICOUNT) { gen_io_start(); + s->base.is_jmp = DISAS_TOO_MANY; } gen_helper_in_func(ot, s->T1, s->tmp2_i32); gen_op_mov_reg_v(s, ot, R_EAX, s->T1); gen_bpt_io(s, s->tmp2_i32, ot); - if (tb_cflags(s->base.tb) & CF_USE_ICOUNT) { - gen_jmp(s, s->pc - s->cs_base); - } break; case 0xee: case 0xef: @@ -6646,14 +6632,12 @@ static bool disas_insn(DisasContext *s, CPUState *cpu) } if (tb_cflags(s->base.tb) & CF_USE_ICOUNT) { gen_io_start(); + s->base.is_jmp = DISAS_TOO_MANY; } gen_op_mov_v_reg(s, ot, s->T1, R_EAX); tcg_gen_trunc_tl_i32(s->tmp3_i32, s->T1); gen_helper_out_func(ot, s->tmp2_i32, s->tmp3_i32); gen_bpt_io(s, s->tmp2_i32, ot); - if (tb_cflags(s->base.tb) & CF_USE_ICOUNT) { - gen_jmp(s, s->pc - s->cs_base); - } break; /************************/ @@ -7319,11 +7303,9 @@ static bool disas_insn(DisasContext *s, CPUState *cpu) gen_update_eip_cur(s); if (tb_cflags(s->base.tb) & CF_USE_ICOUNT) { gen_io_start(); + s->base.is_jmp = DISAS_TOO_MANY; } gen_helper_rdtsc(cpu_env); - if (tb_cflags(s->base.tb) & CF_USE_ICOUNT) { - gen_jmp(s, s->pc - s->cs_base); - } break; case 0x133: /* rdpmc */ gen_update_cc_op(s); @@ -7780,11 +7762,9 @@ static bool disas_insn(DisasContext *s, CPUState *cpu) gen_update_eip_cur(s); if (tb_cflags(s->base.tb) & CF_USE_ICOUNT) { gen_io_start(); + s->base.is_jmp = DISAS_TOO_MANY; } gen_helper_rdtscp(cpu_env); - if (tb_cflags(s->base.tb) & CF_USE_ICOUNT) { - gen_jmp(s, s->pc - s->cs_base); - } break; default: @@ -8148,6 +8128,7 @@ static bool disas_insn(DisasContext *s, CPUState *cpu) if (tb_cflags(s->base.tb) & CF_USE_ICOUNT) { gen_io_start(); + s->base.is_jmp = DISAS_TOO_MANY; } if (b & 2) { gen_svm_check_intercept(s, SVM_EXIT_WRITE_CR0 + reg); @@ -8158,9 +8139,6 @@ static bool disas_insn(DisasContext *s, CPUState *cpu) gen_svm_check_intercept(s, SVM_EXIT_READ_CR0 + reg); gen_helper_read_crN(s->T0, cpu_env, tcg_constant_i32(reg)); gen_op_mov_reg_v(s, ot, rm, s->T0); - if (tb_cflags(s->base.tb) & CF_USE_ICOUNT) { - gen_jmp(s, s->pc - s->cs_base); - } } break; From patchwork Mon Aug 22 23:33:12 2022 Content-Type: text/plain; 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([2602:47:d49d:ec01:c3f1:b74f:5edd:63af]) by smtp.gmail.com with ESMTPSA id 82-20020a621555000000b0053655af14easm5133124pfv.45.2022.08.22.16.33.40 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 22 Aug 2022 16:33:40 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH 16/22] target/i386: Create gen_jmp_rel Date: Mon, 22 Aug 2022 16:33:12 -0700 Message-Id: <20220822233318.1728621-17-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220822233318.1728621-1-richard.henderson@linaro.org> References: <20220822233318.1728621-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::631; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x631.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Create a common helper for pc-relative branches. The jmp jb insn was missing a mask for CODE32. Signed-off-by: Richard Henderson --- target/i386/tcg/translate.c | 57 ++++++++++++++++++------------------- 1 file changed, 27 insertions(+), 30 deletions(-) diff --git a/target/i386/tcg/translate.c b/target/i386/tcg/translate.c index cacd52c50f..0a2ec85972 100644 --- a/target/i386/tcg/translate.c +++ b/target/i386/tcg/translate.c @@ -226,6 +226,7 @@ static void gen_eob(DisasContext *s); static void gen_jr(DisasContext *s); static void gen_jmp(DisasContext *s, target_ulong eip); static void gen_jmp_tb(DisasContext *s, target_ulong eip, int tb_num); +static void gen_jmp_rel(DisasContext *s, MemOp ot, int diff, int tb_num); static void gen_op(DisasContext *s1, int op, MemOp ot, int d); static void gen_exception_gpf(DisasContext *s); @@ -1173,7 +1174,7 @@ static TCGLabel *gen_jz_ecx_string(DisasContext *s) TCGLabel *l2 = gen_new_label(); gen_op_jnz_ecx(s, s->aflag, l1); gen_set_label(l2); - gen_jmp_tb(s, s->pc - s->cs_base, 1); + gen_jmp_rel(s, MO_32, 0, 1); gen_set_label(l1); return l2; } @@ -2756,6 +2757,18 @@ static void gen_jmp_tb(DisasContext *s, target_ulong eip, int tb_num) } } +static void gen_jmp_rel(DisasContext *s, MemOp ot, int diff, int tb_num) +{ + target_ulong dest = s->pc - s->cs_base + diff; + + if (ot == MO_16) { + dest &= 0xffff; + } else if (!CODE64(s)) { + dest &= 0xffffffff; + } + gen_jmp_tb(s, dest, tb_num); +} + static void gen_jmp(DisasContext *s, target_ulong eip) { gen_jmp_tb(s, eip, 0); @@ -6703,20 +6716,12 @@ static bool disas_insn(DisasContext *s, CPUState *cpu) break; case 0xe8: /* call im */ { - if (dflag != MO_16) { - tval = (int32_t)insn_get(env, s, MO_32); - } else { - tval = (int16_t)insn_get(env, s, MO_16); - } - tval += s->pc - s->cs_base; - if (dflag == MO_16) { - tval &= 0xffff; - } else if (!CODE64(s)) { - tval &= 0xffffffff; - } + int diff = (dflag != MO_16 + ? (int32_t)insn_get(env, s, MO_32) + : (int16_t)insn_get(env, s, MO_16)); gen_push_v(s, eip_next_tl(s)); gen_bnd_jmp(s); - gen_jmp(s, tval); + gen_jmp_rel(s, dflag, diff, 0); } break; case 0x9a: /* lcall im */ @@ -6734,19 +6739,13 @@ static bool disas_insn(DisasContext *s, CPUState *cpu) } goto do_lcall; case 0xe9: /* jmp im */ - if (dflag != MO_16) { - tval = (int32_t)insn_get(env, s, MO_32); - } else { - tval = (int16_t)insn_get(env, s, MO_16); + { + int diff = (dflag != MO_16 + ? (int32_t)insn_get(env, s, MO_32) + : (int16_t)insn_get(env, s, MO_16)); + gen_bnd_jmp(s); + gen_jmp_rel(s, dflag, diff, 0); } - tval += s->pc - s->cs_base; - if (dflag == MO_16) { - tval &= 0xffff; - } else if (!CODE64(s)) { - tval &= 0xffffffff; - } - gen_bnd_jmp(s); - gen_jmp(s, tval); break; case 0xea: /* ljmp im */ { @@ -6763,12 +6762,10 @@ static bool disas_insn(DisasContext *s, CPUState *cpu) } goto do_ljmp; case 0xeb: /* jmp Jb */ - tval = (int8_t)insn_get(env, s, MO_8); - tval += s->pc - s->cs_base; - if (dflag == MO_16) { - tval &= 0xffff; + { + int diff = (int8_t)insn_get(env, s, MO_8); + gen_jmp_rel(s, dflag, diff, 0); } - gen_jmp(s, tval); break; case 0x70 ... 0x7f: /* jcc Jb */ tval = (int8_t)insn_get(env, s, MO_8); From patchwork Mon Aug 22 23:33:13 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 599444 Delivered-To: patch@linaro.org Received: by 2002:a05:7000:4388:0:0:0:0 with SMTP id w8csp2049833mae; Mon, 22 Aug 2022 17:07:30 -0700 (PDT) X-Google-Smtp-Source: AA6agR4ZxXJ/wW/nym4AoLynSSa2rsCPBs+cm3GHmaZVaY2jMdvHl5lu19eRmNyw+tw6DGtlj3a0 X-Received: by 2002:a05:622a:d5:b0:343:5def:8155 with SMTP id p21-20020a05622a00d500b003435def8155mr17431164qtw.642.1661213250047; Mon, 22 Aug 2022 17:07:30 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1661213250; cv=none; d=google.com; s=arc-20160816; b=ZBtXNRkW+rURga3jSkAX8i0jjIuofrfQ1BIGMrsG8Ig+VCS+wYgdA97HHdZ6rAVVzZ HxxYwHyWEzgwG4KlRoS5FczJLY5VRpIdOrTReLrHscnXZbBaZ6G4fhuAMH0mC4HINZIY TxoSqbEzvVQtcZaqgfObA1VzS2THCcB0mhlDPqlyIdMOLMLXAUR7VZ0oRJVLKAoFBZ+E 1b1B8OSKjCGfpgvTvAjNDsXUWYJAmS4UPeJHdP2YaxKmNUksGGOybBKcp118pr/HuY1t MgXGG0Z5ftXaaSxn+NbAyb60eYC9rJFCHOYmByMC22hsqayyFmvmao2oQeCRjdV4lXZr 5cDg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=jF8bW2hxoYDJVrtP30w9zGlMhhg9saC7gHcaAbgRXww=; b=rcPsbl4bbbKEr0a0FVujXXXa5VJSV1OWWsX1Lrrx1RgObi1MpgfifJaoORc9f3GukJ 6Sv8ED2QCsgXk+HD0TFdIcas5Vqrm/f3H75Cg7fhTRN2VvW6mMnVbB53TnOFmJGsmfPr CZ0mFHGliO3Lq69HfW3hJBlqqmhjCYoIj38+NFRVVEFhI76sNeP14uoPfci3u7UrdWve sbl45XPS2Tox8EJnXXBt7zC09dmoo6f1bQZoNY+kMZVRZR/sgElfVSGdG/dPuZbhnzEd CyhB6ScWlFf93+p2mq/r81yl8mcp7U3Wdiq9Nz5oDtv47MPODO1cF4G1D6oQlQAfrYMj 32jg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=F09LuDWP; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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([2602:47:d49d:ec01:c3f1:b74f:5edd:63af]) by smtp.gmail.com with ESMTPSA id 82-20020a621555000000b0053655af14easm5133124pfv.45.2022.08.22.16.33.41 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 22 Aug 2022 16:33:41 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH 17/22] target/i386: Use gen_jmp_rel for loop and jecxz insns Date: Mon, 22 Aug 2022 16:33:13 -0700 Message-Id: <20220822233318.1728621-18-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220822233318.1728621-1-richard.henderson@linaro.org> References: <20220822233318.1728621-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::62c; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x62c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" With gen_jmp_rel, we may chain to the next tb instead of merely writing to eip and exiting. Signed-off-by: Richard Henderson --- target/i386/tcg/translate.c | 21 ++++++--------------- 1 file changed, 6 insertions(+), 15 deletions(-) diff --git a/target/i386/tcg/translate.c b/target/i386/tcg/translate.c index 0a2ec85972..59e7596629 100644 --- a/target/i386/tcg/translate.c +++ b/target/i386/tcg/translate.c @@ -7242,24 +7242,18 @@ static bool disas_insn(DisasContext *s, CPUState *cpu) case 0xe2: /* loop */ case 0xe3: /* jecxz */ { - TCGLabel *l1, *l2, *l3; - - tval = (int8_t)insn_get(env, s, MO_8); - tval += s->pc - s->cs_base; - if (dflag == MO_16) { - tval &= 0xffff; - } + TCGLabel *l1, *l2; + int diff = (int8_t)insn_get(env, s, MO_8); l1 = gen_new_label(); l2 = gen_new_label(); - l3 = gen_new_label(); gen_update_cc_op(s); b &= 3; switch(b) { case 0: /* loopnz */ case 1: /* loopz */ gen_op_add_reg_im(s, s->aflag, R_ECX, -1); - gen_op_jz_ecx(s, s->aflag, l3); + gen_op_jz_ecx(s, s->aflag, l2); gen_jcc1(s, (JCC_Z << 1) | (b ^ 1), l1); break; case 2: /* loop */ @@ -7272,14 +7266,11 @@ static bool disas_insn(DisasContext *s, CPUState *cpu) break; } - gen_set_label(l3); - gen_update_eip_next(s); - tcg_gen_br(l2); + gen_set_label(l2); + gen_jmp_rel(s, MO_32, 0, 1); gen_set_label(l1); - gen_jmp_im(s, tval); - gen_set_label(l2); - s->base.is_jmp = DISAS_EOB_ONLY; + gen_jmp_rel(s, dflag, diff, 0); } break; case 0x130: /* wrmsr */ From patchwork Mon Aug 22 23:33:14 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 599228 Delivered-To: patch@linaro.org Received: by 2002:a05:7000:4388:0:0:0:0 with SMTP id w8csp2040867mae; Mon, 22 Aug 2022 16:51:16 -0700 (PDT) X-Google-Smtp-Source: AA6agR4NEr/MP8ELTLcmBUb55+GgdKJ3kLXZC5qSdsGriYQ0sY6y9zGnII1IeMKPVwPCtL27kp08 X-Received: by 2002:ac8:7f85:0:b0:344:55c5:a2c6 with SMTP id z5-20020ac87f85000000b0034455c5a2c6mr17642012qtj.173.1661212276764; Mon, 22 Aug 2022 16:51:16 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1661212276; cv=none; d=google.com; s=arc-20160816; b=TJo13J1ZjOxh1c3VDHpEz42LOkqPlDjYhDWwCVuvXvZjAgDO6Akqz+t81O0UeJzY7v lh5e0x8WhjuSCpDWhfIpphpT/Ku8Tq81owollaArgMkGB81BewSkFtJGkpQfpPmZAVJt ardnhoq6SQPhrX/NOuNE3WIcRPV0WETCQ5CfM7EdmK+6RpM3OyzD/Bs7KRtHg26VbmkH Nox4WBNQ+6Yzq3vp+07u5u2NExr1Qq7O5jnbt9WRLaOkDHqvbwwu4WdNNNgyJ833tH6I /9J//nKFbWGASBWnWeZDx9LsAgUQEpsn+5Gdau+Z3nhQiS+CAzRnbG3bVZFuz9m2koKH 52Cw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=wlQ7TubdU07QaJgJNanX9RFDjUgVlHllrag0UgF/OJg=; b=uNACYbWxkZGu/JXl9epLvDNmRV9ulEh2v1XvJtQJPKtULRJuvJukJ9tl+Y8ksi5MCr sg4zbwGRgen+ckGF7GzH2FjJTuav9e6ldowalTP4VipK46Cwzk8jDEDF3MdOBIKYfupN tDB+QTJ8c0aXJg0zUapCUTepHIO1YrBPpmehdABYFKkrM7dWCAuUrEo2TE805x6CxZp/ qUQuzfFNMqhR2iqZs8Cmib9/tjAMOo4N3gj/9BrSC/stifErYPzsGYZCU+OVkCR2mdEv X1KYq7Y2u2i5TcZDtECwRhhR/4eazU/hovnTd0Rp+8Q5H2t+vMwzRbvB5B71vRPf9yob y4Zw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=bi0LjhkG; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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([2602:47:d49d:ec01:c3f1:b74f:5edd:63af]) by smtp.gmail.com with ESMTPSA id 82-20020a621555000000b0053655af14easm5133124pfv.45.2022.08.22.16.33.43 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 22 Aug 2022 16:33:43 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH 18/22] target/i386: Use gen_jmp_rel for gen_jcc Date: Mon, 22 Aug 2022 16:33:14 -0700 Message-Id: <20220822233318.1728621-19-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220822233318.1728621-1-richard.henderson@linaro.org> References: <20220822233318.1728621-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::52a; envelope-from=richard.henderson@linaro.org; helo=mail-pg1-x52a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Signed-off-by: Richard Henderson --- target/i386/tcg/translate.c | 57 ++++++++++++------------------------- 1 file changed, 18 insertions(+), 39 deletions(-) diff --git a/target/i386/tcg/translate.c b/target/i386/tcg/translate.c index 59e7596629..6d6c751c10 100644 --- a/target/i386/tcg/translate.c +++ b/target/i386/tcg/translate.c @@ -2373,32 +2373,14 @@ static void gen_goto_tb(DisasContext *s, int tb_num, target_ulong eip) } } -static inline void gen_jcc(DisasContext *s, int b, - target_ulong val, target_ulong next_eip) +static void gen_jcc(DisasContext *s, MemOp ot, int b, int diff) { - TCGLabel *l1, *l2; + TCGLabel *l1 = gen_new_label(); - if (s->jmp_opt) { - l1 = gen_new_label(); - gen_jcc1(s, b, l1); - - gen_goto_tb(s, 0, next_eip); - - gen_set_label(l1); - gen_goto_tb(s, 1, val); - } else { - l1 = gen_new_label(); - l2 = gen_new_label(); - gen_jcc1(s, b, l1); - - gen_jmp_im(s, next_eip); - tcg_gen_br(l2); - - gen_set_label(l1); - gen_jmp_im(s, val); - gen_set_label(l2); - gen_eob(s); - } + gen_jcc1(s, b, l1); + gen_jmp_rel(s, ot, 0, 1); + gen_set_label(l1); + gen_jmp_rel(s, ot, diff, 0); } static void gen_cmovcc1(CPUX86State *env, DisasContext *s, MemOp ot, int b, @@ -4608,7 +4590,6 @@ static bool disas_insn(DisasContext *s, CPUState *cpu) int shift; MemOp ot, aflag, dflag; int modrm, reg, rm, mod, op, opreg, val; - target_ulong next_eip, tval; bool orig_cc_op_dirty = s->cc_op_dirty; CCOp orig_cc_op = s->cc_op; @@ -6768,22 +6749,20 @@ static bool disas_insn(DisasContext *s, CPUState *cpu) } break; case 0x70 ... 0x7f: /* jcc Jb */ - tval = (int8_t)insn_get(env, s, MO_8); - goto do_jcc; + { + int diff = (int8_t)insn_get(env, s, MO_8); + gen_bnd_jmp(s); + gen_jcc(s, dflag, b, diff); + } + break; case 0x180 ... 0x18f: /* jcc Jv */ - if (dflag != MO_16) { - tval = (int32_t)insn_get(env, s, MO_32); - } else { - tval = (int16_t)insn_get(env, s, MO_16); + { + int diff = (dflag != MO_16 + ? (int32_t)insn_get(env, s, MO_32) + : (int16_t)insn_get(env, s, MO_16)); + gen_bnd_jmp(s); + gen_jcc(s, dflag, b, diff); } - do_jcc: - next_eip = s->pc - s->cs_base; - tval += next_eip; - if (dflag == MO_16) { - tval &= 0xffff; - } - gen_bnd_jmp(s); - gen_jcc(s, b, tval, next_eip); break; case 0x190 ... 0x19f: /* setcc Gv */ From patchwork Mon Aug 22 23:33:15 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 599440 Delivered-To: patch@linaro.org Received: by 2002:a05:7000:4388:0:0:0:0 with SMTP id w8csp2046414mae; Mon, 22 Aug 2022 17:02:06 -0700 (PDT) X-Google-Smtp-Source: AA6agR6tya3xDYrFUUMT8zk8pkuVlDzaey2/P0DlRDHssiRILpT5HLiIyRTCJ7Ugk9pCT7Y08GwD X-Received: by 2002:ac8:7dcf:0:b0:344:5777:b934 with SMTP id c15-20020ac87dcf000000b003445777b934mr17919847qte.170.1661212926196; Mon, 22 Aug 2022 17:02:06 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1661212926; cv=none; d=google.com; s=arc-20160816; b=k2QFe1xfb7XDSpNJbsdHXLR5bvmQ+nLJq//XqxPnXPUqLF63j72AMsXAmSxYVryHS4 46vvCOzzqzYEQlm0SSKVysZr2qIKTLLRfkSB1DL2Xz3xnFjl7fHUaxjGh8GHlEPIPFDB fM7ciffghtMOoIKCXaRQepJLPiNZp86QY5K7fZEh6KpDkMfdl4bnkvhAxELal4iNwcl2 XsfTVj1uwrItsUpHmGrQqxYltZ7ybH1sX7rB1JjNnyOl8dYAye9AqEGFc1CgcOKLCXeb W4l8CcMz0XMud0gG5bFl9BvocCnbkf68swACeBnPO3zZ2yk52u0S/cKtEQtA7OqXpRQ0 b/sg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=cs9G+21OdHQdLobnzvJt7VPWHa06hM37G+iQ/J7TZ4Y=; b=rASJiloQmWNZi4HuIUU5pd683m3+lIpKUNHwD4dS0teSR+cBB6ChHxCTPlKq8/egD1 WjhJJwFA22H6XSVS4gSWehSe1TPkZKfRPFXplKGwA7CUrQIuWP/iLJ/H7cEoVNOhBR0+ tRSoh0h6Qux1nSvEOsm8xrWFUK9vav45Vdhf6C8i+6Vs/vVbm2n+2tSmFLgMAmCwrlQU 783geLJDLj2YUR2KXanuAOd7DHyX4t5yPKBPowaaf1z24ouCXHy7a7CvFMhhfnFnfw4E q3eZ3iiBOjTLweZY+K1718E+jjF/tihDd3ucjQQg2LL5XNK5ak3KX6S14m3vMGRCsDtg bY/A== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=p6j0dpO8; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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([2602:47:d49d:ec01:c3f1:b74f:5edd:63af]) by smtp.gmail.com with ESMTPSA id 82-20020a621555000000b0053655af14easm5133124pfv.45.2022.08.22.16.33.44 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 22 Aug 2022 16:33:44 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH 19/22] target/i386: Use gen_jmp_rel for gen_repz* Date: Mon, 22 Aug 2022 16:33:15 -0700 Message-Id: <20220822233318.1728621-20-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220822233318.1728621-1-richard.henderson@linaro.org> References: <20220822233318.1728621-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::436; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x436.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Subtract cur_insn_len to restart the current insn. Signed-off-by: Richard Henderson --- target/i386/tcg/translate.c | 10 ++-------- 1 file changed, 2 insertions(+), 8 deletions(-) diff --git a/target/i386/tcg/translate.c b/target/i386/tcg/translate.c index 6d6c751c10..67c803263b 100644 --- a/target/i386/tcg/translate.c +++ b/target/i386/tcg/translate.c @@ -224,7 +224,6 @@ STUB_HELPER(wrmsr, TCGv_env env) static void gen_eob(DisasContext *s); static void gen_jr(DisasContext *s); -static void gen_jmp(DisasContext *s, target_ulong eip); static void gen_jmp_tb(DisasContext *s, target_ulong eip, int tb_num); static void gen_jmp_rel(DisasContext *s, MemOp ot, int diff, int tb_num); static void gen_op(DisasContext *s1, int op, MemOp ot, int d); @@ -1277,7 +1276,7 @@ static void gen_repz(DisasContext *s, MemOp ot, if (s->repz_opt) { gen_op_jz_ecx(s, s->aflag, l2); } - gen_jmp(s, s->base.pc_next - s->cs_base); + gen_jmp_rel(s, MO_32, -cur_insn_len(s), 0); } #define GEN_REPZ(op) \ @@ -1297,7 +1296,7 @@ static void gen_repz2(DisasContext *s, MemOp ot, int nz, if (s->repz_opt) { gen_op_jz_ecx(s, s->aflag, l2); } - gen_jmp(s, s->base.pc_next - s->cs_base); + gen_jmp_rel(s, MO_32, -cur_insn_len(s), 0); } #define GEN_REPZ2(op) \ @@ -2751,11 +2750,6 @@ static void gen_jmp_rel(DisasContext *s, MemOp ot, int diff, int tb_num) gen_jmp_tb(s, dest, tb_num); } -static void gen_jmp(DisasContext *s, target_ulong eip) -{ - gen_jmp_tb(s, eip, 0); -} - static inline void gen_ldq_env_A0(DisasContext *s, int offset) { tcg_gen_qemu_ld_i64(s->tmp1_i64, s->A0, s->mem_index, MO_LEUQ); From patchwork Mon Aug 22 23:33:16 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 599249 Delivered-To: patch@linaro.org Received: by 2002:a05:7000:4388:0:0:0:0 with SMTP id w8csp2044160mae; Mon, 22 Aug 2022 16:58:49 -0700 (PDT) X-Google-Smtp-Source: AA6agR7B/DCN9wMkhSJmBs6BX0uOo1GpLHSjb1oC5IfZZEIF9/QrHjqkHHReD9yCC1k8UbtJ1/OV X-Received: by 2002:a05:620a:2157:b0:6ba:cc6b:8e99 with SMTP id m23-20020a05620a215700b006bacc6b8e99mr14244373qkm.185.1661212729052; Mon, 22 Aug 2022 16:58:49 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1661212729; cv=none; d=google.com; s=arc-20160816; b=wstElF/h0cofbHH5PuQZtgtoFDCtXHJCCqGu8Sd9PjEyuXEQjM9/J1tefELH6o8G/N mBf/PTgo4eUatioj41VvxIeUohOWeBuu7MLqJQgXrNoPpsn21BNimWXridPBg8GPi2N+ jVrY7q0PzRTe7rzHvLqSKOgwz6Bt56ZiN+yFsaSE1F7E6d7gHqia7qLNCsrIAB9xSUsP Gs0BpaKhkI3v34n5udrUX4avK9iMfnqWQFp91R29B/IE7iMVXFXEye1uKIW32zZ2Z3Bg dFcuyIKOyIIeQTNPA9GraDPUNN+VGVidM1E3P+7+KjdHqIVIcANyAUoeDsU9NBeY+q3U TwLw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=fK7z6rYpSkLAcVSpIb1K7FULXyqRfpPeN4PMueAi39g=; b=hhOR8CoYr7duE1SCxdyzSlrchecfI93eDRiMsVwBY1vlts91Sk/wWf0XeQPdf4NDcx k3BR+6jnEywuIKPYoTmKnW0SZHm1RkD/NWpja/1HOuUkWSKFhtkLqsFA/0fwsU/ISUKi jTMokmGlB4oQmaPOeqEILPHhq5zCSml4/gLM/HRfGyiFAYuVx66wQsZwl/8epbwSTOI8 umcKGICdp06jc7kL9pw7MNm16u+RQ3/Mu/xykgXyRKEjWXu7NNMLlUKBTSqLLmWdZr/X 9Iw28Lph4gGcC0VBdBPAYD+5eBgMExXZPMhzMGb8tQZYSeOm/DRfyMQijWNAWHi6WL0+ j0MQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=DcoSbjrO; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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([2602:47:d49d:ec01:c3f1:b74f:5edd:63af]) by smtp.gmail.com with ESMTPSA id 82-20020a621555000000b0053655af14easm5133124pfv.45.2022.08.22.16.33.45 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 22 Aug 2022 16:33:45 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH 20/22] target/i386: Use gen_jmp_rel for DISAS_TOO_MANY Date: Mon, 22 Aug 2022 16:33:16 -0700 Message-Id: <20220822233318.1728621-21-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220822233318.1728621-1-richard.henderson@linaro.org> References: <20220822233318.1728621-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::1031; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x1031.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" With gen_jmp_rel, we may chain between two translation blocks which may only be separated because of TB size limits. Signed-off-by: Richard Henderson --- target/i386/tcg/translate.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/target/i386/tcg/translate.c b/target/i386/tcg/translate.c index 67c803263b..846040c1ab 100644 --- a/target/i386/tcg/translate.c +++ b/target/i386/tcg/translate.c @@ -8627,6 +8627,9 @@ static void i386_tr_tb_stop(DisasContextBase *dcbase, CPUState *cpu) case DISAS_NORETURN: break; case DISAS_TOO_MANY: + gen_update_cc_op(dc); + gen_jmp_rel(dc, MO_32, 0, 0); + break; case DISAS_EOB_NEXT: gen_update_cc_op(dc); gen_update_eip_cur(dc); From patchwork Mon Aug 22 23:33:17 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 599232 Delivered-To: patch@linaro.org Received: by 2002:a05:7000:4388:0:0:0:0 with SMTP id w8csp2041633mae; Mon, 22 Aug 2022 16:53:33 -0700 (PDT) X-Google-Smtp-Source: AA6agR7qJw7ZSZURzpgS5ni7eA2emDBK+IgBQMi1jzckCiisjDd8Zu0ci16qXGSwCeM5nfs6zfVm X-Received: by 2002:a05:620a:2ea:b0:6bb:264f:bf42 with SMTP id a10-20020a05620a02ea00b006bb264fbf42mr13991759qko.649.1661212413744; Mon, 22 Aug 2022 16:53:33 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1661212413; cv=none; d=google.com; s=arc-20160816; b=UjJyxNspCFHBGYosUUneih9bthKsORb29Jd8fYpcfmRg0/t50hLiiSlmO2LW8ns4n7 E4zFbTLGErgpMtVNFMJMkLDWQ+6r+rXjjaXrMz7GR+VqW+UejfvVorCjdKPyUW0gn3zC 3IPxVWEtPfzvxQ2mHTCIrHIcX91lnmTaQ/+6uytUDFdf2C6JHUGitxTfE6FXMbnDt2xv 81gk7r71sCyjig7rrCXr2DAYl2iKdcFM3ff7xx0tGxd7yhVeldtiGJKA0CrrEk9dj0g3 tEdw8bs1mIVJC01D6m2QBTBHGVE+3tFcOM9vlzd4vQjhnuQTCs5g2KC91Qf/lyJXt81A nd2w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=0Ulk/EP55oycLg6EdOWobL0jk3DQ47228AWYkja4WL8=; b=Y+eEgYxnXls8A3VXmxJZQJ0Xhk2FxBLilIkJhQ0f57VU5pAvp42qQKl8tPv86AcYPM RvdsiEq7tgb2v322g3kHj3We7WcCrd4BBwuiE7BYFhiIy9tCx5yaB+dl1HKtYdKtJ/MO CT/ztDfTx+Ny76SMXkQfj/c224so9Yd6GjaiMD3s0Abgo8nsHH7UHRm3B1hGl23TXDGE KuyGI43jf19G2rWHSGF2iYBZpxf9pnF2CJ+btg/nJvmBV5LHjGpOfN4qT7UPzyVfA5Ri Qs7DHJliAgZkrv+9etl0iIik2rWCGZR58zaRTDIU/9e5Uy0xeZU29Bc8Ddtc2smOP614 HDzw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=x+axZSuX; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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([2602:47:d49d:ec01:c3f1:b74f:5edd:63af]) by smtp.gmail.com with ESMTPSA id 82-20020a621555000000b0053655af14easm5133124pfv.45.2022.08.22.16.33.46 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 22 Aug 2022 16:33:46 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH 21/22] target/i386: Create gen_eip_cur Date: Mon, 22 Aug 2022 16:33:17 -0700 Message-Id: <20220822233318.1728621-22-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220822233318.1728621-1-richard.henderson@linaro.org> References: <20220822233318.1728621-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::42c; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x42c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Signed-off-by: Richard Henderson --- target/i386/tcg/translate.c | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/target/i386/tcg/translate.c b/target/i386/tcg/translate.c index 846040c1ab..6192a3e30e 100644 --- a/target/i386/tcg/translate.c +++ b/target/i386/tcg/translate.c @@ -516,6 +516,11 @@ static inline void gen_op_st_rm_T0_A0(DisasContext *s, int idx, int d) } } +static TCGv gen_eip_cur(DisasContext *s) +{ + return tcg_constant_tl(s->base.pc_next - s->cs_base); +} + static void gen_jmp_im(DisasContext *s, target_ulong pc) { gen_op_jmp_v(tcg_constant_tl(pc)); @@ -6461,7 +6466,7 @@ static bool disas_insn(DisasContext *s, CPUState *cpu) offsetof(CPUX86State, segs[R_CS].selector)); tcg_gen_st16_i32(s->tmp2_i32, cpu_env, offsetof(CPUX86State, fpcs)); - tcg_gen_st_tl(tcg_constant_tl(s->base.pc_next - s->cs_base), + tcg_gen_st_tl(gen_eip_cur(s), cpu_env, offsetof(CPUX86State, fpip)); } } From patchwork Mon Aug 22 23:33:18 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 599244 Delivered-To: patch@linaro.org Received: by 2002:a05:7000:4388:0:0:0:0 with SMTP id w8csp2042652mae; Mon, 22 Aug 2022 16:56:07 -0700 (PDT) X-Google-Smtp-Source: AA6agR4HGDg2mIHStJUwKx/41ZUV3l5nPI94z2eufkX/dT2VWPt9N9VYrsG4lo2FZRHXFrNcjty2 X-Received: by 2002:a0c:8b1a:0:b0:474:222f:39f5 with SMTP id q26-20020a0c8b1a000000b00474222f39f5mr18006147qva.42.1661212567299; Mon, 22 Aug 2022 16:56:07 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1661212567; cv=none; d=google.com; s=arc-20160816; b=Ldia4NfQbOEqOVVEsGhTpMzPRDjCPpV0oWKy01g8to33ojjgfb1awswstPt9F9S3fG ARAuj6o2awdoABuM50gk41t/MoIEz0kiMYzKt4GgVB1PpH8Q8DMTDokGlXxHppH6OwJh 3DENcp1bmtXiYUHQ2NPvWLCr0XroLAJFpI+2qFXAnvJr9JPWjy8yZcAodj16mZBDwH/J ijKZmA4vWoANbUCphBiB4QzYjvhIgj9DVUWfYQK8+QEeSuhjki6U/roKnN22buFW85CC nf6Ouya9VdJ3WImHFSB4QeCVhkFAhV9JbZ4rjv/Hm65sVARrvB9YQranfZFBlrOKw8Ry BdjA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=89w0t8uvG/Xr6P47JSYwDEJn3f8tjoXZNYNMv9BRJFI=; b=pjLiFjb5su8og4o2lt3KyoIluNgPMfGDv5Yo52atz/JRAKxLf7yO6t0zaEpTw0XbBk Bs4xHPteN1RcOEpmPjte4UuvYKTs/XtTNBP7oVts/HglbII9vVJFb0Rwpjr6GrV3PJpy eyL9rBaMtFDvpDnBpYewoEk7k7ake7ueC6BQsJFIQqWQ8GI++kqM8yxl9plaIe3XAkXh KmUxlY/14QNq4oygfJCnKNX+mdEd1mgmWS88qufUwT+ZANGZyFQ2+5lQ3j7khracNi43 0qFUlsJJx2BqWLcmCZhBg8DJSbBlu6eHDB9s6ryfg3PQ6/Wc7T08kNBaBI2N1WnhlJJr 5ukA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=s1gnqxeX; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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([2602:47:d49d:ec01:c3f1:b74f:5edd:63af]) by smtp.gmail.com with ESMTPSA id 82-20020a621555000000b0053655af14easm5133124pfv.45.2022.08.22.16.33.47 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 22 Aug 2022 16:33:48 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH 22/22] target/i386: Enable TARGET_TB_PCREL Date: Mon, 22 Aug 2022 16:33:18 -0700 Message-Id: <20220822233318.1728621-23-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220822233318.1728621-1-richard.henderson@linaro.org> References: <20220822233318.1728621-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::62e; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x62e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Signed-off-by: Richard Henderson --- target/i386/cpu-param.h | 1 + target/i386/tcg/tcg-cpu.c | 8 ++-- target/i386/tcg/translate.c | 86 ++++++++++++++++++++++++++++++------- 3 files changed, 77 insertions(+), 18 deletions(-) diff --git a/target/i386/cpu-param.h b/target/i386/cpu-param.h index 9740bd7abd..51a3f153bf 100644 --- a/target/i386/cpu-param.h +++ b/target/i386/cpu-param.h @@ -24,5 +24,6 @@ #endif #define TARGET_PAGE_BITS 12 #define NB_MMU_MODES 3 +#define TARGET_TB_PCREL 1 #endif diff --git a/target/i386/tcg/tcg-cpu.c b/target/i386/tcg/tcg-cpu.c index 76989a5a9d..74333247c5 100644 --- a/target/i386/tcg/tcg-cpu.c +++ b/target/i386/tcg/tcg-cpu.c @@ -49,9 +49,11 @@ static void x86_cpu_exec_exit(CPUState *cs) static void x86_cpu_synchronize_from_tb(CPUState *cs, const TranslationBlock *tb) { - X86CPU *cpu = X86_CPU(cs); - - cpu->env.eip = tb_pc(tb) - tb->cs_base; + /* The instruction pointer is always up to date with TARGET_TB_PCREL. */ + if (!TARGET_TB_PCREL) { + CPUX86State *env = cs->env_ptr; + env->eip = tb_pc(tb) - tb->cs_base; + } } #ifndef CONFIG_USER_ONLY diff --git a/target/i386/tcg/translate.c b/target/i386/tcg/translate.c index 6192a3e30e..5e252f26b2 100644 --- a/target/i386/tcg/translate.c +++ b/target/i386/tcg/translate.c @@ -64,6 +64,7 @@ /* global register indexes */ static TCGv cpu_cc_dst, cpu_cc_src, cpu_cc_src2; +static TCGv cpu_eip; static TCGv_i32 cpu_cc_op; static TCGv cpu_regs[CPU_NB_REGS]; static TCGv cpu_seg_base[6]; @@ -77,6 +78,7 @@ typedef struct DisasContext { target_ulong pc; /* pc = eip + cs_base */ target_ulong cs_base; /* base of CS segment */ + target_ulong pc_save; MemOp aflag; MemOp dflag; @@ -481,7 +483,7 @@ static void gen_add_A0_im(DisasContext *s, int val) static inline void gen_op_jmp_v(TCGv dest) { - tcg_gen_st_tl(dest, cpu_env, offsetof(CPUX86State, eip)); + tcg_gen_mov_tl(cpu_eip, dest); } static inline @@ -516,24 +518,36 @@ static inline void gen_op_st_rm_T0_A0(DisasContext *s, int idx, int d) } } -static TCGv gen_eip_cur(DisasContext *s) +static void gen_jmp_im(DisasContext *s, target_ulong eip) { - return tcg_constant_tl(s->base.pc_next - s->cs_base); -} - -static void gen_jmp_im(DisasContext *s, target_ulong pc) -{ - gen_op_jmp_v(tcg_constant_tl(pc)); + if (TARGET_TB_PCREL) { + target_ulong eip_save = s->pc_save - s->cs_base; + tcg_gen_addi_tl(cpu_eip, cpu_eip, eip - eip_save); + } else { + tcg_gen_movi_tl(cpu_eip, eip); + } } static void gen_update_eip_cur(DisasContext *s) { gen_jmp_im(s, s->base.pc_next - s->cs_base); + s->pc_save = s->base.pc_next; } static void gen_update_eip_next(DisasContext *s) { gen_jmp_im(s, s->pc - s->cs_base); + s->pc_save = s->pc; +} + +static TCGv gen_eip_cur(DisasContext *s) +{ + if (TARGET_TB_PCREL) { + gen_update_eip_cur(s); + return cpu_eip; + } else { + return tcg_constant_tl(s->base.pc_next - s->cs_base); + } } static int cur_insn_len(DisasContext *s) @@ -548,12 +562,25 @@ static TCGv_i32 cur_insn_len_i32(DisasContext *s) static TCGv_i32 eip_next_i32(DisasContext *s) { - return tcg_constant_i32(s->pc - s->cs_base); + if (TARGET_TB_PCREL) { + TCGv_i32 ret = tcg_temp_new_i32(); + tcg_gen_trunc_tl_i32(ret, cpu_eip); + tcg_gen_addi_i32(ret, ret, s->pc - s->pc_save); + return ret; + } else { + return tcg_constant_i32(s->pc - s->cs_base); + } } static TCGv eip_next_tl(DisasContext *s) { - return tcg_constant_tl(s->pc - s->cs_base); + if (TARGET_TB_PCREL) { + TCGv ret = tcg_temp_new(); + tcg_gen_addi_tl(ret, cpu_eip, s->pc - s->pc_save); + return ret; + } else { + return tcg_constant_tl(s->pc - s->cs_base); + } } /* Compute SEG:REG into A0. SEG is selected from the override segment @@ -2252,7 +2279,12 @@ static TCGv gen_lea_modrm_1(DisasContext *s, AddressParts a) ea = cpu_regs[a.base]; } if (!ea) { - tcg_gen_movi_tl(s->A0, a.disp); + if (TARGET_TB_PCREL && a.base == -2) { + /* With cpu_eip ~= pc_save, the expression is pc-relative. */ + tcg_gen_addi_tl(s->A0, cpu_eip, a.disp - s->pc_save); + } else { + tcg_gen_movi_tl(s->A0, a.disp); + } ea = s->A0; } else if (a.disp != 0) { tcg_gen_addi_tl(s->A0, ea, a.disp); @@ -2366,8 +2398,13 @@ static void gen_goto_tb(DisasContext *s, int tb_num, target_ulong eip) if (translator_use_goto_tb(&s->base, pc)) { /* jump to same page: we can use a direct jump */ - tcg_gen_goto_tb(tb_num); - gen_jmp_im(s, eip); + if (TARGET_TB_PCREL) { + gen_jmp_im(s, eip); + tcg_gen_goto_tb(tb_num); + } else { + tcg_gen_goto_tb(tb_num); + gen_jmp_im(s, eip); + } tcg_gen_exit_tb(s->base.tb, tb_num); s->base.is_jmp = DISAS_NORETURN; } else { @@ -8458,6 +8495,13 @@ void tcg_x86_init(void) [R_EDI] = "edi", [R_EBP] = "ebp", [R_ESP] = "esp", +#endif + }; + static const char eip_name[] = { +#ifdef TARGET_X86_64 + "rip" +#else + "eip" #endif }; static const char seg_base_names[6][8] = { @@ -8484,6 +8528,7 @@ void tcg_x86_init(void) "cc_src"); cpu_cc_src2 = tcg_global_mem_new(cpu_env, offsetof(CPUX86State, cc_src2), "cc_src2"); + cpu_eip = tcg_global_mem_new(cpu_env, offsetof(CPUX86State, eip), eip_name); for (i = 0; i < CPU_NB_REGS; ++i) { cpu_regs[i] = tcg_global_mem_new(cpu_env, @@ -8520,6 +8565,7 @@ static void i386_tr_init_disas_context(DisasContextBase *dcbase, CPUState *cpu) int iopl = (flags >> IOPL_SHIFT) & 3; dc->cs_base = dc->base.tb->cs_base; + dc->pc_save = dc->base.pc_next; dc->flags = flags; #ifndef CONFIG_USER_ONLY dc->cpl = cpl; @@ -8583,9 +8629,14 @@ static void i386_tr_tb_start(DisasContextBase *db, CPUState *cpu) static void i386_tr_insn_start(DisasContextBase *dcbase, CPUState *cpu) { DisasContext *dc = container_of(dcbase, DisasContext, base); + target_ulong pc_arg = dc->base.pc_next; dc->prev_insn_end = tcg_last_op(); - tcg_gen_insn_start(dc->base.pc_next, dc->cc_op); + if (TARGET_TB_PCREL) { + pc_arg -= dc->cs_base; + pc_arg &= ~TARGET_PAGE_MASK; + } + tcg_gen_insn_start(pc_arg, dc->cc_op); } static void i386_tr_translate_insn(DisasContextBase *dcbase, CPUState *cpu) @@ -8686,7 +8737,12 @@ void restore_state_to_opc(CPUX86State *env, TranslationBlock *tb, target_ulong *data) { int cc_op = data[1]; - env->eip = data[0] - tb->cs_base; + + if (TARGET_TB_PCREL) { + env->eip = (env->eip & TARGET_PAGE_MASK) | data[0]; + } else { + env->eip = data[0] - tb->cs_base; + } if (cc_op != CC_OP_DYNAMIC) { env->cc_op = cc_op; }