From patchwork Thu Feb 7 10:49:20 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Amit Kucheria X-Patchwork-Id: 157690 Delivered-To: patch@linaro.org Received: by 2002:a02:48:0:0:0:0:0 with SMTP id 69csp487977jaa; Thu, 7 Feb 2019 02:50:12 -0800 (PST) X-Google-Smtp-Source: AHgI3IYsf42cEH19CyQIOeEbTuF7fxTyoU5VoQjcjAW0pvWJa1MV6OiQwCPsK9UdzPJAAWfqJdWb X-Received: by 2002:a17:902:ba8b:: with SMTP id k11mr15775108pls.177.1549536611951; Thu, 07 Feb 2019 02:50:11 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1549536611; cv=none; d=google.com; s=arc-20160816; b=tnNBl8KrPitVvMImVHoWqJqQKW479ZCoGLoiFpaMOOlRpyrwHmreWx4K3t7AD02UXC FUcZbrEfQ7Jv0QG2fDgKN5IaWJmeqP01v9d2dNiZKPeYlEh96Pfi03RKi152QpM/KTs8 EkKUwYEA26NBphx6CKNYlkZJiRDPgHQQZ+eNtNLWtTMiaLEMFg6bvT5TMJgD70VXwDCp Whu8WuOY22J9H0z2fp276/IB82NI9Xj0mx0kFG8acVNK1RPmDQVwsLa6OaRhYE4NQhlp xocFj+srMcmD+yzj85CmH8bpdGAXx0WzIsYZTvnmQLJ4v8Ejbt5Mi9nyaY51aQsmVBNW E5lg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:references :in-reply-to:message-id:date:subject:cc:to:from:dkim-signature; bh=zy0Ocp2xe2rob5f0FFseaWF46iQU7ldkZ5vVgEtDGww=; b=PBny769jbckDVJTeLCDdfQwWLM1autKhomMDB7CIZY8ghVqImzt7wZMASmlLer5Vbn ZV+lUtCMSTzRH9sdgxBTwyZaMksFVQnx3KnIdq3Fm9v8J8wY6teC8cUmbChIwhL5ktMC Yr/ou5p9Pzv6+u6RtMI80NG/I8KhYtZ6jEhqce86QcCCghcuJzRmxx4Wl3p6hRqKqysH ulB433ppWApOjQDLY1/gu8FlzazcUbaPkxE+oYAn8xd7D5+legQ2wQS3K9BfWlqhmiWg xfW+IZKD8sIPMu4aPBC3kng5pAXPiOawMhZwKv6qjYpmeSrPKLqVfB1WIBXkLQckDcJK 8tAQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=axHX+SI8; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id t71si2001081pfa.244.2019.02.07.02.50.11; Thu, 07 Feb 2019 02:50:11 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=axHX+SI8; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727099AbfBGKuJ (ORCPT + 31 others); Thu, 7 Feb 2019 05:50:09 -0500 Received: from mail-wr1-f66.google.com ([209.85.221.66]:35338 "EHLO mail-wr1-f66.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727074AbfBGKuJ (ORCPT ); Thu, 7 Feb 2019 05:50:09 -0500 Received: by mail-wr1-f66.google.com with SMTP id z18so10246171wrh.2 for ; Thu, 07 Feb 2019 02:50:08 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :in-reply-to:references; bh=zy0Ocp2xe2rob5f0FFseaWF46iQU7ldkZ5vVgEtDGww=; b=axHX+SI8VrHFD9eTNpJyqzKr/RCveBepo8QUYU1jO+KhECXGIKwjFLjwvuD3PAD5VN yfJ0TaSRiiGOt/Bl4Ftg39nXeCBchI7MWk9euMQ8tHXWvHJHDE0QcpjMYrLNll/FchoD frBWBQ0r3WcExc+3PvinKZ4d/Zv0OKBpZYaUAviBVBMpQl9gaLnl2w9sqiOkykXbZXUB /dLz9LICBZyCg6enI4MzGpS/nWHoxYnYrdgrgGF8Zt6I/jl1BYj77ZxKiw119nHCabnh kpO0TRbhh0wJSNk/Mx6T8FutpdLzqwVjbI1IMjJwBUFh4YBjSSgUs05iuUd1aVz5vWQE To1A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:in-reply-to:references; bh=zy0Ocp2xe2rob5f0FFseaWF46iQU7ldkZ5vVgEtDGww=; b=K+Y10q5gXVoItuMESRRJ5uDrcVTEtij1mLSlGw+BxyaP1iHM9jrxzfqsbkHUDQ2Tha lUyxhlGzqnyO3UbPnDrFa6w9lVY+N0utQwYPNVxs7dh/w9K9ERiSlGlHHOk+dMA5MnaG JHL6jiFrquO4IY+guETSK3YJUYS1sBXG2p4y+g4DNSotCFOl7w5XG1lDwrjOLJY+vj/0 IeIYcLakenP5BghLaj0w2/pKX4e2Zl9cIsae/mkWUzkUWwmxhOYQujUDhLfR6xI4+CfH eDI2AHfVi0yYYfFe4FFhlul5zhio14SUhxuYgcXRgyBVNTQGnFZH8Dbc65Vwr+l4Wc1n +LSw== X-Gm-Message-State: AHQUAuY0PVSHjjYB+EJ4fhsA/AOTIFj8wYrkBSIWKKoiJUYp23w0V2G9 9S4gagIgix/XoFRxINBEf1fqGsZbQLQ= X-Received: by 2002:a5d:5101:: with SMTP id s1mr11704265wrt.89.1549536607260; Thu, 07 Feb 2019 02:50:07 -0800 (PST) Received: from localhost ([49.248.196.115]) by smtp.gmail.com with ESMTPSA id y145sm18945331wmd.30.2019.02.07.02.50.05 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 07 Feb 2019 02:50:06 -0800 (PST) From: Amit Kucheria To: linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, bjorn.andersson@linaro.org, edubezval@gmail.com, andy.gross@linaro.org, Daniel Lezcano , David Brown , Zhang Rui Cc: linux-pm@vger.kernel.org Subject: [PATCH v1 02/24] drivers: thermal: tsens: Rename tsens_data Date: Thu, 7 Feb 2019 16:19:20 +0530 Message-Id: X-Mailer: git-send-email 2.17.1 In-Reply-To: References: In-Reply-To: References: Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Rename to tsens_plat_data to denote that it is platform-data passed in at compile-time. Signed-off-by: Amit Kucheria --- drivers/thermal/qcom/tsens-8916.c | 2 +- drivers/thermal/qcom/tsens-8960.c | 2 +- drivers/thermal/qcom/tsens-8974.c | 2 +- drivers/thermal/qcom/tsens-v2.c | 4 ++-- drivers/thermal/qcom/tsens.c | 2 +- drivers/thermal/qcom/tsens.h | 8 ++++---- 6 files changed, 10 insertions(+), 10 deletions(-) -- 2.17.1 diff --git a/drivers/thermal/qcom/tsens-8916.c b/drivers/thermal/qcom/tsens-8916.c index c6dd620ac029..66edcfca1526 100644 --- a/drivers/thermal/qcom/tsens-8916.c +++ b/drivers/thermal/qcom/tsens-8916.c @@ -97,7 +97,7 @@ static const struct tsens_ops ops_8916 = { .get_temp = get_temp_common, }; -const struct tsens_data data_8916 = { +const struct tsens_plat_data data_8916 = { .num_sensors = 5, .ops = &ops_8916, .reg_offsets = { [SROT_CTRL_OFFSET] = 0x0 }, diff --git a/drivers/thermal/qcom/tsens-8960.c b/drivers/thermal/qcom/tsens-8960.c index 0f0adb302a7b..f3c3820e6e8e 100644 --- a/drivers/thermal/qcom/tsens-8960.c +++ b/drivers/thermal/qcom/tsens-8960.c @@ -277,7 +277,7 @@ static const struct tsens_ops ops_8960 = { .resume = resume_8960, }; -const struct tsens_data data_8960 = { +const struct tsens_plat_data data_8960 = { .num_sensors = 11, .ops = &ops_8960, }; diff --git a/drivers/thermal/qcom/tsens-8974.c b/drivers/thermal/qcom/tsens-8974.c index 3d3fda3d731b..5023f20afc14 100644 --- a/drivers/thermal/qcom/tsens-8974.c +++ b/drivers/thermal/qcom/tsens-8974.c @@ -229,7 +229,7 @@ static const struct tsens_ops ops_8974 = { .get_temp = get_temp_common, }; -const struct tsens_data data_8974 = { +const struct tsens_plat_data data_8974 = { .num_sensors = 11, .ops = &ops_8974, .reg_offsets = { [SROT_CTRL_OFFSET] = 0x0 }, diff --git a/drivers/thermal/qcom/tsens-v2.c b/drivers/thermal/qcom/tsens-v2.c index 381a212872bf..cc98a61e093b 100644 --- a/drivers/thermal/qcom/tsens-v2.c +++ b/drivers/thermal/qcom/tsens-v2.c @@ -66,13 +66,13 @@ static const struct tsens_ops ops_generic_v2 = { .get_temp = get_temp_tsens_v2, }; -const struct tsens_data data_tsens_v2 = { +const struct tsens_plat_data data_tsens_v2 = { .ops = &ops_generic_v2, .reg_offsets = { [SROT_CTRL_OFFSET] = 0x4 }, }; /* Kept around for backward compatibility with old msm8996.dtsi */ -const struct tsens_data data_8996 = { +const struct tsens_plat_data data_8996 = { .num_sensors = 13, .ops = &ops_generic_v2, .reg_offsets = { [SROT_CTRL_OFFSET] = 0x4 }, diff --git a/drivers/thermal/qcom/tsens.c b/drivers/thermal/qcom/tsens.c index f1ec9bbe4717..065ec2189bd3 100644 --- a/drivers/thermal/qcom/tsens.c +++ b/drivers/thermal/qcom/tsens.c @@ -102,7 +102,7 @@ static int tsens_probe(struct platform_device *pdev) struct device *dev; struct device_node *np; struct tsens_device *tmdev; - const struct tsens_data *data; + const struct tsens_plat_data *data; const struct of_device_id *id; u32 num_sensors; diff --git a/drivers/thermal/qcom/tsens.h b/drivers/thermal/qcom/tsens.h index 89318523c848..232376c690cc 100644 --- a/drivers/thermal/qcom/tsens.h +++ b/drivers/thermal/qcom/tsens.h @@ -65,13 +65,13 @@ enum reg_list { }; /** - * struct tsens_data - tsens platform data + * struct tsens_plat_data - tsens compile-time platform data * @num_sensors: Number of sensors supported by platform * @ops: operations the tsens instance supports * @hw_ids: Subset of sensors ids supported by platform, if not the first n * @reg_offsets: Register offsets for commonly used registers */ -struct tsens_data { +struct tsens_plat_data { const u32 num_sensors; const struct tsens_ops *ops; const u16 reg_offsets[REG_ARRAY_SIZE]; @@ -117,8 +117,8 @@ int init_common(struct tsens_device *); int get_temp_common(struct tsens_device *, int, int *); /* TSENS v1 targets */ -extern const struct tsens_data data_8916, data_8974, data_8960; +extern const struct tsens_plat_data data_8916, data_8974, data_8960; /* TSENS v2 targets */ -extern const struct tsens_data data_8996, data_tsens_v2; +extern const struct tsens_plat_data data_8996, data_tsens_v2; #endif /* __QCOM_TSENS_H__ */ From patchwork Thu Feb 7 10:49:25 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Amit Kucheria X-Patchwork-Id: 157745 Delivered-To: patch@linaro.org Received: by 2002:a02:48:0:0:0:0:0 with SMTP id 69csp611414jaa; Thu, 7 Feb 2019 04:57:59 -0800 (PST) X-Google-Smtp-Source: AHgI3IaEwJNtsTl0wGDFQzaB+PoIZBAF+T9Ys/0ndJzYFoIFGvt3sHRtZVrvrwdqZo1+zx7v/hJf X-Received: by 2002:a63:bc02:: with SMTP id q2mr14849540pge.116.1549544279709; Thu, 07 Feb 2019 04:57:59 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1549544279; cv=none; d=google.com; s=arc-20160816; b=hJqoJA8lXsKQTFw/MnKdXpTxFmsoBxt+jy2H4F9xWUG2WRoMs/7wBCy03w9De1O/SQ qs97ZA/tyzOD1bxoDXhd0dNEVLapMvnAe6+HYpIR8YFx5+CVZqDUlp4C8h2Q0XEjMZSF c0TBbXm7EFBc31+OAz8EXue74K1Efovqnv/1YY7mzdECGFYWzp1vsoffOx5utV7ju1jb lqq6oeqQTp+XekBiCinTfIllNuVC6hz2ofz4HVyXwJxG0qnwN320t4yWjBa0jErAijxT /It8wjiKTRxTooVI5yLING7MD35v5qNk2CU1mP6bn6YQzzfzRXpd21I6QPCdvsHznfRP T77w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:references :in-reply-to:message-id:date:subject:cc:to:from:dkim-signature; bh=xvoojo3eKvN4L9IBWkrmUvvE40O1kNL0V6YvK2/qLWI=; b=N7gEuHOvxgh100XmqdHm2hk1rnuj6PnY3CZIq3Tz1+ogzJYDu60mOAaNW0uM34EzKX HGKx4fg3PzI1Sjb/hGAVgv+0X/nAfHa1prjTjy4UhoaxpES843w1al8dP7lWSNYzfIG1 LpW3gYWiAe5BA/xM7xh6q63IQOBMAGzZZM7CyAAETTyxl31l+Z9pSnLwcv2dqPvHWwEE oSA0XcnbGOxqQBM47+aCSL5dSyHZ5UNccGFDID4Fs5aUnySAaB95+U0vK/pWBxM8YInu 6LSmank2WWfJgGjdjmHt2Cq6SCaTpMx1U5U8+QMsYsusVyk40Ma+InqwDo750nJMDtmX Hk6w== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=GU6vdUEv; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id m1si9091292pfi.286.2019.02.07.04.57.59; Thu, 07 Feb 2019 04:57:59 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=GU6vdUEv; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727549AbfBGM55 (ORCPT + 31 others); Thu, 7 Feb 2019 07:57:57 -0500 Received: from mail-pl1-f194.google.com ([209.85.214.194]:39187 "EHLO mail-pl1-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726843AbfBGM54 (ORCPT ); Thu, 7 Feb 2019 07:57:56 -0500 Received: by mail-pl1-f194.google.com with SMTP id 101so4749148pld.6 for ; Thu, 07 Feb 2019 04:57:56 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :in-reply-to:references; bh=xvoojo3eKvN4L9IBWkrmUvvE40O1kNL0V6YvK2/qLWI=; b=GU6vdUEvju3j5DwbO0WlBLy1ZvQH2jJ6XLDpWGXp/6M6zUPJ5eyJ8OfzzGWWVX9pBC 8pcaJRRFr4rc7CHQF+uto6DQv48Sl32wD4b4Li78o+Z0FY3re52q+74ZCnt8UuTVC2G8 szkCHa5S5jSVbDU0fjSMlmA2T0EPpCC1z0whbRAZBLl469lK0xpQaOQN0YYLPBDqDrV9 93kl6UGCeUqdjGAWw0C6GzCSR9QZ1npMYymhNN4mjsIYPoPEl4Ye/By0+TbSBozqwhC3 QRLlECdR88w8o2C7ZCpxToRYQ269Wg6ufMOPHKhRY46zI4Q3Arnor1kNk9Ke7isQJ/Ap 9qVw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:in-reply-to:references; bh=xvoojo3eKvN4L9IBWkrmUvvE40O1kNL0V6YvK2/qLWI=; b=W+J9Gb0BrN92UR9uvM2+LGyPL0daWjR94zKf+S7xWtG8LuZX4ktZKFWkjwcBHl2u1U X1pqhnvkUHjO8Gj6ySZuiFSFtL3J9374Uc9LDTlpMZwY6ItBFnNXX9SrvkVF8zJQvgRn lLEmNbxWIUsImmndadPxZJ7YPcj+dgtxnx39llUDzdMS9UZCV0u9c0g15p5G+4Ie6YOG rUowai17CaU+HMud501jwm6xtJ5AtWfwiIq5M880p+u/BwfhRlw3VRlWlURclPkrXH75 bceiiHkaviW9+GMWErj6wnBsD/inGOcOc/prc62nuZGd9v+V6B5O0PB3pLjTazStF4sd yQ2g== X-Gm-Message-State: AHQUAuYko27PDaIZVEoRZRdMfWQH4ahD7Gy0x4T2QlgrlSBJTfIOff33 Hw8pBQr1Zl1DHg0QQrOwRK8W72TyuKY= X-Received: by 2002:a17:902:a50e:: with SMTP id s14mr4383413plq.311.1549544275562; Thu, 07 Feb 2019 04:57:55 -0800 (PST) Received: from localhost ([2402:3a80:c80:4138:75dd:3900:1d90:762f]) by smtp.gmail.com with ESMTPSA id s190sm14292437pfb.103.2019.02.07.04.57.54 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 07 Feb 2019 04:57:54 -0800 (PST) From: Amit Kucheria To: linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, bjorn.andersson@linaro.org, edubezval@gmail.com, andy.gross@linaro.org, Daniel Lezcano , David Brown , Zhang Rui Cc: linux-pm@vger.kernel.org Subject: [PATCH v1 07/24] drivers: thermal: tsens: Rename tsens-8916 to prepare to merge with tsens-8974 Date: Thu, 7 Feb 2019 16:19:25 +0530 Message-Id: X-Mailer: git-send-email 2.17.1 In-Reply-To: References: In-Reply-To: References: Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org 8916 and 8974 use v0.1.0 of the TSENS IP. Rename tsens-8916 to prepare it for merging with tsens-8974 in a later commit. Signed-off-by: Amit Kucheria --- drivers/thermal/qcom/Makefile | 2 +- drivers/thermal/qcom/{tsens-8916.c => tsens-v0_1.c} | 0 2 files changed, 1 insertion(+), 1 deletion(-) rename drivers/thermal/qcom/{tsens-8916.c => tsens-v0_1.c} (100%) -- 2.17.1 diff --git a/drivers/thermal/qcom/Makefile b/drivers/thermal/qcom/Makefile index 717a08600bb5..1f2fafd43dff 100644 --- a/drivers/thermal/qcom/Makefile +++ b/drivers/thermal/qcom/Makefile @@ -1,3 +1,3 @@ obj-$(CONFIG_QCOM_TSENS) += qcom_tsens.o -qcom_tsens-y += tsens.o tsens-common.o tsens-8916.o tsens-8974.o tsens-8960.o tsens-v2.o +qcom_tsens-y += tsens.o tsens-common.o tsens-v0_1.o tsens-8974.o tsens-8960.o tsens-v2.o obj-$(CONFIG_QCOM_SPMI_TEMP_ALARM) += qcom-spmi-temp-alarm.o diff --git a/drivers/thermal/qcom/tsens-8916.c b/drivers/thermal/qcom/tsens-v0_1.c similarity index 100% rename from drivers/thermal/qcom/tsens-8916.c rename to drivers/thermal/qcom/tsens-v0_1.c From patchwork Thu Feb 7 10:49:26 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Amit Kucheria X-Patchwork-Id: 157746 Delivered-To: patch@linaro.org Received: by 2002:a02:48:0:0:0:0:0 with SMTP id 69csp611481jaa; Thu, 7 Feb 2019 04:58:04 -0800 (PST) X-Google-Smtp-Source: AHgI3IbCqpm7+YuFroGjddXBJFTh867sHuRncCrhvSZwPG5fMv1aWx6sId5TD0sAVEemQ1bj2H1U X-Received: by 2002:a63:4611:: with SMTP id t17mr5388059pga.119.1549544283985; Thu, 07 Feb 2019 04:58:03 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1549544283; cv=none; d=google.com; s=arc-20160816; b=CdiNepQRiJ9pa8F0ina1r/qw+ZwOARHOYF6xM7VsmiRsuP1AJrC4U/CUfHcXAxjOXd eK5zuOgCcnwTzypHj980ZYcqzyXw+d4PGma/J8Jr03sTtdSy5USSMlse1PJq/DaZd95M +tX064+FYOJlZjh6C2Kcb/PxogIKbPmVl9F/XjaSlP9BQEBjJEvNTGxWIaWb8gIT19jf ahLHamkgBeNR/PDPXM3FrlpCJlrPzhDAJzo6PgtV+ZnOTqRhpoRXpezRGgmEcPzJUwS7 jM95CM6rLKvSGzS6pCMKV4yJk8LshDDNamWrcw8GaTexaKpFLLzoaxj+c1YzqhkS52FI D3ZA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:references :in-reply-to:message-id:date:subject:cc:to:from:dkim-signature; bh=s/+Bl7ZGzK0cL5xDzP2iXR4sdWkOPpcYJr4QjVnhB2E=; b=f8meV8vj46diSllK2awPBhFeBpIyWPG9L3rm6u5afmlJknLWiURSh1NvcY9E7NV+CT 5L48rJQkZpJ3YOt1+CsGy/VpcxHWnEj7eorRV7LIbmQ/v2cC0D3xpT7+XBEKiXu/xccI 2TpfW0lLBFHoYOFB3YGrEOHqCpKCJI3bprVxsWpguDy53DJhw16q2ToByC3mdmDTQJq8 qQrsP3nr5pTXFi5W3DkwoYS3seTmgnJNf3RDsn/JVkyADMfN0kUs9ps1gIw+mQ/a3XtZ xq63uqeIFXuTzq1x0cDR6iVcHtBkZ+/E3dky1XJOobkAveUv11r+WZydivCBUQg01rt5 +sJw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=kqUUuTqf; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id n3si9014712plk.328.2019.02.07.04.58.03; Thu, 07 Feb 2019 04:58:03 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=kqUUuTqf; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727572AbfBGM6C (ORCPT + 31 others); Thu, 7 Feb 2019 07:58:02 -0500 Received: from mail-pg1-f194.google.com ([209.85.215.194]:35911 "EHLO mail-pg1-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727551AbfBGM6B (ORCPT ); Thu, 7 Feb 2019 07:58:01 -0500 Received: by mail-pg1-f194.google.com with SMTP id n2so4461652pgm.3 for ; Thu, 07 Feb 2019 04:58:01 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :in-reply-to:references; bh=s/+Bl7ZGzK0cL5xDzP2iXR4sdWkOPpcYJr4QjVnhB2E=; b=kqUUuTqf6t77NM2iITIK9KZYMmkFrG7p/o5oOL3T33x4MXiTQionlWirsNZlJWaOWC x9otmvrNrBcI9KmbSy9N84eDBK70OoI5U0i2RCOxTiqw5l4rqFawHU+GfKSetwteRasn xOlLv4lNubM64WrzRuMuNDpi1Iryj/j/ScvOClDM/Bov0Yk1ci6WbxHjqCoDRhPJfVYF KNOTMalZKMQkYpOi8b3V233YGWvVbRrwsvsEDmozoYJR3dZMjVTcP+bfrthnenQGGvDm XSR4vZ/7XQxphTjIPy/4KnX+dLsATTqMnnHpFkRUOGEVIGA4aWdZ/4pFkx5Lre1wqgib UpZw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:in-reply-to:references; bh=s/+Bl7ZGzK0cL5xDzP2iXR4sdWkOPpcYJr4QjVnhB2E=; b=UTDLWnM4sOp3JzMNqn5eVEhLnyNpf7I/VvTPADLngobqk919Yidth0/4cBsEri6tVQ 1G2S2JS90ciGxJTYXJeyO7KBuH4heD/2g/rCUmEfu4qA3M66Xevf5rdjp1CP9JHC+60S jpgxfWv14KkOKD5fPICicVkP2sZ5NEp6ooRE9iGl5tFXQe2eHgYtUdVsFl+PdXM0+qu/ 5Bf739u5le22xLlHSe3CxivzaREs5xbKXOcslGZ/yYQt33Ey90TfrBRmRIoazvlB87OL Rfkl9hBXwukZw8EpOlPGyIFPTmEGIpR3aDT1qlVUR3RKWtiBESCiv7oYMaMxektoEld+ TnzQ== X-Gm-Message-State: AHQUAuYtpLlOCHO3DN6Nq5Db9aPpB1IUI8/w58IpnzZs9AixoDVhAbPg UIRsCe7ZffZ+iCsGk7IIZG9b/e2aHsQ= X-Received: by 2002:aa7:8286:: with SMTP id s6mr15777283pfm.63.1549544280325; Thu, 07 Feb 2019 04:58:00 -0800 (PST) Received: from localhost ([2402:3a80:c80:4138:75dd:3900:1d90:762f]) by smtp.gmail.com with ESMTPSA id i5sm13404835pfg.34.2019.02.07.04.57.58 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 07 Feb 2019 04:57:59 -0800 (PST) From: Amit Kucheria To: linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, bjorn.andersson@linaro.org, edubezval@gmail.com, andy.gross@linaro.org, Daniel Lezcano , David Brown , Zhang Rui Cc: linux-pm@vger.kernel.org Subject: [PATCH v1 08/24] drivers: thermal: tsens: Rename constants to prepare to merge with tsens-8974 Date: Thu, 7 Feb 2019 16:19:26 +0530 Message-Id: <459c70bd13bf8a9231fa3f1c9694231fb9169d18.1549525708.git.amit.kucheria@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: References: In-Reply-To: References: Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Some #defines in tsens-v_0_1.c clash with those in tsens-8974.c. Prefix them with 8916 to avoid the clash so we can merge the two files. Signed-off-by: Amit Kucheria --- drivers/thermal/qcom/tsens-v0_1.c | 88 +++++++++++++++---------------- 1 file changed, 44 insertions(+), 44 deletions(-) -- 2.17.1 diff --git a/drivers/thermal/qcom/tsens-v0_1.c b/drivers/thermal/qcom/tsens-v0_1.c index d4ad4082c800..30909594b1cf 100644 --- a/drivers/thermal/qcom/tsens-v0_1.c +++ b/drivers/thermal/qcom/tsens-v0_1.c @@ -7,37 +7,37 @@ #include "tsens.h" /* eeprom layout data for 8916 */ -#define BASE0_MASK 0x0000007f -#define BASE1_MASK 0xfe000000 -#define BASE0_SHIFT 0 -#define BASE1_SHIFT 25 - -#define S0_P1_MASK 0x00000f80 -#define S1_P1_MASK 0x003e0000 -#define S2_P1_MASK 0xf8000000 -#define S3_P1_MASK 0x000003e0 -#define S4_P1_MASK 0x000f8000 - -#define S0_P2_MASK 0x0001f000 -#define S1_P2_MASK 0x07c00000 -#define S2_P2_MASK 0x0000001f -#define S3_P2_MASK 0x00007c00 -#define S4_P2_MASK 0x01f00000 - -#define S0_P1_SHIFT 7 -#define S1_P1_SHIFT 17 -#define S2_P1_SHIFT 27 -#define S3_P1_SHIFT 5 -#define S4_P1_SHIFT 15 - -#define S0_P2_SHIFT 12 -#define S1_P2_SHIFT 22 -#define S2_P2_SHIFT 0 -#define S3_P2_SHIFT 10 -#define S4_P2_SHIFT 20 - -#define CAL_SEL_MASK 0xe0000000 -#define CAL_SEL_SHIFT 29 +#define MSM8916_BASE0_MASK 0x0000007f +#define MSM8916_BASE1_MASK 0xfe000000 +#define MSM8916_BASE0_SHIFT 0 +#define MSM8916_BASE1_SHIFT 25 + +#define MSM8916_S0_P1_MASK 0x00000f80 +#define MSM8916_S1_P1_MASK 0x003e0000 +#define MSM8916_S2_P1_MASK 0xf8000000 +#define MSM8916_S3_P1_MASK 0x000003e0 +#define MSM8916_S4_P1_MASK 0x000f8000 + +#define MSM8916_S0_P2_MASK 0x0001f000 +#define MSM8916_S1_P2_MASK 0x07c00000 +#define MSM8916_S2_P2_MASK 0x0000001f +#define MSM8916_S3_P2_MASK 0x00007c00 +#define MSM8916_S4_P2_MASK 0x01f00000 + +#define MSM8916_S0_P1_SHIFT 7 +#define MSM8916_S1_P1_SHIFT 17 +#define MSM8916_S2_P1_SHIFT 27 +#define MSM8916_S3_P1_SHIFT 5 +#define MSM8916_S4_P1_SHIFT 15 + +#define MSM8916_S0_P2_SHIFT 12 +#define MSM8916_S1_P2_SHIFT 22 +#define MSM8916_S2_P2_SHIFT 0 +#define MSM8916_S3_P2_SHIFT 10 +#define MSM8916_S4_P2_SHIFT 20 + +#define MSM8916_CAL_SEL_MASK 0xe0000000 +#define MSM8916_CAL_SEL_SHIFT 29 static int calibrate_8916(struct tsens_priv *priv) { @@ -54,27 +54,27 @@ static int calibrate_8916(struct tsens_priv *priv) if (IS_ERR(qfprom_csel)) return PTR_ERR(qfprom_csel); - mode = (qfprom_csel[0] & CAL_SEL_MASK) >> CAL_SEL_SHIFT; + mode = (qfprom_csel[0] & MSM8916_CAL_SEL_MASK) >> MSM8916_CAL_SEL_SHIFT; dev_dbg(priv->dev, "calibration mode is %d\n", mode); switch (mode) { case TWO_PT_CALIB: - base1 = (qfprom_cdata[1] & BASE1_MASK) >> BASE1_SHIFT; - p2[0] = (qfprom_cdata[0] & S0_P2_MASK) >> S0_P2_SHIFT; - p2[1] = (qfprom_cdata[0] & S1_P2_MASK) >> S1_P2_SHIFT; - p2[2] = (qfprom_cdata[1] & S2_P2_MASK) >> S2_P2_SHIFT; - p2[3] = (qfprom_cdata[1] & S3_P2_MASK) >> S3_P2_SHIFT; - p2[4] = (qfprom_cdata[1] & S4_P2_MASK) >> S4_P2_SHIFT; + base1 = (qfprom_cdata[1] & MSM8916_BASE1_MASK) >> MSM8916_BASE1_SHIFT; + p2[0] = (qfprom_cdata[0] & MSM8916_S0_P2_MASK) >> MSM8916_S0_P2_SHIFT; + p2[1] = (qfprom_cdata[0] & MSM8916_S1_P2_MASK) >> MSM8916_S1_P2_SHIFT; + p2[2] = (qfprom_cdata[1] & MSM8916_S2_P2_MASK) >> MSM8916_S2_P2_SHIFT; + p2[3] = (qfprom_cdata[1] & MSM8916_S3_P2_MASK) >> MSM8916_S3_P2_SHIFT; + p2[4] = (qfprom_cdata[1] & MSM8916_S4_P2_MASK) >> MSM8916_S4_P2_SHIFT; for (i = 0; i < priv->num_sensors; i++) p2[i] = ((base1 + p2[i]) << 3); /* Fall through */ case ONE_PT_CALIB2: - base0 = (qfprom_cdata[0] & BASE0_MASK); - p1[0] = (qfprom_cdata[0] & S0_P1_MASK) >> S0_P1_SHIFT; - p1[1] = (qfprom_cdata[0] & S1_P1_MASK) >> S1_P1_SHIFT; - p1[2] = (qfprom_cdata[0] & S2_P1_MASK) >> S2_P1_SHIFT; - p1[3] = (qfprom_cdata[1] & S3_P1_MASK) >> S3_P1_SHIFT; - p1[4] = (qfprom_cdata[1] & S4_P1_MASK) >> S4_P1_SHIFT; + base0 = (qfprom_cdata[0] & MSM8916_BASE0_MASK); + p1[0] = (qfprom_cdata[0] & MSM8916_S0_P1_MASK) >> MSM8916_S0_P1_SHIFT; + p1[1] = (qfprom_cdata[0] & MSM8916_S1_P1_MASK) >> MSM8916_S1_P1_SHIFT; + p1[2] = (qfprom_cdata[0] & MSM8916_S2_P1_MASK) >> MSM8916_S2_P1_SHIFT; + p1[3] = (qfprom_cdata[1] & MSM8916_S3_P1_MASK) >> MSM8916_S3_P1_SHIFT; + p1[4] = (qfprom_cdata[1] & MSM8916_S4_P1_MASK) >> MSM8916_S4_P1_SHIFT; for (i = 0; i < priv->num_sensors; i++) p1[i] = (((base0) + p1[i]) << 3); break; From patchwork Thu Feb 7 10:49:28 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Amit Kucheria X-Patchwork-Id: 157748 Delivered-To: patch@linaro.org Received: by 2002:a02:48:0:0:0:0:0 with SMTP id 69csp611623jaa; Thu, 7 Feb 2019 04:58:15 -0800 (PST) X-Google-Smtp-Source: AHgI3Iaynx+ikG9w8Yg4WIcikYyaEsxNNqYtZMB7ykZDuDx98ZqbSrUgARJPyQDJ7R2+z9GH5uEY X-Received: by 2002:a63:5ec6:: with SMTP id s189mr14148876pgb.357.1549544295160; Thu, 07 Feb 2019 04:58:15 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1549544295; cv=none; d=google.com; s=arc-20160816; b=dpP16sk+2IlDs2K6LgzJ+Vt5Lm+KJ27Ca4jkUYN3X27BSa8uW6YFrtAz9x0R+PekQu ru7fGSrvhXUaw7RfQg+wBCWDM9HZFlH4C4h23kQ0vMeIQxwe85rCM0+Nzu5B7cz43zMw ezMHcz7r5fdcgIzHwMTB2syV9z4ADWTvbQmNXylltLCBtSGRcyG2mMTLr8Q8oTYYSOvJ cEbKmRSoMPjqG7QTBTZZuNHS1TxcLUA3+jcEKRw+CL8y8fOzq9WlWmKgQxpkIIQvY+En EZ0x9f60rGnv21OAvKcSHqoLr6e3f1FX1kXXa7RHDnguUx0/9ObOn/6wiDpzJAtN/7T3 5DYw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:references :in-reply-to:message-id:date:subject:cc:to:from:dkim-signature; bh=kkLcm6nQiT55SYHuLrjQGCCVOD+ep+qOEKkTyL6nYV8=; b=b6FB+c8/0Ab03FO0uGnQ4gQz2xdqDxyR6SbNvj2YZrTxQktEEnIYTWGHJgq12pbgVe E0fkL6Q+F2G4FOxr+dhMR8amxQGrRw5i/d/ZBkXOr2flsNtqx6SIySBMEy8h/BjKIqXj 7oVakRa7JO5ss8LQR4csn6XpWtIoYOInmqpACe/47WYSWYqpxpVxeudIAY63lvZzOz9r dGsmyku2aIsEyYJPGoBvuBOHa5hbVEVuRY5ELKXQoznc73jVnn2Tecle4kwGjYqY0iF0 z88+qa0RRiIzd5M4OLqwG93/n6TTe8PD8Absu6sm7AmVt2mGULKTJ0tBTV4OxAEUmDvN Mn4g== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=UzYNYT4a; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id y29si8740000pgk.376.2019.02.07.04.58.14; Thu, 07 Feb 2019 04:58:15 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=UzYNYT4a; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727617AbfBGM6M (ORCPT + 31 others); Thu, 7 Feb 2019 07:58:12 -0500 Received: from mail-pg1-f194.google.com ([209.85.215.194]:39402 "EHLO mail-pg1-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727601AbfBGM6L (ORCPT ); Thu, 7 Feb 2019 07:58:11 -0500 Received: by mail-pg1-f194.google.com with SMTP id r11so4456634pgp.6 for ; Thu, 07 Feb 2019 04:58:10 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :in-reply-to:references; bh=kkLcm6nQiT55SYHuLrjQGCCVOD+ep+qOEKkTyL6nYV8=; b=UzYNYT4aoaOs0rbb9A6iQO1WRNEqQJSlBR6gVuCjNcxyybr5G5K6WEeC5JJ/jmdVuZ +X6SD1zX7jbY1/w0VzdruhFS5d3xXUU3RLTaGBZUayga4sQfVe2YX1lGGxmNGF0oUPbQ HwvPtCxJaexViuKGbiZUYcpvrIf6xP3tUiIA4Ah1bbY8JJQ6u9C40CLMwCjMlCS5RjSq bMnbWKvs9umdC49A7Ff7oug2QUdjIc3EsfytYiuLsBplyeQrVtD/8AbYtyGW7PLG9f4t hEgGb4UCd9X776GXzfjYs/CeuHzUCQw49UFXeiGkJ8D8FRHxo4Yi96MeuD4HLopu+K1I vMEw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:in-reply-to:references; bh=kkLcm6nQiT55SYHuLrjQGCCVOD+ep+qOEKkTyL6nYV8=; b=bTrEQSxsetgobzlVATB8gtHBNAn3MfR4Zbw2eHgtlnvaAI2O/96Qjru1KT/LybX1+g zfd4jQQKK3Gegf+7RQkPc8T0iYjDXtSG0Dn56SH8lbqeqIjFy0s902JDZ7zaxaGGNws5 VrHVDAqZIjhMsugC9AlXXggLJJZ4YbYyfNvvUaFi8urHHoseIPVt7waCxLU3PDyo2Ie/ 7/mkmP86srF0NEYIOIjYtoZ8CKJjTxfkh1jLlo3CQwayo1JrGMZ10HcqQr9XB741eQcS RrpoJf49atVPKQXPcCTDTJWzZ1qKYf6XkVfjiyDefnaX1iChZlSLzmc6aveLd+EP9FaO BsQw== X-Gm-Message-State: AHQUAub31pUIB01cIMBgFYy3nPKpmnwbLSy5TIlB7KQIRdc15ptyfooB LtNDzwzwU1X+isAkaeg0mCctTc2xsm8= X-Received: by 2002:a62:1709:: with SMTP id 9mr15817152pfx.249.1549544289913; Thu, 07 Feb 2019 04:58:09 -0800 (PST) Received: from localhost ([2402:3a80:c80:4138:75dd:3900:1d90:762f]) by smtp.gmail.com with ESMTPSA id g185sm12052449pfc.174.2019.02.07.04.58.07 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 07 Feb 2019 04:58:08 -0800 (PST) From: Amit Kucheria To: linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, bjorn.andersson@linaro.org, edubezval@gmail.com, andy.gross@linaro.org, Daniel Lezcano , David Brown , Zhang Rui Cc: linux-pm@vger.kernel.org Subject: [PATCH v1 10/24] drivers: thermal: tsens: Introduce reg_fields to deal with register description Date: Thu, 7 Feb 2019 16:19:28 +0530 Message-Id: <700047837730a4b0c1b8c0e70605158cd4b16bb9.1549525708.git.amit.kucheria@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: References: In-Reply-To: References: Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org As we add support for newer versions of the TSENS IP, the current approach isn't scaling because registers and bitfields get moved around, requiring platform-specific hacks in the code. By moving to regmap, we can hide the register level differences away from the code. Define a common set of registers and bit-fields that we care about across the various tsens IP versions. Signed-off-by: Amit Kucheria --- drivers/thermal/qcom/tsens-common.c | 59 ++++++----- drivers/thermal/qcom/tsens-v0_1.c | 51 +++++++++- drivers/thermal/qcom/tsens-v2.c | 140 ++++++++++++++++++++----- drivers/thermal/qcom/tsens.c | 5 +- drivers/thermal/qcom/tsens.h | 153 ++++++++++++++++++++++++++-- 5 files changed, 348 insertions(+), 60 deletions(-) -- 2.17.1 diff --git a/drivers/thermal/qcom/tsens-common.c b/drivers/thermal/qcom/tsens-common.c index af87216ee407..a82e4c928a78 100644 --- a/drivers/thermal/qcom/tsens-common.c +++ b/drivers/thermal/qcom/tsens-common.c @@ -12,13 +12,6 @@ #include #include "tsens.h" -/* SROT */ -#define TSENS_EN BIT(0) - -/* TM */ -#define STATUS_OFFSET 0x30 -#define SN_ADDR_OFFSET 0x4 -#define SN_ST_TEMP_MASK 0x3ff #define CAL_DEGC_PT1 30 #define CAL_DEGC_PT2 120 #define SLOPE_FACTOR 1000 @@ -95,18 +88,14 @@ static inline int code_to_degc(u32 adc_code, const struct tsens_sensor *s) return degc; } -int get_temp_common(struct tsens_priv *priv, int id, int *temp) +int get_temp_common(struct tsens_priv *priv, int i, int *temp) { - struct tsens_sensor *s = &priv->sensor[id]; - u32 code; - unsigned int status_reg; + struct tsens_sensor *s = &priv->sensor[i]; int last_temp = 0, ret; - status_reg = priv->tm_offset + STATUS_OFFSET + s->hw_id * SN_ADDR_OFFSET; - ret = regmap_read(priv->tm_map, status_reg, &code); + ret = regmap_field_read(priv->rf[LAST_TEMP_0 + s->hw_id], &last_temp); if (ret) return ret; - last_temp = code & SN_ST_TEMP_MASK; *temp = code_to_degc(last_temp, s) * 1000; @@ -131,10 +120,9 @@ int __init init_common(struct tsens_priv *priv) { void __iomem *tm_base, *srot_base; struct resource *res; - u32 code; - int ret; + u32 enabled; + int ret, i, j; struct platform_device *op = of_find_device_by_node(priv->dev->of_node); - u16 ctrl_offset = priv->reg_offsets[SROT_CTRL_OFFSET]; if (!op) return -EINVAL; @@ -166,14 +154,35 @@ int __init init_common(struct tsens_priv *priv) if (IS_ERR(priv->tm_map)) return PTR_ERR(priv->tm_map); - if (priv->srot_map) { - ret = regmap_read(priv->srot_map, ctrl_offset, &code); - if (ret) - return ret; - if (!(code & TSENS_EN)) { - dev_err(priv->dev, "tsens device is not enabled\n"); - return -ENODEV; - } + priv->rf[TSENS_EN] = devm_regmap_field_alloc(priv->dev, priv->srot_map, + priv->fields[TSENS_EN]); + if (IS_ERR(priv->rf[TSENS_EN])) + return PTR_ERR(priv->rf[TSENS_EN]); + ret = regmap_field_read(priv->rf[TSENS_EN], &enabled); + if (ret) + return ret; + if (!enabled) { + dev_err(priv->dev, "tsens device is not enabled\n"); + return -ENODEV; + } + + priv->rf[SENSOR_EN] = devm_regmap_field_alloc(priv->dev, priv->srot_map, + priv->fields[SENSOR_EN]); + if (IS_ERR(priv->rf[SENSOR_EN])) + return PTR_ERR(priv->rf[SENSOR_EN]); + + /* now alloc regmap_fields in tm_map */ + for (i = 0, j = LAST_TEMP_0; i < priv->num_sensors; i++, j++) { + priv->rf[j] = devm_regmap_field_alloc(priv->dev, priv->tm_map, + priv->fields[j]); + if (IS_ERR(priv->rf[j])) + return PTR_ERR(priv->rf[j]); + } + for (i = 0, j = VALID_0; i < priv->num_sensors; i++, j++) { + priv->rf[j] = devm_regmap_field_alloc(priv->dev, priv->tm_map, + priv->fields[j]); + if (IS_ERR(priv->rf[j])) + return PTR_ERR(priv->rf[j]); } return 0; diff --git a/drivers/thermal/qcom/tsens-v0_1.c b/drivers/thermal/qcom/tsens-v0_1.c index a6e26be1234f..02907751c201 100644 --- a/drivers/thermal/qcom/tsens-v0_1.c +++ b/drivers/thermal/qcom/tsens-v0_1.c @@ -6,6 +6,15 @@ #include #include "tsens.h" +/* ----- SROT ------ */ +#define SROT_CTRL_OFF 0x0000 + +/* ----- TM ------ */ +#define TM_INT_EN_OFF 0x0000 +#define TM_Sn_UPPER_LOWER_STATUS_CTRL_OFF 0x0004 +#define TM_Sn_STATUS_OFF 0x0030 +#define TM_TRDY_OFF 0x005c + /* eeprom layout data for 8916 */ #define MSM8916_BASE0_MASK 0x0000007f #define MSM8916_BASE1_MASK 0xfe000000 @@ -308,6 +317,41 @@ static int calibrate_8974(struct tsens_priv *priv) return 0; } +/* v0.1: 8916, 8974 */ + +const struct tsens_features tsens_v0_1_feat = { + .ver_info = 0, + .crit_int = 0, + .adc = 1, + .srot_split = 1, +}; + +/* v0.1: 8916, 8974 */ +const struct reg_field tsens_v0_1_regfields[MAX_REGFIELDS] = { + /* ----- SROT ------ */ + /* CTRL_OFFSET */ + [TSENS_EN] = REG_FIELD(SROT_CTRL_OFF, 0, 0), + [TSENS_SW_RST] = REG_FIELD(SROT_CTRL_OFF, 1, 1), + + /* ----- TM ------ */ + /* UPPER_LOWER_INTERRUPT_CTRL */ + [INT_EN] = REG_FIELD(TM_INT_EN_OFF, 0, 0), + /* Sn_STATUS */ + REG_BANK(LAST_TEMP, 0, TM_Sn_STATUS_OFF, 0, 9), + REG_BANK(LAST_TEMP, 1, TM_Sn_STATUS_OFF + 4, 0, 9), + REG_BANK(LAST_TEMP, 2, TM_Sn_STATUS_OFF + 8, 0, 9), + REG_BANK(LAST_TEMP, 3, TM_Sn_STATUS_OFF + 12, 0, 9), + REG_BANK(LAST_TEMP, 4, TM_Sn_STATUS_OFF + 16, 0, 9), + REG_BANK(LAST_TEMP, 5, TM_Sn_STATUS_OFF + 20, 0, 9), + REG_BANK(LAST_TEMP, 6, TM_Sn_STATUS_OFF + 24, 0, 9), + REG_BANK(LAST_TEMP, 7, TM_Sn_STATUS_OFF + 28, 0, 9), + REG_BANK(LAST_TEMP, 8, TM_Sn_STATUS_OFF + 32, 0, 9), + REG_BANK(LAST_TEMP, 9, TM_Sn_STATUS_OFF + 36, 0, 9), + REG_BANK(LAST_TEMP, 10, TM_Sn_STATUS_OFF + 40, 0, 9), + /* TRDY */ + [TRDY] = REG_FIELD(TM_TRDY_OFF, 0, 0), +}; + static const struct tsens_ops ops_8916 = { .init = init_common, .calibrate = calibrate_8916, @@ -317,8 +361,10 @@ static const struct tsens_ops ops_8916 = { const struct tsens_plat_data data_8916 = { .num_sensors = 5, .ops = &ops_8916, - .reg_offsets = { [SROT_CTRL_OFFSET] = 0x0 }, .hw_ids = (unsigned int []){0, 1, 2, 4, 5 }, + + .feat = &tsens_v0_1_feat, + .fields = tsens_v0_1_regfields, }; static const struct tsens_ops ops_8974 = { @@ -330,5 +376,6 @@ static const struct tsens_ops ops_8974 = { const struct tsens_plat_data data_8974 = { .num_sensors = 11, .ops = &ops_8974, - .reg_offsets = { [SROT_CTRL_OFFSET] = 0x0 }, + .feat = &tsens_v0_1_feat, + .fields = tsens_v0_1_regfields, }; diff --git a/drivers/thermal/qcom/tsens-v2.c b/drivers/thermal/qcom/tsens-v2.c index 8b700772d903..962e47c54dca 100644 --- a/drivers/thermal/qcom/tsens-v2.c +++ b/drivers/thermal/qcom/tsens-v2.c @@ -4,50 +4,70 @@ * Copyright (c) 2018, Linaro Limited */ -#include #include +#include #include "tsens.h" -#define STATUS_OFFSET 0xa0 +/* ----- SROT ------ */ +#define SROT_HW_VER_OFF 0x0000 +#define SROT_CTRL_OFF 0x0004 + +/* ----- TM ------ */ +#define TM_INT_EN_OFF 0x0004 +#define TM_UPPER_LOWER_INT_STATUS_OFF 0x0008 +#define TM_UPPER_LOWER_INT_CLEAR_OFF 0x000c +#define TM_UPPER_LOWER_INT_MASK_OFF 0x0010 +#define TM_CRITICAL_INT_STATUS_OFF 0x0014 +#define TM_CRITICAL_INT_CLEAR_OFF 0x0018 +#define TM_CRITICAL_INT_MASK_OFF 0x001c +#define TM_Sn_UPPER_LOWER_THRESHOLD_OFF 0x0020 +#define TM_Sn_CRITICAL_THRESHOLD_OFF 0x0060 +#define TM_Sn_STATUS_OFF 0x00a0 +#define TM_TRDY_OFF 0x00e4 + #define LAST_TEMP_MASK 0xfff -#define STATUS_VALID_BIT BIT(21) static int get_temp_tsens_v2(struct tsens_priv *priv, int id, int *temp) { struct tsens_sensor *s = &priv->sensor[id]; - u32 code; - unsigned int status_reg; - u32 last_temp = 0, last_temp2 = 0, last_temp3 = 0; + u32 temp_idx = LAST_TEMP_0 + s->hw_id; + u32 valid_idx = VALID_0 + s->hw_id; + u32 last_temp = 0, last_temp2 = 0, last_temp3 = 0, valid; int ret; - status_reg = priv->tm_offset + STATUS_OFFSET + s->hw_id * 4; - ret = regmap_read(priv->tm_map, status_reg, &code); + ret = regmap_field_read(priv->rf[temp_idx], &last_temp); if (ret) return ret; - last_temp = code & LAST_TEMP_MASK; - if (code & STATUS_VALID_BIT) + + ret = regmap_field_read(priv->rf[valid_idx], &valid); + if (ret) + return ret; + + if (valid) goto done; /* Try a second time */ - ret = regmap_read(priv->tm_map, status_reg, &code); + ret = regmap_field_read(priv->rf[valid_idx], &valid); if (ret) return ret; - if (code & STATUS_VALID_BIT) { - last_temp = code & LAST_TEMP_MASK; + ret = regmap_field_read(priv->rf[temp_idx], &last_temp2); + if (ret) + return ret; + if (valid) { + last_temp = last_temp2; goto done; - } else { - last_temp2 = code & LAST_TEMP_MASK; } /* Try a third/last time */ - ret = regmap_read(priv->tm_map, status_reg, &code); + ret = regmap_field_read(priv->rf[valid_idx], &valid); if (ret) return ret; - if (code & STATUS_VALID_BIT) { - last_temp = code & LAST_TEMP_MASK; + ret = regmap_field_read(priv->rf[temp_idx], &last_temp3); + if (ret) + return ret; + if (valid) { + last_temp = last_temp3; goto done; - } else { - last_temp3 = code & LAST_TEMP_MASK; } if (last_temp == last_temp2) @@ -61,19 +81,93 @@ static int get_temp_tsens_v2(struct tsens_priv *priv, int id, int *temp) return 0; } +/* v2.x: 8996, 8998, sdm845 */ + +const struct tsens_features tsens_v2_feat = { + .ver_info = 1, + .crit_int = 1, + .adc = 0, + .srot_split = 1, +}; + +const struct reg_field tsens_v2_regfields[MAX_REGFIELDS] = { + /* ----- SROT ------ */ + /* VERSION */ + [VER_MAJOR] = REG_FIELD(SROT_HW_VER_OFF, 28, 31), + [VER_MINOR] = REG_FIELD(SROT_HW_VER_OFF, 16, 27), + [VER_STEP] = REG_FIELD(SROT_HW_VER_OFF, 0, 15), + /* CTRL_OFF */ + [TSENS_EN] = REG_FIELD(SROT_CTRL_OFF, 0, 0), + [TSENS_SW_RST] = REG_FIELD(SROT_CTRL_OFF, 1, 1), + + /* ----- TM ------ */ + /* INTERRUPT ENABLE */ + [LOW_INT_EN] = REG_FIELD(TM_INT_EN_OFF, 0, 0), + [UP_INT_EN] = REG_FIELD(TM_INT_EN_OFF, 1, 1), + [CRIT_INT_EN] = REG_FIELD(TM_INT_EN_OFF, 2, 2), + /* UPPER_LOWER_INTERRUPTS */ + [LOW_INT_STATUS] = REG_FIELD(TM_UPPER_LOWER_INT_STATUS_OFF, 0, 15), + [UP_INT_STATUS] = REG_FIELD(TM_UPPER_LOWER_INT_STATUS_OFF, 16, 31), + [LOW_INT_CLEAR] = REG_FIELD(TM_UPPER_LOWER_INT_CLEAR_OFF, 0, 15), + [UP_INT_CLEAR] = REG_FIELD(TM_UPPER_LOWER_INT_CLEAR_OFF, 16, 31), + [LOW_INT_MASK] = REG_FIELD(TM_UPPER_LOWER_INT_MASK_OFF, 0, 15), + [UP_INT_MASK] = REG_FIELD(TM_UPPER_LOWER_INT_MASK_OFF, 16, 31), + /* CRITICAL_INTERRUPT */ + [CRIT_INT_STATUS] = REG_FIELD(TM_CRITICAL_INT_STATUS_OFF, 0, 15), + [CRIT_INT_CLEAR] = REG_FIELD(TM_UPPER_LOWER_INT_STATUS_OFF, 0, 15), + [CRIT_INT_MASK] = REG_FIELD(TM_UPPER_LOWER_INT_STATUS_OFF, 0, 15), + /* Sn_STATUS */ + REG_BANK(LAST_TEMP, 0, TM_Sn_STATUS_OFF, 0, 11), + REG_BANK(LAST_TEMP, 1, TM_Sn_STATUS_OFF + 4, 0, 11), + REG_BANK(LAST_TEMP, 2, TM_Sn_STATUS_OFF + 8, 0, 11), + REG_BANK(LAST_TEMP, 3, TM_Sn_STATUS_OFF + 12, 0, 11), + REG_BANK(LAST_TEMP, 4, TM_Sn_STATUS_OFF + 16, 0, 11), + REG_BANK(LAST_TEMP, 5, TM_Sn_STATUS_OFF + 20, 0, 11), + REG_BANK(LAST_TEMP, 6, TM_Sn_STATUS_OFF + 24, 0, 11), + REG_BANK(LAST_TEMP, 7, TM_Sn_STATUS_OFF + 28, 0, 11), + REG_BANK(LAST_TEMP, 8, TM_Sn_STATUS_OFF + 32, 0, 11), + REG_BANK(LAST_TEMP, 9, TM_Sn_STATUS_OFF + 36, 0, 11), + REG_BANK(LAST_TEMP, 10, TM_Sn_STATUS_OFF + 40, 0, 11), + REG_BANK(LAST_TEMP, 11, TM_Sn_STATUS_OFF + 44, 0, 11), + REG_BANK(LAST_TEMP, 12, TM_Sn_STATUS_OFF + 48, 0, 11), + REG_BANK(LAST_TEMP, 13, TM_Sn_STATUS_OFF + 52, 0, 11), + REG_BANK(LAST_TEMP, 14, TM_Sn_STATUS_OFF + 56, 0, 11), + REG_BANK(LAST_TEMP, 15, TM_Sn_STATUS_OFF + 60, 0, 11), + REG_BANK(VALID, 0, TM_Sn_STATUS_OFF, 21, 21), + REG_BANK(VALID, 1, TM_Sn_STATUS_OFF + 4, 21, 21), + REG_BANK(VALID, 2, TM_Sn_STATUS_OFF + 8, 21, 21), + REG_BANK(VALID, 3, TM_Sn_STATUS_OFF + 12, 21, 21), + REG_BANK(VALID, 4, TM_Sn_STATUS_OFF + 16, 21, 21), + REG_BANK(VALID, 5, TM_Sn_STATUS_OFF + 20, 21, 21), + REG_BANK(VALID, 6, TM_Sn_STATUS_OFF + 24, 21, 21), + REG_BANK(VALID, 7, TM_Sn_STATUS_OFF + 28, 21, 21), + REG_BANK(VALID, 8, TM_Sn_STATUS_OFF + 32, 21, 21), + REG_BANK(VALID, 9, TM_Sn_STATUS_OFF + 36, 21, 21), + REG_BANK(VALID, 10, TM_Sn_STATUS_OFF + 40, 21, 21), + REG_BANK(VALID, 11, TM_Sn_STATUS_OFF + 44, 21, 21), + REG_BANK(VALID, 12, TM_Sn_STATUS_OFF + 48, 21, 21), + REG_BANK(VALID, 13, TM_Sn_STATUS_OFF + 52, 21, 21), + REG_BANK(VALID, 14, TM_Sn_STATUS_OFF + 56, 21, 21), + REG_BANK(VALID, 15, TM_Sn_STATUS_OFF + 60, 21, 21), + /* TRDY: 1=ready, 0=in progress */ + [TRDY] = REG_FIELD(TM_TRDY_OFF, 0, 0), +}; + static const struct tsens_ops ops_generic_v2 = { .init = init_common, .get_temp = get_temp_tsens_v2, }; const struct tsens_plat_data data_tsens_v2 = { - .ops = &ops_generic_v2, - .reg_offsets = { [SROT_CTRL_OFFSET] = 0x4 }, + .ops = &ops_generic_v2, + .feat = &tsens_v2_feat, + .fields = tsens_v2_regfields, }; /* Kept around for backward compatibility with old msm8996.dtsi */ const struct tsens_plat_data data_8996 = { .num_sensors = 13, .ops = &ops_generic_v2, - .reg_offsets = { [SROT_CTRL_OFFSET] = 0x4 }, + .feat = &tsens_v2_feat, + .fields = tsens_v2_regfields, }; diff --git a/drivers/thermal/qcom/tsens.c b/drivers/thermal/qcom/tsens.c index 0b5be08d515f..b91a0b88d33c 100644 --- a/drivers/thermal/qcom/tsens.c +++ b/drivers/thermal/qcom/tsens.c @@ -144,9 +144,8 @@ static int tsens_probe(struct platform_device *pdev) else priv->sensor[i].hw_id = i; } - for (i = 0; i < REG_ARRAY_SIZE; i++) { - priv->reg_offsets[i] = data->reg_offsets[i]; - } + priv->feat = data->feat; + priv->fields = data->fields; if (!priv->ops || !priv->ops->init || !priv->ops->get_temp) return -EINVAL; diff --git a/drivers/thermal/qcom/tsens.h b/drivers/thermal/qcom/tsens.h index 27b8f74829d9..20d89f8a6c3e 100644 --- a/drivers/thermal/qcom/tsens.h +++ b/drivers/thermal/qcom/tsens.h @@ -11,6 +11,7 @@ #define TWO_PT_CALIB 0x3 #include +#include struct tsens_priv; @@ -58,10 +59,142 @@ struct tsens_ops { int (*get_trend)(struct tsens_priv *priv, int i, enum thermal_trend *trend); }; -enum reg_list { - SROT_CTRL_OFFSET, +#define REG_BANK(_name, _index, _offset, _startbit, _stopbit) \ + [_name##_##_index] = REG_FIELD(_offset, _startbit, _stopbit) - REG_ARRAY_SIZE, +/* reg_field IDs to use as an index into an array */ +enum regfield_ids { + /* ----- SROT ------ */ + /* HW_VER */ + VER_MAJOR = 0, + VER_MINOR, + VER_STEP, + /* CTRL_OFFSET */ + TSENS_EN = 3, + TSENS_SW_RST, + SENSOR_EN, + CODE_OR_TEMP, + + /* ----- TM ------ */ + /* STATUS */ + LAST_TEMP_0 = 7, + LAST_TEMP_1, + LAST_TEMP_2, + LAST_TEMP_3, + LAST_TEMP_4, + LAST_TEMP_5, + LAST_TEMP_6, + LAST_TEMP_7, + LAST_TEMP_8, + LAST_TEMP_9, + LAST_TEMP_10, + LAST_TEMP_11, + LAST_TEMP_12, + LAST_TEMP_13, + LAST_TEMP_14, + LAST_TEMP_15, + VALID_0 = 23, + VALID_1, + VALID_2, + VALID_3, + VALID_4, + VALID_5, + VALID_6, + VALID_7, + VALID_8, + VALID_9, + VALID_10, + VALID_11, + VALID_12, + VALID_13, + VALID_14, + VALID_15, + /* TRDY */ + TRDY, + /* INTERRUPT ENABLE */ + INT_EN, /* PRE-V1, V1.x */ + LOW_INT_EN, /* V2.x */ + UP_INT_EN, /* V2.x */ + CRIT_INT_EN, /* V2.x */ + /* INTERRUPT_STATUS */ + LOW_INT_STATUS, + UP_INT_STATUS, + CRIT_INT_STATUS, + /* INTERRUPT_CLEAR */ + LOW_INT_CLEAR, + UP_INT_CLEAR, + CRIT_INT_CLEAR, + /* INTERRUPT_MASK */ + LOW_INT_MASK, + UP_INT_MASK, + CRIT_INT_MASK, + /* THRESHOLD */ + LOW_THRESH_0, + LOW_THRESH_1, + LOW_THRESH_2, + LOW_THRESH_3, + LOW_THRESH_4, + LOW_THRESH_5, + LOW_THRESH_6, + LOW_THRESH_7, + LOW_THRESH_8, + LOW_THRESH_9, + LOW_THRESH_10, + LOW_THRESH_11, + LOW_THRESH_12, + LOW_THRESH_13, + LOW_THRESH_14, + LOW_THRESH_15, + UP_THRESH_0, + UP_THRESH_1, + UP_THRESH_2, + UP_THRESH_3, + UP_THRESH_4, + UP_THRESH_5, + UP_THRESH_6, + UP_THRESH_7, + UP_THRESH_8, + UP_THRESH_9, + UP_THRESH_10, + UP_THRESH_11, + UP_THRESH_12, + UP_THRESH_13, + UP_THRESH_14, + UP_THRESH_15, + CRIT_THRESH_0, + CRIT_THRESH_1, + CRIT_THRESH_2, + CRIT_THRESH_3, + CRIT_THRESH_4, + CRIT_THRESH_5, + CRIT_THRESH_6, + CRIT_THRESH_7, + CRIT_THRESH_8, + CRIT_THRESH_9, + CRIT_THRESH_10, + CRIT_THRESH_11, + CRIT_THRESH_12, + CRIT_THRESH_13, + CRIT_THRESH_14, + CRIT_THRESH_15, + + /* Keep last */ + MAX_REGFIELDS +}; + +/** + * struct tsens_features - Features supported by the IP + * @ver_info: does the IP export version information? + * @crit_int: does the IP support critical interrupts? + * @adc: do the sensors only output adc code (instead of temperature)? + * @srot_split: does the IP neatly splits the register space into SROT and TM, + * with SROT only being available to secure boot firmware? + */ +struct tsens_features { + unsigned int ver_info:1; + unsigned int crit_int:1; + unsigned int adc:1; + unsigned int srot_split:1; }; /** @@ -69,13 +202,15 @@ enum reg_list { * @num_sensors: Number of sensors supported by platform * @ops: operations the tsens instance supports * @hw_ids: Subset of sensors ids supported by platform, if not the first n - * @reg_offsets: Register offsets for commonly used registers + * @feat: features of the IP + * @fields: bitfield locations */ struct tsens_plat_data { const u32 num_sensors; const struct tsens_ops *ops; - const u16 reg_offsets[REG_ARRAY_SIZE]; unsigned int *hw_ids; + const struct tsens_features *feat; + const struct reg_field *fields; }; /** @@ -94,8 +229,10 @@ struct tsens_context { * @srot_map: pointer to SROT register address space * @tm_offset: deal with old device trees that don't address TM and SROT * address space separately - * @reg_offsets: array of offsets to important regs for this version of IP + * @rf: array of regmap_fields used to store value of the field * @ctx: registers to be saved and restored during suspend/resume + * @feat: features of the IP + * @fields: bitfield locations * @ops: pointer to list of callbacks supported by this device * @sensor: list of sensors attached to this device */ @@ -105,8 +242,10 @@ struct tsens_priv { struct regmap *tm_map; struct regmap *srot_map; u32 tm_offset; - u16 reg_offsets[REG_ARRAY_SIZE]; + struct regmap_field *rf[MAX_REGFIELDS]; struct tsens_context ctx; + const struct tsens_features *feat; + const struct reg_field *fields; const struct tsens_ops *ops; struct tsens_sensor sensor[0]; }; From patchwork Thu Feb 7 10:49:29 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Amit Kucheria X-Patchwork-Id: 157749 Delivered-To: patch@linaro.org Received: by 2002:a02:48:0:0:0:0:0 with SMTP id 69csp611667jaa; Thu, 7 Feb 2019 04:58:18 -0800 (PST) X-Google-Smtp-Source: AHgI3IYdBoW/0VR3HUz8Sj3SG7rYIc1wlz8Ueakun+CDUYIQKQDc0lRX79UdZPz67EENhPeOv6TM X-Received: by 2002:a17:902:32c3:: with SMTP id z61mr16292506plb.114.1549544298418; Thu, 07 Feb 2019 04:58:18 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1549544298; cv=none; d=google.com; s=arc-20160816; b=yu3Rgegs2tlTm8FZcR+RZ1fPDFe/E0HyejeU0ZRpk3gjCS/keUGhMwg2uff199wDHo AKnp/5Otm6Ntg7puKP6RmxZexuQScJdCAEJovldoU5uZb8C7BN9mRoRSpuyIXFsywJbR HE7crL4zdEHxP0j93m6Gz+3zD9/XjYjp4MKpmFrq/qmnL4LwtAQ6SFM3khMco9MM4Tyh kW8lpwCgPmfanL5OjxyWX4PJV3oxV/Z7e+fb6lrVgFOEQDMsXgRhManmltL3Y0wEJ5BF M3M3FbG5GtFgql+jcpv8LAMBBqb21Ty/DOzTsS8hE5b585LlovDlrzfVc+7AA8wBf19m 5+Gg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:references :in-reply-to:message-id:date:subject:cc:to:from:dkim-signature; bh=DhOH74k9WLUHZ9bc4R59OvEiqm0NxoNRQ6D2mdU8GNA=; b=TAttd5DlWscPa8H5XXm/djJygOKDBoeI3VruniX1X5DZ/zvd0+1ANjQcCECt769l5H FoanPzsHdbRHs923o6gcNIHhx0Jcmf0VeNzQI3UcyrdfmImz3PfXYw8LyTRYTCnQymN0 XBSQ9bHEHZ+F/2THYWHhkC75lscIeiALPQVZdbY/v6XS8KL1W6jTW/w7RpjE3LtGXr/W v44LTS4pgkVXzp3QI+ribXrZCUZIJZhruZnBIGjGBX9ZU+JAXE6LG6EvJ3wFTWst5OFD i5arM+XU3g5CBc7Zxs9UveENzzuaDQfOXGu03WckMzyl3NjjLV1esvw1Mr+4np29zKeC 5tcQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="JgfGa/xD"; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id y29si8740000pgk.376.2019.02.07.04.58.18; Thu, 07 Feb 2019 04:58:18 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="JgfGa/xD"; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727632AbfBGM6Q (ORCPT + 31 others); Thu, 7 Feb 2019 07:58:16 -0500 Received: from mail-pf1-f194.google.com ([209.85.210.194]:43114 "EHLO mail-pf1-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727621AbfBGM6O (ORCPT ); Thu, 7 Feb 2019 07:58:14 -0500 Received: by mail-pf1-f194.google.com with SMTP id w73so4723567pfk.10 for ; Thu, 07 Feb 2019 04:58:14 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :in-reply-to:references; bh=DhOH74k9WLUHZ9bc4R59OvEiqm0NxoNRQ6D2mdU8GNA=; b=JgfGa/xDJVcgKShX9fKv+jO2xMqrHtpemIF+1QKP5uUtW9DNeAmGjtKpaXnY8h7Gd2 XyRvEzzkoOir8QfBtzkae+3N99K9yaAiVK0tvCQXWITsyR8D1pEVR0+vkB7tUy5xaE9R Z2064Fx9zf4hSE1lJQfjX3mdjKebq6rMlt+Lw7luRP7ZBCrgaL7OKdnGIMhdu/dqITst mAJT/5mVBQqp/Hz7qiBR8AYD0HWZmcdVa/08A1s4UbhdXmndIpZUYeoUu5a5pUm1014p iS5oY5FiZ2/abEGljYNDhOthiwMkZHucZ9YKsk5xyifCcvV/R46r9N3Q95AMaHlNmQ4n GvIA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:in-reply-to:references; bh=DhOH74k9WLUHZ9bc4R59OvEiqm0NxoNRQ6D2mdU8GNA=; b=pql5bO+EURdZdqHavZ0BTmfJbp4FO3VfiV5mAN/vUJGx4VGlnBmjwbQBcU7mOTG4GX Ods7dYGwuxdiK8eRn/hOaPJPPSCXRCc+cJaH/o7oW7P+MRpPq0vwwtQxRX0udP9Ac81v AojDJB1fs7vbUQFfEDXsyvI5Qxh8I0xx+CmWlqhbR3Dd5AQbes5RC/F+UDk2zBvlqyOJ N+OJjgGzEiUtbBsY0N5id281Mq7VK7xfhfcfwScHxaXL4D4npT+j6t7x0rldJtGiy3B3 3crsjZc1HJ2Wh045pD9dqxzY5gf6AYg09uhx63yZP5Rsm8ifJ1Z/pUvje+BQNXuhI5tE tjcQ== X-Gm-Message-State: AHQUAuZ3MWznjT3AmFPPZgkT4n6GGVpYYOirE5v+Y/tnZ7lWv5nTNIGs BP+JDszyvWqdlgM8Oh4Uom/wQU1U/KE= X-Received: by 2002:a63:2ac9:: with SMTP id q192mr14686638pgq.58.1549544293499; Thu, 07 Feb 2019 04:58:13 -0800 (PST) Received: from localhost ([2402:3a80:c80:4138:75dd:3900:1d90:762f]) by smtp.gmail.com with ESMTPSA id i8sm22019348pfj.18.2019.02.07.04.58.12 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 07 Feb 2019 04:58:13 -0800 (PST) From: Amit Kucheria To: linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, bjorn.andersson@linaro.org, edubezval@gmail.com, andy.gross@linaro.org, Daniel Lezcano , David Brown , Zhang Rui Cc: linux-pm@vger.kernel.org Subject: [PATCH v1 11/24] drivers: thermal: tsens: Save reference to the device pointer and use it Date: Thu, 7 Feb 2019 16:19:29 +0530 Message-Id: X-Mailer: git-send-email 2.17.1 In-Reply-To: References: In-Reply-To: References: Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Code cleanup making it easier to read Signed-off-by: Amit Kucheria --- drivers/thermal/qcom/tsens-common.c | 15 ++++++++------- 1 file changed, 8 insertions(+), 7 deletions(-) -- 2.17.1 diff --git a/drivers/thermal/qcom/tsens-common.c b/drivers/thermal/qcom/tsens-common.c index a82e4c928a78..aae3d71d7eed 100644 --- a/drivers/thermal/qcom/tsens-common.c +++ b/drivers/thermal/qcom/tsens-common.c @@ -119,6 +119,7 @@ static const struct regmap_config tsens_srot_config = { int __init init_common(struct tsens_priv *priv) { void __iomem *tm_base, *srot_base; + struct device *dev = priv->dev; struct resource *res; u32 enabled; int ret, i, j; @@ -135,7 +136,7 @@ int __init init_common(struct tsens_priv *priv) if (IS_ERR(srot_base)) return PTR_ERR(srot_base); - priv->srot_map = devm_regmap_init_mmio(priv->dev, srot_base, + priv->srot_map = devm_regmap_init_mmio(dev, srot_base, &tsens_srot_config); if (IS_ERR(priv->srot_map)) return PTR_ERR(priv->srot_map); @@ -150,11 +151,11 @@ int __init init_common(struct tsens_priv *priv) if (IS_ERR(tm_base)) return PTR_ERR(tm_base); - priv->tm_map = devm_regmap_init_mmio(priv->dev, tm_base, &tsens_config); + priv->tm_map = devm_regmap_init_mmio(dev, tm_base, &tsens_config); if (IS_ERR(priv->tm_map)) return PTR_ERR(priv->tm_map); - priv->rf[TSENS_EN] = devm_regmap_field_alloc(priv->dev, priv->srot_map, + priv->rf[TSENS_EN] = devm_regmap_field_alloc(dev, priv->srot_map, priv->fields[TSENS_EN]); if (IS_ERR(priv->rf[TSENS_EN])) return PTR_ERR(priv->rf[TSENS_EN]); @@ -162,24 +163,24 @@ int __init init_common(struct tsens_priv *priv) if (ret) return ret; if (!enabled) { - dev_err(priv->dev, "tsens device is not enabled\n"); + dev_err(dev, "tsens device is not enabled\n"); return -ENODEV; } - priv->rf[SENSOR_EN] = devm_regmap_field_alloc(priv->dev, priv->srot_map, + priv->rf[SENSOR_EN] = devm_regmap_field_alloc(dev, priv->srot_map, priv->fields[SENSOR_EN]); if (IS_ERR(priv->rf[SENSOR_EN])) return PTR_ERR(priv->rf[SENSOR_EN]); /* now alloc regmap_fields in tm_map */ for (i = 0, j = LAST_TEMP_0; i < priv->num_sensors; i++, j++) { - priv->rf[j] = devm_regmap_field_alloc(priv->dev, priv->tm_map, + priv->rf[j] = devm_regmap_field_alloc(dev, priv->tm_map, priv->fields[j]); if (IS_ERR(priv->rf[j])) return PTR_ERR(priv->rf[j]); } for (i = 0, j = VALID_0; i < priv->num_sensors; i++, j++) { - priv->rf[j] = devm_regmap_field_alloc(priv->dev, priv->tm_map, + priv->rf[j] = devm_regmap_field_alloc(dev, priv->tm_map, priv->fields[j]); if (IS_ERR(priv->rf[j])) return PTR_ERR(priv->rf[j]); From patchwork Thu Feb 7 10:49:30 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Amit Kucheria X-Patchwork-Id: 157750 Delivered-To: patch@linaro.org Received: by 2002:a02:48:0:0:0:0:0 with SMTP id 69csp611775jaa; Thu, 7 Feb 2019 04:58:25 -0800 (PST) X-Google-Smtp-Source: AHgI3IYsEAovT6WJ/P1SSpBiSJeRI+O1qZjIhZCP6fyLiHg/+u1H+gyledQq8rkQMihKgW5t4t1o X-Received: by 2002:a65:6242:: with SMTP id q2mr14755913pgv.245.1549544305776; Thu, 07 Feb 2019 04:58:25 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1549544305; cv=none; d=google.com; s=arc-20160816; b=iq8lRTJNqCgeGsqEA3O1UpI06Vi75anHbSa3HOF2T5k/P5Lq41xKNbTuJF3lps0unD v2wiWaqghyFSwdPNs6LGGND82lgA9rfyLS9zT2ZQ/K4cpTydyim/130jhKGBkOWr52iS MGEneTjKYHurITOAHWyJmVKe3brFBOq+aaWrD5RFlSwrwHNpScWwgPQDh0zPNIjPQqw/ yYdU+vcdX/qwuL12jjg4jjCLxSHt3TuvXKNu5jzjnjZ1DJKydAzvreTZr7co7ajIRJ/x Dny/KEj0pgOMtNcJoz9o1gBgLjIAjdRtt3RPEv+W1RJlEWXdbo1AVy0+DQfJetjSd+Za vbjg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:references :in-reply-to:message-id:date:subject:cc:to:from:dkim-signature; bh=J8JlGYbgg/zRqWjBOjDxf78JZ4BdingiWMKoRwZVd2w=; b=J+ESjV6q2Of+6cKBHdsjhMBGS9XGpuWPBs9TmJ1Ae5X9gbxlxf0y9zLyembLv6uXZz epEus9rrODC6Zn/Er2gicQc5rI0xLatR6oZFeZHoqPyJsAdYBJYDo84DeGyhBbig3Q72 N1bsrLiYIxdZf3NhK0gi5nteRBqBT2JrQaqUV7l5NNCVCNPFOq67eHWu3lFeJB9VIE/J ZP5SPDaoCVD7EI/aUcMo+Vv/ESdJOnY/JgUc7V2JesCpcY4fJl56WQuAk8eerpCQPdjb gMn3jsWrLr8f7cPUmv1X+R072Ldf0z8YL3XBXJ5nr0ABauWfgoLlkI6rUzSXVLOW8Obs nLnw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=PcTJr3vp; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id s80si1276664pgs.165.2019.02.07.04.58.25; Thu, 07 Feb 2019 04:58:25 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=PcTJr3vp; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727649AbfBGM6X (ORCPT + 31 others); Thu, 7 Feb 2019 07:58:23 -0500 Received: from mail-pg1-f196.google.com ([209.85.215.196]:43698 "EHLO mail-pg1-f196.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727191AbfBGM6V (ORCPT ); Thu, 7 Feb 2019 07:58:21 -0500 Received: by mail-pg1-f196.google.com with SMTP id v28so4446606pgk.10 for ; Thu, 07 Feb 2019 04:58:21 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :in-reply-to:references; bh=J8JlGYbgg/zRqWjBOjDxf78JZ4BdingiWMKoRwZVd2w=; b=PcTJr3vpWLYkIMmFeEOBKGBfgKSNXxceX8yGcDYbbqeqJdshZxstNRO6CGrI7fhLqk As9UpgVAA6o/0adAVkyNfBvNJjjF9rg03P/L9BwpoWfNehT92MNoctJopxO6YpR22j8K Hc0hNP2L/IpKga35OXuXSy9K3s3RFhM0rfzZMcbGJuLAknCjLheiq4Cx9EjM/H6Wb5D5 L5cKrr7Boh6S/TK4koiRoTO+4GSvkJBuvKRHbSkoS/PJ5FekzvxEMq2u3zY8VxC1DqbS n4gXCBNHtfiFbtGbmZZgGq/LnC9QKcNRapZ4llki65mSKuHpjvw/P3S6WOLfIGXIVuBS W2Ww== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:in-reply-to:references; bh=J8JlGYbgg/zRqWjBOjDxf78JZ4BdingiWMKoRwZVd2w=; b=XFgJ2I423YYyH/J0Up42QWBGy7t9qLvNM5akgMaAVy1ScmhCaj2Y1PTEUoEFCRYufD mfmKkPJlnNTIqj+zMbggQJ/P7Qbu0H1OxWlug1UE1O0ldklnX3rmXsLbDXc920ee7UNp rE3T9xeZZDQURV5JVmyGb36RBL4swjTwM9U75p/o0VMllHGEVeHAGeAxcZoGi3WRhMX5 JwUEplWp3RiBTTAtb7EBia/mWSteSolsXZ+Lrr24O0jX1fG5P5t4ZhxAaC+WdZG0Guj5 hs9UkW8ttZf/bOcKDNv9373CabJn3R2YGBatl31ytU721AlTjA531opGv+HNPFtDhHKZ 1Bkg== X-Gm-Message-State: AHQUAubn+3QPCaU7YqjGI9lF4a0g5wXx67hr0CVbFONwgJFLxBMfTl6z KJ7+bx2Y52RTOdELr8Mj31esGbwskgk= X-Received: by 2002:a63:20e:: with SMTP id 14mr822167pgc.161.1549544300932; Thu, 07 Feb 2019 04:58:20 -0800 (PST) Received: from localhost ([2402:3a80:c80:4138:75dd:3900:1d90:762f]) by smtp.gmail.com with ESMTPSA id p6sm12876887pfn.53.2019.02.07.04.58.16 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 07 Feb 2019 04:58:20 -0800 (PST) From: Amit Kucheria To: linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, bjorn.andersson@linaro.org, edubezval@gmail.com, andy.gross@linaro.org, Daniel Lezcano , David Brown , Zhang Rui Cc: linux-pm@vger.kernel.org Subject: [PATCH v1 12/24] drivers: thermal: tsens: Don't print error message on -EPROBE_DEFER Date: Thu, 7 Feb 2019 16:19:30 +0530 Message-Id: <999576e731dfc32bdd382ebb6506bf3d8f4f79e9.1549525708.git.amit.kucheria@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: References: In-Reply-To: References: Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org We print a calibration failure message on -EPROBE_DEFER from nvmem/qfprom as follows: [ 3.003090] qcom-tsens 4a9000.thermal-sensor: version: 1.4 [ 3.005376] qcom-tsens 4a9000.thermal-sensor: tsens calibration failed [ 3.113248] qcom-tsens 4a9000.thermal-sensor: version: 1.4 This confuses people when, in fact, calibration succeeds later when nvmem/qfprom device is available. Don't print this message on a -EPROBE_DEFER. Signed-off-by: Amit Kucheria --- drivers/thermal/qcom/tsens.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) -- 2.17.1 diff --git a/drivers/thermal/qcom/tsens.c b/drivers/thermal/qcom/tsens.c index b91a0b88d33c..057b33353ba3 100644 --- a/drivers/thermal/qcom/tsens.c +++ b/drivers/thermal/qcom/tsens.c @@ -159,7 +159,8 @@ static int tsens_probe(struct platform_device *pdev) if (priv->ops->calibrate) { ret = priv->ops->calibrate(priv); if (ret < 0) { - dev_err(dev, "tsens calibration failed\n"); + if (ret != -EPROBE_DEFER) + dev_err(dev, "tsens calibration failed\n"); return ret; } } From patchwork Thu Feb 7 10:49:31 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Amit Kucheria X-Patchwork-Id: 157751 Delivered-To: patch@linaro.org Received: by 2002:a02:48:0:0:0:0:0 with SMTP id 69csp611928jaa; Thu, 7 Feb 2019 04:58:36 -0800 (PST) X-Google-Smtp-Source: AHgI3IYuKGNB3C3/7KmLLmn9yYSJhtbAtkGJV0ON8HRLP+qyJ6u7uOxIHUZf9Zmd4k2udE2MpSBG X-Received: by 2002:a63:c22:: with SMTP id b34mr4348554pgl.398.1549544316106; Thu, 07 Feb 2019 04:58:36 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1549544316; cv=none; d=google.com; s=arc-20160816; b=SI6dCJ/Ktsl3esxa6L4nyUG4/Sg1gJ1I8jbKOlDSwMNa6+xIIP6Dw17tS7cuKY1Eug Sj0N5a1hP0wPIU7MHQHu91zbUW6onq8KaVEuGwAfgM9OsGpzf7oBsWWHzEsgQlT1r//Z LqoykkptsQtcNPKMMAK9v7HDXh2zvqNqZwefAT1VygzUSvjxXam994s0U3zX7VWzn/8U MeTOJLAZbvfR0+xyqAuilSALzAuTJRZh1SYrWY/IeXnCMNoS0IqHV8YEXGCz7l3xuNe7 n9p05l4dglyG41np3SjrZEW72Rm1PD9oFjKEMnGHuSO0nf4PDQdnmUMMuiXMAwv8JLvC s2hw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:references :in-reply-to:message-id:date:subject:cc:to:from:dkim-signature; bh=7Kre07rqxuYGmES37cZuu+9CLEHFnu9rKvpL3j9UuBM=; b=fqKiIwGXFgQJog4xaDC3hRD9Ni9Q0yxL+aqE0NCH/nypB23piliELZZdAqTdkgIz4+ 2unEL3xNPJLcy7DfCVoqzXFaQ3TOztKeHWGOuqYdPKSrc3CPqjrOUNK3FbiOyeZ9PbqI cjpTTuHhb1ibU+39qk7rft+4eVVqrNcljGOxjO2h56btGUjGFRvhkrx2n9cxFxXHY8nD uuc3HxyaPpavhwi8UnWDJ3mvHbX96gcT8VlMAAoEI9LDJdp0KM3ogyKEl0lzo8leuJ+4 eQ4JxKG6iQUBK7EpJFeEbkaXilYp17z+292lqF9YjYeJxNi2VYQm2HKcD+TXWqNQJb/D uVog== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=OUO6Nc8I; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id 59si1931529ple.291.2019.02.07.04.58.35; Thu, 07 Feb 2019 04:58:36 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=OUO6Nc8I; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727309AbfBGM6e (ORCPT + 31 others); Thu, 7 Feb 2019 07:58:34 -0500 Received: from mail-pg1-f195.google.com ([209.85.215.195]:38100 "EHLO mail-pg1-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727664AbfBGM6c (ORCPT ); Thu, 7 Feb 2019 07:58:32 -0500 Received: by mail-pg1-f195.google.com with SMTP id g189so4458822pgc.5 for ; Thu, 07 Feb 2019 04:58:32 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :in-reply-to:references; bh=7Kre07rqxuYGmES37cZuu+9CLEHFnu9rKvpL3j9UuBM=; b=OUO6Nc8I8vPsMM4z+NMO4fUll1Th63CA+OyRLn1l4OS2tIsT4HvnUYhXsJGWNjsfaQ u1h27oPvBfrDOlTIZgCtG6JvbEVrtmZ/DiNoGVcap6lcWY8SiGMp0gVQSSXamixQl0py K3PFITXsokOq2djeQuC+vb1o7XtDOgxd1TUAuCvR4nfNOBkiccY6Zh6M8/3ASHfy4e1P LTaLdJginablYLBH6ddSWQEE+HwC/XiQnHuPbZeSKhucjqSLje9mFKlEpylGk4Tmvae1 IcvaJ+Tupn9wwa6zxUOdu9eItiaUievK5fSRnk3tO4b564542bY8VxoczRvKtRF0hpdA fA5A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:in-reply-to:references; bh=7Kre07rqxuYGmES37cZuu+9CLEHFnu9rKvpL3j9UuBM=; b=R7Wtsfz4bIsgMESEGWWCar08zfMCAPWTO4HWxmPDMopqM5PSyp/wjyiustbD6iuJvb +of3mRI3kXB2y3FVqiSwOHzpVQsgXumcPUMX3HvjbV3eR/kg5cxdy0WoeEu8t2kS22Eh CFUpFv9w6cOjjoJtD5su/plS7NOX0ETPypPgYGTyYsVQfWvfLhOMdHQfkRWrJkHhRI7W Zh3U8ejsglyes1fzSluiJaYPXOBaANgssSPYzOBazMVecfQCk3+TUQ/RP17EsXsogSMQ lCnQEMT/cv2whyYYeGGjaU+KtFNgW2dMbzyjuf64V4fpmH5Y9PSA9bLXkhcF3aNVfhJm LngQ== X-Gm-Message-State: AHQUAubcJ6roZek3Cx959p3WfIZve+uRPxkC9bSUVnWgAybgskRJ5Fti 9oTCpXhm7NeLbVOabmP9GwFHp/dxUWU= X-Received: by 2002:a63:555b:: with SMTP id f27mr9879002pgm.313.1549544311695; Thu, 07 Feb 2019 04:58:31 -0800 (PST) Received: from localhost ([2402:3a80:c80:4138:75dd:3900:1d90:762f]) by smtp.gmail.com with ESMTPSA id i28sm9894347pfi.171.2019.02.07.04.58.29 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 07 Feb 2019 04:58:31 -0800 (PST) From: Amit Kucheria To: linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, bjorn.andersson@linaro.org, edubezval@gmail.com, andy.gross@linaro.org, Daniel Lezcano , David Brown , Zhang Rui Cc: linux-pm@vger.kernel.org Subject: [PATCH v1 13/24] drivers: thermal: tsens: Print IP version Date: Thu, 7 Feb 2019 16:19:31 +0530 Message-Id: X-Mailer: git-send-email 2.17.1 In-Reply-To: References: In-Reply-To: References: Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On some TSENS IP, version is stored. Print that version at init. Signed-off-by: Amit Kucheria --- drivers/thermal/qcom/tsens-common.c | 23 ++++++++++++++++++++++- 1 file changed, 22 insertions(+), 1 deletion(-) -- 2.17.1 diff --git a/drivers/thermal/qcom/tsens-common.c b/drivers/thermal/qcom/tsens-common.c index aae3d71d7eed..39cd5733fd44 100644 --- a/drivers/thermal/qcom/tsens-common.c +++ b/drivers/thermal/qcom/tsens-common.c @@ -121,7 +121,7 @@ int __init init_common(struct tsens_priv *priv) void __iomem *tm_base, *srot_base; struct device *dev = priv->dev; struct resource *res; - u32 enabled; + u32 enabled, maj_ver, min_ver; int ret, i, j; struct platform_device *op = of_find_device_by_node(priv->dev->of_node); @@ -155,6 +155,27 @@ int __init init_common(struct tsens_priv *priv) if (IS_ERR(priv->tm_map)) return PTR_ERR(priv->tm_map); + for (i = 0; i < MAX_REGFIELDS; i++) { + priv->rf[i] = NULL; + } + + /* alloc regmap_fields in srot_map */ + if (priv->feat->ver_info) { + for (i = 0, j = VER_MAJOR; i < 2; i++, j++) { + priv->rf[j] = devm_regmap_field_alloc(dev, priv->srot_map, + priv->fields[j]); + if (IS_ERR(priv->rf[j])) + return PTR_ERR(priv->rf[j]); + } + ret = regmap_field_read(priv->rf[VER_MAJOR], &maj_ver); + if (ret) + return ret; + ret = regmap_field_read(priv->rf[VER_MINOR], &min_ver); + if (ret) + return ret; + dev_info(dev, "version: %d.%d\n", maj_ver, min_ver); + } + priv->rf[TSENS_EN] = devm_regmap_field_alloc(dev, priv->srot_map, priv->fields[TSENS_EN]); if (IS_ERR(priv->rf[TSENS_EN])) From patchwork Thu Feb 7 10:49:37 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Amit Kucheria X-Patchwork-Id: 157738 Delivered-To: patch@linaro.org Received: by 2002:a02:48:0:0:0:0:0 with SMTP id 69csp610768jaa; Thu, 7 Feb 2019 04:57:12 -0800 (PST) X-Google-Smtp-Source: AHgI3IbGuc2QOgQpx0Z0vxgRX0n8sWmQJWNj7KiUtFibXvGGK/iZTl9PLgK5HApmi53972TxZFAy X-Received: by 2002:a63:65c7:: with SMTP id z190mr9991008pgb.249.1549544232121; Thu, 07 Feb 2019 04:57:12 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1549544232; cv=none; d=google.com; s=arc-20160816; b=PHk4Ss1mU5qn7HPhfdRN9JHdyCtbuwDJ/jwlM6r/Gpn14VXbqPvVC10ZouDcQLYzY+ O0Gav4jwn15FRz207HfMZbV+6aO+g2aJImjK6PhUDkIZGAd04CuBhXDeBQf9jkxBAATR RmDCdOXWyoebUGl5Hj1RpaqCR/IIqQowQ4Y+IQDAhfdG2AlaEXjgWgI/z0owcPcQLe8h WuCb/iNco7/uiW2/tzwnRtix+WGfTrBlX6KqiJAPXwAHxQDUEPK5ecZp804SVpsNyNxR IG6Ujpy0ZiYUTP42peZuN0YRcC/HFNVxmSIhVWl8hsBdyU0IGglDv5/XytENKcBFQjoY +ftA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:references :in-reply-to:message-id:date:subject:cc:to:from:dkim-signature; bh=F38/1f+iUBZrVnisIpGjF3Hp0h3BqeGBxfZgCYkmLmo=; b=hHTonsI/6rJz7Hi/y60EUibHjIODmH/YGo8cKS8cAg3SgViDegpdE3jc8d6Sml5UpG w3qPHS3g8E8VFN/s97HMxI7YL3tYcA9zvjky++uCdKLxc/D6sItdmo9pBWOAX8UmAgDy KMtUbW0rbopRdBa/0uBXINlwIOoUa6iFDMGi9yTtD3WENO/1j1TeVMPTzMFDNczY0fUq vYosFgt6ga4JeHg5+n/QlApjmIqd4yXS2q6cnUOicsfpPKcVnO7klxDIF9cqwAwHguf5 BV7SvdUf+F0XzM5oS0RCs0cRx4T5zGbWHeV6ANbn0Zw2MJoI2cZFlAvOjCaKJ29C7ZyP MRjA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=L1bQ4mXV; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id cv19si9981249plb.165.2019.02.07.04.57.11; Thu, 07 Feb 2019 04:57:12 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=L1bQ4mXV; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727383AbfBGM5K (ORCPT + 31 others); Thu, 7 Feb 2019 07:57:10 -0500 Received: from mail-pl1-f194.google.com ([209.85.214.194]:36890 "EHLO mail-pl1-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727353AbfBGM5I (ORCPT ); Thu, 7 Feb 2019 07:57:08 -0500 Received: by mail-pl1-f194.google.com with SMTP id b5so4742791plr.4 for ; Thu, 07 Feb 2019 04:57:08 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :in-reply-to:references; bh=F38/1f+iUBZrVnisIpGjF3Hp0h3BqeGBxfZgCYkmLmo=; b=L1bQ4mXVizD1Xxwy0FWGbtUwpPj9kj0ohpkP/IduUWPdiXE2UmcW+s3FTFOaABsenA iuklS8oBX0ipYWtzacQXGYeJ9zp4BiGWEmH0ZxgxzatybXiNCshzE9LlAot8yOszXhR7 tnEJsLwttLm8nnlhpz67Yd9Ty0xscHjwM4fuMMzKG+eyofMdNynrVIRS1MEfmYA0cTJ9 Hols7WCAd+kzqHaQnUIs0p1Rc7q9qP9iuL63EFcG7g+WWEzf7SCBhxzgtGpHYDtc9N4H 2yl2pEhJY4mZA1eUbh5QUmuYhG1pORp0GZxsWGnXOzMmbmm15r1RXJyYU8PFInGnUMI2 Djlg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:in-reply-to:references; bh=F38/1f+iUBZrVnisIpGjF3Hp0h3BqeGBxfZgCYkmLmo=; b=iwotzztEV3x2sHKtdtbdU78fHVaWxunrjdUH7vXhPVtoSoeVogw8733yTzbEOKBrbt GKkK1JxlLE12yCxPFghYX9G4jGyWyJV9m6/6mNxbKFUSu//lMrOVX3zTPIu7wH1TDpZG wWAXKbppkfN5fLhiLXyyUvLz98fIwGG1+eBwciLMms4hnva0FLf+t0fTwTv1Sq0bOWLi BwCvr7ylY8QbB7jydyFjG3h74co+J3dqFiDiDmAQ0aUPgE/f9lUBGFGc5YYfVLO3kDwi BY0YRNK0ub567q8UtAWPqyagh9ThYSvjBxAtKeaNCiSQJMiLhXYolID4l16xqumHWNVX yXIg== X-Gm-Message-State: AHQUAuZsf5AyCkSs1WEu/hIQ/Bbd40cMiaNJzHqJiiED/8UDrPq9PwzP sOaoY8KbAMUC69qTdZqQIx+oen8D/rQ= X-Received: by 2002:a17:902:1745:: with SMTP id i63mr16055283pli.145.1549544227583; Thu, 07 Feb 2019 04:57:07 -0800 (PST) Received: from localhost ([2402:3a80:c80:4138:75dd:3900:1d90:762f]) by smtp.gmail.com with ESMTPSA id y5sm42218744pge.49.2019.02.07.04.57.06 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 07 Feb 2019 04:57:07 -0800 (PST) From: Amit Kucheria To: linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, bjorn.andersson@linaro.org, edubezval@gmail.com, andy.gross@linaro.org, Daniel Lezcano , David Brown , Zhang Rui Cc: linux-pm@vger.kernel.org Subject: [PATCH v1 19/24] drivers: thermal: tsens: Common get_temp() learns to do ADC conversion Date: Thu, 7 Feb 2019 16:19:37 +0530 Message-Id: <187981aec80d2695c6cb4765600d2fe979122805.1549525708.git.amit.kucheria@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: References: In-Reply-To: References: Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org get_temp() learns to return temperature regardless of whether it is returned as ADC code or direct temperature. Signed-off-by: Amit Kucheria --- drivers/thermal/qcom/tsens-common.c | 13 +++++++++---- 1 file changed, 9 insertions(+), 4 deletions(-) -- 2.17.1 diff --git a/drivers/thermal/qcom/tsens-common.c b/drivers/thermal/qcom/tsens-common.c index ed975a2430d9..a935d2335eea 100644 --- a/drivers/thermal/qcom/tsens-common.c +++ b/drivers/thermal/qcom/tsens-common.c @@ -129,10 +129,15 @@ int get_temp_tsens_valid(struct tsens_priv *priv, int i, int *temp) if (ret) return ret; - mask = GENMASK(priv->fields[LAST_TEMP_0].msb, - priv->fields[LAST_TEMP_0].lsb); - /* Convert temperature from deciCelsius to milliCelsius */ - *temp = sign_extend32(last_temp, fls(mask) - 1) * 100; + if (priv->feat->adc) { + /* Convert temperature from ADC code to milliCelsius */ + *temp = code_to_degc(last_temp, s) * 1000; + } else { + mask = GENMASK(priv->fields[LAST_TEMP_0].msb, + priv->fields[LAST_TEMP_0].lsb); + /* Convert temperature from deciCelsius to milliCelsius */ + *temp = sign_extend32(last_temp, fls(mask) - 1) * 100; + } return 0; }