From patchwork Fri Aug 26 18:27:59 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paul Kocialkowski X-Patchwork-Id: 600436 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 41C92ECAAA3 for ; Fri, 26 Aug 2022 18:28:34 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229676AbiHZS2c (ORCPT ); Fri, 26 Aug 2022 14:28:32 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43228 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S239997AbiHZS2a (ORCPT ); Fri, 26 Aug 2022 14:28:30 -0400 Received: from relay11.mail.gandi.net (relay11.mail.gandi.net [217.70.178.231]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C6B15D2B35; Fri, 26 Aug 2022 11:28:29 -0700 (PDT) Received: (Authenticated sender: paul.kocialkowski@bootlin.com) by mail.gandi.net (Postfix) with ESMTPSA id 5C629100004; Fri, 26 Aug 2022 18:28:27 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1661538508; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=pAPHE+J9xJ05r7v5jr0vynhIIDANmU4VwLvBnnKIW90=; b=nCoNP1a9cmIqdvObGTA98qQ2004c345ptpqG5k6MKF0Kh3tCtUTrhOlPWfIEPpmI86A4ZA sOpglAc4FoeTWK8ic25R6kixynqQkPV1nRcN2C1YRqoYS36tzJWz/YjOg4oLIPtAXEOnkw DPbg++koEc1UzTojqx/XVzKvqLB3qhIiY5Zy1pAI5tnfh8QzaBH+gwYNlsUYkABZYJPBRP lagSR5XfBxlyWHtunmoan5qlwlY931xhAcq+49GawmxP1PYdIH9aaAkrLCgpyhBkAO7pzQ n8h2kzqrx8dOuQchovLnSjdjzuZLNl13dslA2r4BL9xj0fV4RFoA1fajn0kAhg== From: Paul Kocialkowski To: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org, linux-media@vger.kernel.org Cc: Rob Herring , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Michael Turquette , Stephen Boyd , Frank Rowand , Maxime Ripard , Laurent Pinchart , Thomas Petazzoni , Paul Kocialkowski Subject: [PATCH v5 2/6] ARM: dts: sun8i: v3s: Add mbus node to represent the interconnect Date: Fri, 26 Aug 2022 20:27:59 +0200 Message-Id: <20220826182803.604563-3-paul.kocialkowski@bootlin.com> X-Mailer: git-send-email 2.37.1 In-Reply-To: <20220826182803.604563-1-paul.kocialkowski@bootlin.com> References: <20220826182803.604563-1-paul.kocialkowski@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The V3s uses the mbus interconnect to provide DRAM access for a number of blocks. The SoC can only map 2 GiB of DRAM, which is reflected in the dma-ranges property. Signed-off-by: Paul Kocialkowski Reviewed-by: Samuel Holland --- arch/arm/boot/dts/sun8i-v3s.dtsi | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/arch/arm/boot/dts/sun8i-v3s.dtsi b/arch/arm/boot/dts/sun8i-v3s.dtsi index db194c606fdc..34f7df6b3960 100644 --- a/arch/arm/boot/dts/sun8i-v3s.dtsi +++ b/arch/arm/boot/dts/sun8i-v3s.dtsi @@ -579,6 +579,21 @@ int_mii_phy: ethernet-phy@1 { }; }; + mbus: dram-controller@1c62000 { + compatible = "allwinner,sun8i-v3s-mbus"; + reg = <0x01c62000 0x1000>, + <0x01c63000 0x1000>; + reg-names = "mbus", "dram"; + clocks = <&ccu CLK_MBUS>, + <&ccu CLK_DRAM>, + <&ccu CLK_BUS_DRAM>; + clock-names = "mbus", "dram", "bus"; + #address-cells = <1>; + #size-cells = <1>; + dma-ranges = <0x00000000 0x40000000 0x80000000>; + #interconnect-cells = <1>; + }; + spi0: spi@1c68000 { compatible = "allwinner,sun8i-h3-spi"; reg = <0x01c68000 0x1000>; From patchwork Fri Aug 26 18:28:01 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paul Kocialkowski X-Patchwork-Id: 600435 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6312DECAAD9 for ; Fri, 26 Aug 2022 18:28:37 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238927AbiHZS2g (ORCPT ); Fri, 26 Aug 2022 14:28:36 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43274 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S245546AbiHZS2e (ORCPT ); Fri, 26 Aug 2022 14:28:34 -0400 Received: from relay11.mail.gandi.net (relay11.mail.gandi.net [IPv6:2001:4b98:dc4:8::231]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9818FD4BCC; Fri, 26 Aug 2022 11:28:32 -0700 (PDT) Received: (Authenticated sender: paul.kocialkowski@bootlin.com) by mail.gandi.net (Postfix) with ESMTPSA id 0C862100009; Fri, 26 Aug 2022 18:28:29 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1661538511; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=4Ip9EmKumlsFhoXnul9MaU7tT9eyzZW73tDHRsvsQBI=; b=g+hZHhPS1FA4cN8z9ZHbcMXj3qKky9Yp7RpZ18kkakX/utvg+diRcBgc00u9NQb8roN/by 8IRyciPvLgAqVK8UFCDVn2tGPtgdgQE1Y99t3RQo2d84xm+CrbYC2fUuf+EBDbKDKIYAYn BzIdfzxiy8uTUAPWzkRYRAx7r2kzoA8S/BGtKarlnDurhjovlkqhXrgZp0YgPn/NUY2G11 8YDXvAW7LhZhcsnSnUEfRWQgt/wN0d4L7ZkNFZV45NbioV/uN0/IKKFw/ajHnfc8SuiKX2 YZj5fJzK16ma4tl54BEqiM+hRa/ve7PLVAT3LGDE5An8zq8b4ROv4EbUiRGEHQ== From: Paul Kocialkowski To: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org, linux-media@vger.kernel.org Cc: Rob Herring , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Michael Turquette , Stephen Boyd , Frank Rowand , Maxime Ripard , Laurent Pinchart , Thomas Petazzoni , Paul Kocialkowski Subject: [PATCH v5 4/6] ARM: dts: sun8i: v3s: Add support for the ISP Date: Fri, 26 Aug 2022 20:28:01 +0200 Message-Id: <20220826182803.604563-5-paul.kocialkowski@bootlin.com> X-Mailer: git-send-email 2.37.1 In-Reply-To: <20220826182803.604563-1-paul.kocialkowski@bootlin.com> References: <20220826182803.604563-1-paul.kocialkowski@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The V3s (and related platforms) come with an instance of the A31 ISP. Even though it is very close to the A31 ISP, it is not exactly register-compatible and a dedicated compatible only is used as a result. Just like most other blocks of the camera pipeline, the ISP uses the common CSI bus, module and ram clock as well as reset. A port connection to the ISP is added to CSI0 for convenience since CSI0 serves for MIPI CSI-2 interface support, which is likely to receive raw data that will need to be processed by the ISP to produce a final image. The interconnects property is used to inherit the proper DMA offset. Signed-off-by: Paul Kocialkowski --- arch/arm/boot/dts/sun8i-v3s.dtsi | 35 ++++++++++++++++++++++++++++++++ 1 file changed, 35 insertions(+) diff --git a/arch/arm/boot/dts/sun8i-v3s.dtsi b/arch/arm/boot/dts/sun8i-v3s.dtsi index 99966f11d061..a249b825cfe7 100644 --- a/arch/arm/boot/dts/sun8i-v3s.dtsi +++ b/arch/arm/boot/dts/sun8i-v3s.dtsi @@ -645,6 +645,14 @@ csi0_in_mipi_csi2: endpoint { remote-endpoint = <&mipi_csi2_out_csi0>; }; }; + + port@2 { + reg = <2>; + + csi0_out_isp: endpoint { + remote-endpoint = <&isp_in_csi0>; + }; + }; }; }; @@ -703,5 +711,32 @@ csi1: camera@1cb4000 { resets = <&ccu RST_BUS_CSI>; status = "disabled"; }; + + isp: isp@1cb8000 { + compatible = "allwinner,sun8i-v3s-isp"; + reg = <0x01cb8000 0x1000>; + interrupts = ; + clocks = <&ccu CLK_BUS_CSI>, + <&ccu CLK_CSI1_SCLK>, + <&ccu CLK_DRAM_CSI>; + clock-names = "bus", "mod", "ram"; + resets = <&ccu RST_BUS_CSI>; + interconnects = <&mbus 5>; + interconnect-names = "dma-mem"; + status = "disabled"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + isp_in_csi0: endpoint { + remote-endpoint = <&csi0_out_isp>; + }; + }; + }; + }; }; }; From patchwork Fri Aug 26 18:28:03 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Paul Kocialkowski X-Patchwork-Id: 600434 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7F6F0ECAAA3 for ; Fri, 26 Aug 2022 18:28:39 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1344379AbiHZS2i (ORCPT ); Fri, 26 Aug 2022 14:28:38 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43370 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1344205AbiHZS2h (ORCPT ); Fri, 26 Aug 2022 14:28:37 -0400 Received: from relay11.mail.gandi.net (relay11.mail.gandi.net [IPv6:2001:4b98:dc4:8::231]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 82C26D573F; Fri, 26 Aug 2022 11:28:35 -0700 (PDT) Received: (Authenticated sender: paul.kocialkowski@bootlin.com) by mail.gandi.net (Postfix) with ESMTPSA id A2DCF10000B; Fri, 26 Aug 2022 18:28:32 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1661538513; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=K4G7Rh/Ep9MXrQsIrn3F+3vZLCD1+gVvrwyROro2h0w=; b=HNiSpX8yMYswaKA859NeB8FZIY7UomyoAjRvOBAV3ldU/oHDcFmj91BQLfeJEZIbLIf6iz cOO2oEsXIaw4PORmPQgQ6sHfTpGHJsrj4R6E2ZiQ2zN2nn65bcYkj4uERRJjWzFDDqTS2C mI57QtAbTFlY1Wu3HzJP03A0o/oH9hhzLr/mVUuM6uRV1YxAsLw9fpvFEth0ywcus4Z9MM 2VLWzP4gqx/LFuUU2dxrxtytnjcM0ykH8/kXULC0VnaDTsnjZPtWMBR4AnfM8GT/rOb2z7 2cTzbRqyNDsbD4B4DG5p1gejAy9Uu0Rn/W5YVv/bz6g4clCmoKNbjQif55e+QA== From: Paul Kocialkowski To: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org, linux-media@vger.kernel.org Cc: Rob Herring , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Michael Turquette , Stephen Boyd , Frank Rowand , Maxime Ripard , Laurent Pinchart , Thomas Petazzoni , =?utf-8?b?S8OpdmluIEwnaMO0?= =?utf-8?b?cGl0YWw=?= , Paul Kocialkowski Subject: [PATCH NOT FOR MERGE v5 6/6] ARM: dts: sun8i: a83t: bananapi-m3: Enable MIPI CSI-2 with OV8865 Date: Fri, 26 Aug 2022 20:28:03 +0200 Message-Id: <20220826182803.604563-7-paul.kocialkowski@bootlin.com> X-Mailer: git-send-email 2.37.1 In-Reply-To: <20220826182803.604563-1-paul.kocialkowski@bootlin.com> References: <20220826182803.604563-1-paul.kocialkowski@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Kévin L'hôpital The Bananapi M3 supports a camera module which includes an OV8865 sensor connected via the parallel CSI interface and an OV8865 sensor connected via MIPI CSI-2. The I2C2 bus is shared by the two sensors as well as the (active-low) reset signal, but each sensor has it own shutdown line. Signed-off-by: Kévin L'hôpital Signed-off-by: Paul Kocialkowski --- arch/arm/boot/dts/sun8i-a83t-bananapi-m3.dts | 102 +++++++++++++++++++ 1 file changed, 102 insertions(+) diff --git a/arch/arm/boot/dts/sun8i-a83t-bananapi-m3.dts b/arch/arm/boot/dts/sun8i-a83t-bananapi-m3.dts index 5a7e1bd5f825..80fd99cf24b2 100644 --- a/arch/arm/boot/dts/sun8i-a83t-bananapi-m3.dts +++ b/arch/arm/boot/dts/sun8i-a83t-bananapi-m3.dts @@ -85,6 +85,30 @@ led-1 { }; }; + reg_ov8865_avdd: ov8865-avdd { + compatible = "regulator-fixed"; + regulator-name = "ov8865-avdd"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + vin-supply = <®_dldo4>; + }; + + reg_ov8865_dovdd: ov8865-dovdd { + compatible = "regulator-fixed"; + regulator-name = "ov8865-dovdd"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + vin-supply = <®_dldo4>; + }; + + reg_ov8865_dvdd: ov8865-dvdd { + compatible = "regulator-fixed"; + regulator-name = "ov8865-dvdd"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + vin-supply = <®_eldo1>; + }; + reg_usb1_vbus: reg-usb1-vbus { compatible = "regulator-fixed"; regulator-name = "usb1-vbus"; @@ -115,6 +139,23 @@ &cpu100 { cpu-supply = <®_dcdc3>; }; +&csi { + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@1 { + reg = <1>; + + csi_in_mipi_csi2: endpoint { + remote-endpoint = <&mipi_csi2_out_csi>; + }; + }; + }; +}; + &de { status = "okay"; }; @@ -147,6 +188,36 @@ hdmi_out_con: endpoint { }; }; +&i2c2 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c2_pe_pins>; + status = "okay"; + + ov8865: camera@36 { + compatible = "ovti,ov8865"; + reg = <0x36>; + pinctrl-names = "default"; + pinctrl-0 = <&csi_mclk_pin>; + clocks = <&ccu CLK_CSI_MCLK>; + assigned-clocks = <&ccu CLK_CSI_MCLK>; + assigned-clock-rates = <24000000>; + avdd-supply = <®_ov8865_avdd>; + dovdd-supply = <®_ov8865_dovdd>; + dvdd-supply = <®_ov8865_dvdd>; + powerdown-gpios = <&pio 4 17 GPIO_ACTIVE_LOW>; /* PE17 */ + reset-gpios = <&pio 4 16 GPIO_ACTIVE_LOW>; /* PE16 */ + + port { + ov8865_out_mipi_csi2: endpoint { + data-lanes = <1 2 3 4>; + link-frequencies = /bits/ 64 <360000000>; + + remote-endpoint = <&mipi_csi2_in_ov8865>; + }; + }; + }; +}; + &mdio { rgmii_phy: ethernet-phy@1 { compatible = "ethernet-phy-ieee802.3-c22"; @@ -154,6 +225,24 @@ rgmii_phy: ethernet-phy@1 { }; }; +&mipi_csi2 { + status = "okay"; +}; + +&mipi_csi2_in { + mipi_csi2_in_ov8865: endpoint { + data-lanes = <1 2 3 4>; + + remote-endpoint = <&ov8865_out_mipi_csi2>; + }; +}; + +&mipi_csi2_out { + mipi_csi2_out_csi: endpoint { + remote-endpoint = <&csi_in_mipi_csi2>; + }; +}; + &mmc0 { pinctrl-names = "default"; pinctrl-0 = <&mmc0_pins>; @@ -327,11 +416,24 @@ ®_dldo3 { regulator-name = "vcc-pd"; }; +®_dldo4 { + regulator-always-on; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + regulator-name = "avdd-csi"; +}; + ®_drivevbus { regulator-name = "usb0-vbus"; status = "okay"; }; +®_eldo1 { + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-name = "dvdd-csi-r"; +}; + ®_fldo1 { regulator-min-microvolt = <1080000>; regulator-max-microvolt = <1320000>;