From patchwork Mon Sep 5 19:23:05 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Pali_Roh=C3=A1r?= X-Patchwork-Id: 602809 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id CC9A3ECAAD3 for ; Mon, 5 Sep 2022 19:25:24 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230527AbiIETZX (ORCPT ); Mon, 5 Sep 2022 15:25:23 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42910 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231821AbiIETZT (ORCPT ); Mon, 5 Sep 2022 15:25:19 -0400 Received: from ams.source.kernel.org (ams.source.kernel.org [145.40.68.75]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 449051D300; Mon, 5 Sep 2022 12:25:18 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id EC136B815CE; Mon, 5 Sep 2022 19:25:16 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 5C43CC4347C; Mon, 5 Sep 2022 19:25:15 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1662405915; bh=QcA9P29C0sz6J16OH80UZGgfyJ/0RAYN/Ol8iwII854=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=sjsNdaOV3UxRhrTFbFDnG29YL3sykxiwO5qs3BoCGx10zUv1TMRkllWW3N5nRGByK 6zVBAABQKIYsjuv+J/VRXmrq7OT74BubwtWywIky66KS6Mri3d1HW6WpkjuViIkCTz 0oOvEzcxNLXsvKeWTpQkS3p95jWQKAgvLG+C2lrSglZ30AtOZ418cWj4pMQBAEqLQQ Ci1fc/+26Y8zBhtTLqTPZn00xvTT7l5vmnvzhcO/Q/dz77Q2nPGQQgyr4x+gaZWv5h /R5C7zW4JYwecJ3xSCYGYHoKsfa3LQ7ikgo47X1sVUcxurJN0i97vVqmeNVBFfr/0E BxN3eewDuVkQA== Received: by pali.im (Postfix) id 1204F2145; Mon, 5 Sep 2022 21:25:13 +0200 (CEST) From: =?utf-8?q?Pali_Roh=C3=A1r?= To: Bjorn Helgaas , Lorenzo Pieralisi , Rob Herring , Krzysztof Kozlowski , Andrew Lunn , Sebastian Hesselbarth , Gregory Clement , Russell King , =?utf-8?q?Krzysztof_Wilczy=C5=84ski?= , Thomas Petazzoni , Mauri Sandberg Cc: linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH v3 2/7] bus: mvebu-mbus: add configuration space aperture Date: Mon, 5 Sep 2022 21:23:05 +0200 Message-Id: <20220905192310.22786-3-pali@kernel.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20220905192310.22786-1-pali@kernel.org> References: <20220718202843.6766-1-maukka@ext.kapsi.fi> <20220905192310.22786-1-pali@kernel.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Mauri Sandberg Adds a new resource for describing PCI configuration space and accessor for it. Signed-off-by: Mauri Sandberg Signed-off-by: Pali Rohár --- drivers/bus/mvebu-mbus.c | 26 +++++++++++++++++++++++--- include/linux/mbus.h | 1 + 2 files changed, 24 insertions(+), 3 deletions(-) diff --git a/drivers/bus/mvebu-mbus.c b/drivers/bus/mvebu-mbus.c index 5dc2669432ba..9702c6ddbbe6 100644 --- a/drivers/bus/mvebu-mbus.c +++ b/drivers/bus/mvebu-mbus.c @@ -139,6 +139,7 @@ struct mvebu_mbus_state { struct dentry *debugfs_devs; struct resource pcie_mem_aperture; struct resource pcie_io_aperture; + struct resource pcie_cfg_aperture; const struct mvebu_mbus_soc_data *soc; int hw_io_coherency; @@ -950,6 +951,14 @@ void mvebu_mbus_get_pcie_io_aperture(struct resource *res) } EXPORT_SYMBOL_GPL(mvebu_mbus_get_pcie_io_aperture); +void mvebu_mbus_get_pcie_cfg_aperture(struct resource *res) +{ + if (!res) + return; + *res = mbus_state.pcie_cfg_aperture; +} +EXPORT_SYMBOL_GPL(mvebu_mbus_get_pcie_cfg_aperture); + int mvebu_mbus_get_dram_win_info(phys_addr_t phyaddr, u8 *target, u8 *attr) { const struct mbus_dram_target_info *dram; @@ -1277,7 +1286,8 @@ static int __init mbus_dt_setup(struct mvebu_mbus_state *mbus, static void __init mvebu_mbus_get_pcie_resources(struct device_node *np, struct resource *mem, - struct resource *io) + struct resource *io, + struct resource *cfg) { u32 reg[2]; int ret; @@ -1290,6 +1300,8 @@ static void __init mvebu_mbus_get_pcie_resources(struct device_node *np, mem->end = -1; memset(io, 0, sizeof(struct resource)); io->end = -1; + memset(cfg, 0, sizeof(struct resource)); + cfg->end = -1; ret = of_property_read_u32_array(np, "pcie-mem-aperture", reg, ARRAY_SIZE(reg)); if (!ret) { @@ -1304,6 +1316,13 @@ static void __init mvebu_mbus_get_pcie_resources(struct device_node *np, io->end = io->start + reg[1] - 1; io->flags = IORESOURCE_IO; } + + ret = of_property_read_u32_array(np, "pcie-cfg-aperture", reg, ARRAY_SIZE(reg)); + if (!ret) { + cfg->start = reg[0]; + cfg->end = cfg->start + reg[1] - 1; + cfg->flags = IORESOURCE_MEM; + } } int __init mvebu_mbus_dt_init(bool is_coherent) @@ -1359,9 +1378,10 @@ int __init mvebu_mbus_dt_init(bool is_coherent) mbus_state.hw_io_coherency = is_coherent; - /* Get optional pcie-{mem,io}-aperture properties */ + /* Get optional pcie-{mem,io,cfg}-aperture properties */ mvebu_mbus_get_pcie_resources(np, &mbus_state.pcie_mem_aperture, - &mbus_state.pcie_io_aperture); + &mbus_state.pcie_io_aperture, + &mbus_state.pcie_cfg_aperture); ret = mvebu_mbus_common_init(&mbus_state, mbuswins_res.start, diff --git a/include/linux/mbus.h b/include/linux/mbus.h index 4773145246ed..525b56ddd0c2 100644 --- a/include/linux/mbus.h +++ b/include/linux/mbus.h @@ -86,6 +86,7 @@ static inline int mvebu_mbus_get_io_win_info(phys_addr_t phyaddr, u32 *size, int mvebu_mbus_save_cpu_target(u32 __iomem *store_addr); void mvebu_mbus_get_pcie_mem_aperture(struct resource *res); void mvebu_mbus_get_pcie_io_aperture(struct resource *res); +void mvebu_mbus_get_pcie_cfg_aperture(struct resource *res); int mvebu_mbus_get_dram_win_info(phys_addr_t phyaddr, u8 *target, u8 *attr); int mvebu_mbus_add_window_remap_by_id(unsigned int target, unsigned int attribute, From patchwork Mon Sep 5 19:23:07 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Pali_Roh=C3=A1r?= X-Patchwork-Id: 602811 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 11BFDC6FA8C for ; Mon, 5 Sep 2022 19:25:20 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231567AbiIETZS (ORCPT ); Mon, 5 Sep 2022 15:25:18 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42812 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229767AbiIETZR (ORCPT ); Mon, 5 Sep 2022 15:25:17 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [139.178.84.217]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 818E51D315; Mon, 5 Sep 2022 12:25:16 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 1D7B26106D; Mon, 5 Sep 2022 19:25:16 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 5CC51C43141; Mon, 5 Sep 2022 19:25:15 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1662405915; bh=J12A2PV0eS7uwJxlm8tx2YP5rzJkWJMh3zeWWeeD28Y=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=vHN32U7bYxKKnGx53sqeQBaqN8SpGNibaA8IBaIv28M5sbdeg4/gjnaCaVwWoh4cI P/2WVU8QBfDYRIVxy/H2byFX9EtMakaSN53v0Atcx4zTVP6vEX8lJqy4QsUqXGsFT5 hekgXwzyoB47pqYpcMBMQLTgjvkx7oGVJohphFgOVV9dkc4U0NiXVDLJakIxuie+l/ OIsPXK7YPm7BAieB0nHP+yaACWcjNQGD8t6I7voVJozWyi5OoRAeLGYG7NiiV6l8WO pP/bL+03R39kffVs9z7RvD4wqKSNZ4Z6kCqria4jgwEKJdTgPPUV9XevgQwRO/AcFC u3JHPovUrSTSQ== Received: by pali.im (Postfix) id 165C77D7; Mon, 5 Sep 2022 21:25:15 +0200 (CEST) From: =?utf-8?q?Pali_Roh=C3=A1r?= To: Bjorn Helgaas , Lorenzo Pieralisi , Rob Herring , Krzysztof Kozlowski , Andrew Lunn , Sebastian Hesselbarth , Gregory Clement , Russell King , =?utf-8?q?Krzysztof_Wilczy=C5=84ski?= , Thomas Petazzoni , Mauri Sandberg Cc: linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH v3 4/7] PCI: mvebu: Remove unused busn member Date: Mon, 5 Sep 2022 21:23:07 +0200 Message-Id: <20220905192310.22786-5-pali@kernel.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20220905192310.22786-1-pali@kernel.org> References: <20220718202843.6766-1-maukka@ext.kapsi.fi> <20220905192310.22786-1-pali@kernel.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Signed-off-by: Pali Rohár --- Changes in v3: * New patch --- drivers/pci/controller/pci-mvebu.c | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/pci/controller/pci-mvebu.c b/drivers/pci/controller/pci-mvebu.c index 6ef8c1ee4cbb..d9e46bd7a4ec 100644 --- a/drivers/pci/controller/pci-mvebu.c +++ b/drivers/pci/controller/pci-mvebu.c @@ -96,7 +96,6 @@ struct mvebu_pcie { struct resource io; struct resource realio; struct resource mem; - struct resource busn; int nports; }; From patchwork Mon Sep 5 19:23:08 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Pali_Roh=C3=A1r?= X-Patchwork-Id: 602810 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id BC009ECAAD3 for ; Mon, 5 Sep 2022 19:25:21 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229692AbiIETZT (ORCPT ); Mon, 5 Sep 2022 15:25:19 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42844 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230321AbiIETZS (ORCPT ); Mon, 5 Sep 2022 15:25:18 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [139.178.84.217]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 376981D31A; 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Mon, 5 Sep 2022 21:25:15 +0200 (CEST) From: =?utf-8?q?Pali_Roh=C3=A1r?= To: Bjorn Helgaas , Lorenzo Pieralisi , Rob Herring , Krzysztof Kozlowski , Andrew Lunn , Sebastian Hesselbarth , Gregory Clement , Russell King , =?utf-8?q?Krzysztof_Wilczy=C5=84ski?= , Thomas Petazzoni , Mauri Sandberg Cc: linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH v3 5/7] PCI: mvebu: Cleanup error handling in mvebu_pcie_probe() Date: Mon, 5 Sep 2022 21:23:08 +0200 Message-Id: <20220905192310.22786-6-pali@kernel.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20220905192310.22786-1-pali@kernel.org> References: <20220718202843.6766-1-maukka@ext.kapsi.fi> <20220905192310.22786-1-pali@kernel.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Move cleanup calls to error labels. This simplify error handling when registering of some port fails. Signed-off-by: Pali Rohár --- Changes in v3: * New patch --- drivers/pci/controller/pci-mvebu.c | 59 ++++++++++++++---------------- 1 file changed, 28 insertions(+), 31 deletions(-) diff --git a/drivers/pci/controller/pci-mvebu.c b/drivers/pci/controller/pci-mvebu.c index d9e46bd7a4ec..9986dd486680 100644 --- a/drivers/pci/controller/pci-mvebu.c +++ b/drivers/pci/controller/pci-mvebu.c @@ -1856,18 +1856,14 @@ static int mvebu_pcie_probe(struct platform_device *pdev) if (IS_ERR(port->base)) { dev_err(dev, "%s: cannot map registers\n", port->name); port->base = NULL; - mvebu_pcie_powerdown(port); - continue; + goto err_port_down; } ret = mvebu_pci_bridge_emul_init(port); if (ret < 0) { dev_err(dev, "%s: cannot init emulated bridge\n", port->name); - devm_iounmap(dev, port->base); - port->base = NULL; - mvebu_pcie_powerdown(port); - continue; + goto err_base_unmap; } if (port->error_irq > 0 || port->intx_irq > 0) { @@ -1875,11 +1871,7 @@ static int mvebu_pcie_probe(struct platform_device *pdev) if (ret) { dev_err(dev, "%s: cannot init irq domain\n", port->name); - pci_bridge_emul_cleanup(&port->bridge); - devm_iounmap(dev, port->base); - port->base = NULL; - mvebu_pcie_powerdown(port); - continue; + goto err_bridge_cleanup; } } @@ -1891,15 +1883,7 @@ static int mvebu_pcie_probe(struct platform_device *pdev) if (ret) { dev_err(dev, "%s: cannot register error interrupt handler: %d\n", port->name, ret); - if (port->intx_irq_domain) - irq_domain_remove(port->intx_irq_domain); - if (port->rp_irq_domain) - irq_domain_remove(port->rp_irq_domain); - pci_bridge_emul_cleanup(&port->bridge); - devm_iounmap(dev, port->base); - port->base = NULL; - mvebu_pcie_powerdown(port); - continue; + goto err_domain_remove; } } @@ -1911,17 +1895,7 @@ static int mvebu_pcie_probe(struct platform_device *pdev) if (ret) { dev_err(dev, "%s: cannot register intx interrupt handler: %d\n", port->name, ret); - if (port->error_irq > 0) - devm_free_irq(dev, port->error_irq, port); - if (port->intx_irq_domain) - irq_domain_remove(port->intx_irq_domain); - if (port->rp_irq_domain) - irq_domain_remove(port->rp_irq_domain); - pci_bridge_emul_cleanup(&port->bridge); - devm_iounmap(dev, port->base); - port->base = NULL; - mvebu_pcie_powerdown(port); - continue; + goto err_free_error_irq; } } @@ -2015,6 +1989,29 @@ static int mvebu_pcie_probe(struct platform_device *pdev) mvebu_pcie_setup_hw(port); mvebu_pcie_set_local_dev_nr(port, 1); mvebu_pcie_set_local_bus_nr(port, 0); + + continue; + +err_free_error_irq: + if (port->error_irq > 0) + devm_free_irq(dev, port->error_irq, port); + +err_domain_remove: + if (port->intx_irq_domain) + irq_domain_remove(port->intx_irq_domain); + + if (port->rp_irq_domain) + irq_domain_remove(port->rp_irq_domain); + +err_bridge_cleanup: + pci_bridge_emul_cleanup(&port->bridge); + +err_base_unmap: + devm_iounmap(dev, port->base); + port->base = NULL; + +err_port_down: + mvebu_pcie_powerdown(port); } bridge->sysdata = pcie;