From patchwork Fri Sep 9 19:35:59 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Serge Semin X-Patchwork-Id: 604313 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 130ECECAAD5 for ; Fri, 9 Sep 2022 19:36:36 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230058AbiIITgd (ORCPT ); Fri, 9 Sep 2022 15:36:33 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37482 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229690AbiIITgc (ORCPT ); Fri, 9 Sep 2022 15:36:32 -0400 Received: from mail.baikalelectronics.com (mail.baikalelectronics.com [87.245.175.230]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id B23CC2AE33; Fri, 9 Sep 2022 12:36:30 -0700 (PDT) Received: from mail (mail.baikal.int [192.168.51.25]) by mail.baikalelectronics.com (Postfix) with ESMTP id 456C9DBA; Fri, 9 Sep 2022 22:40:18 +0300 (MSK) DKIM-Filter: OpenDKIM Filter v2.11.0 mail.baikalelectronics.com 456C9DBA DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baikalelectronics.ru; s=mail; t=1662752418; bh=Y7WwfSNSVFN6DsOTitXYalfVMtQs4BD5nZyMmYc6YaA=; h=From:To:CC:Subject:Date:In-Reply-To:References:From; b=byxrOwQKUSaVkjsY4+AShszBhf69GjL1+2IvIB5D3rPggLK/WnHarHbIsqRDb/qJL v65ZQgcyp8TqHRghsBnurbKX4Gkz5K1GLJ1/vw6t+7isZHVguQHRSp4IyyBQuryDax Ux6u2YsIn4Qth1RKZoM0uLNVvwF+i0CBjbn2+vZU= Received: from localhost (192.168.168.10) by mail (192.168.51.25) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Fri, 9 Sep 2022 22:36:29 +0300 From: Serge Semin To: Damien Le Moal , Hans de Goede , Jens Axboe , Hannes Reinecke , Rob Herring , Krzysztof Kozlowski , Florian Fainelli , Linus Walleij CC: Serge Semin , Serge Semin , Alexey Malahov , Pavel Parkhomenko , , , , Rob Herring Subject: [PATCH v8 01/23] dt-bindings: ata: ahci-platform: Move dma-coherent to sata-common.yaml Date: Fri, 9 Sep 2022 22:35:59 +0300 Message-ID: <20220909193621.17380-2-Sergey.Semin@baikalelectronics.ru> In-Reply-To: <20220909193621.17380-1-Sergey.Semin@baikalelectronics.ru> References: <20220909193621.17380-1-Sergey.Semin@baikalelectronics.ru> MIME-Version: 1.0 X-ClientProxiedBy: MAIL.baikal.int (192.168.51.25) To mail (192.168.51.25) Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Seeing doubtfully any SATA device working without embedded DMA engine let's permit the device nodes being equipped with the dma-coherent property in case if the platform is capable of cache-coherent DMAs. As a side-effect we can drop the explicit dma-coherent property definition from the particular device schemas. Currently it concerns the Broadcom SATA AHCI controller only. Signed-off-by: Serge Semin Reviewed-by: Florian Fainelli Reviewed-by: Rob Herring --- Changelog v2: - This is a new patch created after rebasing v1 onto the 5.18-rc3 kernel. Changelog v4: - Move the dma-coherent property to the sata-common.yaml schema instead of removing it. - Remove the Hannes' rb tag. --- Documentation/devicetree/bindings/ata/ahci-platform.yaml | 2 -- Documentation/devicetree/bindings/ata/brcm,sata-brcm.yaml | 2 -- Documentation/devicetree/bindings/ata/sata-common.yaml | 2 ++ 3 files changed, 2 insertions(+), 4 deletions(-) diff --git a/Documentation/devicetree/bindings/ata/ahci-platform.yaml b/Documentation/devicetree/bindings/ata/ahci-platform.yaml index c146ab8e14e5..9304e4731965 100644 --- a/Documentation/devicetree/bindings/ata/ahci-platform.yaml +++ b/Documentation/devicetree/bindings/ata/ahci-platform.yaml @@ -87,8 +87,6 @@ properties: description: regulator for AHCI controller - dma-coherent: true - phy-supply: description: regulator for PHY power diff --git a/Documentation/devicetree/bindings/ata/brcm,sata-brcm.yaml b/Documentation/devicetree/bindings/ata/brcm,sata-brcm.yaml index 235a93ac86b0..4ee74df8e58a 100644 --- a/Documentation/devicetree/bindings/ata/brcm,sata-brcm.yaml +++ b/Documentation/devicetree/bindings/ata/brcm,sata-brcm.yaml @@ -41,8 +41,6 @@ properties: interrupts: maxItems: 1 - dma-coherent: true - if: properties: compatible: diff --git a/Documentation/devicetree/bindings/ata/sata-common.yaml b/Documentation/devicetree/bindings/ata/sata-common.yaml index 7ac77b1c5850..cb88d3e25e73 100644 --- a/Documentation/devicetree/bindings/ata/sata-common.yaml +++ b/Documentation/devicetree/bindings/ata/sata-common.yaml @@ -31,6 +31,8 @@ properties: "#size-cells": const: 0 + dma-coherent: true + patternProperties: "^sata-port@[0-9a-e]$": description: | From patchwork Fri Sep 9 19:36:00 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Serge Semin X-Patchwork-Id: 604311 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id AC9CDC6FA8A for ; Fri, 9 Sep 2022 19:37:05 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231416AbiIIThC (ORCPT ); Fri, 9 Sep 2022 15:37:02 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37504 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231200AbiIITgp (ORCPT ); Fri, 9 Sep 2022 15:36:45 -0400 Received: from mail.baikalelectronics.com (mail.baikalelectronics.com [87.245.175.230]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 0276C2AE33; Fri, 9 Sep 2022 12:36:33 -0700 (PDT) Received: from mail (mail.baikal.int [192.168.51.25]) by mail.baikalelectronics.com (Postfix) with ESMTP id 47FDEDBB; Fri, 9 Sep 2022 22:40:19 +0300 (MSK) DKIM-Filter: OpenDKIM Filter v2.11.0 mail.baikalelectronics.com 47FDEDBB DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baikalelectronics.ru; s=mail; t=1662752419; bh=tUP+TC6hVDP8Bs3TtlKqKnuOaCO758BhT30UXUMVVrY=; h=From:To:CC:Subject:Date:In-Reply-To:References:From; b=RZrxTmuINzrOofMv2jDk7xWPi0VtcaDJJf+Qy0ClhUsTxRdpqiJr+1YTWCo6oqo1S wL1YCJZcaAT8HdQJ8t5HiL0T/HWu9cnB63BM+VNbJ77KGgDj1UEby0y5YwBudYDHys gyoSMhuvmp8z0FGkEojBHh2FlQ6hWQdYoJqnjY48= Received: from localhost (192.168.168.10) by mail (192.168.51.25) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Fri, 9 Sep 2022 22:36:30 +0300 From: Serge Semin To: Damien Le Moal , Hans de Goede , Jens Axboe , Hannes Reinecke , Rob Herring , Krzysztof Kozlowski , Linus Walleij CC: Serge Semin , Serge Semin , Alexey Malahov , Pavel Parkhomenko , , , , Rob Herring Subject: [PATCH v8 02/23] dt-bindings: ata: ahci-platform: Detach common AHCI bindings Date: Fri, 9 Sep 2022 22:36:00 +0300 Message-ID: <20220909193621.17380-3-Sergey.Semin@baikalelectronics.ru> In-Reply-To: <20220909193621.17380-1-Sergey.Semin@baikalelectronics.ru> References: <20220909193621.17380-1-Sergey.Semin@baikalelectronics.ru> MIME-Version: 1.0 X-ClientProxiedBy: MAIL.baikal.int (192.168.51.25) To mail (192.168.51.25) Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org In order to create a more sophisticated AHCI controller DT bindings let's divide the already available generic AHCI platform YAML schema into the platform part and a set of the common AHCI properties. The former part will be used to evaluate the AHCI DT nodes mainly compatible with the generic AHCI controller while the later schema will be used for more thorough AHCI DT nodes description. For instance such YAML schemas design will be useful for our DW AHCI SATA controller derivative with four clock sources, two reset lines, one system controller reference and specific max Rx/Tx DMA xfers size constraints. Note the phys and target-supply property requirement is preserved in the generic AHCI platform bindings because some platforms can lack of the explicitly specified PHYs or target device power regulators. Also note the SATA/AHCI ports properties have been moved to the $defs-paragraph of the schemas. It's done in order to create the extendable properties hierarchy such that particular AHCI-controller could add vendor-specific port properties. Signed-off-by: Serge Semin Reviewed-by: Rob Herring --- Folks, I don't really see why the phys/target-supply requirement has been added to the generic AHCI DT schema in the first place. Probably just to imply some meaning for the sub-nodes definition. Anyway in one of the further patches I am adding the DW AHCI SATA controller DT bindings which won't require having these properties specified in the sub-nodes, but will describe additional port-specific properties. That's why I get to keep the constraints in the ahci-platform.yaml schema instead of moving them to the common schema. Changelog v2: - This is a new patch created after rebasing v1 onto the 5.18-rc3 kernel. Changelog v3: - Replace Jens's email address with Damien's one in the list of the schema maintainers. (@Damien) Changelog v4: - Drop clocks, clock-names, resets, reset-names and power-domains properties from the common schema. (@Rob) - Create sata/ahci-port properties definition hierarchy so the sub-schemas would inherit and extend the ports properties of the super-schema. (@Rob) --- .../devicetree/bindings/ata/ahci-common.yaml | 100 ++++++++++++++++++ .../bindings/ata/ahci-platform.yaml | 72 ++----------- .../devicetree/bindings/ata/sata-common.yaml | 8 +- 3 files changed, 115 insertions(+), 65 deletions(-) create mode 100644 Documentation/devicetree/bindings/ata/ahci-common.yaml diff --git a/Documentation/devicetree/bindings/ata/ahci-common.yaml b/Documentation/devicetree/bindings/ata/ahci-common.yaml new file mode 100644 index 000000000000..e89bda3b62cc --- /dev/null +++ b/Documentation/devicetree/bindings/ata/ahci-common.yaml @@ -0,0 +1,100 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/ata/ahci-common.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Common Properties for Serial ATA AHCI controllers + +maintainers: + - Hans de Goede + - Damien Le Moal + +description: + This document defines device tree properties for a common AHCI SATA + controller implementation. It's hardware interface is supposed to + conform to the technical standard defined by Intel (see Serial ATA + Advanced Host Controller Interface specification for details). The + document doesn't constitute a DT-node binding by itself but merely + defines a set of common properties for the AHCI-compatible devices. + +select: false + +allOf: + - $ref: sata-common.yaml# + +properties: + reg: + description: + Generic AHCI registers space conforming to the Serial ATA AHCI + specification. + + reg-names: + description: CSR space IDs + + interrupts: + description: + Generic AHCI state change interrupt. Can be implemented either as a + single line attached to the controller or as a set of the signals + indicating the particular port events. + + ahci-supply: + description: Power regulator for AHCI controller + + target-supply: + description: Power regulator for SATA target device + + phy-supply: + description: Power regulator for SATA PHY + + phys: + description: Reference to the SATA PHY node + maxItems: 1 + + phy-names: + maxItems: 1 + + ports-implemented: + $ref: '/schemas/types.yaml#/definitions/uint32' + description: + Mask that indicates which ports the HBA supports. Useful if PI is not + programmed by the BIOS, which is true for some embedded SoC's. + maximum: 0x1f + +patternProperties: + "^sata-port@[0-9a-f]+$": + $ref: '#/$defs/ahci-port' + description: + It is optionally possible to describe the ports as sub-nodes so + to enable each port independently when dealing with multiple PHYs. + +required: + - reg + - interrupts + +additionalProperties: true + +$defs: + ahci-port: + $ref: /schemas/ata/sata-common.yaml#/$defs/sata-port + + properties: + reg: + description: AHCI SATA port identifier + maxItems: 1 + + phys: + description: Individual AHCI SATA port PHY + maxItems: 1 + + phy-names: + description: AHCI SATA port PHY ID + maxItems: 1 + + target-supply: + description: Power regulator for SATA port target device + + required: + - reg + +... diff --git a/Documentation/devicetree/bindings/ata/ahci-platform.yaml b/Documentation/devicetree/bindings/ata/ahci-platform.yaml index 9304e4731965..15be98e0385b 100644 --- a/Documentation/devicetree/bindings/ata/ahci-platform.yaml +++ b/Documentation/devicetree/bindings/ata/ahci-platform.yaml @@ -36,8 +36,7 @@ select: - compatible allOf: - - $ref: "sata-common.yaml#" - + - $ref: "ahci-common.yaml#" properties: compatible: @@ -69,90 +68,37 @@ properties: maxItems: 1 clocks: - description: - Clock IDs array as required by the controller. minItems: 1 maxItems: 3 clock-names: - description: - Names of clocks corresponding to IDs in the clock property. minItems: 1 maxItems: 3 interrupts: maxItems: 1 - ahci-supply: - description: - regulator for AHCI controller - - phy-supply: - description: - regulator for PHY power - - phys: - description: - List of all PHYs on this controller - maxItems: 1 - - phy-names: - description: - Name specifier for the PHYs - maxItems: 1 - - ports-implemented: - $ref: '/schemas/types.yaml#/definitions/uint32' - description: | - Mask that indicates which ports that the HBA supports - are available for software to use. Useful if PORTS_IMPL - is not programmed by the BIOS, which is true with - some embedded SoCs. - maximum: 0x1f - power-domains: maxItems: 1 resets: maxItems: 1 - target-supply: - description: - regulator for SATA target power - -required: - - compatible - - reg - - interrupts - patternProperties: "^sata-port@[0-9a-f]+$": - type: object - additionalProperties: false - description: - Subnode with configuration of the Ports. - - properties: - reg: - maxItems: 1 - - phys: - maxItems: 1 - - phy-names: - maxItems: 1 - - target-supply: - description: - regulator for SATA target power - - required: - - reg + $ref: /schemas/ata/ahci-common.yaml#/$defs/ahci-port anyOf: - required: [ phys ] - required: [ target-supply ] + unevaluatedProperties: false + +required: + - compatible + - reg + - interrupts + unevaluatedProperties: false examples: diff --git a/Documentation/devicetree/bindings/ata/sata-common.yaml b/Documentation/devicetree/bindings/ata/sata-common.yaml index cb88d3e25e73..5a31a902618d 100644 --- a/Documentation/devicetree/bindings/ata/sata-common.yaml +++ b/Documentation/devicetree/bindings/ata/sata-common.yaml @@ -35,9 +35,15 @@ properties: patternProperties: "^sata-port@[0-9a-e]$": + $ref: '#/$defs/sata-port' description: | DT nodes for ports connected on the SATA host. The SATA port nodes will be named "sata-port". + +additionalProperties: true + +$defs: + sata-port: type: object properties: @@ -49,6 +55,4 @@ patternProperties: multiplier making it possible to connect up to 15 disks to a single SATA port. -additionalProperties: true - ... From patchwork Fri Sep 9 19:36:03 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Serge Semin X-Patchwork-Id: 604312 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id BA373ECAAA1 for ; Fri, 9 Sep 2022 19:37:01 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230487AbiIIThA (ORCPT ); Fri, 9 Sep 2022 15:37:00 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37616 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230436AbiIITgj (ORCPT ); Fri, 9 Sep 2022 15:36:39 -0400 Received: from mail.baikalelectronics.com (mail.baikalelectronics.com [87.245.175.230]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 1A3B01153BB; Fri, 9 Sep 2022 12:36:37 -0700 (PDT) Received: from mail (mail.baikal.int [192.168.51.25]) by mail.baikalelectronics.com (Postfix) with ESMTP id 6602ADBE; Fri, 9 Sep 2022 22:40:21 +0300 (MSK) DKIM-Filter: OpenDKIM Filter v2.11.0 mail.baikalelectronics.com 6602ADBE DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baikalelectronics.ru; s=mail; t=1662752421; bh=wYx4YZQxrd0X1DNHR+uvu1prpgP1TFhOgzBZNgxVtkg=; h=From:To:CC:Subject:Date:In-Reply-To:References:From; b=ISH/lFNkRqQ0b2n9GqTdZQoZ0TN34V0kKKFH2GI5krA5iuCV7qhvwbY5i0in2OO0c 5D8yRBgaxdaaqM4oTUvkKvxzRyig7m+A1JzMkSCCe5ZU983wfMWAiZPITJzPllxh3g nIq8uxfqUDODAlPeWIPOi5yRvggpRRAep+bFNNP0= Received: from localhost (192.168.168.10) by mail (192.168.51.25) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Fri, 9 Sep 2022 22:36:32 +0300 From: Serge Semin To: Damien Le Moal , Hans de Goede , Jens Axboe , Hannes Reinecke , Rob Herring , Krzysztof Kozlowski , Florian Fainelli CC: Serge Semin , Serge Semin , Alexey Malahov , Pavel Parkhomenko , , , , Rob Herring Subject: [PATCH v8 05/23] dt-bindings: ata: sata-brcm: Apply common AHCI schema Date: Fri, 9 Sep 2022 22:36:03 +0300 Message-ID: <20220909193621.17380-6-Sergey.Semin@baikalelectronics.ru> In-Reply-To: <20220909193621.17380-1-Sergey.Semin@baikalelectronics.ru> References: <20220909193621.17380-1-Sergey.Semin@baikalelectronics.ru> MIME-Version: 1.0 X-ClientProxiedBy: MAIL.baikal.int (192.168.51.25) To mail (192.168.51.25) Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The Broadcom SATA controller is obviously based on the AHCI standard. The device driver uses the kernel AHCI library to work with it. Therefore we can be have a more thorough DT-bindings evaluation by referring to the AHCI-common schema instead of using the more relaxed SATA-common one. Signed-off-by: Serge Semin Reviewed-by: Florian Fainelli Reviewed-by: Rob Herring --- Changelog v4: - This is a new patch added on v4 lap of the review procedure. --- Documentation/devicetree/bindings/ata/brcm,sata-brcm.yaml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/ata/brcm,sata-brcm.yaml b/Documentation/devicetree/bindings/ata/brcm,sata-brcm.yaml index 4ee74df8e58a..fa8ebc8f243f 100644 --- a/Documentation/devicetree/bindings/ata/brcm,sata-brcm.yaml +++ b/Documentation/devicetree/bindings/ata/brcm,sata-brcm.yaml @@ -14,7 +14,7 @@ maintainers: - Florian Fainelli allOf: - - $ref: sata-common.yaml# + - $ref: ahci-common.yaml# properties: compatible: From patchwork Fri Sep 9 19:36:04 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Serge Semin X-Patchwork-Id: 604310 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 68A53C6FA89 for ; Fri, 9 Sep 2022 19:37:08 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230436AbiIIThF (ORCPT ); Fri, 9 Sep 2022 15:37:05 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37608 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230268AbiIITgu (ORCPT ); Fri, 9 Sep 2022 15:36:50 -0400 Received: from mail.baikalelectronics.com (mail.baikalelectronics.com [87.245.175.230]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id D789D115CE3; Fri, 9 Sep 2022 12:36:37 -0700 (PDT) Received: from mail (mail.baikal.int [192.168.51.25]) by mail.baikalelectronics.com (Postfix) with ESMTP id 27E3FDBF; Fri, 9 Sep 2022 22:40:22 +0300 (MSK) DKIM-Filter: OpenDKIM Filter v2.11.0 mail.baikalelectronics.com 27E3FDBF DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baikalelectronics.ru; s=mail; t=1662752422; bh=4UEvOJBnrhYbJMOH5dIhZYkkbJ2g80CrYqwa/ZKcSYU=; h=From:To:CC:Subject:Date:In-Reply-To:References:From; b=PuI+Re6LN1febwr8DWRC0N7Vh/Z6Olj+NKDllbtqHnTPgdUnqdjDaIBA608in6QIS +6lx0LYqvn+sdfBUgmoYj2NSYvq9x0w4g6bTXl6ogVkgNqenHF4WdHU0ftgjvlrxCM p0yOA7DYXbv+cA4gEgl1urShyqqMTVUjK3JcpcK8= Received: from localhost (192.168.168.10) by mail (192.168.51.25) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Fri, 9 Sep 2022 22:36:33 +0300 From: Serge Semin To: Damien Le Moal , Hans de Goede , Jens Axboe , Hannes Reinecke CC: Serge Semin , Serge Semin , Alexey Malahov , Pavel Parkhomenko , Rob Herring , Krzysztof Kozlowski , , , Subject: [PATCH v8 06/23] ata: libahci_platform: Convert to using platform devm-ioremap methods Date: Fri, 9 Sep 2022 22:36:04 +0300 Message-ID: <20220909193621.17380-7-Sergey.Semin@baikalelectronics.ru> In-Reply-To: <20220909193621.17380-1-Sergey.Semin@baikalelectronics.ru> References: <20220909193621.17380-1-Sergey.Semin@baikalelectronics.ru> MIME-Version: 1.0 X-ClientProxiedBy: MAIL.baikal.int (192.168.51.25) To mail (192.168.51.25) Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Currently the IOMEM AHCI registers space is mapped by means of the two functions invocation: platform_get_resource() is used to get the very first memory resource and devm_ioremap_resource() is called to remap that resource. Device-managed kernel API provides a handy wrapper to perform the same in single function call: devm_platform_ioremap_resource(). While at it seeing many AHCI platform drivers rely on having the AHCI CSR space marked with "ahci" name let's first try to find and remap the CSR IO-mem with that name and only if it fails fallback to getting the very first registers space platform resource. Signed-off-by: Serge Semin Reviewed-by: Hannes Reinecke --- Changelog v2: - Check whether there is "ahci" reg resource before using the devm_platform_ioremap_resource_byname() method in order to prevent a false error message printed in the log (@Damien) - Slightly update the patch title due to the change above and to be more specific about what the platform device managed methods are utilized for. --- drivers/ata/libahci_platform.c | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) diff --git a/drivers/ata/libahci_platform.c b/drivers/ata/libahci_platform.c index 32495ae96567..1e9e825d6cc5 100644 --- a/drivers/ata/libahci_platform.c +++ b/drivers/ata/libahci_platform.c @@ -402,8 +402,14 @@ struct ahci_host_priv *ahci_platform_get_resources(struct platform_device *pdev, devres_add(dev, hpriv); - hpriv->mmio = devm_ioremap_resource(dev, - platform_get_resource(pdev, IORESOURCE_MEM, 0)); + /* + * If the DT provided an "ahci" named resource, use it. Otherwise, + * fallback to using the default first resource for the device node. + */ + if (platform_get_resource_byname(pdev, IORESOURCE_MEM, "ahci")) + hpriv->mmio = devm_platform_ioremap_resource_byname(pdev, "ahci"); + else + hpriv->mmio = devm_platform_ioremap_resource(pdev, 0); if (IS_ERR(hpriv->mmio)) { rc = PTR_ERR(hpriv->mmio); goto err_out; From patchwork Fri Sep 9 19:36:06 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Serge Semin X-Patchwork-Id: 604309 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id AE820ECAAA1 for ; Fri, 9 Sep 2022 19:37:54 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231406AbiIIThw (ORCPT ); Fri, 9 Sep 2022 15:37:52 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37616 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231484AbiIIThF (ORCPT ); Fri, 9 Sep 2022 15:37:05 -0400 Received: from mail.baikalelectronics.com (mail.baikalelectronics.com [87.245.175.230]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id E4BC8112130; Fri, 9 Sep 2022 12:36:39 -0700 (PDT) Received: from mail (mail.baikal.int [192.168.51.25]) by mail.baikalelectronics.com (Postfix) with ESMTP id 0FC8ADBA; Fri, 9 Sep 2022 22:40:24 +0300 (MSK) DKIM-Filter: OpenDKIM Filter v2.11.0 mail.baikalelectronics.com 0FC8ADBA DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baikalelectronics.ru; s=mail; t=1662752424; bh=MxJlAieoI0TgAMq3MnhprrteEcvbjMxPRTOKIFXhakY=; h=From:To:CC:Subject:Date:In-Reply-To:References:From; b=YhISV66IKakezX9NkxCY8cApL5mYwmnlSg+h2QstlTvJow+OlTfgQrOeIQycNK5h0 5ZLJQZVqTLRy73Gef4BsZa2f7kXpYs5D7/IvGjhD6f5gyWjQgRK6DGaliJvLjWzyZo YJPfU6X3uWiA3s+0Hot5D6C3Jdng3GPOPhWcejos= Received: from localhost (192.168.168.10) by mail (192.168.51.25) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Fri, 9 Sep 2022 22:36:35 +0300 From: Serge Semin To: Damien Le Moal , Hans de Goede , Jens Axboe , Hannes Reinecke CC: Serge Semin , Serge Semin , Alexey Malahov , Pavel Parkhomenko , Rob Herring , Krzysztof Kozlowski , , , Subject: [PATCH v8 08/23] ata: libahci_platform: Sanity check the DT child nodes number Date: Fri, 9 Sep 2022 22:36:06 +0300 Message-ID: <20220909193621.17380-9-Sergey.Semin@baikalelectronics.ru> In-Reply-To: <20220909193621.17380-1-Sergey.Semin@baikalelectronics.ru> References: <20220909193621.17380-1-Sergey.Semin@baikalelectronics.ru> MIME-Version: 1.0 X-ClientProxiedBy: MAIL.baikal.int (192.168.51.25) To mail (192.168.51.25) Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Having greater than AHCI_MAX_PORTS (32) ports detected isn't that critical from the further AHCI-platform initialization point of view since exceeding the ports upper limit will cause allocating more resources than will be used afterwards. But detecting too many child DT-nodes doesn't seem right since it's very unlikely to have it on an ordinary platform. In accordance with the AHCI specification there can't be more than 32 ports implemented at least due to having the CAP.NP field of 5 bits wide and the PI register of dword size. Thus if such situation is found the DTB must have been corrupted and the data read from it shouldn't be reliable. Let's consider that as an erroneous situation and halt further resources allocation. Note it's logically more correct to have the nports set only after the initialization value is checked for being sane. So while at it let's make sure nports is assigned with a correct value. Signed-off-by: Serge Semin Reviewed-by: Hannes Reinecke --- Changelog v2: - Drop the else word from the child_nodes value checking if-else-if statement (@Damien) and convert the after-else part into the ternary operator-based statement. Changelog v4: - Fix some logical mistakes in the patch log. (@Sergei Shtylyov) - Replace "?:" operator with if-else statement. (@Damien) --- drivers/ata/libahci_platform.c | 14 ++++++++++++-- 1 file changed, 12 insertions(+), 2 deletions(-) diff --git a/drivers/ata/libahci_platform.c b/drivers/ata/libahci_platform.c index 7366eb0adf41..bacb974c1b16 100644 --- a/drivers/ata/libahci_platform.c +++ b/drivers/ata/libahci_platform.c @@ -450,14 +450,24 @@ struct ahci_host_priv *ahci_platform_get_resources(struct platform_device *pdev, } } - hpriv->nports = child_nodes = of_get_child_count(dev->of_node); + /* + * Too many sub-nodes most likely means having something wrong with + * the firmware. + */ + child_nodes = of_get_child_count(dev->of_node); + if (child_nodes > AHCI_MAX_PORTS) { + rc = -EINVAL; + goto err_out; + } /* * If no sub-node was found, we still need to set nports to * one in order to be able to use the * ahci_platform_[en|dis]able_[phys|regulators] functions. */ - if (!child_nodes) + if (child_nodes) + hpriv->nports = child_nodes; + else hpriv->nports = 1; hpriv->phys = devm_kcalloc(dev, hpriv->nports, sizeof(*hpriv->phys), GFP_KERNEL); From patchwork Fri Sep 9 19:36:09 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Serge Semin X-Patchwork-Id: 604308 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E9098ECAAA1 for ; Fri, 9 Sep 2022 19:37:57 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231536AbiIIThz (ORCPT ); Fri, 9 Sep 2022 15:37:55 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38186 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231244AbiIIThL (ORCPT ); Fri, 9 Sep 2022 15:37:11 -0400 Received: from mail.baikalelectronics.com (mail.baikalelectronics.com [87.245.175.230]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id EC6FA116B6A; Fri, 9 Sep 2022 12:36:45 -0700 (PDT) Received: from mail (mail.baikal.int [192.168.51.25]) by mail.baikalelectronics.com (Postfix) with ESMTP id 0C05FDC1; Fri, 9 Sep 2022 22:40:27 +0300 (MSK) DKIM-Filter: OpenDKIM Filter v2.11.0 mail.baikalelectronics.com 0C05FDC1 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baikalelectronics.ru; s=mail; t=1662752427; bh=UQ0nLdDhSzWtNcB1iar518w4MATzJhPIimxsv/c0UjM=; h=From:To:CC:Subject:Date:In-Reply-To:References:From; b=CL2Dv+vjBwE9UIQ2KIJlrxBZMxuyvJUp2RindUWWCN5kQg91TgrDmdxrRt3Kv0lIE NLzhoVUdJxkE034Ht2rQrHugRsxjJRwQnYccUrmYUp8RILHkwN83C/4xqcPruImhG9 8eS0iaZIv148OrI0zPzXJYR9qzyP3tNJTI1IEGeQ= Received: from localhost (192.168.168.10) by mail (192.168.51.25) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Fri, 9 Sep 2022 22:36:38 +0300 From: Serge Semin To: Damien Le Moal , Hans de Goede , Jens Axboe , Hannes Reinecke , Rob Herring , Krzysztof Kozlowski CC: Serge Semin , Serge Semin , Alexey Malahov , Pavel Parkhomenko , , , , Rob Herring Subject: [PATCH v8 11/23] dt-bindings: ata: ahci: Add platform capability properties Date: Fri, 9 Sep 2022 22:36:09 +0300 Message-ID: <20220909193621.17380-12-Sergey.Semin@baikalelectronics.ru> In-Reply-To: <20220909193621.17380-1-Sergey.Semin@baikalelectronics.ru> References: <20220909193621.17380-1-Sergey.Semin@baikalelectronics.ru> MIME-Version: 1.0 X-ClientProxiedBy: MAIL.baikal.int (192.168.51.25) To mail (192.168.51.25) Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org In case if the platform doesn't have BIOS or a comprehensive firmware installed then the HBA capability flags will be left uninitialized. As a good alternative we suggest to define the DT-properties with the AHCI platform capabilities describing all the HW-init flags of the corresponding capability register. Luckily there aren't too many of them. SSS - Staggered Spin-up support and MPS - Mechanical Presence Switch support determine the corresponding feature availability for the whole HBA by means of the "hba-cap" property. Each port can have the "hba-port-cap" property initialized indicating that the port supports some of the next functionalities: HPCP - HotPlug capable port, MPSP - Mechanical Presence Switch attached to a port, CPD - Cold Plug detection, ESP - External SATA Port (eSATA), FBSCP - FIS-based switching capable port. Signed-off-by: Serge Semin Reviewed-by: Rob Herring --- Changelog v4: - Fix some misspelling in the patch log. - Convert the boolean properties to the bitfield properties. (@Rob) - Remove Hannes' rb tag due to the patch content change. Changelog v5: - Dual-licese the include/dt-bindings/ata/ahci.h file. (@Rob) --- .../devicetree/bindings/ata/ahci-common.yaml | 16 +++++++++++++++ .../bindings/ata/ahci-platform.yaml | 10 ++++++++++ include/dt-bindings/ata/ahci.h | 20 +++++++++++++++++++ 3 files changed, 46 insertions(+) create mode 100644 include/dt-bindings/ata/ahci.h diff --git a/Documentation/devicetree/bindings/ata/ahci-common.yaml b/Documentation/devicetree/bindings/ata/ahci-common.yaml index 12a97b56226f..94d72aeaad0f 100644 --- a/Documentation/devicetree/bindings/ata/ahci-common.yaml +++ b/Documentation/devicetree/bindings/ata/ahci-common.yaml @@ -58,6 +58,14 @@ properties: phy-names: const: sata-phy + hba-cap: + $ref: '/schemas/types.yaml#/definitions/uint32' + description: + Bitfield of the HBA generic platform capabilities like Staggered + Spin-up or Mechanical Presence Switch support. It can be used to + appropriately initialize the HWinit fields of the HBA CAP register + in case if the system firmware hasn't done it. + ports-implemented: $ref: '/schemas/types.yaml#/definitions/uint32' description: @@ -101,6 +109,14 @@ $defs: target-supply: description: Power regulator for SATA port target device + hba-port-cap: + $ref: '/schemas/types.yaml#/definitions/uint32' + description: + Bitfield of the HBA port-specific platform capabilities like Hot + plugging, eSATA, FIS-based Switching, etc (see AHCI specification + for details). It can be used to initialize the HWinit fields of + the PxCMD register in case if the system firmware hasn't done it. + required: - reg diff --git a/Documentation/devicetree/bindings/ata/ahci-platform.yaml b/Documentation/devicetree/bindings/ata/ahci-platform.yaml index 15be98e0385b..e19cf9828e68 100644 --- a/Documentation/devicetree/bindings/ata/ahci-platform.yaml +++ b/Documentation/devicetree/bindings/ata/ahci-platform.yaml @@ -111,6 +111,8 @@ examples: - | #include #include + #include + sata@f7e90000 { compatible = "marvell,berlin2q-ahci", "generic-ahci"; reg = <0xf7e90000 0x1000>; @@ -119,15 +121,23 @@ examples: #address-cells = <1>; #size-cells = <0>; + hba-cap = ; + sata0: sata-port@0 { reg = <0>; + phys = <&sata_phy 0>; target-supply = <®_sata0>; + + hba-port-cap = <(HBA_PORT_FBSCP | HBA_PORT_ESP)>; }; sata1: sata-port@1 { reg = <1>; + phys = <&sata_phy 1>; target-supply = <®_sata1>; + + hba-port-cap = <(HBA_PORT_HPCP | HBA_PORT_MPSP | HBA_PORT_FBSCP)>; }; }; diff --git a/include/dt-bindings/ata/ahci.h b/include/dt-bindings/ata/ahci.h new file mode 100644 index 000000000000..77997b35612c --- /dev/null +++ b/include/dt-bindings/ata/ahci.h @@ -0,0 +1,20 @@ +/* SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause */ +/* + * This header provides constants for most AHCI bindings. + */ + +#ifndef _DT_BINDINGS_ATA_AHCI_H +#define _DT_BINDINGS_ATA_AHCI_H + +/* Host Bus Adapter generic platform capabilities */ +#define HBA_SSS (1 << 27) +#define HBA_SMPS (1 << 28) + +/* Host Bus Adapter port-specific platform capabilities */ +#define HBA_PORT_HPCP (1 << 18) +#define HBA_PORT_MPSP (1 << 19) +#define HBA_PORT_CPD (1 << 20) +#define HBA_PORT_ESP (1 << 21) +#define HBA_PORT_FBSCP (1 << 22) + +#endif From patchwork Fri Sep 9 19:36:11 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Serge Semin X-Patchwork-Id: 604307 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6A388C6FA89 for ; Fri, 9 Sep 2022 19:38:17 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231859AbiIITiP (ORCPT ); Fri, 9 Sep 2022 15:38:15 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38514 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230423AbiIIThM (ORCPT ); Fri, 9 Sep 2022 15:37:12 -0400 Received: from mail.baikalelectronics.com (mail.baikalelectronics.com [87.245.175.230]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 08E3711C7E7; Fri, 9 Sep 2022 12:36:47 -0700 (PDT) Received: from mail (mail.baikal.int [192.168.51.25]) by mail.baikalelectronics.com (Postfix) with ESMTP id C14E5DBF; Fri, 9 Sep 2022 22:40:28 +0300 (MSK) DKIM-Filter: OpenDKIM Filter v2.11.0 mail.baikalelectronics.com C14E5DBF DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baikalelectronics.ru; s=mail; t=1662752428; bh=xg2OaeZnmPtszpVQN/SChJWw4hReYgrzAYpanoiG0kE=; h=From:To:CC:Subject:Date:In-Reply-To:References:From; b=dTvDS2QHHDP3hTcT/QCoG82jygqtpvQXIhvFTn1nl8LSxpLwM12d2POhk4ddr11tL OBgkbVME6MFzpWSvBnMVOcL8bMzKPAxWkXHIrAEb+cPPKfFNZru7iANE0pYFWKl3Q0 khA5Raa8nph+KqeHd4HGZleKlPxE4Q+ZmRuYf6Dc= Received: from localhost (192.168.168.10) by mail (192.168.51.25) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Fri, 9 Sep 2022 22:36:40 +0300 From: Serge Semin To: Damien Le Moal , Hans de Goede , Jens Axboe , Hannes Reinecke CC: Serge Semin , Serge Semin , Alexey Malahov , Pavel Parkhomenko , Rob Herring , Krzysztof Kozlowski , , , Subject: [PATCH v8 13/23] ata: libahci: Discard redundant force_port_map parameter Date: Fri, 9 Sep 2022 22:36:11 +0300 Message-ID: <20220909193621.17380-14-Sergey.Semin@baikalelectronics.ru> In-Reply-To: <20220909193621.17380-1-Sergey.Semin@baikalelectronics.ru> References: <20220909193621.17380-1-Sergey.Semin@baikalelectronics.ru> MIME-Version: 1.0 X-ClientProxiedBy: MAIL.baikal.int (192.168.51.25) To mail (192.168.51.25) Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Currently there are four port-map-related fields declared in the ahci_host_priv structure and used to setup the HBA ports mapping. First the ports-mapping is read from the PI register and immediately stored in the saved_port_map field. If forced_port_map is initialized with non-zero value then its value will have greater priority over the value read from PI, thus it will override the saved_port_map field. That value will be then masked by a non-zero mask_port_map field and after some sanity checks it will be stored in the ahci_host_priv.port_map field as a final port mapping. As you can see the logic is a bit too complicated for such a simple task. We can freely get rid from at least one of the fields with no change to the implemented semantic. The force_port_map field can be replaced with taking non-zero saved_port_map value into account. So if saved_port_map is pre-initialized by the low level drivers (platform drivers) then it will have greater priority over the value read from PI register and will be used as actual HBA ports mapping later on. Thus the ports map forcing task will be just transferred from force_port_map to the saved_port_map field. This modification will perfectly fit into the feature of having OF-based initialization of the HW-init HBA CSR fields we are about to introduce in the next commit. Signed-off-by: Serge Semin Reviewed-by: Hannes Reinecke --- drivers/ata/ahci.c | 2 +- drivers/ata/ahci.h | 1 - drivers/ata/libahci.c | 10 ++++++---- drivers/ata/libahci_platform.c | 2 +- 4 files changed, 8 insertions(+), 7 deletions(-) diff --git a/drivers/ata/ahci.c b/drivers/ata/ahci.c index c1eca72b4575..bacb597a0d32 100644 --- a/drivers/ata/ahci.c +++ b/drivers/ata/ahci.c @@ -657,7 +657,7 @@ static void ahci_pci_save_initial_config(struct pci_dev *pdev, { if (pdev->vendor == PCI_VENDOR_ID_JMICRON && pdev->device == 0x2361) { dev_info(&pdev->dev, "JMB361 has only one port\n"); - hpriv->force_port_map = 1; + hpriv->saved_port_map = 1; } /* diff --git a/drivers/ata/ahci.h b/drivers/ata/ahci.h index 27cab4e909a5..cc4f40e6c924 100644 --- a/drivers/ata/ahci.h +++ b/drivers/ata/ahci.h @@ -328,7 +328,6 @@ struct ahci_port_priv { struct ahci_host_priv { /* Input fields */ unsigned int flags; /* AHCI_HFLAG_* */ - u32 force_port_map; /* force port map */ u32 mask_port_map; /* mask out particular bits */ void __iomem * mmio; /* bus-independent mem map */ diff --git a/drivers/ata/libahci.c b/drivers/ata/libahci.c index cf8c7fd59ada..000a7072614f 100644 --- a/drivers/ata/libahci.c +++ b/drivers/ata/libahci.c @@ -453,7 +453,6 @@ void ahci_save_initial_config(struct device *dev, struct ahci_host_priv *hpriv) * reset. Values without are used for driver operation. */ hpriv->saved_cap = cap = readl(mmio + HOST_CAP); - hpriv->saved_port_map = port_map = readl(mmio + HOST_PORTS_IMPL); /* CAP2 register is only defined for AHCI 1.2 and later */ vers = readl(mmio + HOST_VERSION); @@ -517,10 +516,13 @@ void ahci_save_initial_config(struct device *dev, struct ahci_host_priv *hpriv) cap &= ~HOST_CAP_SXS; } - if (hpriv->force_port_map && port_map != hpriv->force_port_map) { + /* Override the HBA ports mapping if the platform needs it */ + port_map = readl(mmio + HOST_PORTS_IMPL); + if (hpriv->saved_port_map && port_map != hpriv->saved_port_map) { dev_info(dev, "forcing port_map 0x%x -> 0x%x\n", - port_map, hpriv->force_port_map); - port_map = hpriv->force_port_map; + port_map, hpriv->saved_port_map); + port_map = hpriv->saved_port_map; + } else { hpriv->saved_port_map = port_map; } diff --git a/drivers/ata/libahci_platform.c b/drivers/ata/libahci_platform.c index 31be8a10facd..01c195b6d9e6 100644 --- a/drivers/ata/libahci_platform.c +++ b/drivers/ata/libahci_platform.c @@ -526,7 +526,7 @@ struct ahci_host_priv *ahci_platform_get_resources(struct platform_device *pdev, } of_property_read_u32(dev->of_node, - "ports-implemented", &hpriv->force_port_map); + "ports-implemented", &hpriv->saved_port_map); if (child_nodes) { for_each_child_of_node(dev->of_node, child) { From patchwork Fri Sep 9 19:36:13 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Serge Semin X-Patchwork-Id: 604306 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5B60FECAAD3 for ; Fri, 9 Sep 2022 19:38:21 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231961AbiIITiT (ORCPT ); Fri, 9 Sep 2022 15:38:19 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39090 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231699AbiIIThg (ORCPT ); Fri, 9 Sep 2022 15:37:36 -0400 Received: from mail.baikalelectronics.com (mail.baikalelectronics.com [87.245.175.230]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 6DF021203FA; Fri, 9 Sep 2022 12:36:50 -0700 (PDT) Received: from mail (mail.baikal.int [192.168.51.25]) by mail.baikalelectronics.com (Postfix) with ESMTP id 32686DC3; Fri, 9 Sep 2022 22:40:30 +0300 (MSK) DKIM-Filter: OpenDKIM Filter v2.11.0 mail.baikalelectronics.com 32686DC3 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baikalelectronics.ru; s=mail; t=1662752430; bh=/e1wD+4/ocZIxrPY/TeSDUfGQdbEoA1sGbcbkJoPplY=; h=From:To:CC:Subject:Date:In-Reply-To:References:From; b=Q/u66tyHdsZyN0m7W+ErHsetSTd+wajoWdEnfKBO9/DxA8uEuFVvc/lstDcIp7WdA F8cB5vcD1fnZDUEoiNYJs97NVdyE3UG0Ner+OTy6CAsVWvICOHORQcGb3HYfEQLK04 Nya9VcRzmJsiNoc0sAHQQYJgp1XMdZAQI6o28Xbk= Received: from localhost (192.168.168.10) by mail (192.168.51.25) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Fri, 9 Sep 2022 22:36:41 +0300 From: Serge Semin To: Damien Le Moal , Hans de Goede , Jens Axboe , Hannes Reinecke CC: Serge Semin , Serge Semin , Alexey Malahov , Pavel Parkhomenko , Rob Herring , Krzysztof Kozlowski , , , Subject: [PATCH v8 15/23] ata: ahci: Convert __ahci_port_base to accepting hpriv as arguments Date: Fri, 9 Sep 2022 22:36:13 +0300 Message-ID: <20220909193621.17380-16-Sergey.Semin@baikalelectronics.ru> In-Reply-To: <20220909193621.17380-1-Sergey.Semin@baikalelectronics.ru> References: <20220909193621.17380-1-Sergey.Semin@baikalelectronics.ru> MIME-Version: 1.0 X-ClientProxiedBy: MAIL.baikal.int (192.168.51.25) To mail (192.168.51.25) Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The port base address may be required even before the ata_host instance is initialized and activated, for instance in the ahci_save_initial_config() method which we are about to update (consider this modification as a preparation for that one). Seeing the __ahci_port_base() function isn't used much it's the best candidate to provide the required functionality. So let's convert it to accepting the ahci_host_priv structure pointer. Signed-off-by: Serge Semin Reviewed-by: Hannes Reinecke --- Changelog v5: - Fix some grammar notes in the patchlog. (@Damien) --- drivers/ata/ahci.c | 2 +- drivers/ata/ahci.h | 7 ++++--- 2 files changed, 5 insertions(+), 4 deletions(-) diff --git a/drivers/ata/ahci.c b/drivers/ata/ahci.c index bacb597a0d32..51c0c1dd91ea 100644 --- a/drivers/ata/ahci.c +++ b/drivers/ata/ahci.c @@ -690,7 +690,7 @@ static void ahci_pci_init_controller(struct ata_host *host) mv = 2; else mv = 4; - port_mmio = __ahci_port_base(host, mv); + port_mmio = __ahci_port_base(hpriv, mv); writel(0, port_mmio + PORT_IRQ_MASK); diff --git a/drivers/ata/ahci.h b/drivers/ata/ahci.h index cc4f40e6c924..5d9db5e7476c 100644 --- a/drivers/ata/ahci.h +++ b/drivers/ata/ahci.h @@ -432,10 +432,9 @@ int ahci_host_activate(struct ata_host *host, struct scsi_host_template *sht); void ahci_error_handler(struct ata_port *ap); u32 ahci_handle_port_intr(struct ata_host *host, u32 irq_masked); -static inline void __iomem *__ahci_port_base(struct ata_host *host, +static inline void __iomem *__ahci_port_base(struct ahci_host_priv *hpriv, unsigned int port_no) { - struct ahci_host_priv *hpriv = host->private_data; void __iomem *mmio = hpriv->mmio; return mmio + 0x100 + (port_no * 0x80); @@ -443,7 +442,9 @@ static inline void __iomem *__ahci_port_base(struct ata_host *host, static inline void __iomem *ahci_port_base(struct ata_port *ap) { - return __ahci_port_base(ap->host, ap->port_no); + struct ahci_host_priv *hpriv = ap->host->private_data; + + return __ahci_port_base(hpriv, ap->port_no); } static inline int ahci_nr_ports(u32 cap) From patchwork Fri Sep 9 19:36:15 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Serge Semin X-Patchwork-Id: 604305 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B2254C6FA8A for ; Fri, 9 Sep 2022 19:38:22 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231667AbiIITiV (ORCPT ); Fri, 9 Sep 2022 15:38:21 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39372 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231168AbiIIThs (ORCPT ); Fri, 9 Sep 2022 15:37:48 -0400 Received: from mail.baikalelectronics.com (mail.baikalelectronics.com [87.245.175.230]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 5E6C712168E; Fri, 9 Sep 2022 12:36:51 -0700 (PDT) Received: from mail (mail.baikal.int [192.168.51.25]) by mail.baikalelectronics.com (Postfix) with ESMTP id 42CACDBA; Fri, 9 Sep 2022 22:40:32 +0300 (MSK) DKIM-Filter: OpenDKIM Filter v2.11.0 mail.baikalelectronics.com 42CACDBA DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baikalelectronics.ru; s=mail; t=1662752432; bh=0lqXmojW/LDkIzOealxVEvtRoqQ2blxWMO51Pelx9dY=; h=From:To:CC:Subject:Date:In-Reply-To:References:From; b=auouoW8XoPVPhJVKeD/c+ssknofdm5vkupK38aakI1ksw1atc+GHIbgnwgyPg2sqy Ihb4HGXXT3SI7mnQlmWYzr4bVem8XazkH+m7I4gYaSJ/gEaBueZD4hZHrdppKym3yU zkvFZQoBbmjj0meUa+nQY/Kk+1KpjMGT3WKm3g/c= Received: from localhost (192.168.168.10) by mail (192.168.51.25) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Fri, 9 Sep 2022 22:36:43 +0300 From: Serge Semin To: Damien Le Moal , Hans de Goede , Jens Axboe , Hannes Reinecke , Rob Herring , Krzysztof Kozlowski , Serge Semin CC: Serge Semin , Alexey Malahov , Pavel Parkhomenko , , , , Rob Herring Subject: [PATCH v8 17/23] dt-bindings: ata: ahci: Add DWC AHCI SATA controller DT schema Date: Fri, 9 Sep 2022 22:36:15 +0300 Message-ID: <20220909193621.17380-18-Sergey.Semin@baikalelectronics.ru> In-Reply-To: <20220909193621.17380-1-Sergey.Semin@baikalelectronics.ru> References: <20220909193621.17380-1-Sergey.Semin@baikalelectronics.ru> MIME-Version: 1.0 X-ClientProxiedBy: MAIL.baikal.int (192.168.51.25) To mail (192.168.51.25) Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Synopsys AHCI SATA controller is mainly compatible with the generic AHCI SATA controller except a few peculiarities and the platform environment requirements. In particular it can have at least two reference clocks to feed up its AHB/AXI interface and SATA PHYs domain and at least one reset control for the application clock domain. In addition to that the DMA interface of each port can be tuned up to work with the predefined maximum data chunk size. Note unlike generic AHCI controller DWC AHCI can't have more than 8 ports. All of that is reflected in the new DWC AHCI SATA device DT binding. Note the DWC AHCI SATA controller DT-schema has been created in a way so to be reused for the vendor-specific DT-schemas (see for example the "snps,dwc-ahci" compatible string binding). One of which we are about to introduce. Signed-off-by: Serge Semin Reviewed-by: Rob Herring --- Changelog v2: - Replace min/max constraints of the snps,{tx,rx}-ts-max property with enum [ 1, 2, 4, ..., 1024 ]. (@Rob) Changelog v4: - Decrease the "additionalProperties" property identation otherwise it's percieved as the node property instead of the key one. (@Rob) - Use the ahci-port properties definition from the AHCI common schema in order to extend it with DWC AHCI SATA port properties. (@Rob) - Remove the Hannes' rb tag since the patch content has changed. Changelog v5: - Fix "resets" property description: replace "clocks" with "resets". (@Rob) - Extend "resets/clocks{-names}" property definitions. (@Rob) - Add "resets" property min/maxItems constraints. (@Rob) - Add names for the basic resets like RxOOB and PM-alive. (@Rob) - Add generic DWC AHCI SATA fallback for "rockchip,rk3568-dwc-ahci" bindings. (@Rob) - Due to the change above the schema has been split up into two parts: common DWC AHCI SATA properties and generic DW AHCI SATA controller DT-schema. (@Rob) --- .../bindings/ata/ahci-platform.yaml | 8 -- .../bindings/ata/snps,dwc-ahci-common.yaml | 102 ++++++++++++++++++ .../bindings/ata/snps,dwc-ahci.yaml | 75 +++++++++++++ 3 files changed, 177 insertions(+), 8 deletions(-) create mode 100644 Documentation/devicetree/bindings/ata/snps,dwc-ahci-common.yaml create mode 100644 Documentation/devicetree/bindings/ata/snps,dwc-ahci.yaml diff --git a/Documentation/devicetree/bindings/ata/ahci-platform.yaml b/Documentation/devicetree/bindings/ata/ahci-platform.yaml index e19cf9828e68..7dc2a2e8f598 100644 --- a/Documentation/devicetree/bindings/ata/ahci-platform.yaml +++ b/Documentation/devicetree/bindings/ata/ahci-platform.yaml @@ -30,8 +30,6 @@ select: - marvell,armada-3700-ahci - marvell,armada-8k-ahci - marvell,berlin2q-ahci - - snps,dwc-ahci - - snps,spear-ahci required: - compatible @@ -48,17 +46,11 @@ properties: - marvell,berlin2-ahci - marvell,berlin2q-ahci - const: generic-ahci - - items: - - enum: - - rockchip,rk3568-dwc-ahci - - const: snps,dwc-ahci - enum: - cavium,octeon-7130-ahci - hisilicon,hisi-ahci - ibm,476gtr-ahci - marvell,armada-3700-ahci - - snps,dwc-ahci - - snps,spear-ahci reg: minItems: 1 diff --git a/Documentation/devicetree/bindings/ata/snps,dwc-ahci-common.yaml b/Documentation/devicetree/bindings/ata/snps,dwc-ahci-common.yaml new file mode 100644 index 000000000000..c1457910520b --- /dev/null +++ b/Documentation/devicetree/bindings/ata/snps,dwc-ahci-common.yaml @@ -0,0 +1,102 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/ata/snps,dwc-ahci-common.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Synopsys DWC AHCI SATA controller properties + +maintainers: + - Serge Semin + +description: + This document defines device tree schema for the generic Synopsys DWC + AHCI controller properties. + +select: false + +allOf: + - $ref: ahci-common.yaml# + +properties: + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + description: + Basic DWC AHCI SATA clock sources like application AXI/AHB BIU clock, + PM-alive clock, RxOOB detection clock, embedded PHYs reference (Rx/Tx) + clock, etc. + minItems: 1 + maxItems: 4 + + clock-names: + minItems: 1 + maxItems: 4 + items: + oneOf: + - description: Application APB/AHB/AXI BIU clock + enum: + - pclk + - aclk + - hclk + - sata + - description: Power Module keep-alive clock + const: pmalive + - description: RxOOB detection clock + const: rxoob + - description: SATA Ports reference clock + const: ref + + resets: + description: + At least basic application and reference clock domains resets are + normally supported by the DWC AHCI SATA controller. + minItems: 1 + maxItems: 4 + + reset-names: + minItems: 1 + maxItems: 4 + items: + oneOf: + - description: Application AHB/AXI BIU clock domain reset control + enum: + - arst + - hrst + - description: Power Module keep-alive clock domain reset control + const: pmalive + - description: RxOOB detection clock domain reset control + const: rxoob + - description: Reference clock domain reset control + const: ref + +patternProperties: + "^sata-port@[0-9a-e]$": + $ref: '#/$defs/dwc-ahci-port' + +additionalProperties: true + +$defs: + dwc-ahci-port: + $ref: /schemas/ata/ahci-common.yaml#/$defs/ahci-port + + properties: + reg: + minimum: 0 + maximum: 7 + + snps,tx-ts-max: + $ref: /schemas/types.yaml#/definitions/uint32 + description: Maximal size of Tx DMA transactions in FIFO words + enum: [ 1, 2, 4, 8, 16, 32, 64, 128, 256, 512, 1024 ] + + snps,rx-ts-max: + $ref: /schemas/types.yaml#/definitions/uint32 + description: Maximal size of Rx DMA transactions in FIFO words + enum: [ 1, 2, 4, 8, 16, 32, 64, 128, 256, 512, 1024 ] + +... diff --git a/Documentation/devicetree/bindings/ata/snps,dwc-ahci.yaml b/Documentation/devicetree/bindings/ata/snps,dwc-ahci.yaml new file mode 100644 index 000000000000..5afa4b57ce20 --- /dev/null +++ b/Documentation/devicetree/bindings/ata/snps,dwc-ahci.yaml @@ -0,0 +1,75 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/ata/snps,dwc-ahci.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Synopsys DWC AHCI SATA controller + +maintainers: + - Serge Semin + +description: + This document defines device tree bindings for the generic Synopsys DWC + implementation of the AHCI SATA controller. + +allOf: + - $ref: snps,dwc-ahci-common.yaml# + +properties: + compatible: + oneOf: + - description: Synopsys AHCI SATA-compatible devices + const: snps,dwc-ahci + - description: SPEAr1340 AHCI SATA device + const: snps,spear-ahci + - description: Rockhip RK3568 AHCI controller + items: + - const: rockchip,rk3568-dwc-ahci + - const: snps,dwc-ahci + +patternProperties: + "^sata-port@[0-9a-e]$": + $ref: /schemas/ata/snps,dwc-ahci-common.yaml#/$defs/dwc-ahci-port + + unevaluatedProperties: false + +required: + - compatible + - reg + - interrupts + +unevaluatedProperties: false + +examples: + - | + #include + #include + + sata@122f0000 { + compatible = "snps,dwc-ahci"; + reg = <0x122F0000 0x1ff>; + #address-cells = <1>; + #size-cells = <0>; + + interrupts = ; + + clocks = <&clock1>, <&clock2>; + clock-names = "aclk", "ref"; + + phys = <&sata_phy>; + phy-names = "sata-phy"; + + ports-implemented = <0x1>; + + sata-port@0 { + reg = <0>; + + hba-port-cap = ; + + snps,tx-ts-max = <512>; + snps,rx-ts-max = <512>; + }; + }; + +... From patchwork Fri Sep 9 19:36:16 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Serge Semin X-Patchwork-Id: 604304 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 08D80ECAAD5 for ; Fri, 9 Sep 2022 19:38:42 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231740AbiIITik (ORCPT ); Fri, 9 Sep 2022 15:38:40 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39414 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231755AbiIIThx (ORCPT ); Fri, 9 Sep 2022 15:37:53 -0400 Received: from mail.baikalelectronics.com (mail.baikalelectronics.com [87.245.175.230]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id B56EA131EE4; Fri, 9 Sep 2022 12:36:53 -0700 (PDT) Received: from mail (mail.baikal.int [192.168.51.25]) by mail.baikalelectronics.com (Postfix) with ESMTP id F2856DC5; Fri, 9 Sep 2022 22:40:32 +0300 (MSK) DKIM-Filter: OpenDKIM Filter v2.11.0 mail.baikalelectronics.com F2856DC5 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baikalelectronics.ru; s=mail; t=1662752432; bh=tSsMfF1s5Ux6xk0N3ZRzC7OTKA8znIR4lsF8Oe1CY5A=; h=From:To:CC:Subject:Date:In-Reply-To:References:From; b=Ov8Kkd5Cjpw5NKlAx+XL4mx/jUkM8JMigsPJOyvLm3T4sw57hLag3CgCWRqLFqbGQ x+WuTPVjHcsgR3XU9AEk1FFho2m9Jx5UEMwQuPbOpPc1PoCxbZTfma4OvsvhQKa0Ej FoIxGm71HPLWc0xzynH8VKDMtTsJ9I9yD+7L3tks= Received: from localhost (192.168.168.10) by mail (192.168.51.25) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Fri, 9 Sep 2022 22:36:44 +0300 From: Serge Semin To: Damien Le Moal , Hans de Goede , Jens Axboe , Hannes Reinecke CC: Serge Semin , Serge Semin , Alexey Malahov , Pavel Parkhomenko , Rob Herring , Krzysztof Kozlowski , , , Subject: [PATCH v8 18/23] ata: libahci_platform: Add function returning a clock-handle by id Date: Fri, 9 Sep 2022 22:36:16 +0300 Message-ID: <20220909193621.17380-19-Sergey.Semin@baikalelectronics.ru> In-Reply-To: <20220909193621.17380-1-Sergey.Semin@baikalelectronics.ru> References: <20220909193621.17380-1-Sergey.Semin@baikalelectronics.ru> MIME-Version: 1.0 X-ClientProxiedBy: MAIL.baikal.int (192.168.51.25) To mail (192.168.51.25) Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Since all the clocks are retrieved by the method ahci_platform_get_resources() there is no need for the LLD (glue) drivers to be looking for some particular of them in the kernel clocks table again. Instead we suggest to add a simple method returning a device-specific clock with passed connection ID if it is managed to be found. Otherwise the function will return NULL. Thus the glue-drivers won't need to either manually touching the hpriv->clks array or calling clk_get()-friends. The AHCI platform drivers will be able to use the new function right after the ahci_platform_get_resources() method invocation and up to the device removal. Note the method is left unused here, but will be utilized in the framework of the DWC AHCI SATA driver being added in the next commit. Signed-off-by: Serge Semin --- Changelog v2: - Fix some grammar mistakes in the method description. Changelog v4: - Add a note regarding the new method usage. Changelog v5: - Fix the ahci_platform_find_clk() declaration identations. (@Damien) - Simplify the ahci_platform_find_clk() method body by dropping the local poiter to clk structure. (@Damien) --- drivers/ata/libahci_platform.c | 24 ++++++++++++++++++++++++ include/linux/ahci_platform.h | 3 +++ 2 files changed, 27 insertions(+) diff --git a/drivers/ata/libahci_platform.c b/drivers/ata/libahci_platform.c index 86d156075336..ddf17e2d266c 100644 --- a/drivers/ata/libahci_platform.c +++ b/drivers/ata/libahci_platform.c @@ -93,6 +93,30 @@ void ahci_platform_disable_phys(struct ahci_host_priv *hpriv) } EXPORT_SYMBOL_GPL(ahci_platform_disable_phys); +/** + * ahci_platform_find_clk - Find platform clock + * @hpriv: host private area to store config values + * @con_id: clock connection ID + * + * This function returns a pointer to the clock descriptor of the clock with + * the passed ID. + * + * RETURNS: + * Pointer to the clock descriptor on success otherwise NULL + */ +struct clk *ahci_platform_find_clk(struct ahci_host_priv *hpriv, const char *con_id) +{ + int i; + + for (i = 0; i < hpriv->n_clks; i++) { + if (!strcmp(hpriv->clks[i].id, con_id)) + return hpriv->clks[i].clk; + } + + return NULL; +} +EXPORT_SYMBOL_GPL(ahci_platform_find_clk); + /** * ahci_platform_enable_clks - Enable platform clocks * @hpriv: host private area to store config values diff --git a/include/linux/ahci_platform.h b/include/linux/ahci_platform.h index 6d7dd472d370..17fa26215292 100644 --- a/include/linux/ahci_platform.h +++ b/include/linux/ahci_platform.h @@ -13,6 +13,7 @@ #include +struct clk; struct device; struct ata_port_info; struct ahci_host_priv; @@ -21,6 +22,8 @@ struct scsi_host_template; int ahci_platform_enable_phys(struct ahci_host_priv *hpriv); void ahci_platform_disable_phys(struct ahci_host_priv *hpriv); +struct clk *ahci_platform_find_clk(struct ahci_host_priv *hpriv, + const char *con_id); int ahci_platform_enable_clks(struct ahci_host_priv *hpriv); void ahci_platform_disable_clks(struct ahci_host_priv *hpriv); int ahci_platform_deassert_rsts(struct ahci_host_priv *hpriv); From patchwork Fri Sep 9 19:36:18 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Serge Semin X-Patchwork-Id: 604303 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D4FD7ECAAA1 for ; Fri, 9 Sep 2022 19:39:16 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232101AbiIITjP (ORCPT ); Fri, 9 Sep 2022 15:39:15 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37620 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231824AbiIITiM (ORCPT ); Fri, 9 Sep 2022 15:38:12 -0400 Received: from mail.baikalelectronics.com (mail.baikalelectronics.com [87.245.175.230]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id BA7F3139C20; Fri, 9 Sep 2022 12:36:55 -0700 (PDT) Received: from mail (mail.baikal.int [192.168.51.25]) by mail.baikalelectronics.com (Postfix) with ESMTP id C62C5DB9; Fri, 9 Sep 2022 22:40:34 +0300 (MSK) DKIM-Filter: OpenDKIM Filter v2.11.0 mail.baikalelectronics.com C62C5DB9 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baikalelectronics.ru; s=mail; t=1662752434; bh=K3vap0FpFoGMz05xBagElq3cuTU5ZyDcEp63VapujxY=; h=From:To:CC:Subject:Date:In-Reply-To:References:From; b=XEIlIEdjLShNl6K4fV3jXjZ4H4k53kd74RVy138R493p+QhQWmY1B2EKzjeAU/zg8 jVqyx+sYHEtQz5QZcMh3mgQGayUT0d8i33WWztv9swAplo+bxL602VOp3eHWJaioWV Bo2kDFKmsDQUBHL3El7AwbaSFgOVjW3oWhUwyQ2E= Received: from localhost (192.168.168.10) by mail (192.168.51.25) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Fri, 9 Sep 2022 22:36:46 +0300 From: Serge Semin To: Damien Le Moal , Hans de Goede , Jens Axboe , Hannes Reinecke , Serge Semin , Rob Herring , Krzysztof Kozlowski CC: Serge Semin , Alexey Malahov , Pavel Parkhomenko , , , , Rob Herring Subject: [PATCH v8 20/23] dt-bindings: ata: ahci: Add Baikal-T1 AHCI SATA controller DT schema Date: Fri, 9 Sep 2022 22:36:18 +0300 Message-ID: <20220909193621.17380-21-Sergey.Semin@baikalelectronics.ru> In-Reply-To: <20220909193621.17380-1-Sergey.Semin@baikalelectronics.ru> References: <20220909193621.17380-1-Sergey.Semin@baikalelectronics.ru> MIME-Version: 1.0 X-ClientProxiedBy: MAIL.baikal.int (192.168.51.25) To mail (192.168.51.25) Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Baikal-T1 AHCI controller is based on the DWC AHCI SATA IP-core v4.10a with the next specific settings: two SATA ports, cascaded CSR access based on two clock domains (APB and AXI), selectable source of the reference clock (though stable work is currently available from the external source only), two reset lanes for the application and SATA ports domains. Other than that the device is fully compatible with the generic DWC AHCI SATA bindings. Signed-off-by: Serge Semin Reviewed-by: Hannes Reinecke Reviewed-by: Rob Herring --- Changelog v2: - Rename 'syscon' property to 'baikal,bt1-syscon'. - Drop macro usage from the example node. Changelog v4: - Use the DWC AHCI port properties definition from the DWC AHCI SATA common schema. (@Rob) - Drop Baikal-T1 syscon reference and implement the clock signal source in the framework of the clock controller. (@Rob) Changelog v5: - Drop generic compatible fallback "snps,dwc-ahci". (@Rob) - Define SATA-port pattern property to be applicable for two ports only. - Drop "|" qualifier from the description property. --- .../bindings/ata/baikal,bt1-ahci.yaml | 115 ++++++++++++++++++ 1 file changed, 115 insertions(+) create mode 100644 Documentation/devicetree/bindings/ata/baikal,bt1-ahci.yaml diff --git a/Documentation/devicetree/bindings/ata/baikal,bt1-ahci.yaml b/Documentation/devicetree/bindings/ata/baikal,bt1-ahci.yaml new file mode 100644 index 000000000000..9b7ca4759bd7 --- /dev/null +++ b/Documentation/devicetree/bindings/ata/baikal,bt1-ahci.yaml @@ -0,0 +1,115 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/ata/baikal,bt1-ahci.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Baikal-T1 SoC AHCI SATA controller + +maintainers: + - Serge Semin + +description: + AHCI SATA controller embedded into the Baikal-T1 SoC is based on the + DWC AHCI SATA v4.10a IP-core. + +allOf: + - $ref: snps,dwc-ahci-common.yaml# + +properties: + compatible: + const: baikal,bt1-ahci + + clocks: + items: + - description: Peripheral APB bus clock + - description: Application AXI BIU clock + - description: SATA Ports reference clock + + clock-names: + items: + - const: pclk + - const: aclk + - const: ref + + resets: + items: + - description: Application AXI BIU domain reset + - description: SATA Ports clock domain reset + + reset-names: + items: + - const: arst + - const: ref + + ports-implemented: + maximum: 0x3 + +patternProperties: + "^sata-port@[0-1]$": + $ref: /schemas/ata/snps,dwc-ahci-common.yaml#/$defs/dwc-ahci-port + + properties: + reg: + minimum: 0 + maximum: 1 + + snps,tx-ts-max: + $ref: /schemas/types.yaml#/definitions/uint32 + description: + Due to having AXI3 bus interface utilized the maximum Tx DMA + transaction size can't exceed 16 beats (AxLEN[3:0]). + enum: [ 1, 2, 4, 8, 16 ] + + snps,rx-ts-max: + $ref: /schemas/types.yaml#/definitions/uint32 + description: + Due to having AXI3 bus interface utilized the maximum Rx DMA + transaction size can't exceed 16 beats (AxLEN[3:0]). + enum: [ 1, 2, 4, 8, 16 ] + + unevaluatedProperties: false + +required: + - compatible + - reg + - interrupts + - clocks + - clock-names + - resets + +unevaluatedProperties: false + +examples: + - | + sata@1f050000 { + compatible = "baikal,bt1-ahci"; + reg = <0x1f050000 0x2000>; + #address-cells = <1>; + #size-cells = <0>; + + interrupts = <0 64 4>; + + clocks = <&ccu_sys 1>, <&ccu_axi 2>, <&sata_ref_clk>; + clock-names = "pclk", "aclk", "ref"; + + resets = <&ccu_axi 2>, <&ccu_sys 0>; + reset-names = "arst", "ref"; + + ports-implemented = <0x3>; + + sata-port@0 { + reg = <0>; + + snps,tx-ts-max = <4>; + snps,rx-ts-max = <4>; + }; + + sata-port@1 { + reg = <1>; + + snps,tx-ts-max = <4>; + snps,rx-ts-max = <4>; + }; + }; +... From patchwork Fri Sep 9 19:36:21 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Serge Semin X-Patchwork-Id: 604302 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id BA63FC6FA8A for ; Fri, 9 Sep 2022 19:39:38 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231854AbiIITje (ORCPT ); Fri, 9 Sep 2022 15:39:34 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38654 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231848AbiIITiP (ORCPT ); Fri, 9 Sep 2022 15:38:15 -0400 Received: from mail.baikalelectronics.com (mail.baikalelectronics.com [87.245.175.230]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 3AD1512A30C; Fri, 9 Sep 2022 12:36:59 -0700 (PDT) Received: from mail (mail.baikal.int [192.168.51.25]) by mail.baikalelectronics.com (Postfix) with ESMTP id 1FF9DDBC; Fri, 9 Sep 2022 22:40:37 +0300 (MSK) DKIM-Filter: OpenDKIM Filter v2.11.0 mail.baikalelectronics.com 1FF9DDBC DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baikalelectronics.ru; s=mail; t=1662752437; bh=XhHryGSZHGP03Jv9lWNGiOTfawDZbC1lKYZsUpCgoPE=; h=From:To:CC:Subject:Date:In-Reply-To:References:From; b=f3ZxPHEwbSW0BwgxmIIJuW7MNqads3okGsX9m8mbXX9xf3xo/edZr0OobgzCh5CME j3IzwQ9hARPRyYwOO7eCLAY2fOf+C4t2ENAI+IYdsq4b3CCY4yb9l2MH8C9JrW5nNC Uqlowcv/v3XqB3A/DiEb2HkUKPwGS/T0rd5YQg7k= Received: from localhost (192.168.168.10) by mail (192.168.51.25) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Fri, 9 Sep 2022 22:36:48 +0300 From: Serge Semin To: Damien Le Moal , Hans de Goede , Jens Axboe , Hannes Reinecke CC: Serge Semin , Serge Semin , Alexey Malahov , Pavel Parkhomenko , Rob Herring , Krzysztof Kozlowski , , , Subject: [PATCH v8 23/23] MAINTAINERS: Add maintainers for DWC AHCI SATA driver Date: Fri, 9 Sep 2022 22:36:21 +0300 Message-ID: <20220909193621.17380-24-Sergey.Semin@baikalelectronics.ru> In-Reply-To: <20220909193621.17380-1-Sergey.Semin@baikalelectronics.ru> References: <20220909193621.17380-1-Sergey.Semin@baikalelectronics.ru> MIME-Version: 1.0 X-ClientProxiedBy: MAIL.baikal.int (192.168.51.25) To mail (192.168.51.25) Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add myself as a maintainer of the new DWC AHCI SATA driver and its DT-bindings schema. Signed-off-by: Serge Semin --- Changelog v2: - Use dlemoal/libata.git git tree for the LIBATA SATA AHCI SYNOPSYS DWC driver (@Damien). --- MAINTAINERS | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index 9d7f64dc0efe..7a1cb5ff19cd 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -11552,6 +11552,15 @@ F: drivers/ata/ahci_platform.c F: drivers/ata/libahci_platform.c F: include/linux/ahci_platform.h +LIBATA SATA AHCI SYNOPSYS DWC CONTROLLER DRIVER +M: Serge Semin +L: linux-ide@vger.kernel.org +S: Maintained +T: git git://git.kernel.org/pub/scm/linux/kernel/git/dlemoal/libata.git +F: Documentation/devicetree/bindings/ata/baikal,bt1-ahci.yaml +F: Documentation/devicetree/bindings/ata/snps,dwc-ahci.yaml +F: drivers/ata/ahci_dwc.c + LIBATA SATA PROMISE TX2/TX4 CONTROLLER DRIVER M: Mikael Pettersson L: linux-ide@vger.kernel.org