From patchwork Wed Sep 21 04:55:59 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bhupesh Sharma X-Patchwork-Id: 608009 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1298EC32771 for ; Wed, 21 Sep 2022 04:56:26 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230366AbiIUE4Y (ORCPT ); Wed, 21 Sep 2022 00:56:24 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33974 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230089AbiIUE4V (ORCPT ); Wed, 21 Sep 2022 00:56:21 -0400 Received: from mail-pj1-x1036.google.com (mail-pj1-x1036.google.com [IPv6:2607:f8b0:4864:20::1036]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E99D87E31D for ; Tue, 20 Sep 2022 21:56:19 -0700 (PDT) Received: by mail-pj1-x1036.google.com with SMTP id g1-20020a17090a708100b00203c1c66ae3so1013531pjk.2 for ; Tue, 20 Sep 2022 21:56:19 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date; bh=jkKXgc3d0MWwxQPM3fO9sVRhHaZ+os5SScxBlsQUWO8=; b=kvV5ydzQjjyZcfzh1vwCL1lWrmBBHbZVrNztHmLX34QC1HXdSuFmGz2+SFm4UbFFya rgwK2IPJ11gOVt7ggR508C51LPvC0QphmuJFzqBb9KOEW4JkUU/1fnQjShYGV1IVXWjP nZlCDw6EtmNER7hwBn/mgT1Fjv/onwwrJKMJ8xP9/pLH2/cbGXj1mVaRBhRZrFGPrt7m Xm7I6TxidaRGLld0FBrjEzWpXGTEbwJJXxJgqkyX+HhUqa8NQpxUgOiefY4i7pI6TFJ6 CverrBTcKBOWzgbsZj6bluj0KQF67pC/LbH7Wbo2Ih6UDpbNNIXev1Ah15K+g10vsSjb Sgeg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date; bh=jkKXgc3d0MWwxQPM3fO9sVRhHaZ+os5SScxBlsQUWO8=; b=xhISK6stCUVLoSPgLxKx9EI4KarAf+ACQyuIU1eau91De/LnyiXFdrpUec+L3cdw1s 6FMcKKxjxqmLiziCJy2JnDskPGq5yYiMrD84xW8sPQB3pHp6JbLTGLsaM+5/1Xn/GRPb WH3+WeZNCYJ44xnvGtGQYdkmBYYuA3NedkTDmPmi6nBPehZj2V79LpYMWumdyYV4B4WF wDsQA0H+AvVMbGtm6ivHM65rjmZdgvmlerXcRTB3BGLtbS7+vktTmvqbGMSm/P7HRXJ7 hYU6Mc4569E+H7mmXeFH1ZcgTUV8zGyM5Pk9xcFYJZimY6tNrvZhvhqvXkJpYE52jgpT o/Hw== X-Gm-Message-State: ACrzQf13nv5eMrHkbcCa6ro6e06VSbQ/MPOID4kW8z5a88D7SJEsALqE B+fwDjXSPS/OiQNlgTeCyTlqLA== X-Google-Smtp-Source: AMsMyM5dYGSY2mS4ZtMippp1MLtH6fIDc1VOFMTTTSlhZ8F6m8PfSogrOZOwuryDJ/gXuzP1L/RbpA== X-Received: by 2002:a17:90a:e7d1:b0:200:94fd:967a with SMTP id kb17-20020a17090ae7d100b0020094fd967amr7328346pjb.57.1663736179023; Tue, 20 Sep 2022 21:56:19 -0700 (PDT) Received: from localhost.localdomain ([2401:4900:1c61:8e50:8ba8:7ad7:f34c:2f5]) by smtp.gmail.com with ESMTPSA id p12-20020a170902e74c00b00176e2fa216csm871829plf.52.2022.09.20.21.56.13 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 20 Sep 2022 21:56:18 -0700 (PDT) From: Bhupesh Sharma To: linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org Cc: agross@kernel.org, linux-kernel@vger.kernel.org, robh+dt@kernel.org, thara.gopinath@gmail.com, devicetree@vger.kernel.org, robh@kernel.org, krzysztof.kozlowski@linaro.org, andersson@kernel.org, bhupesh.sharma@linaro.org, bhupesh.linux@gmail.com, catalin.marinas@arm.com, will@kernel.org, arnd@arndb.de Subject: [PATCH v7 1/4] ARM: dts: qcom: Use new compatibles for crypto nodes Date: Wed, 21 Sep 2022 10:25:59 +0530 Message-Id: <20220921045602.1462007-2-bhupesh.sharma@linaro.org> X-Mailer: git-send-email 2.37.1 In-Reply-To: <20220921045602.1462007-1-bhupesh.sharma@linaro.org> References: <20220921045602.1462007-1-bhupesh.sharma@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Since we are using soc specific qce crypto IP compatibles in the bindings now, use the same in the device tree files which include the crypto nodes. Cc: Bjorn Andersson Cc: Rob Herring Signed-off-by: Bhupesh Sharma --- arch/arm/boot/dts/qcom-ipq4019.dtsi | 2 +- arch/arm64/boot/dts/qcom/ipq6018.dtsi | 2 +- arch/arm64/boot/dts/qcom/ipq8074.dtsi | 2 +- arch/arm64/boot/dts/qcom/msm8996.dtsi | 2 +- arch/arm64/boot/dts/qcom/sdm845.dtsi | 2 +- 5 files changed, 5 insertions(+), 5 deletions(-) diff --git a/arch/arm/boot/dts/qcom-ipq4019.dtsi b/arch/arm/boot/dts/qcom-ipq4019.dtsi index b23591110bd2..9c40714562d5 100644 --- a/arch/arm/boot/dts/qcom-ipq4019.dtsi +++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi @@ -314,7 +314,7 @@ cryptobam: dma-controller@8e04000 { }; crypto: crypto@8e3a000 { - compatible = "qcom,crypto-v5.1"; + compatible = "qcom,ipq4019-qce"; reg = <0x08e3a000 0x6000>; clocks = <&gcc GCC_CRYPTO_AHB_CLK>, <&gcc GCC_CRYPTO_AXI_CLK>, diff --git a/arch/arm64/boot/dts/qcom/ipq6018.dtsi b/arch/arm64/boot/dts/qcom/ipq6018.dtsi index a7c7ca980a71..0ae3c601b279 100644 --- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi @@ -198,7 +198,7 @@ cryptobam: dma-controller@704000 { }; crypto: crypto@73a000 { - compatible = "qcom,crypto-v5.1"; + compatible = "qcom,ipq6018-qce"; reg = <0x0 0x0073a000 0x0 0x6000>; clocks = <&gcc GCC_CRYPTO_AHB_CLK>, <&gcc GCC_CRYPTO_AXI_CLK>, diff --git a/arch/arm64/boot/dts/qcom/ipq8074.dtsi b/arch/arm64/boot/dts/qcom/ipq8074.dtsi index a47acf9bdf24..0683ef931413 100644 --- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi @@ -286,7 +286,7 @@ cryptobam: dma-controller@704000 { }; crypto: crypto@73a000 { - compatible = "qcom,crypto-v5.1"; + compatible = "qcom,ipq8074-qce"; reg = <0x0073a000 0x6000>; clocks = <&gcc GCC_CRYPTO_AHB_CLK>, <&gcc GCC_CRYPTO_AXI_CLK>, diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi index c0a2baffa49d..0dd6e1fea99c 100644 --- a/arch/arm64/boot/dts/qcom/msm8996.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi @@ -755,7 +755,7 @@ cryptobam: dma-controller@644000 { }; crypto: crypto@67a000 { - compatible = "qcom,crypto-v5.4"; + compatible = "qcom,msm8996-qce"; reg = <0x0067a000 0x6000>; clocks = <&gcc GCC_CE1_AHB_CLK>, <&gcc GCC_CE1_AXI_CLK>, diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi index d761da47220d..4aa5a82bd265 100644 --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi @@ -2566,7 +2566,7 @@ cryptobam: dma-controller@1dc4000 { }; crypto: crypto@1dfa000 { - compatible = "qcom,crypto-v5.4"; + compatible = "qcom,sdm845-qce"; reg = <0 0x01dfa000 0 0x6000>; clocks = <&gcc GCC_CE1_AHB_CLK>, <&gcc GCC_CE1_AXI_CLK>, From patchwork Wed Sep 21 04:56:01 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bhupesh Sharma X-Patchwork-Id: 608008 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E7587C32771 for ; Wed, 21 Sep 2022 04:56:49 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231292AbiIUE4r (ORCPT ); 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Tue, 20 Sep 2022 21:56:29 -0700 (PDT) From: Bhupesh Sharma To: linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org Cc: agross@kernel.org, linux-kernel@vger.kernel.org, robh+dt@kernel.org, thara.gopinath@gmail.com, devicetree@vger.kernel.org, robh@kernel.org, krzysztof.kozlowski@linaro.org, andersson@kernel.org, bhupesh.sharma@linaro.org, bhupesh.linux@gmail.com, catalin.marinas@arm.com, will@kernel.org, arnd@arndb.de Subject: [PATCH v7 3/4] arm64: dts: qcom: sm8150: Add dt entries to support crypto engine. Date: Wed, 21 Sep 2022 10:26:01 +0530 Message-Id: <20220921045602.1462007-4-bhupesh.sharma@linaro.org> X-Mailer: git-send-email 2.37.1 In-Reply-To: <20220921045602.1462007-1-bhupesh.sharma@linaro.org> References: <20220921045602.1462007-1-bhupesh.sharma@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add crypto engine (CE) and CE BAM related nodes and definitions to 'sm8150.dtsi'. Cc: Bjorn Andersson Cc: Rob Herring Signed-off-by: Bhupesh Sharma --- arch/arm64/boot/dts/qcom/sm8150.dtsi | 28 ++++++++++++++++++++++++++++ 1 file changed, 28 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi index cef8c4f4f0ff..6e21352a158c 100644 --- a/arch/arm64/boot/dts/qcom/sm8150.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi @@ -2041,6 +2041,34 @@ ufs_mem_phy_lanes: phy@1d87400 { }; }; + cryptobam: dma-controller@1dc4000 { + compatible = "qcom,bam-v1.7.0"; + reg = <0 0x01dc4000 0 0x24000>; + interrupts = ; + #dma-cells = <1>; + qcom,ee = <0>; + qcom,controlled-remotely; + iommus = <&apps_smmu 0x504 0x0011>, + <&apps_smmu 0x506 0x0011>, + <&apps_smmu 0x514 0x0011>, + <&apps_smmu 0x516 0x0011>; + interconnects = <&aggre2_noc MASTER_CRYPTO_CORE_0 &mc_virt SLAVE_EBI_CH0>; + interconnect-names = "memory"; + }; + + crypto: crypto@1dfa000 { + compatible = "qcom,sm8150-qce"; + reg = <0 0x01dfa000 0 0x6000>; + dmas = <&cryptobam 4>, <&cryptobam 5>; + dma-names = "rx", "tx"; + iommus = <&apps_smmu 0x504 0x0011>, + <&apps_smmu 0x506 0x0011>, + <&apps_smmu 0x514 0x0011>, + <&apps_smmu 0x516 0x0011>; + interconnects = <&aggre2_noc MASTER_CRYPTO_CORE_0 &mc_virt SLAVE_EBI_CH0>; + interconnect-names = "memory"; + }; + ipa_virt: interconnect@1e00000 { compatible = "qcom,sm8150-ipa-virt"; reg = <0 0x01e00000 0 0x1000>;