From patchwork Wed Feb 20 07:28:20 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ming Huang X-Patchwork-Id: 158780 Delivered-To: patch@linaro.org Received: by 2002:a02:48:0:0:0:0:0 with SMTP id 69csp4602432jaa; Tue, 19 Feb 2019 23:29:18 -0800 (PST) X-Google-Smtp-Source: AHgI3IbSVcvadRpbrQMjukuzIK3IGobL5MDh0nmJk0H/294oqOrZLecI5rEjkIcgNpF7X1GaT050 X-Received: by 2002:ae9:ebd5:: with SMTP id b204mr205588qkg.37.1550647758252; Tue, 19 Feb 2019 23:29:18 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1550647758; cv=none; d=google.com; s=arc-20160816; b=G3g8WSKIHQH905q1UXUGKBBthhaBlQEDSfgckxjU61t9C1gOoSHzwZgrqmi0veLkHT +a+ULHtRl0U/SGquhbsd/wImBBIutAX8brlMOgY+1wOlsKXP2aHazLKHBI80CKAT+0P2 K0Avjh2FOnKoDgA1mfwESuCZvnf7ZMYHwEv1CRobhsyglHTKcareqielQ1B7T6hG/l0j ktyK96FrGDF1VD1iKZ9QHU/t2J9SKO4rlZHFQPaa4OnP4Sb1utFg3i6+TXQ96dTuHpGb xPW7Vc17FyEz0yC7e/bGSpa+Uf2cYfG7aRl+hDE7ONf5J5L/b8eLg4D/MeIuwyvGXbRa 99Ug== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version :list-subscribe:list-help:list-post:list-archive:list-unsubscribe :list-id:precedence:subject:cc:references:in-reply-to:message-id :date:to:from:delivered-to; bh=Adh++iNuW2R5WhfqiIJc8NxT4rY1JVEoH+n/KtgbO/Q=; b=T5GwtMeAT+t2fLH+mUcF/n9Arb0COYA/Bu2rYASqaNNZisR+iGSqy8yfbaPthbQiSI ied5F0wsax+5aU484F9GsVAS9dvS4Bb/0yde8Sn1CiY1UNbIn6wbFa57cN6xduEUffo1 ZRoQ6PNi52OhtTrDo3CcS13cnPfvrZpBLmZXBVV8f69E8yiMU9QDfeaQbQEuDZy0hhOC Xb5iMx0qgFvrYy8yONmaniBRZPI+vLI9gHIC824a5N4+HqIfz5e4tSGhkz7jOMNUMNiw temx5H54JhIBcxfkfxs9/U7FRs1w3JSyhwWW/Y96EG5pBiZzv9/I2Wyj7pSie1kJdrPV uhWQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linaro-uefi-bounces@lists.linaro.org designates 54.158.76.221 as permitted sender) smtp.mailfrom=linaro-uefi-bounces@lists.linaro.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.linaro.org (ec2-54-158-76-221.compute-1.amazonaws.com. [54.158.76.221]) by mx.google.com with ESMTPS id z54si426749qth.393.2019.02.19.23.29.18 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 19 Feb 2019 23:29:18 -0800 (PST) Received-SPF: pass (google.com: domain of linaro-uefi-bounces@lists.linaro.org designates 54.158.76.221 as permitted sender) client-ip=54.158.76.221; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linaro-uefi-bounces@lists.linaro.org designates 54.158.76.221 as permitted sender) smtp.mailfrom=linaro-uefi-bounces@lists.linaro.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: by lists.linaro.org (Postfix, from userid 109) id C87B36197D; Wed, 20 Feb 2019 07:29:17 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on ip-10-150-125-211.ec2.internal X-Spam-Level: X-Spam-Status: No, score=-2.9 required=5.0 tests=BAYES_00, MAILING_LIST_MULTI, RCVD_IN_DNSWL_NONE,RCVD_IN_MSPIKE_H3,RCVD_IN_MSPIKE_WL autolearn=disabled version=3.4.2 Received: from [127.0.0.1] (localhost [127.0.0.1]) by lists.linaro.org (Postfix) with ESMTP id 417A9618D3; Wed, 20 Feb 2019 07:28:55 +0000 (UTC) X-Original-To: linaro-uefi@lists.linaro.org Delivered-To: linaro-uefi@lists.linaro.org Received: by lists.linaro.org (Postfix, from userid 109) id BFEEA61892; Wed, 20 Feb 2019 07:28:50 +0000 (UTC) Received: from mail-pf1-f196.google.com (mail-pf1-f196.google.com [209.85.210.196]) by lists.linaro.org (Postfix) with ESMTPS id 5C97E61627 for ; Wed, 20 Feb 2019 07:28:48 +0000 (UTC) Received: by mail-pf1-f196.google.com with SMTP id s22so11494122pfh.4 for ; Tue, 19 Feb 2019 23:28:48 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=TM2+jrvEQ86oTJyIefvkIhUAeD+yUi/xMo1Tt8Njze4=; b=pdUztypCB/gvvtlJmH/9k8YvLtknaNiyXW1t7JgnrzZ29PYvmVN2Xv2eAYINRyshKG OAN8QWfxmaZE6Umypg9ZxzGRLUAH7YLGr4cv+tX46df7DLDAv1e6kv/G0dCJ6jDDkp2V VDKIBbsJnHSri1AC/4f3+TjK7UKET9ViS/iHAx3rFja67tDaVAotoe75W7fAlYRwKrhi s3lfJFRbZxetThQEf72RPvLqJNig7r8afQTnmK5LhyimYPlrSOnvDOgHJObus8KK1ySn mq0/t+bjeg0QRoa/lLR+EQYslYIFNQ0/co2sRyHN2fwiJtMVYEIfg0gyGgdq86u7L272 O+7w== X-Gm-Message-State: AHQUAub4UY2Z6L2QOKJKJrfTPJmHyrpPAQH5wE+bt6CBY8LyDT2OmHau /aLDvL+4fSsDhX1gxz/FZ/u8c8yy X-Received: by 2002:a65:6397:: with SMTP id h23mr26964832pgv.347.1550647727671; Tue, 19 Feb 2019 23:28:47 -0800 (PST) Received: from localhost.localdomain ([203.160.91.226]) by smtp.gmail.com with ESMTPSA id 23sm19152969pft.187.2019.02.19.23.28.44 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 19 Feb 2019 23:28:47 -0800 (PST) From: Ming Huang To: leif.lindholm@linaro.org, linaro-uefi@lists.linaro.org, edk2-devel@lists.01.org, graeme.gregory@linaro.org Date: Wed, 20 Feb 2019 15:28:20 +0800 Message-Id: <20190220072837.35058-2-ming.huang@linaro.org> X-Mailer: git-send-email 2.9.5 In-Reply-To: <20190220072837.35058-1-ming.huang@linaro.org> References: <20190220072837.35058-1-ming.huang@linaro.org> Cc: huangming23@huawei.com, john.garry@huawei.com, xiaojun2@hisilicon.com, zhangjinsong2@huawei.com, huangdaode@hisilicon.com, zhangfeng56@huawei.com, michael.d.kinney@intel.com, lersek@redhat.com, wanghuiqiang@huawei.com Subject: [Linaro-uefi] [PATCH edk2-platforms v2 01/18] Hisilicon/D0x: Add DriverHealthManagerDxe X-BeenThere: linaro-uefi@lists.linaro.org X-Mailman-Version: 2.1.16 Precedence: list List-Id: "For discussions about Linaro-related UEFI development. Not a substitute for edk2-devel." List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: linaro-uefi-bounces@lists.linaro.org Sender: "Linaro-uefi" DriverHealthManagerDxe Collect driver health form of third party drivers to repair no healthy card. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ming Huang Reviewed-by: Leif Lindholm --- Platform/Hisilicon/D03/D03.dsc | 1 + Platform/Hisilicon/D05/D05.dsc | 1 + Platform/Hisilicon/D06/D06.dsc | 1 + Platform/Hisilicon/D03/D03.fdf | 1 + Platform/Hisilicon/D05/D05.fdf | 1 + Platform/Hisilicon/D06/D06.fdf | 1 + 6 files changed, 6 insertions(+) diff --git a/Platform/Hisilicon/D03/D03.dsc b/Platform/Hisilicon/D03/D03.dsc index 3f59be22ec8e..fe443dd929ad 100644 --- a/Platform/Hisilicon/D03/D03.dsc +++ b/Platform/Hisilicon/D03/D03.dsc @@ -492,6 +492,7 @@ [Components.common] MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf + MdeModulePkg/Universal/DriverHealthManagerDxe/DriverHealthManagerDxe.inf MdeModulePkg/Universal/BdsDxe/BdsDxe.inf SignedCapsulePkg/Universal/SystemFirmwareUpdate/SystemFirmwareUpdateDxe.inf { diff --git a/Platform/Hisilicon/D05/D05.dsc b/Platform/Hisilicon/D05/D05.dsc index 25db1c38d287..0c4f21fbe056 100644 --- a/Platform/Hisilicon/D05/D05.dsc +++ b/Platform/Hisilicon/D05/D05.dsc @@ -638,6 +638,7 @@ [Components.common] MdeModulePkg/Universal/MemoryTest/NullMemoryTestDxe/NullMemoryTestDxe.inf MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf + MdeModulePkg/Universal/DriverHealthManagerDxe/DriverHealthManagerDxe.inf MdeModulePkg/Universal/BdsDxe/BdsDxe.inf SignedCapsulePkg/Universal/SystemFirmwareUpdate/SystemFirmwareUpdateDxe.inf { diff --git a/Platform/Hisilicon/D06/D06.dsc b/Platform/Hisilicon/D06/D06.dsc index 396bd03c9d24..3856578e74be 100644 --- a/Platform/Hisilicon/D06/D06.dsc +++ b/Platform/Hisilicon/D06/D06.dsc @@ -437,6 +437,7 @@ [Components.common] Silicon/Hisilicon/Hi1620/Drivers/Pl011DebugSerialPortInitDxe/Pl011DebugSerialPortInitDxe.inf MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf + MdeModulePkg/Universal/DriverHealthManagerDxe/DriverHealthManagerDxe.inf MdeModulePkg/Universal/BdsDxe/BdsDxe.inf SignedCapsulePkg/Universal/SystemFirmwareUpdate/SystemFirmwareUpdateDxe.inf { diff --git a/Platform/Hisilicon/D03/D03.fdf b/Platform/Hisilicon/D03/D03.fdf index f453f9e46321..3f07b2e57778 100644 --- a/Platform/Hisilicon/D03/D03.fdf +++ b/Platform/Hisilicon/D03/D03.fdf @@ -295,6 +295,7 @@ [FV.FvMain] INF MdeModulePkg/Universal/MemoryTest/NullMemoryTestDxe/NullMemoryTestDxe.inf INF MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf INF MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf + INF MdeModulePkg/Universal/DriverHealthManagerDxe/DriverHealthManagerDxe.inf INF MdeModulePkg/Universal/BdsDxe/BdsDxe.inf [FV.FVMAIN_COMPACT] diff --git a/Platform/Hisilicon/D05/D05.fdf b/Platform/Hisilicon/D05/D05.fdf index 85dd791564a4..9632aea4b00e 100644 --- a/Platform/Hisilicon/D05/D05.fdf +++ b/Platform/Hisilicon/D05/D05.fdf @@ -314,6 +314,7 @@ [FV.FvMain] INF MdeModulePkg/Universal/MemoryTest/NullMemoryTestDxe/NullMemoryTestDxe.inf INF MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf INF MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf + INF MdeModulePkg/Universal/DriverHealthManagerDxe/DriverHealthManagerDxe.inf INF MdeModulePkg/Universal/BdsDxe/BdsDxe.inf [FV.FVMAIN_COMPACT] diff --git a/Platform/Hisilicon/D06/D06.fdf b/Platform/Hisilicon/D06/D06.fdf index fda29ab322e9..a937660a09e2 100644 --- a/Platform/Hisilicon/D06/D06.fdf +++ b/Platform/Hisilicon/D06/D06.fdf @@ -319,6 +319,7 @@ [FV.FvMain] INF MdeModulePkg/Universal/MemoryTest/NullMemoryTestDxe/NullMemoryTestDxe.inf INF MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf INF MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf + INF MdeModulePkg/Universal/DriverHealthManagerDxe/DriverHealthManagerDxe.inf INF MdeModulePkg/Universal/BdsDxe/BdsDxe.inf [FV.FVMAIN_COMPACT] From patchwork Wed Feb 20 07:28:24 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ming Huang X-Patchwork-Id: 158787 Delivered-To: patch@linaro.org Received: by 2002:a02:48:0:0:0:0:0 with SMTP id 69csp4603867jaa; Tue, 19 Feb 2019 23:30:54 -0800 (PST) X-Google-Smtp-Source: AHgI3IaNkFEYv9eMPSK7JAfi8CsWMb6omsnwAqujI6XbW51R1jvLeYaa6C+LxvQdiNGQr/VNG75N X-Received: by 2002:ac8:34ae:: with SMTP id w43mr5664235qtb.145.1550647854202; Tue, 19 Feb 2019 23:30:54 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1550647854; cv=none; d=google.com; s=arc-20160816; b=WBDNam6M3+Srq8Z3RNJ+/e+YgAVIKZ7vtKthNClHnHJHmEKjOQ7Aod2fs6X4fa/abC TvgFmqqzhw2bIgAqdymmLlRnLum3mDmjlQ69t8OYM2M7j4TGqnXjX6Qrb1nLX8s7Btjb X8pag9zpFJNcUv/0n42jhW2M9Kox0A1wXyzZP6FlpaZP7oA9sZhArh6Rx2sqc/v9UqZz xYXbaCPSs+208+TZtyC7T/EX6I46Y8j6OnoZqG3uVYMzLcrBWyKn1paaPZO4BjBQeC7i ThGZsNKru5LiRGbE6Bi0s/Whtygn8EgA5LwIOldL0HuVIvK7wlbbQq2HsyE7Q+zxEQNC IWEA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version :list-subscribe:list-help:list-post:list-archive:list-unsubscribe :list-id:precedence:subject:cc:references:in-reply-to:message-id :date:to:from:delivered-to; bh=LV4fOGeMunk57D0rpmYnE0JSbZNZJ57pQgmSaQ2OsMc=; b=UHS+sfWNM8m1QliYGfOuWXvt8NmpCMxxu0j3JP7W8xbWjTQSIDTBbqvzeSeIXdQpyg FnRxSSwuOdXrrSOdQnslpUlO+tZ6XRsXghYOVpik4oV/Ien0hgEATUah6+yUyy0CO7GE E67HTY918QE7UivmGsASnLC/l3z3YqFmLUv0DVZtt+yk+jGSOgESxAJ0UONDUYd83aCG OeX7ydk1ycdZ6WBiJTw/OqeASAaViq7AD4k/ZBkKrJ0C1OHxrVM+NbYN73dgLsEMsDQf 2Tt0GnJDIQv1BBiiqJlZKVN0ZM2jQs4f3iGO8QrPDVoQ7ab0laso5hZZq8EVgdKY16WO Ajnw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linaro-uefi-bounces@lists.linaro.org designates 54.158.76.221 as permitted sender) smtp.mailfrom=linaro-uefi-bounces@lists.linaro.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.linaro.org (ec2-54-158-76-221.compute-1.amazonaws.com. [54.158.76.221]) by mx.google.com with ESMTPS id q49si1978211qtj.90.2019.02.19.23.30.53 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 19 Feb 2019 23:30:54 -0800 (PST) Received-SPF: pass (google.com: domain of linaro-uefi-bounces@lists.linaro.org designates 54.158.76.221 as permitted sender) client-ip=54.158.76.221; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linaro-uefi-bounces@lists.linaro.org designates 54.158.76.221 as permitted sender) smtp.mailfrom=linaro-uefi-bounces@lists.linaro.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: by lists.linaro.org (Postfix, from userid 109) id C70F56199E; Wed, 20 Feb 2019 07:30:53 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on ip-10-150-125-211.ec2.internal X-Spam-Level: X-Spam-Status: No, score=-2.9 required=5.0 tests=BAYES_00, MAILING_LIST_MULTI, RCVD_IN_DNSWL_NONE,RCVD_IN_MSPIKE_H3,RCVD_IN_MSPIKE_WL autolearn=disabled version=3.4.2 Received: from [127.0.0.1] (localhost [127.0.0.1]) by lists.linaro.org (Postfix) with ESMTP id F0C0361936; Wed, 20 Feb 2019 07:29:52 +0000 (UTC) X-Original-To: linaro-uefi@lists.linaro.org Delivered-To: linaro-uefi@lists.linaro.org Received: by lists.linaro.org (Postfix, from userid 109) id 5314761973; Wed, 20 Feb 2019 07:29:48 +0000 (UTC) Received: from mail-pf1-f196.google.com (mail-pf1-f196.google.com [209.85.210.196]) by lists.linaro.org (Postfix) with ESMTPS id A2CF361936 for ; Wed, 20 Feb 2019 07:29:01 +0000 (UTC) Received: by mail-pf1-f196.google.com with SMTP id h1so11478234pfo.7 for ; Tue, 19 Feb 2019 23:29:01 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=MRbvcU1OuLk38U6fCDZjzxsbaCDVrdkPV7fJkZKzkjo=; b=IytG5ksKchBEHC+PMnGMJp1BqYhWGPEcDQ4WV6r/JUiqCjD3xtPRDJ4ZzfJCGR9aoP aMOd5B9ibBcoHjTC5A/BcMFeYPVLnaNZOdd1X4huDNFEdxAw+8xzqKekFurrWUg3fB51 Dh5xGHGF5OlBidgBJq2WeuaECQ0c2lP+ofiRTT5JdGbXU+hQUVWiJ8MvI4bXwtlFOXTa l8XcacjmDPd2bq7TaeyI1A9LJqtAd7dVx0+Gjhi1NrWKsOmmWAAVW35LHQLjxFkeoAae EzDotZkgPN8W+eYBrYh+mcc+EYZvNIJoaHdlUG1cAVCsdqmJ1WJR3Uir7o8aKcQOitqf Jz3A== X-Gm-Message-State: AHQUAua9xmrvCfC/jNymEum9Ht4C02asoeOGun2Wp6UqE7LPRpypXiVu PPsj+dcrZaSBrblJQ9larKFXlTjd X-Received: by 2002:a63:7044:: with SMTP id a4mr27411002pgn.359.1550647740935; Tue, 19 Feb 2019 23:29:00 -0800 (PST) Received: from localhost.localdomain ([203.160.91.226]) by smtp.gmail.com with ESMTPSA id 23sm19152969pft.187.2019.02.19.23.28.57 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 19 Feb 2019 23:29:00 -0800 (PST) From: Ming Huang To: leif.lindholm@linaro.org, linaro-uefi@lists.linaro.org, edk2-devel@lists.01.org, graeme.gregory@linaro.org Date: Wed, 20 Feb 2019 15:28:24 +0800 Message-Id: <20190220072837.35058-6-ming.huang@linaro.org> X-Mailer: git-send-email 2.9.5 In-Reply-To: <20190220072837.35058-1-ming.huang@linaro.org> References: <20190220072837.35058-1-ming.huang@linaro.org> Cc: huangming23@huawei.com, john.garry@huawei.com, xiaojun2@hisilicon.com, zhangjinsong2@huawei.com, huangdaode@hisilicon.com, zhangfeng56@huawei.com, michael.d.kinney@intel.com, lersek@redhat.com, wanghuiqiang@huawei.com Subject: [Linaro-uefi] [PATCH edk2-platforms v2 05/18] Hisilicon/D06: Add more PCIe port INT-x support X-BeenThere: linaro-uefi@lists.linaro.org X-Mailman-Version: 2.1.16 Precedence: list List-Id: "For discussions about Linaro-related UEFI development. Not a substitute for edk2-devel." List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: linaro-uefi-bounces@lists.linaro.org Sender: "Linaro-uefi" Since NVMe riser width is 6*X4, need add the related port's INT-x support to match OS driver. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ming Huang --- Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Pci.asl | 37 +++++++++++++++++++- 1 file changed, 36 insertions(+), 1 deletion(-) diff --git a/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Pci.asl b/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Pci.asl index 0f2d11bb952b..4d9d9d95be68 100644 --- a/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Pci.asl +++ b/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Pci.asl @@ -41,11 +41,21 @@ Scope(_SB) // adding RPx INTx configure deponds on hardware board topology, // if UEFI enables RPx, RPy, RPz... related INTx configure // should be added + Package () {0x2FFFF,0,0,640}, // INT_A + Package () {0x2FFFF,1,0,641}, // INT_B + Package () {0x2FFFF,2,0,642}, // INT_C + Package () {0x2FFFF,3,0,643}, // INT_D + Package () {0x4FFFF,0,0,640}, // INT_A Package () {0x4FFFF,1,0,641}, // INT_B Package () {0x4FFFF,2,0,642}, // INT_C Package () {0x4FFFF,3,0,643}, // INT_D + Package () {0x6FFFF,0,0,640}, // INT_A + Package () {0x6FFFF,1,0,641}, // INT_B + Package () {0x6FFFF,2,0,642}, // INT_C + Package () {0x6FFFF,3,0,643}, // INT_D + Package () {0x8FFFF,0,0,640}, // INT_A Package () {0x8FFFF,1,0,641}, // INT_B Package () {0x8FFFF,2,0,642}, // INT_C @@ -56,6 +66,11 @@ Scope(_SB) Package () {0xCFFFF,2,0,642}, // INT_C Package () {0xCFFFF,3,0,643}, // INT_D + Package () {0xEFFFF,0,0,640}, // INT_A + Package () {0xEFFFF,1,0,641}, // INT_B + Package () {0xEFFFF,2,0,642}, // INT_C + Package () {0xEFFFF,3,0,643}, // INT_D + Package () {0x10FFFF,0,0,640}, // INT_A Package () {0x10FFFF,1,0,641}, // INT_B Package () {0x10FFFF,2,0,642}, // INT_C @@ -759,11 +774,21 @@ Device (PCI6) // adding RPx INTx configure deponds on hardware board topology, // if UEFI enables RPx, RPy, RPz... related INTx configure // should be added + Package () {0x2FFFF,0,0,640}, // INT_A + Package () {0x2FFFF,1,0,641}, // INT_B + Package () {0x2FFFF,2,0,642}, // INT_C + Package () {0x2FFFF,3,0,643}, // INT_D + Package () {0x4FFFF,0,0,640}, // INT_A Package () {0x4FFFF,1,0,641}, // INT_B Package () {0x4FFFF,2,0,642}, // INT_C Package () {0x4FFFF,3,0,643}, // INT_D + Package () {0x6FFFF,0,0,640}, // INT_A + Package () {0x6FFFF,1,0,641}, // INT_B + Package () {0x6FFFF,2,0,642}, // INT_C + Package () {0x6FFFF,3,0,643}, // INT_D + Package () {0x8FFFF,0,0,640}, // INT_A Package () {0x8FFFF,1,0,641}, // INT_B Package () {0x8FFFF,2,0,642}, // INT_C @@ -774,11 +799,21 @@ Device (PCI6) Package () {0xCFFFF,2,0,642}, // INT_C Package () {0xCFFFF,3,0,643}, // INT_D + Package () {0xEFFFF,0,0,640}, // INT_A + Package () {0xEFFFF,1,0,641}, // INT_B + Package () {0xEFFFF,2,0,642}, // INT_C + Package () {0xEFFFF,3,0,643}, // INT_D + Package () {0x10FFFF,0,0,640}, // INT_A Package () {0x10FFFF,1,0,641}, // INT_B Package () {0x10FFFF,2,0,642}, // INT_C Package () {0x10FFFF,3,0,643}, // INT_D - }) + + Package () {0x12FFFF,0,0,640}, // INT_A + Package () {0x12FFFF,1,0,641}, // INT_B + Package () {0x12FFFF,2,0,642}, // INT_C + Package () {0x12FFFF,3,0,643}, // INT_D + }) Method (_CRS, 0, Serialized) { // Root complex resources, _CRS: current resource setting Name (RBUF, ResourceTemplate () { // Name: 19.6.87, ResourceTemplate: 19.6.111, From patchwork Wed Feb 20 07:28:25 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ming Huang X-Patchwork-Id: 158788 Delivered-To: patch@linaro.org Received: by 2002:a02:48:0:0:0:0:0 with SMTP id 69csp4604407jaa; Tue, 19 Feb 2019 23:31:31 -0800 (PST) X-Google-Smtp-Source: AHgI3IYleY+54xJhQx/x4OwGvR/6IKQTJEbfFEd2vJrzkeQssF/yumrGeyV2EEmox/W9CR70E4J0 X-Received: by 2002:ac8:fef:: with SMTP id f44mr26376735qtk.262.1550647891234; Tue, 19 Feb 2019 23:31:31 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1550647891; cv=none; d=google.com; s=arc-20160816; b=p/WYmCTed6FKgEaASbMzMxPOadXP//GvGEdloChz8OCYLS+oe/CunE4K1p59bBMY+l cyOt8v5kcEE0hHwfvudEbVSvIWcVgltyRqBf1M8wRpv2xgFDSDu3IeoRdb682au5029s zr3eOjkvfHBF8PshZDCnCzOwhgIll4TdWxHFa0f/2ta9mweyqk+d1EYIcJJsrnds4rr1 hXkCI8o2CLWofN1afNzODtiA+wFfvh6CsEcMFBoUk3qT2JzndoMW/vOMM7KsDXHsG7RP 3tUZBOW984ZW4COQ9V5+ragD4jNSvna90zBbO5qdzO1X6ZLrzYpX/T84eHsONF/ZFtI+ PF5A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version :list-subscribe:list-help:list-post:list-archive:list-unsubscribe :list-id:precedence:subject:cc:references:in-reply-to:message-id :date:to:from:delivered-to; bh=kMmw6EQHMJYTAQJXsbljEr+v5JbDus3MkhGaYRc6fH4=; b=l2DPyPst7XlhQlvtemVC9yaYKZe85L6RrEQVzNt2qwHMLUoUzrT0Jp4kVkVoOsn8U/ JSBIUG0MBZt4k6AJ/JbwMu/bYO0wA5B4AIVyc4+eOxrZTHSxXWKo2gpzU68vTXUZznGy VdpviyPXmldJYzuDaHFxx3wuJV2VXp9KBPbFkIGJTrBsTB23jnNf2qQ4fGGgPGAi5cSy RNlrHng4k8m+1intDsfjTVDgLJDcxCcW/wO5euaxb8RryYVYV3EzfkemKoA4kKwlndQj osoS1Iiyw6i6EKO2yOAt8dxiO/3aI4o7/EHZewjPp2PxrS7pQmuEvS8zE5nH6H0EXwLn Lmzw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linaro-uefi-bounces@lists.linaro.org designates 54.158.76.221 as permitted sender) smtp.mailfrom=linaro-uefi-bounces@lists.linaro.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.linaro.org (ec2-54-158-76-221.compute-1.amazonaws.com. [54.158.76.221]) by mx.google.com with ESMTPS id 33si2257725qtq.391.2019.02.19.23.31.31 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 19 Feb 2019 23:31:31 -0800 (PST) Received-SPF: pass (google.com: domain of linaro-uefi-bounces@lists.linaro.org designates 54.158.76.221 as permitted sender) client-ip=54.158.76.221; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linaro-uefi-bounces@lists.linaro.org designates 54.158.76.221 as permitted sender) smtp.mailfrom=linaro-uefi-bounces@lists.linaro.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: by lists.linaro.org (Postfix, from userid 109) id C6C5D619C5; Wed, 20 Feb 2019 07:31:30 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on ip-10-150-125-211.ec2.internal X-Spam-Level: X-Spam-Status: No, score=-2.9 required=5.0 tests=BAYES_00, MAILING_LIST_MULTI, RCVD_IN_DNSWL_NONE,RCVD_IN_MSPIKE_H3,RCVD_IN_MSPIKE_WL autolearn=disabled version=3.4.2 Received: from [127.0.0.1] (localhost [127.0.0.1]) by lists.linaro.org (Postfix) with ESMTP id B5ED361950; Wed, 20 Feb 2019 07:30:09 +0000 (UTC) X-Original-To: linaro-uefi@lists.linaro.org Delivered-To: linaro-uefi@lists.linaro.org Received: by lists.linaro.org (Postfix, from userid 109) id 9EDCC619C9; Wed, 20 Feb 2019 07:30:05 +0000 (UTC) Received: from mail-pl1-f194.google.com (mail-pl1-f194.google.com [209.85.214.194]) by lists.linaro.org (Postfix) with ESMTPS id 0D8816195E for ; Wed, 20 Feb 2019 07:29:05 +0000 (UTC) Received: by mail-pl1-f194.google.com with SMTP id s1so11756952plp.9 for ; Tue, 19 Feb 2019 23:29:05 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=Ur5zn7REmq046LXBleoPLLtnsQfwfughbzQep8BDAJw=; b=grPrZDoAJAeJz5O0j1EpoRgkAs1C+BAXGWwM1e9gRiIeFjlaDAxh15hVQr7s/vz5W8 AdCjMK1JFoKkY/v7WoKrSKM+hwJN1mh9csIkaGXIA53vgUOkfpzeocsZt1l+azSM8AEG ClUitnlHNSpcrXMk3d3s+7YrMXS+rngAz79HRx+5lMHLrDSYcW3X3hDZzb1+pkrUsS3p nslf7aXRSl0sBXoYfshBQYGH7DCsBLkcLtVS24IkKO7rfNGVI5j9n005nYviR9QlMQWB /MYsc3E+0jmxmPGbry7gYW9nZpo0fxU19y7hNoyyypw/79cOmrRznlM0G4MQoRUCAjnb Wftw== X-Gm-Message-State: AHQUAubHV7DqhxkqeddB1jjx++81JlubHSZMSqJchCZMLC6GoXwfTOHt BYz8KDGK3GPEsbebyukCEyt9XUyH X-Received: by 2002:a17:902:8b8b:: with SMTP id ay11mr4849081plb.162.1550647744363; Tue, 19 Feb 2019 23:29:04 -0800 (PST) Received: from localhost.localdomain ([203.160.91.226]) by smtp.gmail.com with ESMTPSA id 23sm19152969pft.187.2019.02.19.23.29.01 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 19 Feb 2019 23:29:03 -0800 (PST) From: Ming Huang To: leif.lindholm@linaro.org, linaro-uefi@lists.linaro.org, edk2-devel@lists.01.org, graeme.gregory@linaro.org Date: Wed, 20 Feb 2019 15:28:25 +0800 Message-Id: <20190220072837.35058-7-ming.huang@linaro.org> X-Mailer: git-send-email 2.9.5 In-Reply-To: <20190220072837.35058-1-ming.huang@linaro.org> References: <20190220072837.35058-1-ming.huang@linaro.org> Cc: huangming23@huawei.com, john.garry@huawei.com, xiaojun2@hisilicon.com, zhangjinsong2@huawei.com, xingjiang tang , huangdaode@hisilicon.com, zhangfeng56@huawei.com, michael.d.kinney@intel.com, lersek@redhat.com, wanghuiqiang@huawei.com Subject: [Linaro-uefi] [PATCH edk2-platforms v2 06/18] Hisilicon/D06: Add OemGetCpuFreq to encapsulate difference X-BeenThere: linaro-uefi@lists.linaro.org X-Mailman-Version: 2.1.16 Precedence: list List-Id: "For discussions about Linaro-related UEFI development. Not a substitute for edk2-devel." List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: linaro-uefi-bounces@lists.linaro.org Sender: "Linaro-uefi" From: xingjiang tang Implementation OemGetCpuFreq() to get cpu frequency from cpld to encapsulate project difference, for some projects don't support get cpu frequency by this way. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ming Huang --- Platform/Hisilicon/D06/Include/Library/CpldD06.h | 4 ++++ Silicon/Hisilicon/Include/Library/OemMiscLib.h | 2 ++ Platform/Hisilicon/D06/Library/OemMiscLibD06/OemMiscLibD06.c | 16 ++++++++++++++++ 3 files changed, 22 insertions(+) diff --git a/Platform/Hisilicon/D06/Include/Library/CpldD06.h b/Platform/Hisilicon/D06/Include/Library/CpldD06.h index ec9b49f4e70d..8eb333de529c 100644 --- a/Platform/Hisilicon/D06/Include/Library/CpldD06.h +++ b/Platform/Hisilicon/D06/Include/Library/CpldD06.h @@ -36,4 +36,8 @@ #define CPLD_X8_X8_X8_BOARD_ID 0x92 #define CPLD_X16_X8_BOARD_ID 0x93 +#define CPLD_CLOCK_FLAG 0xFD +#define CPLD_BOM_VER_FLAG 0x0B +#define CPLD_BOARD_REVISION_4TH 0x4 + #endif /* __CPLDD06_H__ */ diff --git a/Silicon/Hisilicon/Include/Library/OemMiscLib.h b/Silicon/Hisilicon/Include/Library/OemMiscLib.h index 86ea6a1b3deb..dfac87d635d9 100644 --- a/Silicon/Hisilicon/Include/Library/OemMiscLib.h +++ b/Silicon/Hisilicon/Include/Library/OemMiscLib.h @@ -53,4 +53,6 @@ BOOLEAN OemIsNeedDisableExpanderBuffer(VOID); extern EFI_STRING_ID gDimmToDevLocator[MAX_SOCKET][MAX_CHANNEL][MAX_DIMM]; EFI_HII_HANDLE EFIAPI OemGetPackages (); +UINTN OemGetCpuFreq (UINT8 Socket); + #endif diff --git a/Platform/Hisilicon/D06/Library/OemMiscLibD06/OemMiscLibD06.c b/Platform/Hisilicon/D06/Library/OemMiscLibD06/OemMiscLibD06.c index 2a9db46d1ff9..624fa33d2e14 100644 --- a/Platform/Hisilicon/D06/Library/OemMiscLibD06/OemMiscLibD06.c +++ b/Platform/Hisilicon/D06/Library/OemMiscLibD06/OemMiscLibD06.c @@ -207,3 +207,19 @@ OemIsNeedDisableExpanderBuffer ( { return TRUE; } + +UINTN OemGetCpuFreq (UINT8 Socket) +{ + UINT8 BoardRevision; + + BoardRevision = MmioRead8 (CPLD_BASE_ADDRESS + CPLD_BOM_VER_FLAG); + + // Board revision 4 and higher run at 2.5GHz + // Earlier revisions run at 2GHz + if (BoardRevision >= CPLD_BOARD_REVISION_4TH) { + return 2500000000; + } else { + return 2000000000; + } +} + From patchwork Wed Feb 20 07:28:26 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ming Huang X-Patchwork-Id: 158790 Delivered-To: patch@linaro.org Received: by 2002:a02:48:0:0:0:0:0 with SMTP id 69csp4604915jaa; Tue, 19 Feb 2019 23:32:08 -0800 (PST) X-Google-Smtp-Source: AHgI3Ibut6kWRtQaxtEr5NsDVZSjtFp4vJB7aqC7hDMz6mVZore6ONN8qTP0ikGYDj94lQu9CeAH X-Received: by 2002:ac8:1e03:: with SMTP id n3mr25835045qtl.383.1550647928822; Tue, 19 Feb 2019 23:32:08 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1550647928; cv=none; d=google.com; s=arc-20160816; b=tGAGy86KbEEJxol8ars0iH6tb3vMuBcRxphWioHd5xoygBE4UqLLgPud1hoNhAjra5 TF5wvOdm2bmo7442ERJLU3TM56lRPx8mqZ+NpWS0iWaxR0QcDvDsogaz+gvJPWlskFTg zmRn1ReE5WvnTAIRNgn9rljC5WA2AXYq932xZp18H2J9Zmbz8zCkT+3Pau6F4CrXFVwN t+yu9KMceQSXn314FBlnG3qXKvqR0lpjMv/LxRo/pXrDvUkPRkS1Q1zHSYakJn/81y1L YAST4Ja3B2N36jzgdm6a6DOWBuvlJ/kpTZlETmUTbpav7rw7RXh8+4Wp0H3zbACnFmP1 09pw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version :list-subscribe:list-help:list-post:list-archive:list-unsubscribe :list-id:precedence:subject:cc:references:in-reply-to:message-id :date:to:from:delivered-to; bh=ItREMwS5WiCujjRzMvoWWHfj8SMxd/FW9SQHSh8oHbE=; b=NYkfrrfQXilIwDCAlwUyfsNYM4jTqKMeYJZRxsqOaEliDYfUK9wOzlT6SxzVIvDETJ Bkhf4yO2X9M7aBqBkqZ/Zp8IRSDcdi+mhbHysoYLwIxpimXiriqjQd7bQ/0tLxrabEao 9Jm0VAQYMMCkf0fLgnxlJbuCalPIBkAh93WP0VUexWK1IF1Lk9/4BnUk8ldXSTHl4Wjr TwDjBLE2D41DmKL2/m5N/nih1B34bmPH9Yml1kEh8f2gvX8g5Es8gu4532pk9Fo4wvvT +HM+ozQCNqsMzGccUUveloiDRmfsequSo5ep1XNe0yFDzwDL9BP3G9ftx5Thcdxu7rPU lbeg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linaro-uefi-bounces@lists.linaro.org designates 54.158.76.221 as permitted sender) smtp.mailfrom=linaro-uefi-bounces@lists.linaro.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.linaro.org (ec2-54-158-76-221.compute-1.amazonaws.com. [54.158.76.221]) by mx.google.com with ESMTPS id u29si1122882qtb.22.2019.02.19.23.32.08 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 19 Feb 2019 23:32:08 -0800 (PST) Received-SPF: pass (google.com: domain of linaro-uefi-bounces@lists.linaro.org designates 54.158.76.221 as permitted sender) client-ip=54.158.76.221; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linaro-uefi-bounces@lists.linaro.org designates 54.158.76.221 as permitted sender) smtp.mailfrom=linaro-uefi-bounces@lists.linaro.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: by lists.linaro.org (Postfix, from userid 109) id 4222D61A47; Wed, 20 Feb 2019 07:32:08 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on ip-10-150-125-211.ec2.internal X-Spam-Level: X-Spam-Status: No, score=-2.9 required=5.0 tests=BAYES_00, MAILING_LIST_MULTI, RCVD_IN_DNSWL_NONE,RCVD_IN_MSPIKE_H3,RCVD_IN_MSPIKE_WL autolearn=disabled version=3.4.2 Received: from [127.0.0.1] (localhost [127.0.0.1]) by lists.linaro.org (Postfix) with ESMTP id 1D19361957; Wed, 20 Feb 2019 07:30:16 +0000 (UTC) X-Original-To: linaro-uefi@lists.linaro.org Delivered-To: linaro-uefi@lists.linaro.org Received: by lists.linaro.org (Postfix, from userid 109) id 17BBD61950; Wed, 20 Feb 2019 07:30:09 +0000 (UTC) Received: from mail-pf1-f195.google.com (mail-pf1-f195.google.com [209.85.210.195]) by lists.linaro.org (Postfix) with ESMTPS id 6A30B61962 for ; Wed, 20 Feb 2019 07:29:08 +0000 (UTC) Received: by mail-pf1-f195.google.com with SMTP id s22so11494541pfh.4 for ; Tue, 19 Feb 2019 23:29:08 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=iA7rgJtC6FdS1ZBSsobyJ/fjgJQRSFru40uWcsV4Wt0=; b=sWvVFTwzW+1EfChpaVpqvOILNtq1yd2mldwGZIzZDHTACvzMBpxhcon4iVC1VMf70C iKAdhBrWeX/1C0KMBQDObcWxiUApbl+OZAK4bbWU6zQO9yeyfvMBLwUv6jdgz0g1dqtT 1p6kpkF8dMD3VwA3JZKLJhzMqqXlgaYgq1mhKSApgSn+tDvxgeCGkfdgYnNK44pyF8dV IM6oJQvW9PkMO1UhaZ9MF0NzsHZ7aIQIEKjDEx16Kw5cvN6mhL6x6Ugmyc3wvW9L0D3m 0rRd/x1WTMBEndEtLvrErEW5ymeeIwxwBjuC7Bav7p4oEiBMPc5+UmcTYtwRzTX2GsWO bMvw== X-Gm-Message-State: AHQUAuZxcRIpDTZ6hBkEiCPl/SllfrjS2DIzw7cFZh1K2lEgvbzwgLEN h99bwoWnWTsnDwBVF2D3U2zyadOM X-Received: by 2002:a62:1e82:: with SMTP id e124mr24114706pfe.258.1550647747685; Tue, 19 Feb 2019 23:29:07 -0800 (PST) Received: from localhost.localdomain ([203.160.91.226]) by smtp.gmail.com with ESMTPSA id 23sm19152969pft.187.2019.02.19.23.29.04 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 19 Feb 2019 23:29:07 -0800 (PST) From: Ming Huang To: leif.lindholm@linaro.org, linaro-uefi@lists.linaro.org, edk2-devel@lists.01.org, graeme.gregory@linaro.org Date: Wed, 20 Feb 2019 15:28:26 +0800 Message-Id: <20190220072837.35058-8-ming.huang@linaro.org> X-Mailer: git-send-email 2.9.5 In-Reply-To: <20190220072837.35058-1-ming.huang@linaro.org> References: <20190220072837.35058-1-ming.huang@linaro.org> Cc: huangming23@huawei.com, john.garry@huawei.com, xiaojun2@hisilicon.com, zhangjinsong2@huawei.com, huangdaode@hisilicon.com, zhangfeng56@huawei.com, michael.d.kinney@intel.com, lersek@redhat.com, wanghuiqiang@huawei.com Subject: [Linaro-uefi] [PATCH edk2-platforms v2 07/18] Hisilicon/D0x: Rename StartupAp() function X-BeenThere: linaro-uefi@lists.linaro.org X-Mailman-Version: 2.1.16 Precedence: list List-Id: "For discussions about Linaro-related UEFI development. Not a substitute for edk2-devel." List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: linaro-uefi-bounces@lists.linaro.org Sender: "Linaro-uefi" As suggestion of community, 'AP' is a bit unfortunate to use in EDK2 context. PI specifies 'BSP' for Boot-strap Processor, as the one executing all of the EDK2 code. It then uses 'AP' to refer to Additional Processors, which can be assigned tasks using the EFI_MP_SERVICES_PROTOCOL. In a TianoCore context, this should be 'BSP'. So, Rename StartupAp() to StartUpBSP. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ming Huang Reviewed-by: Leif Lindholm --- Silicon/Hisilicon/Include/Library/PlatformSysCtrlLib.h | 2 +- Platform/Hisilicon/D03/EarlyConfigPeim/EarlyConfigPeimD03.c | 2 +- Platform/Hisilicon/D03/Library/OemMiscLib2P/OemMiscLib2PHi1610.c | 2 +- Platform/Hisilicon/D05/EarlyConfigPeim/EarlyConfigPeimD05.c | 2 +- Platform/Hisilicon/D05/Library/OemMiscLibD05/OemMiscLibD05.c | 3 ++- Platform/Hisilicon/D06/EarlyConfigPeim/EarlyConfigPeimD06.c | 2 +- 6 files changed, 7 insertions(+), 6 deletions(-) diff --git a/Silicon/Hisilicon/Include/Library/PlatformSysCtrlLib.h b/Silicon/Hisilicon/Include/Library/PlatformSysCtrlLib.h index a232e52ed719..712b77c44fc8 100644 --- a/Silicon/Hisilicon/Include/Library/PlatformSysCtrlLib.h +++ b/Silicon/Hisilicon/Include/Library/PlatformSysCtrlLib.h @@ -76,7 +76,7 @@ VOID MN_CONFIG (VOID); VOID SmmuConfigForOS (VOID); VOID SmmuConfigForBios (VOID); -VOID StartupAp (VOID); +VOID StartUpBSP (VOID); VOID LlcCleanInvalidate (VOID); diff --git a/Platform/Hisilicon/D03/EarlyConfigPeim/EarlyConfigPeimD03.c b/Platform/Hisilicon/D03/EarlyConfigPeim/EarlyConfigPeimD03.c index 97cf6b8d8757..dacd9e871faf 100644 --- a/Platform/Hisilicon/D03/EarlyConfigPeim/EarlyConfigPeimD03.c +++ b/Platform/Hisilicon/D03/EarlyConfigPeim/EarlyConfigPeimD03.c @@ -83,7 +83,7 @@ void QResetAp(VOID) //SCCL A if (!PcdGet64 (PcdTrustedFirmwareEnable)) { - StartupAp(); + StartUpBSP (); } } diff --git a/Platform/Hisilicon/D03/Library/OemMiscLib2P/OemMiscLib2PHi1610.c b/Platform/Hisilicon/D03/Library/OemMiscLib2P/OemMiscLib2PHi1610.c index b57fdfa68e45..c8a9da73bbca 100644 --- a/Platform/Hisilicon/D03/Library/OemMiscLib2P/OemMiscLib2PHi1610.c +++ b/Platform/Hisilicon/D03/Library/OemMiscLib2P/OemMiscLib2PHi1610.c @@ -133,7 +133,7 @@ VOID CoreSelectBoot(VOID) { if (!PcdGet64 (PcdTrustedFirmwareEnable)) { - StartupAp (); + StartUpBSP (); } return; diff --git a/Platform/Hisilicon/D05/EarlyConfigPeim/EarlyConfigPeimD05.c b/Platform/Hisilicon/D05/EarlyConfigPeim/EarlyConfigPeimD05.c index 76a055cbe980..b374347e5c4d 100644 --- a/Platform/Hisilicon/D05/EarlyConfigPeim/EarlyConfigPeimD05.c +++ b/Platform/Hisilicon/D05/EarlyConfigPeim/EarlyConfigPeimD05.c @@ -35,7 +35,7 @@ QResetAp ( (VOID)WriteBackInvalidateDataCacheRange((VOID *) FixedPcdGet64(PcdMailBoxAddress), 8); if (!PcdGet64 (PcdTrustedFirmwareEnable)) { - StartupAp(); + StartUpBSP (); } } diff --git a/Platform/Hisilicon/D05/Library/OemMiscLibD05/OemMiscLibD05.c b/Platform/Hisilicon/D05/Library/OemMiscLibD05/OemMiscLibD05.c index 4c4c944dbead..a1458da7f0a3 100644 --- a/Platform/Hisilicon/D05/Library/OemMiscLibD05/OemMiscLibD05.c +++ b/Platform/Hisilicon/D05/Library/OemMiscLibD05/OemMiscLibD05.c @@ -96,7 +96,7 @@ UINTN OemGetDimmSlot(UINTN Socket, UINTN Channel) VOID CoreSelectBoot(VOID) { if (!PcdGet64 (PcdTrustedFirmwareEnable)) { - StartupAp (); + StartUpBSP (); } return; @@ -128,3 +128,4 @@ BOOLEAN OemIsNeedDisableExpanderBuffer(VOID) { return TRUE; } + diff --git a/Platform/Hisilicon/D06/EarlyConfigPeim/EarlyConfigPeimD06.c b/Platform/Hisilicon/D06/EarlyConfigPeim/EarlyConfigPeimD06.c index 0790f7941ae7..a8261d370626 100644 --- a/Platform/Hisilicon/D06/EarlyConfigPeim/EarlyConfigPeimD06.c +++ b/Platform/Hisilicon/D06/EarlyConfigPeim/EarlyConfigPeimD06.c @@ -78,7 +78,7 @@ QResetAp ( //SCCL A if (!PcdGet64 (PcdTrustedFirmwareEnable)) { - StartupAp (); + StartUpBSP (); } } From patchwork Wed Feb 20 07:28:27 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ming Huang X-Patchwork-Id: 158789 Delivered-To: patch@linaro.org Received: by 2002:a02:48:0:0:0:0:0 with SMTP id 69csp4604685jaa; Tue, 19 Feb 2019 23:31:50 -0800 (PST) X-Google-Smtp-Source: AHgI3IaakJVcWaYtB5RG/LrC/qV082y1rZve4ISdd1tzr1XjWjzdXBn/c34Lk1QclaOzT9SSXViQ X-Received: by 2002:aed:3b58:: with SMTP id q24mr26747415qte.227.1550647910712; Tue, 19 Feb 2019 23:31:50 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1550647910; cv=none; d=google.com; s=arc-20160816; b=CZD8H+y2ye1knEioMChEx50hdwrL7V4JARQSTMBueAP1FdhSOGmBrsUgnR5Jm6N+sx 1qCWcg2S6/Vcs/azeV2ojzbgE978W6UTuXQiSGs3pzVnmkqvv8umZ/moB5lrM0lbBevQ SA9h6N545xIl9nMYILu5MTOp0xutzhTd6idpx8orcegE6J07BAIcct9VVK2sULjCZSqA eWm74Z6kamSiFsmPYEfxQYWzMrpC1DR7y4G4CpOdZPVLAqoyHJ4i6dctmN/6GdjrsmF+ qcUtH3Ny3eZFGiwXt36jvxC/OXJpNsGccl9d8RlcgA5QmdLNUWcgyI0nJFcIixS74M7z nGxg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version :list-subscribe:list-help:list-post:list-archive:list-unsubscribe :list-id:precedence:subject:cc:references:in-reply-to:message-id :date:to:from:delivered-to; bh=fbY3BAjTTQzr/ItGCUxRyX94AfUUzKNhkL0Ao68XVQg=; b=kZFp6vEuc+t1F260TB0GxU/LS21z4+TNoKBolyjqbL4W8aIN6IaauK4VITZKF+xURE DTU8blAHvx6QEz9GdVxMKxy1CdA8e2ACBALCrcWjtLAWTpsetBI3hFOzFCW22hJZUnkJ ILvYRRJel8EYliAvvg1KbEpYQhfBqfNjezNvBhKgQxx1CUGZGj2JrhKZ3j/XprZhx+i+ z96jeB4vGOmYMWXeZ7MbB5XmTvWEjYWtYj9VSvxiozEfcTxRyenGGe07jQtTyi1jMfXP UJPS7EiZXk1T/rG9PpIu244PtQR3n9hG1ntZf/lh0cSD7oG+90NgQIOXVJ5uytzImTyv 98RQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linaro-uefi-bounces@lists.linaro.org designates 54.158.76.221 as permitted sender) smtp.mailfrom=linaro-uefi-bounces@lists.linaro.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.linaro.org (ec2-54-158-76-221.compute-1.amazonaws.com. [54.158.76.221]) by mx.google.com with ESMTPS id 24si982639qtu.137.2019.02.19.23.31.50 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 19 Feb 2019 23:31:50 -0800 (PST) Received-SPF: pass (google.com: domain of linaro-uefi-bounces@lists.linaro.org designates 54.158.76.221 as permitted sender) client-ip=54.158.76.221; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linaro-uefi-bounces@lists.linaro.org designates 54.158.76.221 as permitted sender) smtp.mailfrom=linaro-uefi-bounces@lists.linaro.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: by lists.linaro.org (Postfix, from userid 109) id 46BBA6196F; Wed, 20 Feb 2019 07:31:50 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on ip-10-150-125-211.ec2.internal X-Spam-Level: X-Spam-Status: No, score=-2.9 required=5.0 tests=BAYES_00, MAILING_LIST_MULTI, RCVD_IN_DNSWL_NONE,RCVD_IN_MSPIKE_H3,RCVD_IN_MSPIKE_WL autolearn=disabled version=3.4.2 Received: from [127.0.0.1] (localhost [127.0.0.1]) by lists.linaro.org (Postfix) with ESMTP id E111861986; Wed, 20 Feb 2019 07:30:11 +0000 (UTC) X-Original-To: linaro-uefi@lists.linaro.org Delivered-To: linaro-uefi@lists.linaro.org Received: by lists.linaro.org (Postfix, from userid 109) id 6F16161950; Wed, 20 Feb 2019 07:30:08 +0000 (UTC) Received: from mail-pg1-f194.google.com (mail-pg1-f194.google.com [209.85.215.194]) by lists.linaro.org (Postfix) with ESMTPS id 90AFA6196F for ; Wed, 20 Feb 2019 07:29:11 +0000 (UTC) Received: by mail-pg1-f194.google.com with SMTP id y4so11414805pgc.12 for ; Tue, 19 Feb 2019 23:29:11 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=ab7zoCPUAckYvbGEHQgQ2OoONoXR45pa9pDts4Jv7Lw=; b=Gn9hD+VZI2wE9zBVrk1ObonOYynao8VLoZ5x5elTSGbRMoEn4iZq+XRFG+CWW6ALR6 Wq6l2RVjhc+ARe2JZsR8I4FgvoVGHIL6HPLBtqrt6wUrOLiF+SiBQo81fvcVFeZd1UbG FHpECmH60J4O1clFJjkm8ur8RXbCoKyDNjULxyd6RG0HjvP4KdfTuQquSjdJbeblMZ+t 17VeNcon5DgYfAa/nUJtqgJZLZGcbs84Y/sC0EdVMYm6EFipkfFJBduTFLL+MhRn/Fe9 ozmgnd8b+IROrV6XQi82bkBNH9AjOidVytLzSL36P2J/8GTqoe7rBBUNt+BkuG9auA7R 4low== X-Gm-Message-State: AHQUAuaL67lLev3LwbFjooC6Q4x9FBTfXUI6FWdOOQy/SgGyCxLzCfmK D4UXRi5PyFzLH9TdkPQkfU1Weylliazfzg== X-Received: by 2002:aa7:92da:: with SMTP id k26mr18771387pfa.216.1550647750936; Tue, 19 Feb 2019 23:29:10 -0800 (PST) Received: from localhost.localdomain ([203.160.91.226]) by smtp.gmail.com with ESMTPSA id 23sm19152969pft.187.2019.02.19.23.29.07 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 19 Feb 2019 23:29:10 -0800 (PST) From: Ming Huang To: leif.lindholm@linaro.org, linaro-uefi@lists.linaro.org, edk2-devel@lists.01.org, graeme.gregory@linaro.org Date: Wed, 20 Feb 2019 15:28:27 +0800 Message-Id: <20190220072837.35058-9-ming.huang@linaro.org> X-Mailer: git-send-email 2.9.5 In-Reply-To: <20190220072837.35058-1-ming.huang@linaro.org> References: <20190220072837.35058-1-ming.huang@linaro.org> Cc: huangming23@huawei.com, john.garry@huawei.com, xiaojun2@hisilicon.com, zhangjinsong2@huawei.com, huangdaode@hisilicon.com, zhangfeng56@huawei.com, michael.d.kinney@intel.com, lersek@redhat.com, wanghuiqiang@huawei.com Subject: [Linaro-uefi] [PATCH edk2-platforms v2 08/18] Hisilicon/D06: Use HCCS speed with 2.6G X-BeenThere: linaro-uefi@lists.linaro.org X-Mailman-Version: 2.1.16 Precedence: list List-Id: "For discussions about Linaro-related UEFI development. Not a substitute for edk2-devel." List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: linaro-uefi-bounces@lists.linaro.org Sender: "Linaro-uefi" Follow chip team suggestion, HCCS(Huawei Cache-Coherent System) may be unstable while speed is 3.0G, so use 2.6G to avoid some unstable stress issue. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ming Huang --- Silicon/Hisilicon/Include/Library/OemMiscLib.h | 10 ++++++++++ Platform/Hisilicon/D06/Library/OemMiscLibD06/OemMiscLibD06.c | 8 ++++++++ 2 files changed, 18 insertions(+) diff --git a/Silicon/Hisilicon/Include/Library/OemMiscLib.h b/Silicon/Hisilicon/Include/Library/OemMiscLib.h index dfac87d635d9..ea95fe38d75c 100644 --- a/Silicon/Hisilicon/Include/Library/OemMiscLib.h +++ b/Silicon/Hisilicon/Include/Library/OemMiscLib.h @@ -22,6 +22,11 @@ #include #include +#define HCCS_PLL_VALUE_2600 0x52240681 +#define HCCS_PLL_VALUE_2800 0x52240701 +#define HCCS_PLL_VALUE_3000 0x52240781 + + #define PCIEDEVICE_REPORT_MAX 8 #define MAX_PROCESSOR_SOCKETS MAX_SOCKET #define MAX_MEMORY_CHANNELS MAX_CHANNEL @@ -55,4 +60,9 @@ extern EFI_STRING_ID gDimmToDevLocator[MAX_SOCKET][MAX_CHANNEL][MAX_DIMM]; EFI_HII_HANDLE EFIAPI OemGetPackages (); UINTN OemGetCpuFreq (UINT8 Socket); +UINTN +OemGetHccsFreq ( + VOID + ); + #endif diff --git a/Platform/Hisilicon/D06/Library/OemMiscLibD06/OemMiscLibD06.c b/Platform/Hisilicon/D06/Library/OemMiscLibD06/OemMiscLibD06.c index 624fa33d2e14..914387de7d63 100644 --- a/Platform/Hisilicon/D06/Library/OemMiscLibD06/OemMiscLibD06.c +++ b/Platform/Hisilicon/D06/Library/OemMiscLibD06/OemMiscLibD06.c @@ -223,3 +223,11 @@ UINTN OemGetCpuFreq (UINT8 Socket) } } +UINTN +OemGetHccsFreq ( + VOID + ) +{ + return HCCS_PLL_VALUE_2600; +} + From patchwork Wed Feb 20 07:28:29 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ming Huang X-Patchwork-Id: 158791 Delivered-To: patch@linaro.org Received: by 2002:a02:48:0:0:0:0:0 with SMTP id 69csp4606045jaa; Tue, 19 Feb 2019 23:33:29 -0800 (PST) X-Google-Smtp-Source: AHgI3IbmBqoXnWmfheBihVygVnFQ25HPW9aVyQGGdk4FvPJQf0YNXKLPkJiRdTb96H8o8gQ+sgEx X-Received: by 2002:ac8:3501:: with SMTP id y1mr25513099qtb.209.1550648008968; Tue, 19 Feb 2019 23:33:28 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1550648008; cv=none; d=google.com; s=arc-20160816; b=xIXn8M3/byjz6Gm7wja/zkDGKKC4AAmLbvrHNHkldhGbUq1NI7f149b5JghQRpEj26 5egTGyPwwrbTDi8aN+XRS9ZGlO5K0cY9tep4UiUZMFbM3U9rJ1ZJx4ZEXoICiqha4PjO tGUz41ZDFf+Zy66bhqxq6RY+5+Ed7I5RtPlsZkkKgw5e2sc8Z1AcS6PfO269sN2dGqO+ FOKKsSREGPOVDF7eF/KButbs+M7lcq2aLiCEweGkrSFC0yZETHS3isySB1QwNcEGqc3r lOOJR5gnPYnFOw5BkmfANwkVejW84ToL6Kx8C1HmJV8RCpeHbpKqJh+CYAipBqmb8oPG kggQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version :list-subscribe:list-help:list-post:list-archive:list-unsubscribe :list-id:precedence:subject:cc:references:in-reply-to:message-id :date:to:from:delivered-to; bh=GdYyKe2TrClprBfEdxPcrDUiPE/jvQ3nE7Av6CtWAR4=; b=bAVmqhCqcayctc6qhZHmB9DA/fzWYlAtd8TM5KLpPD6FwxTlmVLW8mJQkPk/3cKRt7 YW5qb9DK+JJX4N2twUgvMXuGtvM1DAVuEnz4ygKPyAA7/FXxfjLf33l2JIRP9iAADd+n GWoEbhlNz78y+vSzn2Nt2vFffJ4EgjwQdtvck+/Hg9V0e/XJAon5xtr2G9u5S1BGM+lT kEd50xeVUGXDo0A4PcdtjtOlWmUteQnpKwqqRLMnPoO4wTIUkhGrKdJZ5HUNzNOBX9YX TQm7b0tXIIpMq4ckhD/J31aQXfEDeIDwPuxxE7vpdLzIm/PX3nGfsrU2jPH6Hz02FhuH cpxA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linaro-uefi-bounces@lists.linaro.org designates 54.158.76.221 as permitted sender) smtp.mailfrom=linaro-uefi-bounces@lists.linaro.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.linaro.org (ec2-54-158-76-221.compute-1.amazonaws.com. [54.158.76.221]) by mx.google.com with ESMTPS id q58si1891023qtb.228.2019.02.19.23.33.28 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 19 Feb 2019 23:33:28 -0800 (PST) Received-SPF: pass (google.com: domain of linaro-uefi-bounces@lists.linaro.org designates 54.158.76.221 as permitted sender) client-ip=54.158.76.221; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linaro-uefi-bounces@lists.linaro.org designates 54.158.76.221 as permitted sender) smtp.mailfrom=linaro-uefi-bounces@lists.linaro.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: by lists.linaro.org (Postfix, from userid 109) id 83E1561979; Wed, 20 Feb 2019 07:33:28 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on ip-10-150-125-211.ec2.internal X-Spam-Level: X-Spam-Status: No, score=-2.9 required=5.0 tests=BAYES_00, MAILING_LIST_MULTI, RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H2 autolearn=disabled version=3.4.2 Received: from [127.0.0.1] (localhost [127.0.0.1]) by lists.linaro.org (Postfix) with ESMTP id 34CF8619F4; Wed, 20 Feb 2019 07:30:46 +0000 (UTC) X-Original-To: linaro-uefi@lists.linaro.org Delivered-To: linaro-uefi@lists.linaro.org Received: by lists.linaro.org (Postfix, from userid 109) id 9A6F1619EA; Wed, 20 Feb 2019 07:30:32 +0000 (UTC) Received: from mail-pg1-f193.google.com (mail-pg1-f193.google.com [209.85.215.193]) by lists.linaro.org (Postfix) with ESMTPS id 71D6A61979 for ; Wed, 20 Feb 2019 07:29:18 +0000 (UTC) Received: by mail-pg1-f193.google.com with SMTP id m2so9161539pgl.5 for ; Tue, 19 Feb 2019 23:29:18 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=Cut6ectixtybHzCfDcbwZI+ElltgcLMCAoocCw209eg=; b=M2QxJn237TwRFdc/sPcU8Gqt8T23LwWdm9/+Lx5jRPSpNPwkuEKNy+zXMyrORKXe77 TrMOeoPeWXwnP1z1zoM9TZIRX2eirD6xDiA8z4KiRIgskwQYt1r4QOO8UvargOpiIW2O etTWC6wADN4RXlpOhb3gXT2PETeGSKyfjqHB+E4xPD5c4I8YHIDWjZW0QpExgyAvBfAH YXDe0SScO4tdJtCvSHB+HJPPxsroEPOtn5es3dFMQ7NXM6f6OyBnyD2RatqU31TGDQ8i p8x8cPMtR1LqjT7agc8pkP0zS75NvljBVX57X7JqtkHw14CTBW44IgENf6l8JJ5KTtIn x+Ew== X-Gm-Message-State: AHQUAub5I6LwFCMybFQYqZBDo6nxz1lCNDroBlOFIXFqX9Ui9iJFxJXn fw0SP5J6R2ECkMfzoGcM9dn2SSfi X-Received: by 2002:a63:112:: with SMTP id 18mr26853690pgb.139.1550647757651; Tue, 19 Feb 2019 23:29:17 -0800 (PST) Received: from localhost.localdomain ([203.160.91.226]) by smtp.gmail.com with ESMTPSA id 23sm19152969pft.187.2019.02.19.23.29.14 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 19 Feb 2019 23:29:17 -0800 (PST) From: Ming Huang To: leif.lindholm@linaro.org, linaro-uefi@lists.linaro.org, edk2-devel@lists.01.org, graeme.gregory@linaro.org Date: Wed, 20 Feb 2019 15:28:29 +0800 Message-Id: <20190220072837.35058-11-ming.huang@linaro.org> X-Mailer: git-send-email 2.9.5 In-Reply-To: <20190220072837.35058-1-ming.huang@linaro.org> References: <20190220072837.35058-1-ming.huang@linaro.org> Cc: huangming23@huawei.com, john.garry@huawei.com, xiaojun2@hisilicon.com, zhangjinsong2@huawei.com, huangdaode@hisilicon.com, zhangfeng56@huawei.com, michael.d.kinney@intel.com, lersek@redhat.com, wanghuiqiang@huawei.com Subject: [Linaro-uefi] [PATCH edk2-platforms v2 10/18] Hisilicon/D06: Modify for IMP self-Adapte support X-BeenThere: linaro-uefi@lists.linaro.org X-Mailman-Version: 2.1.16 Precedence: list List-Id: "For discussions about Linaro-related UEFI development. Not a substitute for edk2-devel." List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: linaro-uefi-bounces@lists.linaro.org Sender: "Linaro-uefi" As new IMP(Cortex-M7) firmware support self-adapte, so do not need BIOS to implement some function, remove useless funtions and report CPU0/CPU1 Nic NCL offset to IMP. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ming Huang --- Platform/Hisilicon/D06/Library/OemNicLib/OemNicLib.c | 281 ++++---------------- 1 file changed, 54 insertions(+), 227 deletions(-) diff --git a/Platform/Hisilicon/D06/Library/OemNicLib/OemNicLib.c b/Platform/Hisilicon/D06/Library/OemNicLib/OemNicLib.c index aaf990216982..678c2107bdd3 100644 --- a/Platform/Hisilicon/D06/Library/OemNicLib/OemNicLib.c +++ b/Platform/Hisilicon/D06/Library/OemNicLib/OemNicLib.c @@ -21,44 +21,21 @@ #include #define CPU2_SFP2_100G_CARD_OFFSET 0x25 -#define CPU1_SFP1_LOCATE_OFFSET 0x16 -#define CPU1_SFP0_LOCATE_OFFSET 0x12 -#define CPU2_SFP1_LOCATE_OFFSET 0x21 -#define CPU2_SFP0_LOCATE_OFFSET 0x19 -#define CPU2_SFP2_10G_GE_CARD_OFFSET 0x25 -#define SFP_10G_SPEED 10 -#define SFP_25G_SPEED 25 -#define SFP_100G_SPEED 100 -#define SFP_GE_SPEED 1 - -#define SFP_GE_SPEED_VAL_VENDOR_FINISAR 0x0C -#define SFP_GE_SPEED_VAL 0x0D -#define SFP_10G_SPEED_VAL 0x67 -#define SFP_25G_SPEED_VAL 0xFF +#define SOCKET1_NET_PORT_100G 1 +#define SOCKET0_NET_PORT_NUM 4 +#define SOCKET1_NET_PORT_NUM 2 #define CARD_PRESENT_100G (BIT7) -#define CARD_PRESENT_10G (BIT0) -#define SELECT_SFP_BY_INDEX(index) (1 << (index - 1)) -#define SPF_SPEED_OFFSET 12 - -#define SFP_DEVICE_ADDRESS 0x50 -#define CPU1_9545_I2C_ADDR 0x70 -#define CPU2_9545_I2C_ADDR 0x71 - -#define FIBER_PRESENT 0 -#define CARD_PRESENT 1 -#define I2C_PORT_SFP 4 -#define CPU2_I2C_PORT_SFP 5 - -#define SOCKET_0 0 -#define SOCKET_1 1 #define EEPROM_I2C_PORT 4 #define EEPROM_PAGE_SIZE 0x40 #define MAC_ADDR_LEN 6 #define I2C_OFFSET_EEPROM_ETH0 (0xc00) #define I2C_SLAVEADDR_EEPROM (0x52) +#define SRAM_NIC_NCL1_OFFSET_ADDRESS 0xA0E87FE0 +#define SRAM_NIC_NCL2_OFFSET_ADDRESS 0xA0E87FE4 + #pragma pack(1) typedef struct { UINT16 Crc16; @@ -114,204 +91,6 @@ UINT16 CrcTable16[256] = { 0x6E17, 0x7E36, 0x4E55, 0x5E74, 0x2E93, 0x3EB2, 0x0ED1, 0x1EF0, }; -EFI_STATUS -GetSfpSpeed ( - UINT16 Socket, - UINT16 SfpNum, - UINT8* FiberSpeed - ) -{ - EFI_STATUS Status; - I2C_DEVICE SpdDev; - UINT8 SfpSelect; - UINT8 SfpSpeed; - UINT32 RegAddr; - UINT16 I2cAddr; - UINT32 SfpPort; - - SfpSpeed = 0x0; - if (Socket == SOCKET_1) { - I2cAddr = CPU2_9545_I2C_ADDR; - SfpPort = CPU2_I2C_PORT_SFP; - } else { - I2cAddr = CPU1_9545_I2C_ADDR; - SfpPort = I2C_PORT_SFP; - } - - Status = I2CInit (Socket, SfpPort, Normal); - if (EFI_ERROR (Status)) { - DEBUG ((DEBUG_ERROR, "[%a]:[%dL] Socket%d Call I2CInit failed! p1=0x%x.\n", - __FUNCTION__, __LINE__, Socket, Status)); - return Status; - } - - SpdDev.Socket = Socket; - SpdDev.DeviceType = DEVICE_TYPE_SPD; - SpdDev.Port = SfpPort; - SpdDev.SlaveDeviceAddress = I2cAddr; - RegAddr = 0x0; - SfpSelect = SELECT_SFP_BY_INDEX (SfpNum); - - Status = I2CWrite (&SpdDev, RegAddr, 1, &SfpSelect); - if (EFI_ERROR (Status)) { - DEBUG ((DEBUG_ERROR, "I2CWrite Error =%r.\n", Status)); - return Status; - } - - SpdDev.Socket = Socket; - SpdDev.DeviceType = DEVICE_TYPE_SPD; - SpdDev.Port = SfpPort; - SpdDev.SlaveDeviceAddress = SFP_DEVICE_ADDRESS; - - RegAddr = SPF_SPEED_OFFSET; - Status = I2CRead (&SpdDev, RegAddr, 1, &SfpSpeed); - if (EFI_ERROR (Status)) { - DEBUG ((DEBUG_ERROR, "I2CRead Error =%r.\n", Status)); - return Status; - } - - DEBUG ((DEBUG_INFO, "BR, Nominal, Nominal signalling rate, SfpSpeed: 0x%x\n", - SfpSpeed)); - - if (SfpSpeed == SFP_10G_SPEED_VAL) { - *FiberSpeed = SFP_10G_SPEED; - } else if (SfpSpeed == SFP_25G_SPEED_VAL) { - *FiberSpeed = SFP_25G_SPEED; - } else if ((SfpSpeed == SFP_GE_SPEED_VAL) || - (SfpSpeed == SFP_GE_SPEED_VAL_VENDOR_FINISAR)) { - *FiberSpeed = SFP_GE_SPEED; - } - - return EFI_SUCCESS; -} - -//Fiber1Type/Fiber2Type/Fiber3Type return: SFP_10G_SPEED, SFP_100G_SPEED, SFP_GE_SPEED -UINT32 -GetCpu2FiberType ( - UINT8* Fiber1Type, - UINT8* Fiber2Type, - UINT8* Fiber100Ge - ) -{ - EFI_STATUS Status; - UINT16 SfpNum1; - UINT8 SfpSpeed1; - UINT16 SfpNum2; - UINT8 SfpSpeed2; - - SfpNum1 = 0x1; - SfpSpeed1 = SFP_10G_SPEED; - SfpNum2 = 0x2; - SfpSpeed2 = SFP_10G_SPEED; - *Fiber100Ge = 0x0; - *Fiber1Type = SFP_10G_SPEED; - *Fiber2Type = SFP_10G_SPEED; - - if ((ReadCpldReg (CPU2_SFP2_100G_CARD_OFFSET) & CARD_PRESENT_100G) != 0) { - // 100 Ge card - *Fiber1Type = SFP_10G_SPEED; - *Fiber2Type = SFP_10G_SPEED; - *Fiber100Ge = SFP_100G_SPEED; - DEBUG ((DEBUG_ERROR,"Detect Fiber SFP_100G is Present, Set 100Ge\n")); - } else if ((ReadCpldReg (CPU2_SFP2_10G_GE_CARD_OFFSET) & CARD_PRESENT_10G) != 0) { - *Fiber100Ge = 0x0; - *Fiber1Type = SFP_10G_SPEED; - *Fiber2Type = SFP_10G_SPEED; - if (ReadCpldReg (CPU2_SFP0_LOCATE_OFFSET) == FIBER_PRESENT) { - // Fiber detected in CPU2 slot0, read speed via i2c - Status = GetSfpSpeed (SOCKET_1, SfpNum1, &SfpSpeed1); - if (EFI_ERROR (Status)) { - DEBUG((DEBUG_ERROR, - "Get Socket1 Sfp%d Speed Error: %r.\n", - SfpNum1, - Status)); - return Status; - } - if (SfpSpeed1 == SFP_25G_SPEED) { - // P1 don't support 25G, so set speed to 10G - *Fiber1Type = SFP_10G_SPEED; - } else { - *Fiber1Type = SfpSpeed1; - } - } else { - // No fiber, set speed to 10G - *Fiber1Type = SFP_10G_SPEED; - } - - if (ReadCpldReg (CPU2_SFP1_LOCATE_OFFSET) == FIBER_PRESENT) { - // Fiber detected in CPU2 slot1, read speed via i2c - Status = GetSfpSpeed (SOCKET_1, SfpNum2, &SfpSpeed2); - if (EFI_ERROR (Status)) { - DEBUG ((DEBUG_ERROR, "Get Sfp%d Speed Error: %r.\n", SfpNum2, Status)); - return Status; - } - if (SfpSpeed2 == SFP_25G_SPEED) { - *Fiber2Type = SFP_10G_SPEED; - } else { - *Fiber2Type = SfpSpeed2; - } - } else { - // No fiber, set speed to 10G - *Fiber2Type = SFP_10G_SPEED; - } - } else { - // 100Ge/10Ge/Ge Fiber is not found. - *Fiber1Type = SFP_10G_SPEED; - *Fiber2Type = SFP_10G_SPEED; - *Fiber100Ge = 0x0; - } - - return EFI_SUCCESS; -} - -//Fiber1Type/Fiber2Type return: SFP_10G_SPEED, SFP_25G_SPEED, SFP_GE_SPEED -UINT32 -GetCpu1FiberType ( - UINT8* Fiber1Type, - UINT8* Fiber2Type - ) -{ - EFI_STATUS Status; - UINT16 SfpNum1; - UINT8 SfpSpeed1; - UINT16 SfpNum2; - UINT8 SfpSpeed2; - - SfpNum1 = 0x1; - SfpSpeed1 = SFP_10G_SPEED; - SfpNum2 = 0x2; - SfpSpeed2 = SFP_10G_SPEED; - *Fiber1Type = SFP_10G_SPEED; - *Fiber2Type = SFP_10G_SPEED; - // Fiber detected in CPU1 slot0, read speed via i2c - if (ReadCpldReg (CPU1_SFP0_LOCATE_OFFSET) == FIBER_PRESENT) { - Status = GetSfpSpeed (SOCKET_0, SfpNum1, &SfpSpeed1); - if (EFI_ERROR (Status)) { - DEBUG ((DEBUG_ERROR, "Get Socket0 Sfp%d Speed Error: %r.\n", - SfpNum1, Status)); - return Status; - } - *Fiber1Type = SfpSpeed1; - } else { - *Fiber1Type = SFP_10G_SPEED; - } - - // Fiber detected in CPU1 slot1, read speed via i2c - if (ReadCpldReg (CPU1_SFP1_LOCATE_OFFSET) == FIBER_PRESENT) { - Status = GetSfpSpeed (SOCKET_0, SfpNum2, &SfpSpeed2); - if (EFI_ERROR (Status)) { - *Fiber2Type = SFP_10G_SPEED; - DEBUG ((DEBUG_ERROR, "Get Sfp%d Speed Error: %r.\n", SfpNum2, Status)); - return Status; - } - *Fiber2Type = SfpSpeed2; - } else { - *Fiber2Type = SFP_10G_SPEED; - } - - return EFI_SUCCESS; -} - UINT16 MakeCrcCheckSum ( UINT8 *Buffer, UINT32 Length @@ -567,3 +346,51 @@ OemIsInitEth ( { return TRUE; } + +EFI_STATUS +ConfigCDR ( + UINT32 Socket + ) +{ + return EFI_SUCCESS; +} + +UINT32 +OemGetNclConfOffset ( + UINT32 Socket + ) +{ + UINT32 ConfigurationOffset; + + if (Socket == 0) { + // For 1st socket, the NCL configuration offset is 0 + ConfigurationOffset = 0; + MmioWrite32 (SRAM_NIC_NCL1_OFFSET_ADDRESS, ConfigurationOffset); + return ConfigurationOffset; + } + + // For 2nd Socket + if ((ReadCpldReg (CPU2_SFP2_100G_CARD_OFFSET) & CARD_PRESENT_100G) != 0) { + ConfigurationOffset = SIZE_128KB; + } else { + ConfigurationOffset = SIZE_64KB; + } + MmioWrite32 (SRAM_NIC_NCL2_OFFSET_ADDRESS, ConfigurationOffset); + return ConfigurationOffset; +} + +UINT32 +OemGetNetPortNum ( + UINT32 Socket + ) +{ + if (Socket == 0){ + return SOCKET0_NET_PORT_NUM; + } + + if ((ReadCpldReg (CPU2_SFP2_100G_CARD_OFFSET) & CARD_PRESENT_100G) != 0) { + return SOCKET1_NET_PORT_100G; + } else { + return SOCKET1_NET_PORT_NUM; + } +} From patchwork Wed Feb 20 07:28:32 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ming Huang X-Patchwork-Id: 158792 Delivered-To: patch@linaro.org Received: by 2002:a02:48:0:0:0:0:0 with SMTP id 69csp4606524jaa; Tue, 19 Feb 2019 23:34:09 -0800 (PST) X-Google-Smtp-Source: AHgI3IZYLJmEYUBJMB8qMY1RgNOkFTl+Ljshj5rFhQPwuGgCsZc8rON6YGl40KelogaJVDwUGPqM X-Received: by 2002:a05:620a:13b0:: with SMTP id m16mr23177182qki.74.1550648048977; Tue, 19 Feb 2019 23:34:08 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1550648048; cv=none; d=google.com; s=arc-20160816; b=A0i70N9DyGfVHfMjKAaQd3JDYTyAxncHZppgPG1OhKQNuXdJ5DuENW8rrFdhIkSGR8 JT/edOyIrHI+tU2hZ4OMWcwB3p90CRP4N8+c3epfh+cbhjjtGaUb3in4dbVR2/f4BQ1P V4Ujvq3nBcdEXct0VHtLXSciZehsuS+sDe97suiuDILF6Ua3mxMLS5HB+qBSAjHE7Wq9 r1pz/ZqV6KhsgHZTIlOB7V/5SviEVTvLZDJdKILMfVz5p0znks9iIPEBWMAXbHH6fu3Q bYjE9c8cUjnfHBqyXOFT3gnOgf5/lFMCSU2XHnX40B8FFAGQBDLmH8LEFj4Pvzl8yUrf /WYw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version :list-subscribe:list-help:list-post:list-archive:list-unsubscribe :list-id:precedence:subject:cc:references:in-reply-to:message-id :date:to:from:delivered-to; bh=aQcJGW3vxKwrWzl38l52Bl0epPahk4LPUFM5zfzl8cA=; b=asFS+lpIDMBR4uuHhF9Q3VArsmF10iNQVFuX5TaoWARa1vHE/amHMPvpvK0+RjLCKt eB2/Q5bVwUWhPcJd2jal5I2lP/iWbpRgJrDrryredBYWZnTvfbysD6N0uOv1f7b3ji5V BX8o3VopDFal+6b4X95CXRSC+FdMEuygUpiBsf+xPNFA7vDA7b+F8zhg8xVP3kUfw4Dv Wzk0EXneXJgqPxVIcp0JXHSjXiWIITjoFLCfBGkJXt14BmjR6/Zyto493a8gx5ZIyk1r ZSasYiP1hn+D4YFHJF6aQiyTIljPc5ik+8DJOvaEPQGG5G3tzIfWGq9ZwOetkANL7fKA ydwA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linaro-uefi-bounces@lists.linaro.org designates 54.158.76.221 as permitted sender) smtp.mailfrom=linaro-uefi-bounces@lists.linaro.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.linaro.org (ec2-54-158-76-221.compute-1.amazonaws.com. [54.158.76.221]) by mx.google.com with ESMTPS id x10si3677046qkf.110.2019.02.19.23.34.08 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 19 Feb 2019 23:34:08 -0800 (PST) Received-SPF: pass (google.com: domain of linaro-uefi-bounces@lists.linaro.org designates 54.158.76.221 as permitted sender) client-ip=54.158.76.221; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linaro-uefi-bounces@lists.linaro.org designates 54.158.76.221 as permitted sender) smtp.mailfrom=linaro-uefi-bounces@lists.linaro.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: by lists.linaro.org (Postfix, from userid 109) id 8B80461986; Wed, 20 Feb 2019 07:34:08 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on ip-10-150-125-211.ec2.internal X-Spam-Level: X-Spam-Status: No, score=-2.9 required=5.0 tests=BAYES_00, MAILING_LIST_MULTI, RCVD_IN_DNSWL_NONE,RCVD_IN_MSPIKE_H3,RCVD_IN_MSPIKE_WL autolearn=disabled version=3.4.2 Received: from [127.0.0.1] (localhost [127.0.0.1]) by lists.linaro.org (Postfix) with ESMTP id F3333619BF; Wed, 20 Feb 2019 07:30:59 +0000 (UTC) X-Original-To: linaro-uefi@lists.linaro.org Delivered-To: linaro-uefi@lists.linaro.org Received: by lists.linaro.org (Postfix, from userid 109) id EA36E618E3; Wed, 20 Feb 2019 07:30:49 +0000 (UTC) Received: from mail-pf1-f196.google.com (mail-pf1-f196.google.com [209.85.210.196]) by lists.linaro.org (Postfix) with ESMTPS id 3F6A661996 for ; Wed, 20 Feb 2019 07:29:28 +0000 (UTC) Received: by mail-pf1-f196.google.com with SMTP id j5so6981001pfa.2 for ; Tue, 19 Feb 2019 23:29:28 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=MtoHUuo/eDvvDoEdPFTzWpNCbltCdz+5oB9obC5wOVA=; b=nLR1f8m9I8XFzVsrtQdr7ncncXhgqv7xeOG8EveReQxrvn/PAv6o0i/fUKA9oXAZNt VTNM2LUSD838dh/pL7C8cSZ7mxwPgRPvdaT3+DBeoGT4oZLyuuRmwUyTXkl3QSY+KUyM R+F0nZBPg58AJgg9xh4TozFfNjCharC+cqDinizG/7egQvFdcWb1ig9+uqPQSKTdIjvu F/eP3yYklEdrZnUkqfB+z1v/DCTgGgLE1oswXbUA/wC3yyoP7j2tIlrJUZ1Ufv2IqtgZ qfLBS1mZtaNURH/F2B7GoHoii1QLEjqtz5sABig8wUPnmRXJWig3AISgeCLTZMBIMVfp yrRA== X-Gm-Message-State: AHQUAuY0MJpGQEJCpC+PxTqW7QG13MHPHD/M0/TPKq0i4VvhUSOiA6tC kBJpA02MO37O8yYTqTsUrRH6//6V X-Received: by 2002:a63:4342:: with SMTP id q63mr28027281pga.63.1550647767541; Tue, 19 Feb 2019 23:29:27 -0800 (PST) Received: from localhost.localdomain ([203.160.91.226]) by smtp.gmail.com with ESMTPSA id 23sm19152969pft.187.2019.02.19.23.29.24 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 19 Feb 2019 23:29:26 -0800 (PST) From: Ming Huang To: leif.lindholm@linaro.org, linaro-uefi@lists.linaro.org, edk2-devel@lists.01.org, graeme.gregory@linaro.org Date: Wed, 20 Feb 2019 15:28:32 +0800 Message-Id: <20190220072837.35058-14-ming.huang@linaro.org> X-Mailer: git-send-email 2.9.5 In-Reply-To: <20190220072837.35058-1-ming.huang@linaro.org> References: <20190220072837.35058-1-ming.huang@linaro.org> Cc: huangming23@huawei.com, john.garry@huawei.com, xiaojun2@hisilicon.com, zhangjinsong2@huawei.com, huangdaode@hisilicon.com, zhangfeng56@huawei.com, michael.d.kinney@intel.com, lersek@redhat.com, wanghuiqiang@huawei.com Subject: [Linaro-uefi] [PATCH edk2-platforms v2 13/18] Hisilicon/D06: Remove SECURE_BOOT_ENABLE definition X-BeenThere: linaro-uefi@lists.linaro.org X-Mailman-Version: 2.1.16 Precedence: list List-Id: "For discussions about Linaro-related UEFI development. Not a substitute for edk2-devel." List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: linaro-uefi-bounces@lists.linaro.org Sender: "Linaro-uefi" As secure boot is not ready, remove SECURE_BOOT_ENABLE and relative code. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ming Huang Reviewed-by: Leif Lindholm --- Platform/Hisilicon/D06/D06.dsc | 12 ------------ Platform/Hisilicon/D06/D06.fdf | 11 ----------- 2 files changed, 23 deletions(-) diff --git a/Platform/Hisilicon/D06/D06.dsc b/Platform/Hisilicon/D06/D06.dsc index 3856578e74be..d762230768e9 100644 --- a/Platform/Hisilicon/D06/D06.dsc +++ b/Platform/Hisilicon/D06/D06.dsc @@ -30,7 +30,6 @@ [Defines] FLASH_DEFINITION = Platform/Hisilicon/$(PLATFORM_NAME)/$(PLATFORM_NAME).fdf DEFINE NETWORK_IP6_ENABLE = FALSE DEFINE HTTP_BOOT_ENABLE = FALSE - DEFINE SECURE_BOOT_ENABLE = FALSE !include Silicon/Hisilicon/Hisilicon.dsc.inc @@ -89,9 +88,6 @@ [LibraryClasses.common] LpcLib|Silicon/Hisilicon/Hi1620/Library/LpcLibHi1620/LpcLib.inf SerialPortLib|ArmPlatformPkg/Library/PL011SerialPortLib/PL011SerialPortLib.inf OemNicLib|Platform/Hisilicon/D06/Library/OemNicLib/OemNicLib.inf -!if $(SECURE_BOOT_ENABLE) == TRUE - FileExplorerLib|MdeModulePkg/Library/FileExplorerLib/FileExplorerLib.inf -!endif PciExpressLib|MdePkg/Library/BasePciExpressLib/BasePciExpressLib.inf PciPlatformLib|Silicon/Hisilicon/Hi1620/Library/Hi1620PciPlatformLib/Hi1620PciPlatformLib.inf @@ -292,15 +288,7 @@ [Components.common] MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf Platform/Hisilicon/D06/Drivers/OemNicConfig2PHi1620/OemNicConfig2P.inf -!if $(SECURE_BOOT_ENABLE) == TRUE - MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf { - - NULL|SecurityPkg/Library/DxeImageVerificationLib/DxeImageVerificationLib.inf - } - SecurityPkg/VariableAuthenticated/SecureBootConfigDxe/SecureBootConfigDxe.inf -!else MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf -!endif Silicon/Hisilicon/Drivers/FlashFvbDxe/FlashFvbDxe.inf MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf { diff --git a/Platform/Hisilicon/D06/D06.fdf b/Platform/Hisilicon/D06/D06.fdf index f72b513352fb..e402628a1b35 100644 --- a/Platform/Hisilicon/D06/D06.fdf +++ b/Platform/Hisilicon/D06/D06.fdf @@ -88,17 +88,10 @@ [FD.D06] #Blockmap[1]: End 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ## This is the VARIABLE_STORE_HEADER -!if $(SECURE_BOOT_ENABLE) == TRUE - #Signature: gEfiAuthenticatedVariableGuid = - # { 0xaaf32c78, 0x947b, 0x439a, { 0xa1, 0x80, 0x2e, 0x14, 0x4e, 0xc3, 0x77, 0x92 }} - 0x78, 0x2c, 0xf3, 0xaa, 0x7b, 0x94, 0x9a, 0x43, - 0xa1, 0x80, 0x2e, 0x14, 0x4e, 0xc3, 0x77, 0x92, -!else #Signature: gEfiVariableGuid = # { 0xddcf3616, 0x3275, 0x4164, { 0x98, 0xb6, 0xfe, 0x85, 0x70, 0x7f, 0xfe, 0x7d }} 0x16, 0x36, 0xcf, 0xdd, 0x75, 0x32, 0x64, 0x41, 0x98, 0xb6, 0xfe, 0x85, 0x70, 0x7f, 0xfe, 0x7d, -!endif #Size: 0xe000 (gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize) - 0x48 (size of EFI_FIRMWARE_VOLUME_HEADER) = 0xdFB8 0xB8, 0xdF, 0x00, 0x00, #FORMATTED: 0x5A #HEALTHY: 0xFE #Reserved: UINT16 #Reserved1: UINT32 @@ -183,10 +176,6 @@ [FV.FvMain] INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf INF MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf -!if $(SECURE_BOOT_ENABLE) == TRUE - INF SecurityPkg/VariableAuthenticated/SecureBootConfigDxe/SecureBootConfigDxe.inf -!endif - INF MdeModulePkg/Universal/ResetSystemRuntimeDxe/ResetSystemRuntimeDxe.inf INF EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf INF EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf From patchwork Wed Feb 20 07:28:35 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ming Huang X-Patchwork-Id: 158793 Delivered-To: patch@linaro.org Received: by 2002:a02:48:0:0:0:0:0 with SMTP id 69csp4607590jaa; Tue, 19 Feb 2019 23:35:28 -0800 (PST) X-Google-Smtp-Source: AHgI3IYLGkOvPrkq6WRd5j7yjqu/tpNwk7xCeA9tkkA9is6QZHTXHTvOxUDavXTFH1XNF7HSLjmX X-Received: by 2002:ac8:37f6:: with SMTP id e51mr25536432qtc.1.1550648128666; Tue, 19 Feb 2019 23:35:28 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1550648128; cv=none; d=google.com; s=arc-20160816; b=s7v95nDWtiJPVNpy9BFUyWzFhqBFwA8UMqxRvKUYiuv5d1wZJ7ERBkqu13hT45q/g4 B3+7tzUAl6CL84MlDe3RLNMtGJHAT2RElcNZcFZ1/U0Ri08qztF6UQ8JFkvO8kD9o15L aBVisgBzVQsClihbrwrQXsClciyBgvibTq0K0axOrlFWzcBP9YRPQkbbU/JpVxHWnA3c idvenkY/t1DvfNDIjUqm/GemILyjZhRi4ybMmqD1lWSGfeQp5dgGKESAuCAyiK1r2io0 WsW97aRwcKKiEwD/f4Z1nsoLSfS9iJgKwXmLCEIaLz0NDh5FStAwgo2urdK8CY9gmYJ3 JGuw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version :list-subscribe:list-help:list-post:list-archive:list-unsubscribe :list-id:precedence:subject:cc:references:in-reply-to:message-id :date:to:from:delivered-to; bh=V+P3SxbP3HEmuuSQkDgMROJvMGS0MrV82SyJeki0Wvc=; b=NnrMgF0EZ0/TBHZH/FxYN1ysfQMeGDbisHtQeL0FCEhJC174hl0YTaaeL7HJZhKVsJ QICaxa6Oyu3Up+QnTG7GxwcH6PEV3yzqaVCQGOoMnepFmnfRJ74RGGronkuHxnMO3eXd qon9s/0jjX2st3nFPUapC/RWmGJCy2HFWEIL5yS1phnwlr9a7hrNDd20GBQ4nvoTNLss l50OYukSIesNUfi0gKxao2LYmN/KeEuJI2uZ99z3uBw8d8a4MsccI93nWIeA57cbL1+J u8cj4Ap2U26kUIGIbOs4Xs7v9ZO6U4VdzzpGaJA9IfNmmK0z9Q6n+aRCYp5wi7qsTTrt pH/w== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linaro-uefi-bounces@lists.linaro.org designates 54.158.76.221 as permitted sender) smtp.mailfrom=linaro-uefi-bounces@lists.linaro.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.linaro.org (ec2-54-158-76-221.compute-1.amazonaws.com. [54.158.76.221]) by mx.google.com with ESMTPS id y11si7331924qkf.19.2019.02.19.23.35.28 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 19 Feb 2019 23:35:28 -0800 (PST) Received-SPF: pass (google.com: domain of linaro-uefi-bounces@lists.linaro.org designates 54.158.76.221 as permitted sender) client-ip=54.158.76.221; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linaro-uefi-bounces@lists.linaro.org designates 54.158.76.221 as permitted sender) smtp.mailfrom=linaro-uefi-bounces@lists.linaro.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: by lists.linaro.org (Postfix, from userid 109) id 21E9D619CC; Wed, 20 Feb 2019 07:35:28 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on ip-10-150-125-211.ec2.internal X-Spam-Level: X-Spam-Status: No, score=-2.9 required=5.0 tests=BAYES_00, MAILING_LIST_MULTI, RCVD_IN_DNSWL_NONE,RCVD_IN_MSPIKE_H3,RCVD_IN_MSPIKE_WL autolearn=disabled version=3.4.2 Received: from [127.0.0.1] (localhost [127.0.0.1]) by lists.linaro.org (Postfix) with ESMTP id 4F0E8619EA; Wed, 20 Feb 2019 07:31:41 +0000 (UTC) X-Original-To: linaro-uefi@lists.linaro.org Delivered-To: linaro-uefi@lists.linaro.org Received: by lists.linaro.org (Postfix, from userid 109) id 4C27F619BE; Wed, 20 Feb 2019 07:31:27 +0000 (UTC) Received: from mail-pf1-f194.google.com (mail-pf1-f194.google.com [209.85.210.194]) by lists.linaro.org (Postfix) with ESMTPS id AB62061999 for ; Wed, 20 Feb 2019 07:29:38 +0000 (UTC) Received: by mail-pf1-f194.google.com with SMTP id n22so11488656pfa.3 for ; Tue, 19 Feb 2019 23:29:38 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=83x9zXv1dODbGmvhRtGaOKJCQYGS74AUSI31E5QtFmE=; b=VOuhN+uR0ScZeZBzHCS2d4jb7VhglYcWFUo+41GGH1jypJD16/+hQvFLYA5h2ucoos Of0WOze7vHmpVHyeMetEnWBrx02EdN2voz5IXcDXds6jK//5P3tGeKAOIMseOktMgo4/ ytHOI2/RlDFcPexnzcai/jZfZNEFMp6fx/+lcPldPBDkgS00YabEugYwE3t6zcVhNoQr MXuOJHBAxjrws81UAqn79QAsFjmpVu8oKqY4jHsQX2xZMSD1nD8/D34UQTv9FAzqjt9H 7P3E8B7Dzg4xCyLEpJ/krT1Dajz4g9lPd4W7Khdh9YrrjlHASJgfwv5lBIJ4Al/LM/2W GqRQ== X-Gm-Message-State: AHQUAuaiWPGmD7vF/vpjda9XnSNXxTZhXtAcBLxuXQQHmJJNRIFCNzkR Pz8oQzX70zzwBSa+m4DjaAsLNFUN X-Received: by 2002:a63:1105:: with SMTP id g5mr31858963pgl.322.1550647777505; Tue, 19 Feb 2019 23:29:37 -0800 (PST) Received: from localhost.localdomain ([203.160.91.226]) by smtp.gmail.com with ESMTPSA id 23sm19152969pft.187.2019.02.19.23.29.34 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 19 Feb 2019 23:29:36 -0800 (PST) From: Ming Huang To: leif.lindholm@linaro.org, linaro-uefi@lists.linaro.org, edk2-devel@lists.01.org, graeme.gregory@linaro.org Date: Wed, 20 Feb 2019 15:28:35 +0800 Message-Id: <20190220072837.35058-17-ming.huang@linaro.org> X-Mailer: git-send-email 2.9.5 In-Reply-To: <20190220072837.35058-1-ming.huang@linaro.org> References: <20190220072837.35058-1-ming.huang@linaro.org> Cc: huangming23@huawei.com, john.garry@huawei.com, xiaojun2@hisilicon.com, zhangjinsong2@huawei.com, huangdaode@hisilicon.com, zhangfeng56@huawei.com, michael.d.kinney@intel.com, lersek@redhat.com, wanghuiqiang@huawei.com Subject: [Linaro-uefi] [PATCH edk2-platforms v2 16/18] Hisilicon/D0x: Remove and tidy some codes about SerdesLib X-BeenThere: linaro-uefi@lists.linaro.org X-Mailman-Version: 2.1.16 Precedence: list List-Id: "For discussions about Linaro-related UEFI development. Not a substitute for edk2-devel." List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: linaro-uefi-bounces@lists.linaro.org Sender: "Linaro-uefi" As some definitions are about OemMiscLib, so move them from SerdesLib.h to OemMiscLib.h and drop some useless function definitions. After doing this, some unnecessary references can be removed for D03/D05. SerdesLib is useless for SmbiosMiscDxe and D06, so remove it and delete SerdesLib.h for D06. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ming Huang --- Platform/Hisilicon/D06/D06.dsc | 2 - Silicon/Hisilicon/Drivers/Smbios/SmbiosMiscDxe/SmbiosMiscDxe.inf | 2 +- Silicon/Hisilicon/Hi1610/Include/Library/SerdesLib.h | 109 -------------------- Silicon/Hisilicon/Hi1616/Include/Library/SerdesLib.h | 64 ------------ Silicon/Hisilicon/Hi1620/Include/Library/SerdesLib.h | 85 --------------- Silicon/Hisilicon/Include/Library/OemMiscLib.h | 63 +++++++++++ Platform/Hisilicon/D03/Library/OemMiscLib2P/BoardFeature2PHi1610.c | 1 - Platform/Hisilicon/D05/Library/OemMiscLibD05/BoardFeatureD05.c | 1 - Platform/Hisilicon/D06/Library/OemMiscLibD06/BoardFeatureD06.c | 1 - Platform/Hisilicon/D06/Library/OemMiscLibD06/OemMiscLibD06.c | 1 - Silicon/Hisilicon/Drivers/Smbios/SmbiosMiscDxe/Type09/MiscSystemSlotDesignationFunction.c | 2 +- 11 files changed, 65 insertions(+), 266 deletions(-) diff --git a/Platform/Hisilicon/D06/D06.dsc b/Platform/Hisilicon/D06/D06.dsc index d762230768e9..a3a01bfb1e23 100644 --- a/Platform/Hisilicon/D06/D06.dsc +++ b/Platform/Hisilicon/D06/D06.dsc @@ -63,8 +63,6 @@ [LibraryClasses.common] CpldIoLib|Silicon/Hisilicon/Library/CpldIoLib/CpldIoLib.inf - SerdesLib|Silicon/Hisilicon/Hi1620/Library/Hi1620Serdes/Hi1620SerdesLib.inf - TimeBaseLib|EmbeddedPkg/Library/TimeBaseLib/TimeBaseLib.inf RealTimeClockLib|Silicon/Hisilicon/Library/M41T83RealTimeClockLib/M41T83RealTimeClockLib.inf OemMiscLib|Platform/Hisilicon/D06/Library/OemMiscLibD06/OemMiscLibD06.inf diff --git a/Silicon/Hisilicon/Drivers/Smbios/SmbiosMiscDxe/SmbiosMiscDxe.inf b/Silicon/Hisilicon/Drivers/Smbios/SmbiosMiscDxe/SmbiosMiscDxe.inf index 61cead7779b9..669e6a2d52cc 100644 --- a/Silicon/Hisilicon/Drivers/Smbios/SmbiosMiscDxe/SmbiosMiscDxe.inf +++ b/Silicon/Hisilicon/Drivers/Smbios/SmbiosMiscDxe/SmbiosMiscDxe.inf @@ -69,6 +69,7 @@ [LibraryClasses] BaseMemoryLib BaseLib DebugLib + OemMiscLib UefiBootServicesTableLib UefiRuntimeServicesTableLib UefiDriverEntryPoint @@ -77,7 +78,6 @@ [LibraryClasses] IpmiCmdLib - SerdesLib [Protocols] gEfiSmbiosProtocolGuid # PROTOCOL ALWAYS_CONSUMED diff --git a/Silicon/Hisilicon/Hi1610/Include/Library/SerdesLib.h b/Silicon/Hisilicon/Hi1610/Include/Library/SerdesLib.h index 077dd5edc847..b493dd9ac090 100755 --- a/Silicon/Hisilicon/Hi1610/Include/Library/SerdesLib.h +++ b/Silicon/Hisilicon/Hi1610/Include/Library/SerdesLib.h @@ -16,116 +16,7 @@ #ifndef _SERDES_LIB_H_ #define _SERDES_LIB_H_ -typedef enum { - EmHilink0Hccs1X8 = 0, - EmHilink0Pcie1X8 = 2, - EmHilink0Pcie1X4Pcie2X4 = 3, - EmHilink0Sas2X8 = 4, - EmHilink0Hccs1X8Width16, - EmHilink0Hccs1X8Width32, -} HILINK0_MODE_TYPE; - -typedef enum { - EmHilink1Sas2X1 = 0, - EmHilink1Hccs0X8 = 1, - EmHilink1Pcie0X8 = 2, - EmHilink1Hccs0X8Width16, - EmHilink1Hccs0X8Width32, -} HILINK1_MODE_TYPE; - -typedef enum { - EmHilink2Pcie2X8 = 0, - EmHilink2Sas0X8 = 2, -} HILINK2_MODE_TYPE; - -typedef enum { - EmHilink5Pcie3X4 = 0, - EmHilink5Pcie2X2Pcie3X2 = 1, - EmHilink5Sas1X4 = 2, -} HILINK5_MODE_TYPE; - -typedef enum { - Em32coreEvbBoard = 0, - Em16coreEvbBoard = 1, - EmV2R1CO5Borad = 2, - EmOtherBorad -} BOARD_TYPE; - - -typedef struct { - HILINK0_MODE_TYPE Hilink0Mode; - HILINK1_MODE_TYPE Hilink1Mode; - HILINK2_MODE_TYPE Hilink2Mode; - UINT32 Hilink3Mode; - UINT32 Hilink4Mode; - HILINK5_MODE_TYPE Hilink5Mode; - UINT32 Hilink6Mode; - UINT32 UseSsc; -} SERDES_PARAM; - - -#define SERDES_INVALID_MACRO_ID 0xFFFFFFFF -#define SERDES_INVALID_LANE_NUM 0xFFFFFFFF -#define SERDES_INVALID_RATE_MODE 0xFFFFFFFF - -typedef struct { - UINT32 MacroId; - UINT32 DsNum; - UINT32 DsCfg; -} SERDES_POLARITY_INVERT; - -EFI_STATUS OemGetSerdesParam (SERDES_PARAM *ParamA, SERDES_PARAM *ParamB, UINT32 SocketId); -extern SERDES_POLARITY_INVERT gSerdesPolarityTxDesc[]; -extern SERDES_POLARITY_INVERT gSerdesPolarityRxDesc[]; -UINT32 GetEthType(UINT8 EthChannel); - EFI_STATUS EfiSerdesInitWrap (VOID); -void SRE_SerdesEnableCTLEDFE(UINT32 macro, UINT32 lane, UINT32 ulDsCfg); - -//EYE test -UINT32 serdes_eye_test(UINT32 uwMacroId, UINT32 uwDsNum, UINT32 eyemode, UINT32 scanwindowvalue, UINT32 uwRateData); - -UINT32 Serdes_ReadBert(UINT32 ulMacroId , UINT32 ulDsNum); - -//PRBS test -int serdes_prbs_test(UINT8 macro, UINT8 lane, UINT8 prbstype); - -int serdes_prbs_test_cancle(UINT8 macro,UINT8 lane); - -//CTLE/DFE -void serdes_ctle_adaptation_close(UINT32 macro,UINT32 lane); - -void serdes_ctle_adaptation_open(UINT32 macro,UINT32 lane); - -void serdes_dfe_adaptation_close(UINT32 macro,UINT32 lane); - -void serdes_dfe_adaptation_open(UINT32 macro,UINT32 lane); - -void serdes_ctle_dfe_reset(UINT32 macro,UINT32 lane); -//int serdes_reset(UINT32 macro); -//int serdes_release_reset(UINT32 macro); -void Custom_Wave(UINT32 macro,UINT32 lane,UINT32 mode); -void serdes_ffe_show(UINT32 macro,UINT32 lane); -void serdes_dfe_show(UINT32 macro,UINT32 lane); -int serdes_read_bert(UINT8 macro, UINT8 lane); -void serdes_clean_bert(UINT8 macro, UINT8 lane); -int serdes_get_four_point_eye_diagram(UINT32 macro, UINT32 lane,UINT32 eyemode, UINT32 data_rate); -void serdes_release_mcu(UINT32 macro,UINT32 val); -int hilink_write(UINT32 macro, UINT32 reg, UINT32 value); -int hilink_read(UINT32 macro, UINT32 reg, UINT32 *value); -int serdes_tx_to_rx_parallel_loopback(UINT8 macro,UINT8 lane,UINT8 val);//TXRXPARLPBKEN -int serdes_rx_to_tx_parallel_loopback(UINT8 macro,UINT8 lane,UINT8 val); -int serdes_tx_to_rx_serial_loopback(UINT8 macro,UINT8 lane,UINT8 val); -void serdes_ctle_show(UINT32 macro,UINT32 lane); -int serdes_cs_write(UINT32 macro,UINT32 cs_num,UINT32 reg_num,UINT32 bit_high,UINT32 bit_low,UINT32 value); -UINT32 serdes_cs_read(UINT32 macro,UINT32 cs_num,UINT32 reg_num); -int serdes_ds_write(UINT32 macro,UINT32 ds_num,UINT32 ds_index,UINT32 reg_num,UINT32 bit_high,UINT32 bit_low,UINT32 value); -int serdes_ds_read(UINT32 macro,UINT32 ds_num,UINT32 ds_index,UINT32 reg_num); -int report_serdes_mux(void); -int serdes_key_reg_show(UINT32 macro); -void serdes_state_show(UINT32 macro); -UINT32 Serdes_ReadBert(UINT32 ulMacroId , UINT32 ulDsNum); - #endif diff --git a/Silicon/Hisilicon/Hi1616/Include/Library/SerdesLib.h b/Silicon/Hisilicon/Hi1616/Include/Library/SerdesLib.h index 7ff924bd8954..b493dd9ac090 100644 --- a/Silicon/Hisilicon/Hi1616/Include/Library/SerdesLib.h +++ b/Silicon/Hisilicon/Hi1616/Include/Library/SerdesLib.h @@ -16,71 +16,7 @@ #ifndef _SERDES_LIB_H_ #define _SERDES_LIB_H_ -typedef enum { - EmHilink0Hccs1X8 = 0, - EmHilink0Pcie1X8 = 2, - EmHilink0Pcie1X4Pcie2X4 = 3, - EmHilink0Sas2X8 = 4, - EmHilink0Hccs1X8Width16, - EmHilink0Hccs1X8Width32, - EmHilink0Hccs1X8Speed5G, -} HILINK0_MODE_TYPE; - -typedef enum { - EmHilink1Sas2X1 = 0, - EmHilink1Hccs0X8 = 1, - EmHilink1Pcie0X8 = 2, - EmHilink1Hccs0X8Width16, - EmHilink1Hccs0X8Width32, - EmHilink1Hccs0X8Speed5G, -} HILINK1_MODE_TYPE; - -typedef enum { - EmHilink2Pcie2X8 = 0, - EmHilink2Hccs2X8 = 1, - EmHilink2Sas0X8 = 2, - EmHilink2Hccs2X8Width16, - EmHilink2Hccs2X8Width32, - EmHilink2Hccs2X8Speed5G, -} HILINK2_MODE_TYPE; - -typedef enum { - EmHilink5Pcie3X4 = 0, - EmHilink5Pcie2X2Pcie3X2 = 1, - EmHilink5Sas1X4 = 2, -} HILINK5_MODE_TYPE; - - -typedef struct { - HILINK0_MODE_TYPE Hilink0Mode; - HILINK1_MODE_TYPE Hilink1Mode; - HILINK2_MODE_TYPE Hilink2Mode; - UINT32 Hilink3Mode; - UINT32 Hilink4Mode; - HILINK5_MODE_TYPE Hilink5Mode; - UINT32 Hilink6Mode; - UINT32 UseSsc; -} SERDES_PARAM; - -#define SERDES_INVALID_MACRO_ID 0xFFFFFFFF -#define SERDES_INVALID_LANE_NUM 0xFFFFFFFF -#define SERDES_INVALID_RATE_MODE 0xFFFFFFFF - -typedef struct { - UINT32 MacroId; - UINT32 DsNum; - UINT32 DsCfg; -} SERDES_POLARITY_INVERT; - -EFI_STATUS OemGetSerdesParam (SERDES_PARAM *ParamA, SERDES_PARAM *ParamB, UINT32 SocketId); -extern SERDES_POLARITY_INVERT gSerdesPolarityTxDesc[]; -extern SERDES_POLARITY_INVERT gSerdesPolarityRxDesc[]; -UINT32 GetEthType(UINT8 EthChannel); -VOID SerdesEnableCtleDfe(UINT32 NimbusId, UINT32 Macro, UINT32 Lane, UINT32 LaneMode); - EFI_STATUS EfiSerdesInitWrap (VOID); -INT32 SerdesReset(UINT32 SiclId, UINT32 Macro); -VOID SerdesLoadFirmware(UINT32 SiclId, UINT32 Macro); #endif diff --git a/Silicon/Hisilicon/Hi1620/Include/Library/SerdesLib.h b/Silicon/Hisilicon/Hi1620/Include/Library/SerdesLib.h deleted file mode 100644 index 05f0f7020e82..000000000000 --- a/Silicon/Hisilicon/Hi1620/Include/Library/SerdesLib.h +++ /dev/null @@ -1,85 +0,0 @@ -/** @file -* -* Copyright (c) 2018, Hisilicon Limited. All rights reserved. -* Copyright (c) 2018, Linaro Limited. All rights reserved. -* -* This program and the accompanying materials -* are licensed and made available under the terms and conditions of the BSD License -* which accompanies this distribution. The full text of the license may be found at -* http://opensource.org/licenses/bsd-license.php -* -* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. -* -**/ - -#ifndef _SERDES_LIB_H_ -#define _SERDES_LIB_H_ - -typedef enum { - EmHilink0Hccs1X8 = 0, - EmHilink0Pcie1X8 = 2, - EmHilink0Pcie1X4Pcie2X4 = 3, - EmHilink0Sas2X8 = 4, - EmHilink0Hccs1X8Width16, - EmHilink0Hccs1X8Width32, - EmHilink0Hccs1X8Speed5G, -} HILINK0_MODE_TYPE; - -typedef enum { - EmHilink1Sas2X1 = 0, - EmHilink1Hccs0X8 = 1, - EmHilink1Pcie0X8 = 2, - EmHilink1Hccs0X8Width16, - EmHilink1Hccs0X8Width32, - EmHilink1Hccs0X8Speed5G, -} HILINK1_MODE_TYPE; - -typedef enum { - EmHilink2Pcie2X8 = 0, - EmHilink2Hccs2X8 = 1, - EmHilink2Sas0X8 = 2, - EmHilink2Hccs2X8Width16, - EmHilink2Hccs2X8Width32, - EmHilink2Hccs2X8Speed5G, -} HILINK2_MODE_TYPE; - -typedef enum { - EmHilink5Pcie3X4 = 0, - EmHilink5Pcie2X2Pcie3X2 = 1, - EmHilink5Sas1X4 = 2, -} HILINK5_MODE_TYPE; - - -typedef struct { - HILINK0_MODE_TYPE Hilink0Mode; - HILINK1_MODE_TYPE Hilink1Mode; - HILINK2_MODE_TYPE Hilink2Mode; - UINT32 Hilink3Mode; - UINT32 Hilink4Mode; - HILINK5_MODE_TYPE Hilink5Mode; - UINT32 Hilink6Mode; - UINT32 UseSsc; -} SERDES_PARAM; - -#define SERDES_INVALID_MACRO_ID 0xFFFFFFFF -#define SERDES_INVALID_LANE_NUM 0xFFFFFFFF -#define SERDES_INVALID_RATE_MODE 0xFFFFFFFF - -typedef struct { - UINT32 MacroId; - UINT32 DsNum; - UINT32 DsCfg; -} SERDES_POLARITY_INVERT; - -EFI_STATUS OemGetSerdesParam (SERDES_PARAM *ParamA, SERDES_PARAM *ParamB, UINT32 SocketId); -extern SERDES_POLARITY_INVERT gSerdesPolarityTxDesc[]; -extern SERDES_POLARITY_INVERT gSerdesPolarityRxDesc[]; -UINT32 GetEthType (UINT8 EthChannel); -VOID SerdesEnableCtleDfe (UINT32 NimbusId, UINT32 Macro, UINT32 Lane, UINT32 LaneMode); - -EFI_STATUS EfiSerdesInitWrap (UINT32 RateMode); -INT32 SerdesReset (UINT32 SiclId, UINT32 Macro); -VOID SerdesLoadFirmware (UINT32 SiclId, UINT32 Macro); -INT32 h30_serdes_run_firmware (UINT32 nimbus_id, UINT32 macro, UINT8 DsMask, UINT8 ctle_mode); -#endif diff --git a/Silicon/Hisilicon/Include/Library/OemMiscLib.h b/Silicon/Hisilicon/Include/Library/OemMiscLib.h index ea95fe38d75c..b5a768856484 100644 --- a/Silicon/Hisilicon/Include/Library/OemMiscLib.h +++ b/Silicon/Hisilicon/Include/Library/OemMiscLib.h @@ -26,6 +26,62 @@ #define HCCS_PLL_VALUE_2800 0x52240701 #define HCCS_PLL_VALUE_3000 0x52240781 +typedef enum { + EmHilink0Hccs1X8 = 0, + EmHilink0Pcie1X8 = 2, + EmHilink0Pcie1X4Pcie2X4 = 3, + EmHilink0Sas2X8 = 4, + EmHilink0Hccs1X8Width16, + EmHilink0Hccs1X8Width32, + EmHilink0Hccs1X8Speed5G, +} HILINK0_MODE_TYPE; + +typedef enum { + EmHilink1Sas2X1 = 0, + EmHilink1Hccs0X8 = 1, + EmHilink1Pcie0X8 = 2, + EmHilink1Hccs0X8Width16, + EmHilink1Hccs0X8Width32, + EmHilink1Hccs0X8Speed5G, +} HILINK1_MODE_TYPE; + +typedef enum { + EmHilink2Pcie2X8 = 0, + EmHilink2Hccs2X8 = 1, + EmHilink2Sas0X8 = 2, + EmHilink2Hccs2X8Width16, + EmHilink2Hccs2X8Width32, + EmHilink2Hccs2X8Speed5G, +} HILINK2_MODE_TYPE; + +typedef enum { + EmHilink5Pcie3X4 = 0, + EmHilink5Pcie2X2Pcie3X2 = 1, + EmHilink5Sas1X4 = 2, +} HILINK5_MODE_TYPE; + + +typedef struct { + HILINK0_MODE_TYPE Hilink0Mode; + HILINK1_MODE_TYPE Hilink1Mode; + HILINK2_MODE_TYPE Hilink2Mode; + UINT32 Hilink3Mode; + UINT32 Hilink4Mode; + HILINK5_MODE_TYPE Hilink5Mode; + UINT32 Hilink6Mode; + UINT32 UseSsc; +} SERDES_PARAM; + +#define SERDES_INVALID_MACRO_ID 0xFFFFFFFF +#define SERDES_INVALID_LANE_NUM 0xFFFFFFFF +#define SERDES_INVALID_RATE_MODE 0xFFFFFFFF + +typedef struct { + UINT32 MacroId; + UINT32 DsNum; + UINT32 DsCfg; +} SERDES_POLARITY_INVERT; + #define PCIEDEVICE_REPORT_MAX 8 #define MAX_PROCESSOR_SOCKETS MAX_SOCKET @@ -65,4 +121,11 @@ OemGetHccsFreq ( VOID ); +EFI_STATUS +OemGetSerdesParam ( + SERDES_PARAM *ParamA, + SERDES_PARAM *ParamB, + UINT32 SocketId + ); + #endif diff --git a/Platform/Hisilicon/D03/Library/OemMiscLib2P/BoardFeature2PHi1610.c b/Platform/Hisilicon/D03/Library/OemMiscLib2P/BoardFeature2PHi1610.c index 4771cb900c82..218b3540eb7f 100644 --- a/Platform/Hisilicon/D03/Library/OemMiscLib2P/BoardFeature2PHi1610.c +++ b/Platform/Hisilicon/D03/Library/OemMiscLib2P/BoardFeature2PHi1610.c @@ -21,7 +21,6 @@ #include #include -#include #include #include diff --git a/Platform/Hisilicon/D05/Library/OemMiscLibD05/BoardFeatureD05.c b/Platform/Hisilicon/D05/Library/OemMiscLibD05/BoardFeatureD05.c index ae4c194070e8..1a9ed620c80c 100644 --- a/Platform/Hisilicon/D05/Library/OemMiscLibD05/BoardFeatureD05.c +++ b/Platform/Hisilicon/D05/Library/OemMiscLibD05/BoardFeatureD05.c @@ -22,7 +22,6 @@ #include #include #include -#include #include diff --git a/Platform/Hisilicon/D06/Library/OemMiscLibD06/BoardFeatureD06.c b/Platform/Hisilicon/D06/Library/OemMiscLibD06/BoardFeatureD06.c index 7e3f2e2a0e7d..c28ac6266fc6 100644 --- a/Platform/Hisilicon/D06/Library/OemMiscLibD06/BoardFeatureD06.c +++ b/Platform/Hisilicon/D06/Library/OemMiscLibD06/BoardFeatureD06.c @@ -21,7 +21,6 @@ #include #include #include -#include #include #include diff --git a/Platform/Hisilicon/D06/Library/OemMiscLibD06/OemMiscLibD06.c b/Platform/Hisilicon/D06/Library/OemMiscLibD06/OemMiscLibD06.c index 914387de7d63..758157525f40 100644 --- a/Platform/Hisilicon/D06/Library/OemMiscLibD06/OemMiscLibD06.c +++ b/Platform/Hisilicon/D06/Library/OemMiscLibD06/OemMiscLibD06.c @@ -24,7 +24,6 @@ #include #include #include -#include #include #include diff --git a/Silicon/Hisilicon/Drivers/Smbios/SmbiosMiscDxe/Type09/MiscSystemSlotDesignationFunction.c b/Silicon/Hisilicon/Drivers/Smbios/SmbiosMiscDxe/Type09/MiscSystemSlotDesignationFunction.c index bc33639ac51d..945fd4c6e3c0 100644 --- a/Silicon/Hisilicon/Drivers/Smbios/SmbiosMiscDxe/Type09/MiscSystemSlotDesignationFunction.c +++ b/Silicon/Hisilicon/Drivers/Smbios/SmbiosMiscDxe/Type09/MiscSystemSlotDesignationFunction.c @@ -17,7 +17,7 @@ #include "SmbiosMisc.h" -#include +#include extern SMBIOS_TABLE_TYPE9 MiscSystemSlotDesignationPcie0Data; extern SMBIOS_TABLE_TYPE9 MiscSystemSlotDesignationPcie1Data;