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[209.51.188.17]) by mx.google.com with ESMTPS id x189si3174124ywc.338.2019.02.23.15.30.30 for (version=TLS1 cipher=AES128-SHA bits=128/128); Sat, 23 Feb 2019 15:30:30 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=L0nvKaQV; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Received: from localhost ([127.0.0.1]:43835 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gxgkY-0000Qh-9L for patch@linaro.org; Sat, 23 Feb 2019 18:30:30 -0500 Received: from eggs.gnu.org ([209.51.188.92]:45401) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gxgkA-0000P9-SQ for qemu-devel@nongnu.org; Sat, 23 Feb 2019 18:30:07 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gxgk9-0007N4-Ja for qemu-devel@nongnu.org; Sat, 23 Feb 2019 18:30:06 -0500 Received: from mail-pl1-x62f.google.com ([2607:f8b0:4864:20::62f]:37463) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1gxgk9-0007D0-4P for qemu-devel@nongnu.org; Sat, 23 Feb 2019 18:30:05 -0500 Received: by mail-pl1-x62f.google.com with SMTP id q3so2767397pll.4 for ; Sat, 23 Feb 2019 15:29:59 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=fhoI/x8s+ztOp9CjjXctFe5atezVcR7mpjbx/GoY33A=; b=L0nvKaQVvvfIVro2GwtFQ4q0Jo8bUPV00AwDABPdeenDkJ/eXeNUE9aTsdfXUMBb8d ibGSiot+/R4p7W0tnBbeoAp6+BmnrjD3TqUR2w80BUFIeZW7+++SjYUuBPQnlt28VPTQ gcUouHy2oNei6HMVuPb3h5E6z21cB1gm3i54Qcw/BOm7Wjh+1LjZ/dAABWmnXnIXxbSq tlCR3yxVY+Du7nr7XoVRYDTdr65T/vlYlEt3V5/y7FOuCsNcEjv28p2ldRL3pJAAHsAM Fj4IQ0erJA1B3hW8UQ/aFp1xnQakbsinRcq8EdFKVe5TIopvTVXOvKrB9tJCltSHVpJj nhww== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=fhoI/x8s+ztOp9CjjXctFe5atezVcR7mpjbx/GoY33A=; b=KmXHxA+05tTancwmutVaeSz1pO1tm1Ck1S/r/WPWqqjSh7x/0PKwAf9DXyiwzmJQIl RMZeQDUeSL6PTeUJcYZDJugL4zdSGf9tCLJ2U2OiZVyDIZIS1KAALR9N5lwqBGQ7ovYp NRHctnyEnpoZTb4YpkiGmjd6E52A008qDW72QpYIif1BmKUS1vIKE+scGs9l88bZvnvu 7pgehvDmO7umsmNpX09OZujQzvrGuAOq3uCvoqsEUOWBxlPjElMCn/c3097+PZwr553W rymkBdppq/wYdFXFlX9eNMQ0iVRBvQYcC1fPFsWwj/pqJlRRXqG9VDslUkVJK0x7vSxt OpPw== X-Gm-Message-State: AHQUAuapZWoVzlfart77yO6eHDbBjysvZIMHsOmUZQ/ILigBD64DBg72 chl3HMWraP6CMfi0YTOHU7p3g2dhM6c= X-Received: by 2002:a17:902:f302:: with SMTP id gb2mr11695016plb.51.1550964597905; Sat, 23 Feb 2019 15:29:57 -0800 (PST) Received: from cloudburst.twiddle.net (97-113-188-82.tukw.qwest.net. [97.113.188.82]) by smtp.gmail.com with ESMTPSA id n1sm13214842pfi.123.2019.02.23.15.29.56 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Sat, 23 Feb 2019 15:29:57 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Date: Sat, 23 Feb 2019 15:29:48 -0800 Message-Id: <20190223232954.7185-2-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.2 In-Reply-To: <20190223232954.7185-1-richard.henderson@linaro.org> References: <20190223232954.7185-1-richard.henderson@linaro.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::62f Subject: [Qemu-devel] [PATCH 1/5] MAINTAINERS: Add scripts/decodetree.py to the TCG section X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: kbastian@mail.uni-paderborn.de, f4bug@amsat.org Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Philippe Mathieu-Daudé Signed-off-by: Philippe Mathieu-Daudé Message-Id: <20181110211313.6922-2-f4bug@amsat.org> Signed-off-by: Richard Henderson --- MAINTAINERS | 1 + 1 file changed, 1 insertion(+) -- 2.17.2 diff --git a/MAINTAINERS b/MAINTAINERS index b1d786cfd8..ad007748b9 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -117,6 +117,7 @@ F: cpus.c F: exec.c F: accel/tcg/ F: accel/stubs/tcg-stub.c +F: scripts/decodetree.py F: include/exec/cpu*.h F: include/exec/exec-all.h F: include/exec/helper*.h From patchwork Sat Feb 23 23:29:49 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 159137 Delivered-To: patch@linaro.org Received: by 2002:a02:5cc1:0:0:0:0:0 with SMTP id w62csp476498jad; Sat, 23 Feb 2019 15:34:08 -0800 (PST) X-Google-Smtp-Source: AHgI3IYmdJ68lgXgK0M72YTAkaY9G6bgMErxuhVNzmGyiJqoSvQDYaSddu6dOwWqidwZ/JLV+iX8 X-Received: by 2002:a81:60c4:: with SMTP id u187mr8562656ywb.345.1550964848848; Sat, 23 Feb 2019 15:34:08 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1550964848; cv=none; d=google.com; s=arc-20160816; b=Rc/Qlq4l3l6Xtgdf3kSxzaSPy5gD7YXkmouU1wgT0gCAuSEGadtwG/T59atUBTPZcx LWkiNVYVkUXTqQNZ3Vf/naOYiGmP8q2Xwbjvuvg0zM5GHPVyOv1PjVQtwD9dAAP5UxMh /JuudlSVQuT0b+egg5BhdF8cMeL17HncFk8RkUoVFXyGJIk8lqasuUtLJIBmm7A5FoKT xgvN6kLM8Hyle9mto+9vUm64Xa/c46MtgciEaZJCqkoaMJWVpfajOlOqgpb1UhUh1ZvI YjQ+xNv8THJ9QrR2Xbn3TYy2PUmx5q4AgCXTsZQllxk+9Gqnh3nuT7D5msPLF/1jRPCJ Y71g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:subject:references:in-reply-to :message-id:date:to:from:dkim-signature; bh=HKSvj4r8o2dTGsEq9SDT2x9u3QDLjjeX50th4Cjox94=; b=OHIZ6J5IRTnq2bXeQNfPTVGW3KbJ5xdfvobXCmgFk9p61l8QlLxEOhTPjJzTLH0zQE 3u9kR/1lDnU5Oneoq+P2jHiuQpvZ8gsqp3ISMuCNUenrDO5wT6sXWcc4pZkYXhvO8M6u SIm8gMp2bdYFYnSnz8SHCw2cNhBfKohJ1pgqR/GfTIlqR33RD4/a22xozzYBSCct+taG opRrUA91bVKb94mJYdE7cGswam609j4q7oHroOLVOeqqJU/jB6QoER5KnjXWb8oErMAP Cv+XDWHviCAUG7srlB1FQ6f9g0WJjnviE9vpO1xVg16XOQKadCECGO4SMvIhVBlLIk9N vNjg== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=KeFy7SE0; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id x5si2922874ywb.289.2019.02.23.15.34.08 for (version=TLS1 cipher=AES128-SHA bits=128/128); Sat, 23 Feb 2019 15:34:08 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=KeFy7SE0; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Received: from localhost ([127.0.0.1]:43861 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gxgo4-0002pd-A4 for patch@linaro.org; Sat, 23 Feb 2019 18:34:08 -0500 Received: from eggs.gnu.org ([209.51.188.92]:45444) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gxgkB-0000PU-VC for qemu-devel@nongnu.org; Sat, 23 Feb 2019 18:30:09 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gxgk9-0007MK-EF for qemu-devel@nongnu.org; Sat, 23 Feb 2019 18:30:07 -0500 Received: from mail-pf1-x431.google.com ([2607:f8b0:4864:20::431]:42745) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1gxgk9-0007Dt-0N for qemu-devel@nongnu.org; Sat, 23 Feb 2019 18:30:05 -0500 Received: by mail-pf1-x431.google.com with SMTP id n74so2756248pfi.9 for ; Sat, 23 Feb 2019 15:30:00 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=HKSvj4r8o2dTGsEq9SDT2x9u3QDLjjeX50th4Cjox94=; b=KeFy7SE0kgL95z5yzIptAZp/6OYVoY+vpNM2ybBfUhxQ2rhNSnGAPTQ77KqmwKEMu4 65euuZcdnZjY/SLxkuznBaBwy42jqG8RY0COn7/QvNnSZeGji3sXugMXblk/GOZ1P3mZ TcXyXSrAJMLudrZOTvwLefDOz9JKq+O8xMwGLmOUdz/JC7aV8uuNUdAr/DL4T8+jaK08 C4qrMjMpFfDNwaVqPS52pxSB961xM80whwYtZpeIiC51TPGRZisZBIIyxrBuYUGmX59a FlN9mF+fkxMa/4CVt3x3VVXG5dC4O5YphkqysnEFgM4I6KPoSHJ8Rb+lWwqT2gBEV0GY Z/ow== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=HKSvj4r8o2dTGsEq9SDT2x9u3QDLjjeX50th4Cjox94=; b=DcVWbHiM+3QnW6rt+Rt3UmBqSsmx3AKjwRKaU7JUnGN9CNLbw8LJjEUBaqi4WG99AC H7jxzxcxuTxRCchxyaR9I0yPNaKbe7X5iYOb0DSsl9FswXMCaYriwdKMvlogR6+Iszx+ 8qwdwzm7mALHqfwoRyvFuZfMpSNzmWs+RUwhj+uh3JiXBgAkjrwDDHXDODOlLyO+BZmC EYvIctHILKeHGQZeroZzfNYcPkQzcAuvUB+P4CnrMOS8Fu1QSiYLtUeZk2z0KRdP0DuN M2eqBqxWDLAxDWuUAGBOlpCFyBfgtGCX68qrRPrjd4GBTzX6GGMIHHHSqum19foA6P0l 9DQg== X-Gm-Message-State: AHQUAuZIPXfCJjOg+fIIRWA+RhibO6DRai9CqDoMLfxiOp7T31d9XmIu TffENWCSWATFTzhStp2hNBXLcJAnQEQ= X-Received: by 2002:a63:5c66:: with SMTP id n38mr7487216pgm.15.1550964599288; Sat, 23 Feb 2019 15:29:59 -0800 (PST) Received: from cloudburst.twiddle.net (97-113-188-82.tukw.qwest.net. [97.113.188.82]) by smtp.gmail.com with ESMTPSA id n1sm13214842pfi.123.2019.02.23.15.29.58 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Sat, 23 Feb 2019 15:29:58 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Date: Sat, 23 Feb 2019 15:29:49 -0800 Message-Id: <20190223232954.7185-3-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.2 In-Reply-To: <20190223232954.7185-1-richard.henderson@linaro.org> References: <20190223232954.7185-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::431 Subject: [Qemu-devel] [PATCH 2/5] decodetree: Move documentation to docs/decodetree.rst X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: kbastian@mail.uni-paderborn.de, f4bug@amsat.org Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" One great big block comment isn't the best way to document the syntax of a language. Signed-off-by: Richard Henderson --- MAINTAINERS | 1 + docs/decodetree.rst | 156 ++++++++++++++++++++++++++++++++++++++++++ scripts/decodetree.py | 134 +----------------------------------- 3 files changed, 158 insertions(+), 133 deletions(-) create mode 100644 docs/decodetree.rst -- 2.17.2 diff --git a/MAINTAINERS b/MAINTAINERS index ad007748b9..fc7cddb873 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -118,6 +118,7 @@ F: exec.c F: accel/tcg/ F: accel/stubs/tcg-stub.c F: scripts/decodetree.py +F: docs/decodetree.rst F: include/exec/cpu*.h F: include/exec/exec-all.h F: include/exec/helper*.h diff --git a/docs/decodetree.rst b/docs/decodetree.rst new file mode 100644 index 0000000000..d9be30b2db --- /dev/null +++ b/docs/decodetree.rst @@ -0,0 +1,156 @@ +======================== +Decodetree Specification +======================== + +A *decodetree* is built from instruction *patterns*. A pattern may +represent a single architectural instruction or a group of same, depending +on what is convenient for further processing. + +Each pattern has both *fixedbits* and *fixedmask*, the combination of which +describes the condition under which the pattern is matched:: + + (insn & fixedmask) == fixedbits + +Each pattern may have *fields*, which are extracted from the insn and +passed along to the translator. Examples of such are registers, +immediates, and sub-opcodes. + +In support of patterns, one may declare *fields*, *argument sets*, and +*formats*, each of which may be re-used to simplify further definitions. + +Fields +====== + +Syntax:: + + field_def := '%' identifier ( unnamed_field )+ ( !function=identifier )? + unnamed_field := number ':' ( 's' ) number + +For *unnamed_field*, the first number is the least-significant bit position +of the field and the second number is the length of the field. If the 's' is +present, the field is considered signed. If multiple ``unnamed_fields`` are +present, they are concatenated. In this way one can define disjoint fields. + +If ``!function`` is specified, the concatenated result is passed through the +named function, taking and returning an integral value. + +FIXME: the fields of the structure into which this result will be stored +is restricted to ``int``. Which means that we cannot expand 64-bit items. + +Field examples: + ++---------------------------+---------------------------------------------+ +| Input | Generated code | ++===========================+=============================================+ +| %disp 0:s16 | sextract(i, 0, 16) | ++---------------------------+---------------------------------------------+ +| %imm9 16:6 10:3 | extract(i, 16, 6) << 3 | extract(i, 10, 3) | ++---------------------------+---------------------------------------------+ +| %disp12 0:s1 1:1 2:10 | sextract(i, 0, 1) << 11 | | +| | extract(i, 1, 1) << 10 | | +| | extract(i, 2, 10) | ++---------------------------+---------------------------------------------+ +| %shimm8 5:s8 13:1 | expand_shimm8(sextract(i, 5, 8) << 1 | | +| !function=expand_shimm8 | extract(i, 13, 1)) | ++---------------------------+---------------------------------------------+ + +Argument Sets +============= + +Syntax:: + + args_def := '&' identifier ( args_elt )+ ( !extern )? + args_elt := identifier + +Each *args_elt* defines an argument within the argument set. +Each argument set will be rendered as a C structure "arg_$name" +with each of the fields being one of the member arguments. + +If ``!extern`` is specified, the backing structure is assumed +to have been already declared, typically via a second decoder. + +Argument set examples:: + + ®3 ra rb rc + &loadstore reg base offset + + +Formats +======= + +Syntax:: + + fmt_def := '@' identifier ( fmt_elt )+ + fmt_elt := fixedbit_elt | field_elt | field_ref | args_ref + fixedbit_elt := [01.-]+ + field_elt := identifier ':' 's'? number + field_ref := '%' identifier | identifier '=' '%' identifier + args_ref := '&' identifier + +Defining a format is a handy way to avoid replicating groups of fields +across many instruction patterns. + +A *fixedbit_elt* describes a contiguous sequence of bits that must +be 1, 0, or don't care. The difference between '.' and '-' +is that '.' means that the bit will be covered with a field or a +final 0 or 1 from the pattern, and '-' means that the bit is really +ignored by the cpu and will not be specified. + +A *field_elt* describes a simple field only given a width; the position of +the field is implied by its position with respect to other *fixedbit_elt* +and *field_elt*. + +If any *fixedbit_elt* or *field_elt* appear, then all bits must be defined. +Padding with a *fixedbit_elt* of all '.' is an easy way to accomplish that. + +A *field_ref* incorporates a field by reference. This is the only way to +add a complex field to a format. A field may be renamed in the process +via assignment to another identifier. This is intended to allow the +same argument set be used with disjoint named fields. + +A single *args_ref* may specify an argument set to use for the format. +The set of fields in the format must be a subset of the arguments in +the argument set. If an argument set is not specified, one will be +inferred from the set of fields. + +It is recommended, but not required, that all *field_ref* and *args_ref* +appear at the end of the line, not interleaving with *fixedbit_elf* or +*field_elt*. + +Format examples:: + + @opr ...... ra:5 rb:5 ... 0 ....... rc:5 + @opi ...... ra:5 lit:8 1 ....... rc:5 + +Patterns +======== + +Syntax:: + + pat_def := identifier ( pat_elt )+ + pat_elt := fixedbit_elt | field_elt | field_ref | args_ref | fmt_ref | const_elt + fmt_ref := '@' identifier + const_elt := identifier '=' number + +The *fixedbit_elt* and *field_elt* specifiers are unchanged from formats. +A pattern that does not specify a named format will have one inferred +from a referenced argument set (if present) and the set of fields. + +A *const_elt* allows a argument to be set to a constant value. This may +come in handy when fields overlap between patterns and one has to +include the values in the *fixedbit_elt* instead. + +The decoder will call a translator function for each pattern matched. + +Pattern examples:: + + addl_r 010000 ..... ..... .... 0000000 ..... @opr + addl_i 010000 ..... ..... .... 0000000 ..... @opi + +which will, in part, invoke:: + + trans_addl_r(ctx, &arg_opr, insn) + +and:: + + trans_addl_i(ctx, &arg_opi, insn) diff --git a/scripts/decodetree.py b/scripts/decodetree.py index e342d278b8..ba203aeccd 100755 --- a/scripts/decodetree.py +++ b/scripts/decodetree.py @@ -17,139 +17,7 @@ # # Generate a decoding tree from a specification file. -# -# The tree is built from instruction "patterns". A pattern may represent -# a single architectural instruction or a group of same, depending on what -# is convenient for further processing. -# -# Each pattern has "fixedbits" & "fixedmask", the combination of which -# describes the condition under which the pattern is matched: -# -# (insn & fixedmask) == fixedbits -# -# Each pattern may have "fields", which are extracted from the insn and -# passed along to the translator. Examples of such are registers, -# immediates, and sub-opcodes. -# -# In support of patterns, one may declare fields, argument sets, and -# formats, each of which may be re-used to simplify further definitions. -# -# *** Field syntax: -# -# field_def := '%' identifier ( unnamed_field )+ ( !function=identifier )? -# unnamed_field := number ':' ( 's' ) number -# -# For unnamed_field, the first number is the least-significant bit position of -# the field and the second number is the length of the field. If the 's' is -# present, the field is considered signed. If multiple unnamed_fields are -# present, they are concatenated. In this way one can define disjoint fields. -# -# If !function is specified, the concatenated result is passed through the -# named function, taking and returning an integral value. -# -# FIXME: the fields of the structure into which this result will be stored -# is restricted to "int". Which means that we cannot expand 64-bit items. -# -# Field examples: -# -# %disp 0:s16 -- sextract(i, 0, 16) -# %imm9 16:6 10:3 -- extract(i, 16, 6) << 3 | extract(i, 10, 3) -# %disp12 0:s1 1:1 2:10 -- sextract(i, 0, 1) << 11 -# | extract(i, 1, 1) << 10 -# | extract(i, 2, 10) -# %shimm8 5:s8 13:1 !function=expand_shimm8 -# -- expand_shimm8(sextract(i, 5, 8) << 1 -# | extract(i, 13, 1)) -# -# *** Argument set syntax: -# -# args_def := '&' identifier ( args_elt )+ ( !extern )? -# args_elt := identifier -# -# Each args_elt defines an argument within the argument set. -# Each argument set will be rendered as a C structure "arg_$name" -# with each of the fields being one of the member arguments. -# -# If !extern is specified, the backing structure is assumed to -# have been already declared, typically via a second decoder. -# -# Argument set examples: -# -# ®3 ra rb rc -# &loadstore reg base offset -# -# *** Format syntax: -# -# fmt_def := '@' identifier ( fmt_elt )+ -# fmt_elt := fixedbit_elt | field_elt | field_ref | args_ref -# fixedbit_elt := [01.-]+ -# field_elt := identifier ':' 's'? number -# field_ref := '%' identifier | identifier '=' '%' identifier -# args_ref := '&' identifier -# -# Defining a format is a handy way to avoid replicating groups of fields -# across many instruction patterns. -# -# A fixedbit_elt describes a contiguous sequence of bits that must -# be 1, 0, [.-] for don't care. The difference between '.' and '-' -# is that '.' means that the bit will be covered with a field or a -# final [01] from the pattern, and '-' means that the bit is really -# ignored by the cpu and will not be specified. -# -# A field_elt describes a simple field only given a width; the position of -# the field is implied by its position with respect to other fixedbit_elt -# and field_elt. -# -# If any fixedbit_elt or field_elt appear then all bits must be defined. -# Padding with a fixedbit_elt of all '.' is an easy way to accomplish that. -# -# A field_ref incorporates a field by reference. This is the only way to -# add a complex field to a format. A field may be renamed in the process -# via assignment to another identifier. This is intended to allow the -# same argument set be used with disjoint named fields. -# -# A single args_ref may specify an argument set to use for the format. -# The set of fields in the format must be a subset of the arguments in -# the argument set. If an argument set is not specified, one will be -# inferred from the set of fields. -# -# It is recommended, but not required, that all field_ref and args_ref -# appear at the end of the line, not interleaving with fixedbit_elf or -# field_elt. -# -# Format examples: -# -# @opr ...... ra:5 rb:5 ... 0 ....... rc:5 -# @opi ...... ra:5 lit:8 1 ....... rc:5 -# -# *** Pattern syntax: -# -# pat_def := identifier ( pat_elt )+ -# pat_elt := fixedbit_elt | field_elt | field_ref -# | args_ref | fmt_ref | const_elt -# fmt_ref := '@' identifier -# const_elt := identifier '=' number -# -# The fixedbit_elt and field_elt specifiers are unchanged from formats. -# A pattern that does not specify a named format will have one inferred -# from a referenced argument set (if present) and the set of fields. -# -# A const_elt allows a argument to be set to a constant value. This may -# come in handy when fields overlap between patterns and one has to -# include the values in the fixedbit_elt instead. -# -# The decoder will call a translator function for each pattern matched. -# -# Pattern examples: -# -# addl_r 010000 ..... ..... .... 0000000 ..... @opr -# addl_i 010000 ..... ..... .... 0000000 ..... @opi -# -# which will, in part, invoke -# -# trans_addl_r(ctx, &arg_opr, insn) -# and -# trans_addl_i(ctx, &arg_opi, insn) +# See the syntax and semantics in docs/decodetree.rst. # import os From patchwork Sat Feb 23 23:29:50 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 159139 Delivered-To: patch@linaro.org Received: by 2002:a02:5cc1:0:0:0:0:0 with SMTP id w62csp477505jad; Sat, 23 Feb 2019 15:36:14 -0800 (PST) X-Google-Smtp-Source: AHgI3IZuFRlUxh6FQEslsI9ws0xgNPc4mx/ct96hi6yqAXR10fJxx3aKQ5RDJG5qsBfTuUTQoJrO X-Received: by 2002:a25:3341:: with SMTP id z62mr8802778ybz.239.1550964974137; Sat, 23 Feb 2019 15:36:14 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1550964974; cv=none; d=google.com; s=arc-20160816; b=SU3fE/I6vX7fS57KxGF4TRnkS6g2s023I6Lo0MROb1l7lWX8Vkt+vbO2mm3VVn0jBS zveStBhX9JW75Z4pLZdOHQzDjVpRcSk6MsOjeNJI6rB9BkGAqgyGi3PphyGAQLZE8Weq VOJSrYbG7n9/xqhtF9Q/9RZhKXEaKy1qrJbW+/aBQf2ZMluYALpNR7oTERdLmUxpHfBu t/VmbZ58UWkqi5BAUrIk/PYLEHJJdHmhm1QQmXm/yzyyYEQ+A/+BMjH+yvXsTvevt2nm tqWaTvaQyxfT+Xn2ZDrrg6FNpYew9XZVD67HmsDrlePjirgWvw5TBJvcRgzO7KCCAcST 8I7w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:subject :content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:to:from:dkim-signature; bh=v8huWsBakhsX960GFeyqPdvKD/KHeC+sZiyDbO2s4Ps=; b=H7Kmjobk1heABy2gTWCLElEGQi3junYuqGvSP8FntPuTonpfAahMCYlVC8lzFGi8pz 64WDhYBrZfOVM7+57jVpzydzxMLhlxzWzUJwpjFEDmxsS+fynCISaVkDnD8ePjZbo42l irKBlP72jOGuhNXOqWrYseu54h1x9ktCWTiMyl9D0BoQ0AquL5tgv2nDhq60q7EspgCM 75CsN3ILhLX1ijvXNbqiC1j6/eYs/Phvx7msDNOLEfTuu5/opVdRQHgMkloNgbf3dSsO tNZTzMKsYsQ7bGb3JHYxOTpXHhOG86mXOos92MEXyr+ynMauf8Ei9IE3r7waLo0zve3j NUVQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=THgSBQHy; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[97.113.188.82]) by smtp.gmail.com with ESMTPSA id n1sm13214842pfi.123.2019.02.23.15.29.59 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Sat, 23 Feb 2019 15:29:59 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Date: Sat, 23 Feb 2019 15:29:50 -0800 Message-Id: <20190223232954.7185-4-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.2 In-Reply-To: <20190223232954.7185-1-richard.henderson@linaro.org> References: <20190223232954.7185-1-richard.henderson@linaro.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::62c Subject: [Qemu-devel] [PATCH 3/5] decodetree: Ensure build_tree does not include values outside insnmask X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: kbastian@mail.uni-paderborn.de, f4bug@amsat.org Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Philippe Mathieu-Daudé Reproduced with "scripts/decodetree.py /dev/null". Reviewed-by: Eduardo Habkost Signed-off-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson --- scripts/decodetree.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- 2.17.2 Reviewed-by: Bastian Koppelmann diff --git a/scripts/decodetree.py b/scripts/decodetree.py index ba203aeccd..fb9a0ab3ad 100755 --- a/scripts/decodetree.py +++ b/scripts/decodetree.py @@ -784,7 +784,7 @@ class Tree: def build_tree(pats, outerbits, outermask): # Find the intersection of all remaining fixedmask. - innermask = ~outermask + innermask = ~outermask & insnmask for i in pats: innermask &= i.fixedmask From patchwork Sat Feb 23 23:29:51 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 159138 Delivered-To: patch@linaro.org Received: by 2002:a02:5cc1:0:0:0:0:0 with SMTP id w62csp476507jad; Sat, 23 Feb 2019 15:34:10 -0800 (PST) X-Google-Smtp-Source: AHgI3IaChTq0o5IJChN7Pth9b/PDvZt01EexYxy4DAjB0IBOozZNWQ4KLm+zy5GgxvDwfUk4ULug X-Received: by 2002:a25:b198:: with SMTP id h24mr9075838ybj.177.1550964850179; Sat, 23 Feb 2019 15:34:10 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1550964850; cv=none; d=google.com; s=arc-20160816; b=NmjlwPIB54S+IBxB8AYH67cOMdylg0KTRMMIpJ9wypE2guISw3iZm5OUkQQoOMroQ4 uMiixeQ0PTmJCOPxE2+0tyZv2+LMq20Q/JV4wgngMBgFRl8sIwyLAgXGJhaa+f+50iHA VGzfIlhHYL6pwISP/WQVYyQGFZEPWm5YZe4CV87iPNxqWlkMsbaHh1+zoK7gJcVohpuP 2kCPpKp1ECUk6C/ZDKipjp/Dr/jDJoHJdPSLNYTpZ8nbXcWTfmDHCHfei6iKGMUcrAG/ d2gVa1Zeoiu4OW8bgxwFEC7+Zp26Av4tLiF4n/ENEVVKDdqmfMeauGk2o74ozK5077Fg P/gw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:subject:references:in-reply-to :message-id:date:to:from:dkim-signature; bh=jjG9f/cUPlGsuspqa1NpIrIE0Dj9kdzyNpmBX1Qf7Vs=; b=w9JvH+s1twatjMxp1j8Nu/8duqoLcLn8AH/zM1D+nJEbLvEr2Cv/GvVSpP3cxjdrI/ HQrlZT1xSxi6bpuucFngjxl5fXaJQxjbrw+Ey5q+FHkuw57j4htKeyYk5d7nIq22oi/o 57dl+UEJ79MPKoiTMS5u5TAmJ2OZO5WJt7BLvXIZjjQANAqeNbgyPkVt5Is1x/ANqWf8 yMBzScxOYX12ETdzNaD3bFgPdqWN/l8sr6fPgu1TFl6GFGbXbRDlOjU8eGeI/CMbghMV UMduB1y0oR714D3aIsIu0t0BR6qS3iHPHM6IB9pzzlNC3xUUJ/haWt/J/oXbHfIyTa+H mgXQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=psod3pjh; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[97.113.188.82]) by smtp.gmail.com with ESMTPSA id n1sm13214842pfi.123.2019.02.23.15.30.00 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Sat, 23 Feb 2019 15:30:01 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Date: Sat, 23 Feb 2019 15:29:51 -0800 Message-Id: <20190223232954.7185-5-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.2 In-Reply-To: <20190223232954.7185-1-richard.henderson@linaro.org> References: <20190223232954.7185-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::433 Subject: [Qemu-devel] [PATCH 4/5] decodetree: Do not unconditionaly return from Pattern.output_code X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: kbastian@mail.uni-paderborn.de, f4bug@amsat.org Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" As a consequence, the 'return false' gets pushed up one level. This will allow us to perform some other action when the translator returns failure. Signed-off-by: Richard Henderson --- scripts/decodetree.py | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) -- 2.17.2 Tested-by: Philippe Mathieu-Daudé Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Bastian Koppelmann diff --git a/scripts/decodetree.py b/scripts/decodetree.py index fb9a0ab3ad..dd495096fc 100755 --- a/scripts/decodetree.py +++ b/scripts/decodetree.py @@ -348,8 +348,8 @@ class Pattern(General): output(ind, self.base.extract_name(), '(&u.f_', arg, ', insn);\n') for n, f in self.fields.items(): output(ind, 'u.f_', arg, '.', n, ' = ', f.str_extract(), ';\n') - output(ind, 'return ', translate_prefix, '_', self.name, - '(ctx, &u.f_', arg, ');\n') + output(ind, 'if (', translate_prefix, '_', self.name, + '(ctx, &u.f_', arg, ')) return true;\n') # end Pattern @@ -777,8 +777,8 @@ class Tree: output(ind, ' /* ', str_match_bits(innerbits, innermask), ' */\n') s.output_code(i + 4, extracted, innerbits, innermask) + output(ind, ' return false;\n') output(ind, '}\n') - output(ind, 'return false;\n') # end Tree @@ -932,6 +932,7 @@ def main(): output(i4, '} u;\n\n') t.output_code(4, False, 0, 0) + output(i4, 'return false;\n') output('}\n') From patchwork Sat Feb 23 23:29:52 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 159140 Delivered-To: patch@linaro.org Received: by 2002:a02:5cc1:0:0:0:0:0 with SMTP id w62csp477757jad; Sat, 23 Feb 2019 15:36:43 -0800 (PST) X-Google-Smtp-Source: AHgI3IZwCQg93muel/GqzLnceAUv6zNJ567tMFCHFASSDN5n64pIgpwBcH6tsg7nfO5oNLTlq/Pf X-Received: by 2002:a0d:ecd2:: with SMTP id v201mr8366899ywe.96.1550965003309; Sat, 23 Feb 2019 15:36:43 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1550965003; cv=none; d=google.com; s=arc-20160816; b=jxYOSCCbFdy/hhUHuXg72y2E3wFjVWYz3q3a/K8+kzoLHxEC8Z/YtHJjKvcudjVe0N A5E0q4YnDQot2QmduOWcl+i0SvvDDAZW+UAYfqig18e+ltcooEuNd5RDK04AYDak9S4r DRmewabEewLRs+2at6ub8fDT/xcN48bHFPfE5lalN88+Aft0HPHAeU5HIBhOIUp3ba1E xTLNTCHyfgUZQ58d5DspGu3pFIfi0uRVnrsz1nCYw+4adIImyRLK1fs3f3pioenUYlQ7 jjPM3kkh7I5XnBgQzjS4ntNh9dJ515pyVCUmcFMhye7ZLGj9n6FPV6B1CU2d3YCeDCVl TrsA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:subject:references:in-reply-to :message-id:date:to:from:dkim-signature; bh=vDT4qdGCChfvYo8MTh4ScxaHuIyJTWKaydd3SYXdkkI=; b=DyeQEYZoggtU/U7I7SEs8+N6663uKBuz4Kh3XbdsqtLWZK13ZkOJKJ8LgUePctm7l3 JCzEo+dEA8ualCykwmYZ2loykH3cwtaJcwCvYN/KrnkEOqSQmL1E7gCy/lxIxi8r3z+D e1pkylixrjFIHVmBB2u8JtpFFh4DoGBp2bBBrp4pRKaxXf+PuLJuAU5uQzA+gnewK++X sDNKbRTwjFjURNt6cvzb9XP2/vIbEYjdZZTu8kmcnhi/lmH6AZp5Hfi+R/sdmdvTRowe RhVn9NzCEFU/ZApPyyA5whER67hcwgQhxNOiO8AK2DQ+/4l+ZNS+uKp2V/pSswEERnPV 85Jg== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=sUZUBbSJ; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[97.113.188.82]) by smtp.gmail.com with ESMTPSA id n1sm13214842pfi.123.2019.02.23.15.30.01 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Sat, 23 Feb 2019 15:30:02 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Date: Sat, 23 Feb 2019 15:29:52 -0800 Message-Id: <20190223232954.7185-6-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.2 In-Reply-To: <20190223232954.7185-1-richard.henderson@linaro.org> References: <20190223232954.7185-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::542 Subject: [Qemu-devel] [PATCH 5/5] decodetree: Allow grouping of overlapping patterns X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: kbastian@mail.uni-paderborn.de, f4bug@amsat.org Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Signed-off-by: Richard Henderson --- docs/decodetree.rst | 58 +++++++++++++++++ scripts/decodetree.py | 144 ++++++++++++++++++++++++++++++++++++++---- 2 files changed, 191 insertions(+), 11 deletions(-) -- 2.17.2 diff --git a/docs/decodetree.rst b/docs/decodetree.rst index d9be30b2db..391069c105 100644 --- a/docs/decodetree.rst +++ b/docs/decodetree.rst @@ -154,3 +154,61 @@ which will, in part, invoke:: and:: trans_addl_i(ctx, &arg_opi, insn) + +Pattern Groups +============== + +Syntax:: + + group := '{' ( pat_def | group )+ '}' + +A *group* begins with a lone open-brace, with all subsequent lines +indented two spaces, and ending with a lone close-brace. Groups +may be nested, increasing the required indentation of the lines +within the nested group to two spaces per nesting level. + +Unlike ungrouped patterns, grouped patterns are allowed to overlap. +Conflicts are resolved by selecting the patterns in order. If all +of the fixedbits for a pattern match, its translate function will +be called. If the translate function returns false, then subsequent +patterns within the group will be matched. + +The following example from PA-RISC shows specialization of the *or* +instruction:: + + { + { + nop 000010 ----- ----- 0000 001001 0 00000 + copy 000010 00000 r1:5 0000 001001 0 rt:5 + } + or 000010 r2:5 r1:5 cf:4 001001 0 rt:5 + } + +When the *cf* field is zero, the instruction has no side effects, +and may be specialized. When the *rt* field is zero, the output +is discarded and so the instruction has no effect. When the *rt2* +field is zero, the operation is ``reg[rt] | 0`` and so encodes +the canonical register copy operation. + +The output from the generator might look like:: + + switch (insn & 0xfc000fe0) { + case 0x08000240: + /* 000010.. ........ ....0010 010..... */ + if ((insn & 0x0000f000) == 0x00000000) { + /* 000010.. ........ 00000010 010..... */ + if ((insn & 0x0000001f) == 0x00000000) { + /* 000010.. ........ 00000010 01000000 */ + extract_decode_Fmt_0(&u.f_decode0, insn); + if (trans_nop(ctx, &u.f_decode0)) return true; + } + if ((insn & 0x03e00000) == 0x00000000) { + /* 00001000 000..... 00000010 010..... */ + extract_decode_Fmt_1(&u.f_decode1, insn); + if (trans_copy(ctx, &u.f_decode1)) return true; + } + } + extract_decode_Fmt_2(&u.f_decode2, insn); + if (trans_or(ctx, &u.f_decode2)) return true; + return false; + } diff --git a/scripts/decodetree.py b/scripts/decodetree.py index dd495096fc..abce58ed8f 100755 --- a/scripts/decodetree.py +++ b/scripts/decodetree.py @@ -31,6 +31,7 @@ fields = {} arguments = {} formats = {} patterns = [] +allpatterns = [] translate_prefix = 'trans' translate_scope = 'static ' @@ -353,6 +354,46 @@ class Pattern(General): # end Pattern +class MultiPattern(General): + """Class representing an overlapping set of instruction patterns""" + + def __init__(self, lineno, pats, fixb, fixm, udfm): + self.lineno = lineno + self.pats = pats + self.base = None + self.fixedbits = fixb + self.fixedmask = fixm + self.undefmask = udfm + + def __str__(self): + r = "{" + for p in self.pats: + r = r + ' ' + str(p) + return r + "}" + + def output_decl(self): + for p in self.pats: + p.output_decl() + + def output_code(self, i, extracted, outerbits, outermask): + global translate_prefix + ind = str_indent(i) + for p in self.pats: + if outermask != p.fixedmask: + innermask = p.fixedmask & ~outermask + innerbits = p.fixedbits & ~outermask + output(ind, 'if ((insn & ', + '0x{0:08x}) == 0x{1:08x}'.format(innermask, innerbits), + ') {\n') + output(ind, ' /* ', + str_match_bits(p.fixedbits, p.fixedmask), ' */\n') + p.output_code(i + 4, extracted, p.fixedbits, p.fixedmask) + output(ind, '}\n') + else: + p.output_code(i, extracted, p.fixedbits, p.fixedmask) +#end MultiPattern + + def parse_field(lineno, name, toks): """Parse one instruction field from TOKS at LINENO""" global fields @@ -505,6 +546,7 @@ def parse_generic(lineno, is_format, name, toks): global arguments global formats global patterns + global allpatterns global re_ident global insnwidth global insnmask @@ -649,6 +691,7 @@ def parse_generic(lineno, is_format, name, toks): pat = Pattern(name, lineno, fmt, fixedbits, fixedmask, undefmask, fieldmask, flds) patterns.append(pat) + allpatterns.append(pat) # Validate the masks that we have assembled. if fieldmask & fixedmask: @@ -667,17 +710,61 @@ def parse_generic(lineno, is_format, name, toks): .format(allbits ^ insnmask)) # end parse_general +def build_multi_pattern(lineno, pats): + """Validate the Patterns going into a MultiPattern.""" + global patterns + global insnmask + + if len(pats) < 2: + error(lineno, 'less than two patterns within braces') + + fixedmask = insnmask + undefmask = insnmask + + for p in pats: + fixedmask &= p.fixedmask + undefmask &= p.undefmask + if p.lineno < lineno: + lineno = p.lineno + + if fixedmask == 0: + error(lineno, 'no overlap in patterns within braces') + + fixedbits = None + for p in pats: + thisbits = p.fixedbits & fixedmask + if fixedbits is None: + fixedbits = thisbits + elif fixedbits != thisbits: + error(p.lineno, 'fixedbits mismatch within braces', + '(0x{0:08x} != 0x{1:08x})'.format(thisbits, fixedbits)) + + mp = MultiPattern(lineno, pats, fixedbits, fixedmask, undefmask) + patterns.append(mp) +# end build_multi_pattern def parse_file(f): """Parse all of the patterns within a file""" + global patterns + # Read all of the lines of the file. Concatenate lines # ending in backslash; discard empty lines and comments. toks = [] lineno = 0 + nesting = 0 + saved_pats = [] + for line in f: lineno += 1 + # Expand and strip spaces, to find indent. + line = line.rstrip() + line = line.expandtabs() + len1 = len(line) + line = line.lstrip() + len2 = len(line) + # Discard comments end = line.find('#') if end >= 0: @@ -687,10 +774,18 @@ def parse_file(f): if len(toks) != 0: # Next line after continuation toks.extend(t) - elif len(t) == 0: - # Empty line - continue else: + # Allow completely blank lines. + if len1 == 0: + continue + indent = len1 - len2 + # Empty line due to comment. + if len(t) == 0: + # Indentation must be correct, even for comment lines. + if indent != nesting: + error(lineno, 'indentation ', indent, ' != ', nesting) + continue + start_lineno = lineno toks = t # Continuation? @@ -698,21 +793,47 @@ def parse_file(f): toks.pop() continue - if len(toks) < 2: - error(lineno, 'short line') - name = toks[0] del toks[0] + # End nesting? + if name == '}': + if nesting == 0: + error(start_lineno, 'mismatched close brace') + if len(toks) != 0: + error(start_lineno, 'extra tokens after close brace') + nesting -= 2 + if indent != nesting: + error(start_lineno, 'indentation ', indent, ' != ', nesting) + pats = patterns + patterns = saved_pats.pop() + build_multi_pattern(lineno, pats) + toks = [] + continue + + # Everything else should have current indentation. + if indent != nesting: + error(start_lineno, 'indentation ', indent, ' != ', nesting) + + # Start nesting? + if name == '{': + if len(toks) != 0: + error(start_lineno, 'extra tokens after open brace') + saved_pats.append(patterns) + patterns = [] + nesting += 2 + toks = [] + continue + # Determine the type of object needing to be parsed. if name[0] == '%': - parse_field(lineno, name[1:], toks) + parse_field(start_lineno, name[1:], toks) elif name[0] == '&': - parse_arguments(lineno, name[1:], toks) + parse_arguments(start_lineno, name[1:], toks) elif name[0] == '@': - parse_generic(lineno, True, name[1:], toks) + parse_generic(start_lineno, True, name[1:], toks) else: - parse_generic(lineno, False, name, toks) + parse_generic(start_lineno, False, name, toks) toks = [] # end parse_file @@ -846,6 +967,7 @@ def main(): global arguments global formats global patterns + global allpatterns global translate_scope global translate_prefix global output_fd @@ -907,7 +1029,7 @@ def main(): # Make sure that the argument sets are the same, and declare the # function only once. out_pats = {} - for i in patterns: + for i in allpatterns: if i.name in out_pats: p = out_pats[i.name] if i.base.base != p.base.base: From patchwork Sat Feb 23 23:29:53 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 159135 Delivered-To: patch@linaro.org Received: by 2002:a02:5cc1:0:0:0:0:0 with SMTP id w62csp476226jad; Sat, 23 Feb 2019 15:33:38 -0800 (PST) X-Google-Smtp-Source: AHgI3IYu5eQB3xZ45sd2py4YluUXj8cMwwfsuPD1PiV5HE8DqR6Q9JPiwxrYrrXa5RI2z9zO7dke X-Received: by 2002:a0d:ecd2:: with SMTP id v201mr8362178ywe.96.1550964818343; Sat, 23 Feb 2019 15:33:38 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1550964818; cv=none; d=google.com; s=arc-20160816; b=MSjNMG3DdG8tpv1KiJEVDIuG/QdBQBV0uMVGgWGFjVgaxa5xhLiM5TtEoGwp10hk1x XZdyW8fbXMG+mMmadrQV0GmzRFv4Zx8IAw/8uzomBoVadgdtQ6FfJKlcU38mo0YL0oD+ OC8P7lDK9ZFyz0R7r9AhyhNvHMQcQ6iSv38icsMJwnZZ9rJ4kCaECCe1K0NOSmbaSXP5 g/7RJFNtpN/Pc8h1OQT/UzwcIIzz6A53ODgTlFNC92x2L1HFa255l8gP627HJr+E8v/L fC8GH7DrvHMXdW2BpVZqB/LNpQ+8BM7UvNWiR/5uhRJVJoupcL2YPRTt6oXAyV1UC2GN AQsA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:subject:references:in-reply-to :message-id:date:to:from:dkim-signature; bh=xHXkXT6lJgVBbNX0LyuxrSI32KVu1StCWGgAmzm2ig0=; b=GXlJ7Q+yfS24B12Rv3U2fvo2hy3TdeV7nXqhkQEGIe06BsF9YPa7wN3WNpktfZi8/N u1R6taz/fFjjIpGEppnSsO5YuiYxLbFoQYb9ob9aI7bXsEJdTCMmWE2fLfXUdFLs4nru 7o+0iPIZDvTxiyIpuqP0HX1hhLDfQtjgccndhNi8v98xutqPjt1ExtPyBjoPQeXOcrzK CKycqhhqBSs7XGJyCwkToHt4JwRHTpoCTuJ0wgbmGs90iFyeVg8NlRkzSt41ebzsGJPb O+nA4omBk12vCaAHcGi4ol5HWGOYLTLGSauFj63OibnnCVfggrmSvv/BdbexmPlY5IpG JNQw== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=J9P8VipO; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[97.113.188.82]) by smtp.gmail.com with ESMTPSA id n1sm13214842pfi.123.2019.02.23.15.30.02 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Sat, 23 Feb 2019 15:30:03 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Date: Sat, 23 Feb 2019 15:29:53 -0800 Message-Id: <20190223232954.7185-7-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.2 In-Reply-To: <20190223232954.7185-1-richard.henderson@linaro.org> References: <20190223232954.7185-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::534 Subject: [Qemu-devel] [RFC 6/7] target/hppa: Use pattern groups to decode OR X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: kbastian@mail.uni-paderborn.de, f4bug@amsat.org Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" It seems clearer to decode specializations of OR within decodetree instead of by hand within the translation function. Signed-off-by: Richard Henderson --- target/hppa/translate.c | 106 ++++++++++++++++++++------------------- target/hppa/insns.decode | 10 +++- 2 files changed, 64 insertions(+), 52 deletions(-) -- 2.17.2 diff --git a/target/hppa/translate.c b/target/hppa/translate.c index b4fd307b77..8f5010b633 100644 --- a/target/hppa/translate.c +++ b/target/hppa/translate.c @@ -2619,59 +2619,63 @@ static bool trans_and(DisasContext *ctx, arg_rrr_cf *a) return do_log_reg(ctx, a, tcg_gen_and_reg); } +static bool trans_copy(DisasContext *ctx, arg_copy *a) +{ + unsigned r = a->r; + unsigned t = a->t; + + if (r == 0) { + TCGv_reg dest = dest_gpr(ctx, t); + tcg_gen_movi_reg(dest, 0); + save_gpr(ctx, t, dest); + } else { + save_gpr(ctx, t, cpu_gr[r]); + } + cond_free(&ctx->null_cond); + return true; +} + +static bool trans_pause(DisasContext *ctx, arg_pause *a) +{ +#ifndef CONFIG_USER_ONLY + /* + * These are QEMU extensions and are nops in the real architecture: + * + * or %r10,%r10,%r10 -- idle loop; wait for interrupt + * or %r31,%r31,%r31 -- death loop; offline cpu + * currently implemented as idle. + */ + TCGv_i32 tmp; + + /* + * No need to check for supervisor, as userland can only pause + * until the next timer interrupt. + */ + nullify_over(ctx); + + /* Advance the instruction queue. */ + copy_iaoq_entry(cpu_iaoq_f, ctx->iaoq_b, cpu_iaoq_b); + copy_iaoq_entry(cpu_iaoq_b, ctx->iaoq_n, ctx->iaoq_n_var); + nullify_set(ctx, 0); + + /* Tell the qemu main loop to halt until this cpu has work. */ + tmp = tcg_const_i32(1); + tcg_gen_st_i32(tmp, cpu_env, -offsetof(HPPACPU, env) + + offsetof(CPUState, halted)); + tcg_temp_free_i32(tmp); + gen_excp_1(EXCP_HALTED); + ctx->base.is_jmp = DISAS_NORETURN; + + return nullify_end(ctx); +#else + /* For user-only, don't pause but treat as nop. */ + cond_free(&ctx->null_cond); + return true; +#endif +} + static bool trans_or(DisasContext *ctx, arg_rrr_cf *a) { - if (a->cf == 0) { - unsigned r2 = a->r2; - unsigned r1 = a->r1; - unsigned rt = a->t; - - if (rt == 0) { /* NOP */ - cond_free(&ctx->null_cond); - return true; - } - if (r2 == 0) { /* COPY */ - if (r1 == 0) { - TCGv_reg dest = dest_gpr(ctx, rt); - tcg_gen_movi_reg(dest, 0); - save_gpr(ctx, rt, dest); - } else { - save_gpr(ctx, rt, cpu_gr[r1]); - } - cond_free(&ctx->null_cond); - return true; - } -#ifndef CONFIG_USER_ONLY - /* These are QEMU extensions and are nops in the real architecture: - * - * or %r10,%r10,%r10 -- idle loop; wait for interrupt - * or %r31,%r31,%r31 -- death loop; offline cpu - * currently implemented as idle. - */ - if ((rt == 10 || rt == 31) && r1 == rt && r2 == rt) { /* PAUSE */ - TCGv_i32 tmp; - - /* No need to check for supervisor, as userland can only pause - until the next timer interrupt. */ - nullify_over(ctx); - - /* Advance the instruction queue. */ - copy_iaoq_entry(cpu_iaoq_f, ctx->iaoq_b, cpu_iaoq_b); - copy_iaoq_entry(cpu_iaoq_b, ctx->iaoq_n, ctx->iaoq_n_var); - nullify_set(ctx, 0); - - /* Tell the qemu main loop to halt until this cpu has work. */ - tmp = tcg_const_i32(1); - tcg_gen_st_i32(tmp, cpu_env, -offsetof(HPPACPU, env) + - offsetof(CPUState, halted)); - tcg_temp_free_i32(tmp); - gen_excp_1(EXCP_HALTED); - ctx->base.is_jmp = DISAS_NORETURN; - - return nullify_end(ctx); - } -#endif - } return do_log_reg(ctx, a, tcg_gen_or_reg); } diff --git a/target/hppa/insns.decode b/target/hppa/insns.decode index 55ff39dd05..46c64334d1 100644 --- a/target/hppa/insns.decode +++ b/target/hppa/insns.decode @@ -148,7 +148,15 @@ lci 000001 ----- ----- -- 01001100 0 t:5 andcm 000010 ..... ..... .... 000000 0 ..... @rrr_cf and 000010 ..... ..... .... 001000 0 ..... @rrr_cf -or 000010 ..... ..... .... 001001 0 ..... @rrr_cf +{ + { + nop 000010 ----- ----- 0000 001001 0 00000 + copy 000010 00000 r:5 0000 001001 0 t:5 + pause 000010 01010 01010 0000 001001 0 01010 + pause 000010 11111 11111 0000 001001 0 11111 + } + or 000010 ..... ..... .... 001001 0 ..... @rrr_cf +} xor 000010 ..... ..... .... 001010 0 ..... @rrr_cf uxor 000010 ..... ..... .... 001110 0 ..... @rrr_cf ds 000010 ..... ..... .... 010001 0 ..... @rrr_cf From patchwork Sat Feb 23 23:29:54 2019 Content-Type: text/plain; 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[97.113.188.82]) by smtp.gmail.com with ESMTPSA id n1sm13214842pfi.123.2019.02.23.15.30.04 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Sat, 23 Feb 2019 15:30:04 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Date: Sat, 23 Feb 2019 15:29:54 -0800 Message-Id: <20190223232954.7185-8-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.2 In-Reply-To: <20190223232954.7185-1-richard.henderson@linaro.org> References: <20190223232954.7185-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::42d Subject: [Qemu-devel] [RFC 7/7] target/riscv: Use pattern groups for RVC X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: kbastian@mail.uni-paderborn.de, f4bug@amsat.org Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Signed-off-by: Richard Henderson --- target/riscv/insn_trans/trans_rvc.inc.c | 60 +++++++++---------------- target/riscv/insn16.decode | 23 +++++++--- target/riscv/insn32.decode | 18 ++++---- 3 files changed, 48 insertions(+), 53 deletions(-) -- 2.17.2 diff --git a/target/riscv/insn_trans/trans_rvc.inc.c b/target/riscv/insn_trans/trans_rvc.inc.c index 631e72c8b5..a81da2f107 100644 --- a/target/riscv/insn_trans/trans_rvc.inc.c +++ b/target/riscv/insn_trans/trans_rvc.inc.c @@ -48,24 +48,6 @@ static bool trans_c_li(DisasContext *ctx, arg_c_li *a) return trans_addi(ctx, &arg); } -static bool trans_c_addi16sp_lui(DisasContext *ctx, arg_c_addi16sp_lui *a) -{ - if (a->rd == 2) { - /* C.ADDI16SP */ - arg_addi arg = { .rd = 2, .rs1 = 2, .imm = a->imm_addi16sp }; - return trans_addi(ctx, &arg); - } else if (a->imm_lui != 0) { - /* C.LUI */ - if (a->rd == 0) { - /* Hint: insn is valid but does not affect state */ - return true; - } - arg_lui arg = { .rd = a->rd, .imm = a->imm_lui }; - return trans_lui(ctx, &arg); - } - return false; -} - static bool trans_c_srli(DisasContext *ctx, arg_c_srli *a) { int shamt = a->shamt; @@ -114,36 +96,38 @@ static bool trans_c_slli(DisasContext *ctx, arg_c_slli *a) return trans_slli(ctx, &arg); } -static bool trans_c_jr_mv(DisasContext *ctx, arg_c_jr_mv *a) +static bool trans_c_jr(DisasContext *ctx, arg_c_jr *a) { - if (a->rd != 0 && a->rs2 == 0) { - /* C.JR */ + if (a->rd != 0) { arg_jalr arg = { .rd = 0, .rs1 = a->rd, .imm = 0 }; return trans_jalr(ctx, &arg); - } else if (a->rd != 0 && a->rs2 != 0) { - /* C.MV */ + } + return false; +} + +static bool trans_c_mv(DisasContext *ctx, arg_c_mv *a) +{ + if (a->rd != 0 && a->rs2 != 0) { arg_add arg = { .rd = a->rd, .rs1 = 0, .rs2 = a->rs2 }; return trans_add(ctx, &arg); } return false; } -static bool trans_c_ebreak_jalr_add(DisasContext *ctx, arg_c_ebreak_jalr_add *a) +static bool trans_c_jalr(DisasContext *ctx, arg_c_jalr *a) { - if (a->rd == 0 && a->rs2 == 0) { - /* C.EBREAK */ - arg_ebreak arg = { }; - return trans_ebreak(ctx, &arg); - } else if (a->rd != 0) { - if (a->rs2 == 0) { - /* C.JALR */ - arg_jalr arg = { .rd = 1, .rs1 = a->rd, .imm = 0 }; - return trans_jalr(ctx, &arg); - } else { - /* C.ADD */ - arg_add arg = { .rd = a->rd, .rs1 = a->rd, .rs2 = a->rs2 }; - return trans_add(ctx, &arg); - } + if (a->rd != 0) { + arg_jalr arg = { .rd = 1, .rs1 = a->rd, .imm = 0 }; + return trans_jalr(ctx, &arg); + } + return false; +} + +static bool trans_c_add(DisasContext *ctx, arg_c_add *a) +{ + if (a->rd != 0 && a->rs2 != 0) { + arg_add arg = { .rd = a->rd, .rs1 = a->rd, .rs2 = a->rs2 }; + return trans_add(ctx, &arg); } return false; } diff --git a/target/riscv/insn16.decode b/target/riscv/insn16.decode index d88a0c78ab..5b93051a19 100644 --- a/target/riscv/insn16.decode +++ b/target/riscv/insn16.decode @@ -42,11 +42,13 @@ # Argument sets imported from insn32.decode: +&empty !extern &r rd rs1 rs2 !extern &i imm rs1 rd !extern &s imm rs1 rs2 !extern &j imm rd !extern &b imm rs2 rs1 !extern +&u imm rd !extern # Argument sets: &ci imm rd @@ -55,8 +57,6 @@ &cr rd rs2 &c_shift shamt rd -&c_addi16sp_lui imm_lui imm_addi16sp rd - # Formats 16: @cr .... ..... ..... .. &cr rs2=%rs2_5 %rd @ci ... . ..... ..... .. &i imm=%imm_ci %rd rs1=%rd @@ -74,8 +74,6 @@ @c_sd ... . ..... ..... .. &s imm=%uimm_6bit_sd rs1=2 rs2=%rs2_5 @c_sw ... . ..... ..... .. &s imm=%uimm_6bit_sw rs1=2 rs2=%rs2_5 -@c_addi16sp_lui ... . ..... ..... .. &c_addi16sp_lui %imm_lui %imm_addi16sp %rd - @c_shift ... . .. ... ..... .. &c_shift rd=%rs1_3 shamt=%nzuimm_6bit @c_shift2 ... . .. ... ..... .. &c_shift rd=%rd shamt=%nzuimm_6bit @@ -92,7 +90,11 @@ sw 110 ... ... .. ... 00 @cs_w # *** RV64C Standard Extension (Quadrant 1) *** c_addi 000 . ..... ..... 01 @ci c_li 010 . ..... ..... 01 @ci -c_addi16sp_lui 011 . ..... ..... 01 @c_addi16sp_lui # shares opc with C.LUI +{ + # addi16sp + addi 011 . 00010 ..... 01 &i rd=2 rs1=2 imm=%imm_addi16sp + lui 011 . ..... ..... 01 &u %rd imm=%imm_lui +} c_srli 100 . 00 ... ..... 01 @c_shift c_srai 100 . 01 ... ..... 01 @c_shift andi 100 . 10 ... ..... 01 @c_andi @@ -108,7 +110,14 @@ bne 111 ... ... ..... 01 @cb # c_bnez c_slli 000 . ..... ..... 10 @c_shift2 fld 001 . ..... ..... 10 @c_ld # fldsp lw 010 . ..... ..... 10 @c_lw # lwsp -c_jr_mv 100 0 ..... ..... 10 @cr -c_ebreak_jalr_add 100 1 ..... ..... 10 @cr +{ + c_jr 100 0 ..... 00000 10 %rd + c_mv 100 0 ..... ..... 10 @cr +} +{ + ebreak 100 1 00000 00000 10 + c_jalr 100 1 ..... 00000 10 %rd + c_add 100 1 ..... ..... 10 @cr +} fsd 101 ...... ..... 10 @c_sd # fsdsp sw 110 . ..... ..... 10 @c_sw # swsp diff --git a/target/riscv/insn32.decode b/target/riscv/insn32.decode index 0e098e05fe..81bcb5dbb4 100644 --- a/target/riscv/insn32.decode +++ b/target/riscv/insn32.decode @@ -34,20 +34,22 @@ %imm_u 12:s20 !function=ex_shift_12 # Argument sets: -&b imm rs2 rs1 -&i imm rs1 rd -&r rd rs1 rs2 -&s imm rs2 rs1 -&j imm rd -&shift shamt rs1 rd -&atomic aq rl rs2 rs1 rd +&empty +&b imm rs2 rs1 +&i imm rs1 rd +&r rd rs1 rs2 +&s imm rs2 rs1 +&j imm rd +&u imm rd +&shift shamt rs1 rd +&atomic aq rl rs2 rs1 rd # Formats 32: @r ....... ..... ..... ... ..... ....... &r %rs2 %rs1 %rd @i ............ ..... ... ..... ....... &i imm=%imm_i %rs1 %rd @b ....... ..... ..... ... ..... ....... &b imm=%imm_b %rs2 %rs1 @s ....... ..... ..... ... ..... ....... &s imm=%imm_s %rs2 %rs1 -@u .................... ..... ....... imm=%imm_u %rd +@u .................... ..... ....... &u imm=%imm_u %rd @j .................... ..... ....... &j imm=%imm_j %rd @sh ...... ...... ..... ... ..... ....... &shift shamt=%sh10 %rs1 %rd