From patchwork Tue Oct 11 12:25:03 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Aakarsh Jain X-Patchwork-Id: 614708 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 20BB9C4332F for ; Wed, 12 Oct 2022 03:47:51 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229604AbiJLDrt (ORCPT ); Tue, 11 Oct 2022 23:47:49 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46462 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229586AbiJLDri (ORCPT ); Tue, 11 Oct 2022 23:47:38 -0400 Received: from mailout3.samsung.com (mailout3.samsung.com [203.254.224.33]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 22289796BE for ; Tue, 11 Oct 2022 20:47:37 -0700 (PDT) Received: from epcas5p3.samsung.com (unknown [182.195.41.41]) by mailout3.samsung.com (KnoxPortal) with ESMTP id 20221012034735epoutp03b049a4cf5828ba6746423d45155e4326~dNa1DCI0k2700027000epoutp03L for ; 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Wed, 12 Oct 2022 12:47:31 +0900 (KST) Received: from epsmtrp1.samsung.com (unknown [182.195.40.13]) by epcas5p4.samsung.com (KnoxPortal) with ESMTPA id 20221011125145epcas5p4f9d2656c8b91d7bb6a51989afa49120d~dBMqbT9tF0099200992epcas5p4A; Tue, 11 Oct 2022 12:51:45 +0000 (GMT) Received: from epsmgms1p1new.samsung.com (unknown [182.195.42.41]) by epsmtrp1.samsung.com (KnoxPortal) with ESMTP id 20221011125145epsmtrp1f8bea722cfb8ffac8b4da292a3d0b205~dBMqaR19F2656926569epsmtrp12; Tue, 11 Oct 2022 12:51:45 +0000 (GMT) X-AuditID: b6c32a4a-007ff70000019a35-38-634638d20ea8 Received: from epsmtip1.samsung.com ( [182.195.34.30]) by epsmgms1p1new.samsung.com (Symantec Messaging Gateway) with SMTP id 0A.0D.14392.1E665436; Tue, 11 Oct 2022 21:51:45 +0900 (KST) Received: from cheetah.sa.corp.samsungelectronics.net (unknown [107.109.115.53]) by epsmtip1.samsung.com (KnoxPortal) with ESMTPA id 20221011125142epsmtip1a70854be8c175ac3ab0544709f0a685a~dBMnR6j1P2178621786epsmtip1q; Tue, 11 Oct 2022 12:51:41 +0000 (GMT) From: aakarsh jain To: linux-arm-kernel@lists.infradead.org, linux-media@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Cc: m.szyprowski@samsung.com, andrzej.hajda@intel.com, mchehab@kernel.org, hverkuil-cisco@xs4all.nl, ezequiel@vanguardiasur.com.ar, jernej.skrabec@gmail.com, benjamin.gaignard@collabora.com, stanimir.varbanov@linaro.org, dillon.minfei@gmail.com, david.plowman@raspberrypi.com, mark.rutland@arm.com, robh+dt@kernel.org, krzk+dt@kernel.org, andi@etezian.org, alim.akhtar@samsung.com, aswani.reddy@samsung.com, pankaj.dubey@samsung.com, linux-fsd@tesla.com, smitha.t@samsung.com, aakarsh.jain@samsung.com Subject: [Patch v3 02/15] dt-bindings: media: s5p-mfc: Add mfcv12 variant Date: Tue, 11 Oct 2022 17:55:03 +0530 Message-Id: <20221011122516.32135-3-aakarsh.jain@samsung.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20221011122516.32135-1-aakarsh.jain@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA0VTa1AbVRT27iabgA3dgTq9olAaxz7oQBNKwoWWaluEhfYHThydqm1cwxqQ kKRJaGvtCFVBQEuLlkEeDS0h4lBaKO9CgMhDhocVBgQdSMsb0rEaQSkUXyEJ+u8753zfOWe+ cy8X95wivLkJSh2jUdIKPuHOqu/YvTNgCEXKBBf1AM025rPRhL6eQIaVeQzdNyyxUHtNHQfV DhfiqKzbzEbFnXfZqOGbKRa6vWCvDuZbWGi++BZA1oJ7BKqeHmGjyQevoaGmIgJ9VlXHRjc7 LRxkHB3E0FfVf2KopO53Dkpr6eQgi6keoI/TO7EXIVWhrwBUo6UUUKOlizh1p8DCoQwmK0ZV l2cS1PiIiaBqSlOotK7HLCq7thxQf394lUNldY4S1FK1L9X7xxIn1uP1xAPxDB3HaPwYpUwV l6CUh/OPSqRHpCKxQBggDEUhfD8lncSE8yOOxQZEJijsNvD9TtOKZHsqltZq+XsPHtCoknWM X7xKqwvnM+o4hTpYHailk7TJSnmgktGFCQWCIJGd+FZifOWqAahvc85WDdQQqcDKzgJuXEgG w58frmJZwJ3rSTYDaF2+w3YGiwD+2FcMnMEygJbFvzgbkjxTi6vQAmBjTxnhDNIwWPxwzdGY IANgm9FMrOMt5AUApzN06ySc/IgFLf1rjlZeZDScmctzkFjk8zB35bpDzCPDoSl1keUctw3e qDLj69iNPAh/M37rmAbJT9zgQO5N3EmKgLZ7110CL/igu9a1qze0Xkp3YRmcLrG6+ApYabri 4r8AzcNFdsy1b7cbVjbtdaZ9YG7vLWwd46QHvLg2gznzPNio38A7YNH4isvJZ2HHDSNwYgpe 673kcjXHbmSJEb8MfAv+H3ENgHLwNKPWJskZrUgdpGTO/Hc3mSqpGjgeu39MI5icsAW2A4wL 2gHk4vwtPFB8WObJi6PfO8doVFJNsoLRtgOR3cAc3Pspmcr+W5Q6qTA4VBAsFouDQ/eJhfyt PMOX/jJPUk7rmESGUTOaDR3GdfNOxcz4yczcytbvI88L++WbzCFtS2+fWGteGDakd4/Zjmdb j+hPfk4ni9LfDexRilM+KDtE9M1EPbqwS3A5s6p3W9H4OI+145+xseiMth73vqid5RNhHX7C mKhXCucqJ0WjYVcPmUfkUtOVfe90nR6Q7BnK+TTPJ2R/RNPQKSlxrILa2lEz/IPliaAU9zLJ F9bmgbRHYcbltuVWhXDm1zePgme+G5zdv/D19n6iPOSu7iXJ4fubm0OHM44nd3nG+DYE7jrf MP3YvXQ7fTbkp3nJq5v4rU9uzpasQn+PN6w+wl+IoXMz6WkC+ayt5P25/BMve00B26nnom1J e4QxvHCFXt1aeMbIZ2njaaE/rtHS/wIbmurxdQQAAA== X-Brightmail-Tracker: H4sIAAAAAAAAAzWRWUwTYRSF/WemM0OTkqGgjlXEVCVKAkKi+KuAWjUZlQcejCzRQKEjoLTU DojLA4tAaqMEMAQBEbVFBQWh7FAES4FI3DVWo1XBpVaiFiiKgiCF+HbO/b7kPFwSFZZgIjJR kcKqFNIkMc7HmnvEy30HD+2K8x/QUfBTawkPvr/UjEPthBWB77RjGDQ2NBGw8XkZCq/3d/Ng hekhD7bcHcJg/ZdZ+qTEgkFrRS2AttK3ONR/eMGDg1/D4bP2izg8W9fEgzUmCwErzU8QeE0/ hcCrTQ4C5nSaCGgxNAOYnWtCttHMrUu3ANNq0QHGrBtFmbZSC8FoDTaE0VefwZk3Lww406BL Z3J6/2BMXmM1YKazyglGYzLjzJh+OTMwPkaEuUbxg2RsUuIxVrUuJIafcPu3FijrieN1jxvw DGDjaYALSVPr6WJDJ9AAPimkOgBtaJlG5sEyeia3j5jP7nTVtJWYl04jtNo8A5wAp3zprspu 3Ak8qBxAm6vOIM6CUmUYPVHYPbfhTu2mP34uxp0Zo1bTRRNX5u4CKpg2ZIxi8xNe9M26btSZ XagQeqSyb84XzjqZP4qQfOB6GSyoBktYJSePl3MBygAFm+bHSeVcqiLeLy5Zrgdz3/NZ2wpa qu1+RoCQwAhoEhV7CECFJE4okElPnGRVydGq1CSWM4KlJCZeLHisuRctpOKlKewRllWyqv8U IV1EGchBd5/YO5FJ2uO/CgxfAjlJIHX3rHeKfiGe2hFbYDvVpYuof+A2s3HFKfXtrTl54VMy q2kiwn6gTmL0ldwD97c45CrHcIFG0mG5sb9y9G+RfcTt4dMbPE1wbY1xv9fO7M4hwVS9Ve1o NAb5p0f1x65TovsmX/kMhBXusa3KK1g5jk+/Ts+yn+/Z3iZrDuoPHT6h9kfChiLTXqIxDQnb x/dyLaF9UZuGvdPstt5c30de3/F35RrFpHKHwRHaF6MYbM8fsWXWWKM282uFUvitQ3ZY27Me epLbvmWtSfRjH4jCWz1FHpmi1SVLes8tUC96Y3cUp+3bcK3/0IWfR8tcxRiXIA3wQVWc9B9C B8eeLAMAAA== X-CMS-MailID: 20221011125145epcas5p4f9d2656c8b91d7bb6a51989afa49120d X-Msg-Generator: CA X-Sendblock-Type: REQ_APPROVE CMS-TYPE: 105P DLP-Filter: Pass X-CFilter-Loop: Reflected X-CMS-RootMailID: 20221011125145epcas5p4f9d2656c8b91d7bb6a51989afa49120d References: <20221011122516.32135-1-aakarsh.jain@samsung.com> Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org From: Smitha T Murthy Add Tesla FSD MFC(MFC v12) compatible. Cc: linux-fsd@tesla.com Signed-off-by: Smitha T Murthy Signed-off-by: Aakarsh Jain --- Documentation/devicetree/bindings/media/samsung,s5p-mfc.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/media/samsung,s5p-mfc.yaml b/Documentation/devicetree/bindings/media/samsung,s5p-mfc.yaml index ad61b509846f..9fb4cae1b68f 100644 --- a/Documentation/devicetree/bindings/media/samsung,s5p-mfc.yaml +++ b/Documentation/devicetree/bindings/media/samsung,s5p-mfc.yaml @@ -24,6 +24,7 @@ properties: - samsung,mfc-v8 # Exynos5800 - samsung,exynos5433-mfc # Exynos5433 - samsung,mfc-v10 # Exynos7880 + - tesla,fsd-mfc # Tesla FSD reg: maxItems: 1 From patchwork Tue Oct 11 12:25:05 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Aakarsh Jain X-Patchwork-Id: 614707 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B0464C43217 for ; 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Tue, 11 Oct 2022 12:51:52 +0000 (GMT) Received: from epsmgms1p2.samsung.com (unknown [182.195.42.42]) by epsmtrp1.samsung.com (KnoxPortal) with ESMTP id 20221011125152epsmtrp1ea4b935ae0797f7f3f6836ae4d062734~dBMwsOnnb2656926569epsmtrp13; Tue, 11 Oct 2022 12:51:52 +0000 (GMT) X-AuditID: b6c32a4b-383ff7000001dc20-0f-634638dbd03f Received: from epsmtip1.samsung.com ( [182.195.34.30]) by epsmgms1p2.samsung.com (Symantec Messaging Gateway) with SMTP id 9E.84.18644.7E665436; Tue, 11 Oct 2022 21:51:52 +0900 (KST) Received: from cheetah.sa.corp.samsungelectronics.net (unknown [107.109.115.53]) by epsmtip1.samsung.com (KnoxPortal) with ESMTPA id 20221011125148epsmtip184e73f6e1c42751e055122decc293f32~dBMtmSfeC2178621786epsmtip1r; Tue, 11 Oct 2022 12:51:48 +0000 (GMT) From: aakarsh jain To: linux-arm-kernel@lists.infradead.org, linux-media@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Cc: m.szyprowski@samsung.com, andrzej.hajda@intel.com, mchehab@kernel.org, hverkuil-cisco@xs4all.nl, ezequiel@vanguardiasur.com.ar, jernej.skrabec@gmail.com, benjamin.gaignard@collabora.com, stanimir.varbanov@linaro.org, dillon.minfei@gmail.com, david.plowman@raspberrypi.com, mark.rutland@arm.com, robh+dt@kernel.org, krzk+dt@kernel.org, andi@etezian.org, alim.akhtar@samsung.com, aswani.reddy@samsung.com, pankaj.dubey@samsung.com, linux-fsd@tesla.com, smitha.t@samsung.com, aakarsh.jain@samsung.com Subject: [Patch v3 04/15] media: s5p-mfc: Add initial support for MFCv12 Date: Tue, 11 Oct 2022 17:55:05 +0530 Message-Id: <20221011122516.32135-5-aakarsh.jain@samsung.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20221011122516.32135-1-aakarsh.jain@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA0WTeVBTVxTG5773khechnmNtlwpRUy1UzIFE7ZeHECrlD6gCx07I60daCa8 EoaQZLK0inXKUhAYxYDaCkSgJGiHTQlbwKCAKbZ0UZaBTjGspRBqFwkWKw5tQqD97/ed8517 zpx7LwfnTbO9OWlyDaOSi2V89hai/ab/CwHjKEYivJ7lhebMZSw0VdnORoaH8xiaNDgI1NfS RqLWkQocXb7Vw0JV1h9YqKN3hkDNC87sYJmNQPNVTQDZyyfYyDQ7ykLTi4fRcJeejU5dbWOh RquNRLVjgxi6ZHqMoZq2ZRLldVtJZLO0A/RpvhXbD+mGygZAm21GQI8Zl3C6s9xG0gaLHaNN dYVs+u6ohU23GD+h8756RNDFrXWAXsu5SNJF1jE27TD50gMPHGSC57vpEVJGnMKo/Bi5RJGS Jk+N5McfSj6YHBomFAWIwtFLfD+5OIOJ5Ee/lhAQkyZzroHv96FYpnWGEsRqNX9PVIRKodUw flKFWhPJZ5QpMmWIMlAtzlBr5amBckazVyQUBoU6je+nS22nn1MWnARHO2uCs0CJsgh4cCAV Am1dy2QR2MLhUdcANBZPY26xBOBi/S+EWzgAXKvLZm+WPGqy4+5EF4BT3WaWW+RhcObcN6TL xaYC4I3anvWKbVQ2gLMFGpcJp3IJaPtudd20laLhiqFtnQlqNywfzCVczKUi4Y8Tdpa73Q5Y f7UHd7EHFQXv1/azXQdB6qQHnM+dxN2maPjZPR3p5q1w8VbrBntD+5n8DZbA2Rr7hl8Gr1jO EW7eB3tG9E7mOKfzh1e69rjDz8LzA02Yi3HKE55e/Rlzx7nQXLnJz0P93Ycbc/rAm/W1wM00 vDNYsLGiEgALHlwidMC3/P8W1QDUge2MUp2RyqhDlcFy5qP/rk2iyDCB9bcuiDeDmak/A/sA xgF9AHJw/jYuqDog4XFTxMcyGZUiWaWVMeo+EOpcYAnu/ZRE4fwsck2yKCRcGBIWFhYSHhwm 4ntxDRcEEh6VKtYw6QyjZFSbdRjHwzsLw6eO19j0jv7CjwnPs6L7cb4RAzKv4sbUD/66nVQi rjYOS5KDLvCSrCeCpCiqPpGnF5Uunz0+WWTgleYyNYOOid/3/aGrvghzdmHA7PNP866hBv+d h35aSHHM/dYo0I93FJa9FXetGg0XrNhRfOLyExnT3PHtAkv+iUXdM2/8HffeF4cr33n5SMWT b2frJrW3PZsF2T2vClsyed9ed4j42sfR+LEl61Bv7JerHTplf71pxCfpfKzAPvp0TnC76iht MH5veSXxxd1zVOebCzuOHJjKLkyMrZCujNxoPPjrvd6dzd2soTzy8lpE++dVpErSnZX5esT+ vcL0uq/vxJwyluZK+YRaKhYJcJVa/C/tDi1VdAQAAA== X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFprOIsWRmVeSWpSXmKPExsWy7bCSnO6LNNdkgx0XGC2e7pjJavFg3jY2 i8U/njNZ3F/8mcXi0Oat7BZbrsxmtlh+/ACrxfwj51gtth98xGKx8QVQ9uLMuywWz+evY7R4 Oesem8Wmx9dYLR6+Cre4vGsOm0XPhq2sFmuP3GW3WHr9IpPFsk1/mCwWbf3CbtG69wi7xd09 2xgtWtqOMDlIeKyZt4bRY8fdJYwe15d8YvbYOesuu8fiPS+ZPDat6mTzuHNtD5vH5iX1Hq1H f7F49G1Zxejxr2kuu0fXketsHp83yXmc+vqZPYAvissmJTUnsyy1SN8ugSvjbq9yQUc7Y8XO RcYNjBMLuhg5OSQETCR+rXvJDGILCexglDh3rRYiLiPxv+0YO4QtLLHy33MgmwuopplJ4nnj PRaQBJuArsT+pQfYQBIiAq2MEtdXdjKBOMwCs1kkfkw6wApSJSzgIfF98VawUSwCqhKzLjaD dfMK2ErcuPeSFWKFvMTqDQfAzuAUsJP4uPQYG8RJthKN76cyTWDkW8DIsIpRMrWgODc9t9iw wCgvtVyvODG3uDQvXS85P3cTIzjutLR2MO5Z9UHvECMTB+MhRgkOZiURXsb5TslCvCmJlVWp RfnxRaU5qcWHGKU5WJTEeS90nYwXEkhPLEnNTk0tSC2CyTJxcEo1MEk9u9m6jjPYZsaqvFVd nX8eRJRaHymalre7u6ldwvKGeujEdVsWKF2VTWSarPpBZ5/vPg/LF0Hvbtd/zV4neWJCn8Sy 83u4dx/fUfZZ5YAp0x9DngVNh5amnv/7vnCRfEtw5QONnk8xfbLcx3YbmVvkb86cEsN6/EKU YRfnlN/cC1ZsjrVMX3kq/NTllPKQbL/Ntx88beG/3roqUDVE7tdUrbd6k38niDafuqz7YeUK XcVQhrjoc0umunJzv54SON3+tNX+dqU6keq7gZyxVav3zZ2Svpn91ufLR8QzdZksWKR29Nb9 525raJpzba7E8ljNiwFXDlnNdK/kOf6I+9HjF0vvJpn0bJywJ/BUd4kSS3FGoqEWc1FxIgA3 VDtLKgMAAA== X-CMS-MailID: 20221011125152epcas5p3a9966cfafa53928023a97143d5e3a7f0 X-Msg-Generator: CA X-Sendblock-Type: REQ_APPROVE CMS-TYPE: 105P DLP-Filter: Pass X-CFilter-Loop: Reflected X-CMS-RootMailID: 20221011125152epcas5p3a9966cfafa53928023a97143d5e3a7f0 References: <20221011122516.32135-1-aakarsh.jain@samsung.com> Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org From: Smitha T Murthy Add support for MFCv12, with a new register file and necessary hw control, decoder, encoder and structural changes. Add luma dbp, chroma dpb and mv sizes for each codec as per the UM for MFCv12, along with appropriate alignment. Cc: linux-fsd@tesla.com Signed-off-by: Smitha T Murthy Signed-off-by: Aakarsh Jain --- .../platform/samsung/s5p-mfc/regs-mfc-v12.h | 50 +++++++++++ .../media/platform/samsung/s5p-mfc/s5p_mfc.c | 30 +++++++ .../platform/samsung/s5p-mfc/s5p_mfc_common.h | 15 +++- .../platform/samsung/s5p-mfc/s5p_mfc_ctrl.c | 2 +- .../platform/samsung/s5p-mfc/s5p_mfc_dec.c | 6 +- .../platform/samsung/s5p-mfc/s5p_mfc_enc.c | 5 +- .../platform/samsung/s5p-mfc/s5p_mfc_opr.h | 8 +- .../platform/samsung/s5p-mfc/s5p_mfc_opr_v6.c | 83 ++++++++++++++++--- .../platform/samsung/s5p-mfc/s5p_mfc_opr_v6.h | 6 +- 9 files changed, 175 insertions(+), 30 deletions(-) create mode 100644 drivers/media/platform/samsung/s5p-mfc/regs-mfc-v12.h diff --git a/drivers/media/platform/samsung/s5p-mfc/regs-mfc-v12.h b/drivers/media/platform/samsung/s5p-mfc/regs-mfc-v12.h new file mode 100644 index 000000000000..6c68a45082d0 --- /dev/null +++ b/drivers/media/platform/samsung/s5p-mfc/regs-mfc-v12.h @@ -0,0 +1,50 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Register definition file for Samsung MFC V12.x Interface (FIMV) driver + * + * Copyright (c) 2020 Samsung Electronics Co., Ltd. + * http://www.samsung.com/ + */ + +#ifndef _REGS_MFC_V12_H +#define _REGS_MFC_V12_H + +#include +#include "regs-mfc-v10.h" + +/* MFCv12 Context buffer sizes */ +#define MFC_CTX_BUF_SIZE_V12 (30 * SZ_1K) +#define MFC_H264_DEC_CTX_BUF_SIZE_V12 (2 * SZ_1M) +#define MFC_OTHER_DEC_CTX_BUF_SIZE_V12 (30 * SZ_1K) +#define MFC_H264_ENC_CTX_BUF_SIZE_V12 (100 * SZ_1K) +#define MFC_HEVC_ENC_CTX_BUF_SIZE_V12 (40 * SZ_1K) +#define MFC_OTHER_ENC_CTX_BUF_SIZE_V12 (25 * SZ_1K) + +/* MFCv12 variant defines */ +#define MAX_FW_SIZE_V12 (SZ_1M) +#define MAX_CPB_SIZE_V12 (7 * SZ_1M) +#define MFC_VERSION_V12 0xC0 +#define MFC_NUM_PORTS_V12 1 +#define S5P_FIMV_CODEC_VP9_ENC 27 + +/* Encoder buffer size for MFCv12 */ +#define ENC_V120_BASE_SIZE(x, y) \ + (((x + 3) * (y + 3) * 8) \ + + (((y * 64) + 2304) * (x + 7) / 8)) + +#define ENC_V120_H264_ME_SIZE(x, y) \ + ALIGN((ENC_V120_BASE_SIZE(x, y) \ + + (DIV_ROUND_UP(x * y, 64) * 32)), 256) + +#define ENC_V120_MPEG4_ME_SIZE(x, y) \ + ALIGN((ENC_V120_BASE_SIZE(x, y) \ + + (DIV_ROUND_UP(x * y, 128) * 16)), 256) + +#define ENC_V120_VP8_ME_SIZE(x, y) \ + ALIGN(ENC_V120_BASE_SIZE(x, y), 256) + +#define ENC_V120_HEVC_ME_SIZE(x, y) \ + ALIGN((((x + 3) * (y + 3) * 32) \ + + (((y * 128) + 2304) * (x + 3) / 4)), 256) + +#endif /*_REGS_MFC_V12_H*/ diff --git a/drivers/media/platform/samsung/s5p-mfc/s5p_mfc.c b/drivers/media/platform/samsung/s5p-mfc/s5p_mfc.c index fca5c6405eec..fe07112f013f 100644 --- a/drivers/media/platform/samsung/s5p-mfc/s5p_mfc.c +++ b/drivers/media/platform/samsung/s5p-mfc/s5p_mfc.c @@ -775,6 +775,8 @@ static int s5p_mfc_open(struct file *file) INIT_LIST_HEAD(&ctx->dst_queue); ctx->src_queue_cnt = 0; ctx->dst_queue_cnt = 0; + ctx->is_422 = 0; + ctx->is_10bit = 0; /* Get context number */ ctx->num = 0; while (dev->ctx[ctx->num]) { @@ -1637,6 +1639,31 @@ static struct s5p_mfc_variant mfc_drvdata_v10 = { .fw_name[0] = "s5p-mfc-v10.fw", }; +static struct s5p_mfc_buf_size_v6 mfc_buf_size_v12 = { + .dev_ctx = MFC_CTX_BUF_SIZE_V12, + .h264_dec_ctx = MFC_H264_DEC_CTX_BUF_SIZE_V12, + .other_dec_ctx = MFC_OTHER_DEC_CTX_BUF_SIZE_V12, + .h264_enc_ctx = MFC_H264_ENC_CTX_BUF_SIZE_V12, + .hevc_enc_ctx = MFC_HEVC_ENC_CTX_BUF_SIZE_V12, + .other_enc_ctx = MFC_OTHER_ENC_CTX_BUF_SIZE_V12, +}; + +static struct s5p_mfc_buf_size buf_size_v12 = { + .fw = MAX_FW_SIZE_V12, + .cpb = MAX_CPB_SIZE_V12, + .priv = &mfc_buf_size_v12, +}; + +static struct s5p_mfc_variant mfc_drvdata_v12 = { + .version = MFC_VERSION_V12, + .version_bit = MFC_V12_BIT, + .port_num = MFC_NUM_PORTS_V12, + .buf_size = &buf_size_v12, + .fw_name[0] = "s5p-mfc-v12.fw", + .clk_names = {"mfc"}, + .num_clocks = 1, +}; + static const struct of_device_id exynos_mfc_match[] = { { .compatible = "samsung,mfc-v5", @@ -1656,6 +1683,9 @@ static const struct of_device_id exynos_mfc_match[] = { }, { .compatible = "samsung,mfc-v10", .data = &mfc_drvdata_v10, + }, { + .compatible = "tesla,fsd-mfc", + .data = &mfc_drvdata_v12, }, {}, }; diff --git a/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_common.h b/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_common.h index e6ec4a43b290..dd2e9f7704ab 100644 --- a/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_common.h +++ b/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_common.h @@ -19,7 +19,7 @@ #include #include #include "regs-mfc.h" -#include "regs-mfc-v10.h" +#include "regs-mfc-v12.h" #define S5P_MFC_NAME "s5p-mfc" @@ -720,6 +720,8 @@ struct s5p_mfc_ctx { struct v4l2_ctrl *ctrls[MFC_MAX_CTRLS]; struct v4l2_ctrl_handler ctrl_handler; size_t scratch_buf_size; + int is_10bit; + int is_422; }; /* @@ -775,6 +777,7 @@ void s5p_mfc_cleanup_queue(struct list_head *lh, struct vb2_queue *vq); #define IS_MFCV7_PLUS(dev) (dev->variant->version >= 0x70) #define IS_MFCV8_PLUS(dev) (dev->variant->version >= 0x80) #define IS_MFCV10_PLUS(dev) (dev->variant->version >= 0xA0) +#define IS_MFCV12(dev) (dev->variant->version >= 0xC0) #define FW_HAS_E_MIN_SCRATCH_BUF(dev) (IS_MFCV10_PLUS(dev)) #define MFC_V5_BIT BIT(0) @@ -782,11 +785,15 @@ void s5p_mfc_cleanup_queue(struct list_head *lh, struct vb2_queue *vq); #define MFC_V7_BIT BIT(2) #define MFC_V8_BIT BIT(3) #define MFC_V10_BIT BIT(5) +#define MFC_V12_BIT BIT(7) #define MFC_V5PLUS_BITS (MFC_V5_BIT | MFC_V6_BIT | MFC_V7_BIT | \ - MFC_V8_BIT | MFC_V10_BIT) + MFC_V8_BIT | MFC_V10_BIT | MFC_V12_BIT) #define MFC_V6PLUS_BITS (MFC_V6_BIT | MFC_V7_BIT | MFC_V8_BIT | \ - MFC_V10_BIT) -#define MFC_V7PLUS_BITS (MFC_V7_BIT | MFC_V8_BIT | MFC_V10_BIT) + MFC_V10_BIT | MFC_V12_BIT) +#define MFC_V7PLUS_BITS (MFC_V7_BIT | MFC_V8_BIT | MFC_V10_BIT | \ + MFC_V12_BIT) + +#define MFC_V10PLUS_BITS (MFC_V10_BIT | MFC_V12_BIT) #endif /* S5P_MFC_COMMON_H_ */ diff --git a/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_ctrl.c b/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_ctrl.c index ffe9f7e79eca..877e5bceb75b 100644 --- a/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_ctrl.c +++ b/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_ctrl.c @@ -130,7 +130,7 @@ int s5p_mfc_reset(struct s5p_mfc_dev *dev) mfc_write(dev, 0, S5P_FIMV_REG_CLEAR_BEGIN_V6 + (i*4)); /* check bus reset control before reset */ - if (dev->risc_on) + if (dev->risc_on && !IS_MFCV12(dev)) if (s5p_mfc_bus_reset(dev)) return -EIO; /* Reset diff --git a/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_dec.c b/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_dec.c index 268ffe4da53c..e219cbcd86d5 100644 --- a/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_dec.c +++ b/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_dec.c @@ -146,7 +146,7 @@ static struct s5p_mfc_fmt formats[] = { .codec_mode = S5P_FIMV_CODEC_HEVC_DEC, .type = MFC_FMT_DEC, .num_planes = 1, - .versions = MFC_V10_BIT, + .versions = MFC_V10PLUS_BITS, .flags = V4L2_FMT_FLAG_DYN_RESOLUTION | V4L2_FMT_FLAG_CONTINUOUS_BYTESTREAM, }, @@ -155,7 +155,7 @@ static struct s5p_mfc_fmt formats[] = { .codec_mode = S5P_FIMV_CODEC_VP9_DEC, .type = MFC_FMT_DEC, .num_planes = 1, - .versions = MFC_V10_BIT, + .versions = MFC_V10PLUS_BITS, .flags = V4L2_FMT_FLAG_DYN_RESOLUTION, }, }; @@ -355,7 +355,7 @@ static int vidioc_g_fmt(struct file *file, void *priv, struct v4l2_format *f) pix_mp->width = ctx->buf_width; pix_mp->height = ctx->buf_height; pix_mp->field = V4L2_FIELD_NONE; - pix_mp->num_planes = 2; + pix_mp->num_planes = ctx->dst_fmt->num_planes; /* Set pixelformat to the format in which MFC outputs the decoded frame */ pix_mp->pixelformat = ctx->dst_fmt->fourcc; diff --git a/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_enc.c b/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_enc.c index b65e506665af..143d95fe2f89 100644 --- a/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_enc.c +++ b/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_enc.c @@ -92,7 +92,7 @@ static struct s5p_mfc_fmt formats[] = { .codec_mode = S5P_FIMV_CODEC_HEVC_ENC, .type = MFC_FMT_ENC, .num_planes = 1, - .versions = MFC_V10_BIT, + .versions = MFC_V10PLUS_BITS, }, }; @@ -1179,7 +1179,8 @@ static int enc_post_seq_start(struct s5p_mfc_ctx *ctx) if (FW_HAS_E_MIN_SCRATCH_BUF(dev)) { ctx->scratch_buf_size = s5p_mfc_hw_call(dev->mfc_ops, get_e_min_scratch_buf_size, dev); - ctx->bank1.size += ctx->scratch_buf_size; + if (!IS_MFCV12(dev)) + ctx->bank1.size += ctx->scratch_buf_size; } ctx->state = MFCINST_HEAD_PRODUCED; } diff --git a/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_opr.h b/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_opr.h index b9831275f3ab..87ac56756a16 100644 --- a/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_opr.h +++ b/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_opr.h @@ -166,9 +166,9 @@ struct s5p_mfc_regs { void __iomem *d_decoded_third_addr;/* only v7 */ void __iomem *d_used_dpb_flag_upper;/* v7 and v8 */ void __iomem *d_used_dpb_flag_lower;/* v7 and v8 */ - void __iomem *d_min_scratch_buffer_size; /* v10 */ - void __iomem *d_static_buffer_addr; /* v10 */ - void __iomem *d_static_buffer_size; /* v10 */ + void __iomem *d_min_scratch_buffer_size; /* v10 and v12 */ + void __iomem *d_static_buffer_addr; /* v10 and v12 */ + void __iomem *d_static_buffer_size; /* v10 and v12 */ /* encoder registers */ void __iomem *e_frame_width; @@ -268,7 +268,7 @@ struct s5p_mfc_regs { void __iomem *e_vp8_hierarchical_qp_layer0;/* v7 and v8 */ void __iomem *e_vp8_hierarchical_qp_layer1;/* v7 and v8 */ void __iomem *e_vp8_hierarchical_qp_layer2;/* v7 and v8 */ - void __iomem *e_min_scratch_buffer_size; /* v10 */ + void __iomem *e_min_scratch_buffer_size; /* v10 and v12 */ void __iomem *e_num_t_layer; /* v10 */ void __iomem *e_hier_qp_layer0; /* v10 */ void __iomem *e_hier_bit_rate_layer0; /* v10 */ diff --git a/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_opr_v6.c b/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_opr_v6.c index 728d255e65fc..5d14ccf8b4fe 100644 --- a/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_opr_v6.c +++ b/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_opr_v6.c @@ -60,12 +60,14 @@ static void s5p_mfc_release_dec_desc_buffer_v6(struct s5p_mfc_ctx *ctx) static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx) { struct s5p_mfc_dev *dev = ctx->dev; - unsigned int mb_width, mb_height; + unsigned int mb_width, mb_height, width64, height32; unsigned int lcu_width = 0, lcu_height = 0; int ret; mb_width = MB_WIDTH(ctx->img_width); mb_height = MB_HEIGHT(ctx->img_height); + width64 = ALIGN(ctx->img_width, 64); + height32 = ALIGN(ctx->img_height, 32); if (ctx->type == MFCINST_DECODER) { mfc_debug(2, "Luma size:%d Chroma size:%d MV size:%d\n", @@ -82,7 +84,44 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx) ctx->tmv_buffer_size = S5P_FIMV_NUM_TMV_BUFFERS_V6 * ALIGN(S5P_FIMV_TMV_BUFFER_SIZE_V6(mb_width, mb_height), S5P_FIMV_TMV_BUFFER_ALIGN_V6); - if (IS_MFCV10_PLUS(dev)) { + if (IS_MFCV12(dev)) { + lcu_width = S5P_MFC_LCU_WIDTH(ctx->img_width); + lcu_height = S5P_MFC_LCU_HEIGHT(ctx->img_height); + if (ctx->codec_mode == S5P_FIMV_CODEC_HEVC_ENC && + ctx->is_10bit) { + ctx->luma_dpb_size = + width64 * height32 + + ALIGN(DIV_ROUND_UP(lcu_width * 32, 4), + 16) * height32 + 128; + if (ctx->is_422) + ctx->chroma_dpb_size = + ctx->luma_dpb_size; + else + ctx->chroma_dpb_size = + width64 * height32 / 2 + + ALIGN(DIV_ROUND_UP(lcu_width * + 32, 4), 16) * height32 / 2 + 128; + } else if (ctx->codec_mode == S5P_FIMV_CODEC_VP9_ENC && + ctx->is_10bit) { + ctx->luma_dpb_size = + ALIGN(ctx->img_width * 2, 128) * + height32 + 64; + ctx->chroma_dpb_size = + ALIGN(ctx->img_width * 2, 128) * + height32 / 2 + 64; + } else { + ctx->luma_dpb_size = + width64 * height32 + 64; + if (ctx->is_422) + ctx->chroma_dpb_size = + ctx->luma_dpb_size; + else + ctx->chroma_dpb_size = + width64 * height32 / 2 + 64; + } + ctx->luma_dpb_size = ALIGN(ctx->luma_dpb_size + 256, SZ_2K); + ctx->chroma_dpb_size = ALIGN(ctx->chroma_dpb_size + 256, SZ_2K); + } else if (IS_MFCV10_PLUS(dev)) { lcu_width = S5P_MFC_LCU_WIDTH(ctx->img_width); lcu_height = S5P_MFC_LCU_HEIGHT(ctx->img_height); if (ctx->codec_mode != S5P_FIMV_CODEC_HEVC_ENC) { @@ -230,7 +269,11 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx) DEC_VP9_STATIC_BUFFER_SIZE; break; case S5P_MFC_CODEC_H264_ENC: - if (IS_MFCV10_PLUS(dev)) { + if (IS_MFCV12(dev)) { + mfc_debug(2, "Use min scratch buffer size\n"); + ctx->me_buffer_size = + ENC_V120_H264_ME_SIZE(mb_width, mb_height); + } else if (IS_MFCV10_PLUS(dev)) { mfc_debug(2, "Use min scratch buffer size\n"); ctx->me_buffer_size = ALIGN(ENC_V100_H264_ME_SIZE(mb_width, mb_height), 16); @@ -254,7 +297,11 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx) break; case S5P_MFC_CODEC_MPEG4_ENC: case S5P_MFC_CODEC_H263_ENC: - if (IS_MFCV10_PLUS(dev)) { + if (IS_MFCV12(dev)) { + mfc_debug(2, "Use min scratch buffer size\n"); + ctx->me_buffer_size = + ENC_V120_MPEG4_ME_SIZE(mb_width, mb_height); + } else if (IS_MFCV10_PLUS(dev)) { mfc_debug(2, "Use min scratch buffer size\n"); ctx->me_buffer_size = ALIGN(ENC_V100_MPEG4_ME_SIZE(mb_width, @@ -273,7 +320,11 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx) ctx->bank2.size = 0; break; case S5P_MFC_CODEC_VP8_ENC: - if (IS_MFCV10_PLUS(dev)) { + if (IS_MFCV12(dev)) { + mfc_debug(2, "Use min scratch buffer size\n"); + ctx->me_buffer_size = + ENC_V120_VP8_ME_SIZE(mb_width, mb_height); + } else if (IS_MFCV10_PLUS(dev)) { mfc_debug(2, "Use min scratch buffer size\n"); ctx->me_buffer_size = ALIGN(ENC_V100_VP8_ME_SIZE(mb_width, mb_height), @@ -297,9 +348,14 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx) ctx->bank2.size = 0; break; case S5P_MFC_CODEC_HEVC_ENC: + if (IS_MFCV12(dev)) + ctx->me_buffer_size = + ENC_V120_HEVC_ME_SIZE(lcu_width, lcu_height); + else + ctx->me_buffer_size = + ALIGN(ENC_V100_HEVC_ME_SIZE(lcu_width, + lcu_height), 16); mfc_debug(2, "Use min scratch buffer size\n"); - ctx->me_buffer_size = - ALIGN(ENC_V100_HEVC_ME_SIZE(lcu_width, lcu_height), 16); ctx->scratch_buf_size = ALIGN(ctx->scratch_buf_size, 256); ctx->bank1.size = ctx->scratch_buf_size + ctx->tmv_buffer_size + @@ -452,12 +508,15 @@ static void s5p_mfc_dec_calc_dpb_size_v6(struct s5p_mfc_ctx *ctx) if (ctx->codec_mode == S5P_MFC_CODEC_H264_DEC || ctx->codec_mode == S5P_MFC_CODEC_H264_MVC_DEC) { - if (IS_MFCV10_PLUS(dev)) { - ctx->mv_size = S5P_MFC_DEC_MV_SIZE_V10(ctx->img_width, - ctx->img_height); + if (IS_MFCV12(dev)) { + ctx->mv_size = S5P_MFC_DEC_MV_SIZE(ctx->img_width, + ctx->img_height, 1024); + } else if (IS_MFCV10_PLUS(dev)) { + ctx->mv_size = S5P_MFC_DEC_MV_SIZE(ctx->img_width, + ctx->img_height, 512); } else { - ctx->mv_size = S5P_MFC_DEC_MV_SIZE_V6(ctx->img_width, - ctx->img_height); + ctx->mv_size = S5P_MFC_DEC_MV_SIZE(ctx->img_width, + ctx->img_height, 128); } } else if (ctx->codec_mode == S5P_MFC_CODEC_HEVC_DEC) { ctx->mv_size = s5p_mfc_dec_hevc_mv_size(ctx->img_width, diff --git a/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_opr_v6.h b/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_opr_v6.h index e4dd03c5454c..30269f3e68e8 100644 --- a/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_opr_v6.h +++ b/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_opr_v6.h @@ -19,10 +19,8 @@ #define MB_WIDTH(x_size) DIV_ROUND_UP(x_size, 16) #define MB_HEIGHT(y_size) DIV_ROUND_UP(y_size, 16) -#define S5P_MFC_DEC_MV_SIZE_V6(x, y) (MB_WIDTH(x) * \ - (((MB_HEIGHT(y)+1)/2)*2) * 64 + 128) -#define S5P_MFC_DEC_MV_SIZE_V10(x, y) (MB_WIDTH(x) * \ - (((MB_HEIGHT(y)+1)/2)*2) * 64 + 512) +#define S5P_MFC_DEC_MV_SIZE(x, y, offset) (MB_WIDTH(x) * \ + (((MB_HEIGHT(y)+1)/2)*2) * 64 + offset) #define S5P_MFC_LCU_WIDTH(x_size) DIV_ROUND_UP(x_size, 32) #define S5P_MFC_LCU_HEIGHT(y_size) DIV_ROUND_UP(y_size, 32) From patchwork Tue Oct 11 12:25:07 2022 Content-Type: text/plain; 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Wed, 12 Oct 2022 12:47:48 +0900 (KST) Received: from epsmtrp1.samsung.com (unknown [182.195.40.13]) by epcas5p1.samsung.com (KnoxPortal) with ESMTPA id 20221011125158epcas5p14f2b333fdb1eed793e9fbf85409f5a36~dBM3BCsZi0252702527epcas5p1F; Tue, 11 Oct 2022 12:51:58 +0000 (GMT) Received: from epsmgms1p1new.samsung.com (unknown [182.195.42.41]) by epsmtrp1.samsung.com (KnoxPortal) with ESMTP id 20221011125158epsmtrp18a6384d603d8c9f5358d089b53f80480~dBM2-4SZh2654526545epsmtrp1F; Tue, 11 Oct 2022 12:51:58 +0000 (GMT) X-AuditID: b6c32a4a-007ff70000019a35-74-634638e44bc9 Received: from epsmtip1.samsung.com ( [182.195.34.30]) by epsmgms1p1new.samsung.com (Symantec Messaging Gateway) with SMTP id 5F.0D.14392.EE665436; Tue, 11 Oct 2022 21:51:58 +0900 (KST) Received: from cheetah.sa.corp.samsungelectronics.net (unknown [107.109.115.53]) by epsmtip1.samsung.com (KnoxPortal) with ESMTPA id 20221011125155epsmtip19b75ee41d1f37c2f515ed8cc37e90ea4~dBMz5fms02178321783epsmtip15; Tue, 11 Oct 2022 12:51:55 +0000 (GMT) From: aakarsh jain To: linux-arm-kernel@lists.infradead.org, linux-media@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Cc: m.szyprowski@samsung.com, andrzej.hajda@intel.com, mchehab@kernel.org, hverkuil-cisco@xs4all.nl, ezequiel@vanguardiasur.com.ar, jernej.skrabec@gmail.com, benjamin.gaignard@collabora.com, stanimir.varbanov@linaro.org, dillon.minfei@gmail.com, david.plowman@raspberrypi.com, mark.rutland@arm.com, robh+dt@kernel.org, krzk+dt@kernel.org, andi@etezian.org, alim.akhtar@samsung.com, aswani.reddy@samsung.com, pankaj.dubey@samsung.com, linux-fsd@tesla.com, smitha.t@samsung.com, aakarsh.jain@samsung.com Subject: [Patch v3 06/15] media: v4l2: Add v4l2 control IDs for VP9 encoder. Date: Tue, 11 Oct 2022 17:55:07 +0530 Message-Id: <20221011122516.32135-7-aakarsh.jain@samsung.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20221011122516.32135-1-aakarsh.jain@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA0WTf0xTVxTHva+vr4VQ91JgXmAINOwHXUAqpbsslOk05IlKiFtiGFFWy0uL 9Ff6Wsc02VCGdo3o3GQOZIAUZBQELT9EVgYURCELCZPRxFFWBMS66Rg/NjfQjVLc/vuce77n 3nO+914ui+8mQrm5GgOt18hUAsIfb++LEcZOo1R5fOe1YDTTUcpG7op2AlmezGLoZ8sCjhwt bRzUOnqRhepu9bBRZf8wG13vvYejaw9WsyOlLhzNVjYB5CmbIJBtaoyNJh/uR3c6ywl0+mob G13pd3FQrXMEQ5dtKxiqblvkoKKufg5y2dsB+uRkP7YNUo0VjYDqcNUAylkzz6JulLk4lMXu wSib9VOCGh+zE1RLzcdU0c2/cepMqxVQz058zaHM/U6CWrBtpoaWFjgZG9/LS1bSshxaH0lr 5NqcXI1CKtj9TvaO7ERJvChWlITeEERqZGpaKti5JyM2NVe1aoMg8ohMZVxdypAxjGBLSrJe azTQkUotY5AKaF2OSifWxTEyNWPUKOI0tOFNUXz81sRV4ft5yjOFjO6CJP/0wmO8AHRtMQM/ LiTFcOpGN2YG/lw++S2Alj9PAF8wD+DlwlHCF/wB4ODMMtsMuGsl8wXroi4A21wP1oMiDN4t nsS8+xJkLOyu7SG8HEQeB3DKZPCKWGQhDl3fL3O8iUByD/xl4ibuZZx8GTa769cKeKQUPip1 s30NRsCGqz0sL/uRKfD32oG1liB5yg86L7YQPtFOWFzm4fg4ED681brOodBz9uQ6y+FUtYfl YxVstp/HffwW7Bktx72jscgY2Ny5bkw4LBlqWhuGRW6ExcvTmG+dBzsqnvMrsHz8yXqfL8G+ hlrgYwpWlVRyfK6cA7DeYSM+A5vL/j+iCgArCKF1jFpBM4m6rRr6g/9uTa5V28DaUxemdYBJ 91ycA2Bc4ACQyxIE8UDl23I+L0f24VFar83WG1U04wCJqwaeY4UGy7Wrf0VjyBaJk+LFEolE nJQgEQk28SxfCeV8UiEz0Hk0raP1z+swrl9oAXZppTJC+uLtdIfVeKnPVBC2nfvb/btzE+Ek M7i39+ipNEnmAYtJJ82xfRG1Ia8l2l7TOJcdQN654txRtKsqIHgo4nF347Fji0ZVfqas5MAS 5PTWk3U/JYxJ8duvZ5k7kXyaHzic5cYTY4WZPebmmX2K0tm4qPwvD9U1NcUvOrPHe19IENbs imk4WO9RjvzIC03rDL6XHtt+vEoezW2MPG/6aCBhe4Dh/sqzduyHtqzdik1/DRbLZ5WkPeA1 8aPPnw5905pqDgkMS/5VY30anfldYUh6tend4aiUw5QnM2ze32FS9x4O36/e9+oFZnTbzKG9 A0GFKUcOnrXyN1xXL/2TK8AZpUwkZOkZ2b/rjBvMcwQAAA== X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFprOIsWRmVeSWpSXmKPExsWy7bCSnO67NNdkg3f9BhZPd8xktXgwbxub xeIfz5ks7i/+zGJxaPNWdostV2YzWyw/foDVYv6Rc6wW2w8+YrHY+AIoe3HmXRaL5/PXMVq8 nHWPzWLT42usFg9fhVtc3jWHzaJnw1ZWi7VH7rJbLL1+kcli2aY/TBaLtn5ht2jde4Td4u6e bYwWLW1HmBwkPNbMW8PosePuEkaP60s+MXvsnHWX3WPxnpdMHptWdbJ53Lm2h81j85J6j9aj v1g8+rasYvT41zSX3aPryHU2j8+b5DxOff3MHsAXxWWTkpqTWZZapG+XwJXR11xcMN2soufz O5YGxr36XYwcHBICJhKfGhi7GLk4hAR2M0qcmPOFtYuREyguI/G/7Rg7hC0ssfLfc3aIomYm iQfXvjOCJNgEdCX2Lz3ABpIQEWhllLi+spMJxGEWmM0i8WPSAbBRwgI+Eq/vHWUBsVkEVCXW P1jJBmLzCthKvJ35AGqdvMTqDQeYQWxOATuJj0uPgdUIAdU0vp/KNIGRbwEjwypGydSC4tz0 3GLDAsO81HK94sTc4tK8dL3k/NxNjOC409Lcwbh91Qe9Q4xMHIyHGCU4mJVEeBnnOyUL8aYk VlalFuXHF5XmpBYfYpTmYFES573QdTJeSCA9sSQ1OzW1ILUIJsvEwSnVwLT0s7c0X443p1DQ CYvk7zwLRQ+9duJvSMzdP6cio1Ruw51PL1XWc6fWToz5wHpwouGUiRetDlz+Jv9B1Oh+QV7o myvWHxM2tUSmJ5wrOzzv9CR74frXt2WEmlVmppcadXHn9u9qC73NIr5aveFQ68fNttIJy5YE C7N8Un73MPxyGdcmabd6JimGclmPc+VSW2SNp9r47WQrrGi5t3C74ou9YlKvTbpSPy52XVhq vmWCcuQCQWPteSyaKxvVYqWOmz2RCfvAU/1a9EJ2Np/Y5jqxZWXFOwIOtJfcfRiedc5384NT 68trvrX1sLSYaE9aVHdu/stZ6ZeuLL4SnbXjpvQlBdX3GSGvf+RH/wr/rcRSnJFoqMVcVJwI ABJtdGYqAwAA X-CMS-MailID: 20221011125158epcas5p14f2b333fdb1eed793e9fbf85409f5a36 X-Msg-Generator: CA X-Sendblock-Type: REQ_APPROVE CMS-TYPE: 105P DLP-Filter: Pass X-CFilter-Loop: Reflected X-CMS-RootMailID: 20221011125158epcas5p14f2b333fdb1eed793e9fbf85409f5a36 References: <20221011122516.32135-1-aakarsh.jain@samsung.com> Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org From: Smitha T Murthy Add V4l2 controls for VP9 encoder Cc: linux-fsd@tesla.com Signed-off-by: Smitha T Murthy Signed-off-by: Aakarsh Jain --- drivers/media/v4l2-core/v4l2-ctrls-defs.c | 44 +++++++++++++++++++++++ include/uapi/linux/v4l2-controls.h | 33 +++++++++++++++++ 2 files changed, 77 insertions(+) diff --git a/drivers/media/v4l2-core/v4l2-ctrls-defs.c b/drivers/media/v4l2-core/v4l2-ctrls-defs.c index e22921e7ea61..2d92e93158bd 100644 --- a/drivers/media/v4l2-core/v4l2-ctrls-defs.c +++ b/drivers/media/v4l2-core/v4l2-ctrls-defs.c @@ -577,6 +577,21 @@ const char * const *v4l2_ctrl_get_menu(u32 id) "Cyclic", NULL, }; + static const char * const vp9_golden_framesel[] = { + "Use previous", + "Use refresh period", + NULL, + }; + static const char * const vp9_ref_num_for_pframes[] = { + "1", + "2", + NULL, + }; + static const char * const vp9_max_partition_depth[] = { + "No CU partition depth", + "Allow 1 CU partition depth", + NULL, + }; switch (id) { case V4L2_CID_MPEG_AUDIO_SAMPLING_FREQ: @@ -708,6 +723,12 @@ const char * const *v4l2_ctrl_get_menu(u32 id) return hevc_decode_mode; case V4L2_CID_STATELESS_HEVC_START_CODE: return hevc_start_code; + case V4L2_CID_CODEC_VP9_GOLDEN_FRAMESEL: + return vp9_golden_framesel; + case V4L2_CID_CODEC_VP9_REF_NUMBER_FOR_PFRAMES: + return vp9_ref_num_for_pframes; + case V4L2_CID_CODEC_VP9_MAX_PARTITION_DEPTH: + return vp9_max_partition_depth; case V4L2_CID_CAMERA_ORIENTATION: return camera_orientation; case V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD_TYPE: @@ -950,6 +971,26 @@ const char *v4l2_ctrl_get_name(u32 id) case V4L2_CID_MPEG_VIDEO_VP8_PROFILE: return "VP8 Profile"; case V4L2_CID_MPEG_VIDEO_VP9_PROFILE: return "VP9 Profile"; case V4L2_CID_MPEG_VIDEO_VP9_LEVEL: return "VP9 Level"; + case V4L2_CID_CODEC_VP9_I_FRAME_QP: return "VP9 I Frame QP Value"; + case V4L2_CID_CODEC_VP9_P_FRAME_QP: return "VP9 P Frame QP Value"; + case V4L2_CID_CODEC_VP9_MAX_QP: return "VP9 Frame QP MAX Value"; + case V4L2_CID_CODEC_VP9_MIN_QP: return "VP9 Frame QP MIN Value"; + case V4L2_CID_CODEC_VP9_RC_FRAME_RATE: return "VP9 Frame Rate"; + case V4L2_CID_CODEC_VP9_GOLDEN_FRAMESEL: return "VP9 Indication of Golden Frame"; + case V4L2_CID_CODEC_VP9_GF_REFRESH_PERIOD: return "VP9 Golden Frame Refresh Period"; + case V4L2_CID_CODEC_VP9_HIERARCHY_QP_ENABLE: return "VP9 Hierarchical QP Enable"; + case V4L2_CID_CODEC_VP9_REF_NUMBER_FOR_PFRAMES: return "VP9 Number of Reference Pictures"; + case V4L2_CID_CODEC_VP9_HIERARCHICAL_CODING_LAYER:return "VP9 Num of Hierarchical Layers"; + case V4L2_CID_CODEC_VP9_MAX_PARTITION_DEPTH: return "VP9 Maximum Coding Unit Depth"; + case V4L2_CID_CODEC_VP9_DISABLE_INTRA_PU_SPLIT: return "VP9 Disable Intra PU Split"; + case V4L2_CID_CODEC_VP9_HIERARCHY_RC_ENABLE: return "VP9 Hierarchical BitRate Enable"; + case V4L2_CID_CODEC_VP9_HIER_CODING_L0_BR: return "VP9 Hierarchical Layer 0 BitRate"; + case V4L2_CID_CODEC_VP9_HIER_CODING_L1_BR: return "VP9 Hierarchical Layer 1 BitRate"; + case V4L2_CID_CODEC_VP9_HIER_CODING_L2_BR: return "VP9 Hierarchical Layer 2 BitRate"; + case V4L2_CID_CODEC_VP9_HIER_CODING_L0_QP: return "VP9 Layer0 QP Value"; + case V4L2_CID_CODEC_VP9_HIER_CODING_L1_QP: return "VP9 Layer1 QP Value"; + case V4L2_CID_CODEC_VP9_HIER_CODING_L2_QP: return "VP9 Layer2 QP Value"; + case V4L2_CID_CODEC_VP9_DISABLE_IVF_HEADER: return "VP9 IVF header generation"; /* HEVC controls */ case V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_QP: return "HEVC I-Frame QP Value"; @@ -1366,6 +1407,9 @@ void v4l2_ctrl_fill(u32 id, const char **name, enum v4l2_ctrl_type *type, case V4L2_CID_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE: case V4L2_CID_STATELESS_HEVC_DECODE_MODE: case V4L2_CID_STATELESS_HEVC_START_CODE: + case V4L2_CID_CODEC_VP9_GOLDEN_FRAMESEL: + case V4L2_CID_CODEC_VP9_REF_NUMBER_FOR_PFRAMES: + case V4L2_CID_CODEC_VP9_MAX_PARTITION_DEPTH: case V4L2_CID_STATELESS_H264_DECODE_MODE: case V4L2_CID_STATELESS_H264_START_CODE: case V4L2_CID_CAMERA_ORIENTATION: diff --git a/include/uapi/linux/v4l2-controls.h b/include/uapi/linux/v4l2-controls.h index b5e7d082b8ad..a60b60bc4ad4 100644 --- a/include/uapi/linux/v4l2-controls.h +++ b/include/uapi/linux/v4l2-controls.h @@ -722,6 +722,38 @@ enum v4l2_mpeg_video_vp9_level { V4L2_MPEG_VIDEO_VP9_LEVEL_6_1 = 12, V4L2_MPEG_VIDEO_VP9_LEVEL_6_2 = 13, }; +#define V4L2_CID_CODEC_VP9_RC_FRAME_RATE (V4L2_CID_CODEC_BASE+514) +#define V4L2_CID_CODEC_VP9_MIN_QP (V4L2_CID_CODEC_BASE+515) +#define V4L2_CID_CODEC_VP9_MAX_QP (V4L2_CID_CODEC_BASE+516) +#define V4L2_CID_CODEC_VP9_I_FRAME_QP (V4L2_CID_CODEC_BASE+517) +#define V4L2_CID_CODEC_VP9_P_FRAME_QP (V4L2_CID_CODEC_BASE+518) +#define V4L2_CID_CODEC_VP9_GOLDEN_FRAMESEL (V4L2_CID_CODEC_BASE+519) +enum v4l2_mpeg_vp9_golden_framesel { + V4L2_CID_CODEC_VP9_GOLDEN_FRAME_USE_PREV = 0, + V4L2_CID_CODEC_VP9_GOLDEN_FRAME_USE_REF_PERIOD = 1, +}; +#define V4L2_CID_CODEC_VP9_GF_REFRESH_PERIOD (V4L2_CID_CODEC_BASE+520) +#define V4L2_CID_CODEC_VP9_HIERARCHY_QP_ENABLE (V4L2_CID_CODEC_BASE+521) +#define V4L2_CID_CODEC_VP9_REF_NUMBER_FOR_PFRAMES (V4L2_CID_CODEC_BASE+522) +enum v4l2_mpeg_vp9_ref_num_for_pframes { + V4L2_CID_CODEC_VP9_1_REF_PFRAME = 0, + V4L2_CID_CODEC_VP9_2_REF_PFRAME = 1, +}; +#define V4L2_CID_CODEC_VP9_HIERARCHICAL_CODING_LAYER (V4L2_CID_CODEC_BASE+523) +#define V4L2_CID_CODEC_VP9_HIER_CODING_L0_BR (V4L2_CID_CODEC_BASE+524) +#define V4L2_CID_CODEC_VP9_HIER_CODING_L1_BR (V4L2_CID_CODEC_BASE+525) +#define V4L2_CID_CODEC_VP9_HIER_CODING_L2_BR (V4L2_CID_CODEC_BASE+526) +#define V4L2_CID_CODEC_VP9_HIER_CODING_L0_QP (V4L2_CID_CODEC_BASE+527) +#define V4L2_CID_CODEC_VP9_HIER_CODING_L1_QP (V4L2_CID_CODEC_BASE+528) +#define V4L2_CID_CODEC_VP9_HIER_CODING_L2_QP (V4L2_CID_CODEC_BASE+529) +#define V4L2_CID_CODEC_VP9_MAX_PARTITION_DEPTH (V4L2_CID_CODEC_BASE+530) +enum v4l2_mpeg_vp9_num_partitions { + V4L2_CID_CODEC_VP9_0_PARTITION = 0, + V4L2_CID_CODEC_VP9_1_PARTITION = 1, +}; +#define V4L2_CID_CODEC_VP9_DISABLE_INTRA_PU_SPLIT (V4L2_CID_CODEC_BASE+531) +#define V4L2_CID_CODEC_VP9_DISABLE_IVF_HEADER (V4L2_CID_CODEC_BASE+532) +#define V4L2_CID_CODEC_VP9_HIERARCHY_RC_ENABLE (V4L2_CID_CODEC_BASE+533) /* CIDs for HEVC encoding. */ @@ -832,6 +864,7 @@ enum v4l2_mpeg_video_frame_skip_mode { #define V4L2_CID_MPEG_VIDEO_DEC_DISPLAY_DELAY (V4L2_CID_CODEC_BASE + 653) #define V4L2_CID_MPEG_VIDEO_DEC_DISPLAY_DELAY_ENABLE (V4L2_CID_CODEC_BASE + 654) + /* MPEG-class control IDs specific to the CX2341x driver as defined by V4L2 */ #define V4L2_CID_CODEC_CX2341X_BASE (V4L2_CTRL_CLASS_CODEC | 0x1000) #define V4L2_CID_MPEG_CX2341X_VIDEO_SPATIAL_FILTER_MODE (V4L2_CID_CODEC_CX2341X_BASE+0) From patchwork Tue Oct 11 12:25:09 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Aakarsh Jain X-Patchwork-Id: 614705 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1450DC43217 for ; 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Tue, 11 Oct 2022 12:52:05 +0000 (GMT) Received: from epsmgms1p2.samsung.com (unknown [182.195.42.42]) by epsmtrp2.samsung.com (KnoxPortal) with ESMTP id 20221011125205epsmtrp2d0a54e12893dd3f0d54a02f8b5be490c~dBM9W2zsl1820318203epsmtrp2A; Tue, 11 Oct 2022 12:52:05 +0000 (GMT) X-AuditID: b6c32a4b-383ff7000001dc20-4c-634638eb9c51 Received: from epsmtip1.samsung.com ( [182.195.34.30]) by epsmgms1p2.samsung.com (Symantec Messaging Gateway) with SMTP id A0.94.18644.5F665436; Tue, 11 Oct 2022 21:52:05 +0900 (KST) Received: from cheetah.sa.corp.samsungelectronics.net (unknown [107.109.115.53]) by epsmtip1.samsung.com (KnoxPortal) with ESMTPA id 20221011125202epsmtip1cc4f660560d47d8b9acfab3899e43525~dBM6NcmhG2345023450epsmtip1g; Tue, 11 Oct 2022 12:52:02 +0000 (GMT) From: aakarsh jain To: linux-arm-kernel@lists.infradead.org, linux-media@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Cc: m.szyprowski@samsung.com, andrzej.hajda@intel.com, mchehab@kernel.org, hverkuil-cisco@xs4all.nl, ezequiel@vanguardiasur.com.ar, jernej.skrabec@gmail.com, benjamin.gaignard@collabora.com, stanimir.varbanov@linaro.org, dillon.minfei@gmail.com, david.plowman@raspberrypi.com, mark.rutland@arm.com, robh+dt@kernel.org, krzk+dt@kernel.org, andi@etezian.org, alim.akhtar@samsung.com, aswani.reddy@samsung.com, pankaj.dubey@samsung.com, linux-fsd@tesla.com, smitha.t@samsung.com, aakarsh.jain@samsung.com Subject: [Patch v3 08/15] media: s5p-mfc: Add YV12 and I420 multiplanar format support Date: Tue, 11 Oct 2022 17:55:09 +0530 Message-Id: <20221011122516.32135-9-aakarsh.jain@samsung.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20221011122516.32135-1-aakarsh.jain@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA0VTe0xTVxjfuff2thiLNyjzSCaym40FNqAF2h0IDyOid8Iim9kjbobV9o4y Stu1xTGM4yWb1I6HQ6fIwPAYGSLvR0fRdaWT4AwbzoADOhkwGBIftJoRMLrSlu2/3/f7ft/5 ft93zuHhPjOkHy9dqWM1SomCJjcQPQNBQSGLaI9U0G+PRn8Zz3HQVHUPieqW5zF0u85BIEtn Nxd13TyPo8ZBMwfVWIc5qPfHaQK1/+3MjpyzEWi+pgWghco/SNQxM8pBf955B/3WV0UiQ1s3 B12y2rioYWwEQ992PMZQbfdDLiq6bOUiW38PQMc/t2I7IdNc3QwYo60eMGP1dpz5vtLGZer6 FzCmo6mYZCZH+0mmsz6XKfpphWBKupoA86TgGy6jt46RjKPDn7n2yMFN8T6YESNnJTJWE8Aq pSpZujItlk46kJqQKhILhCHCKPQqHaCUZLKx9O7klJA96QrnGuiAIxJFlpNKkWi1dFhcjEaV pWMD5CqtLpZm1TKFOlIdqpVkarOUaaFKVhctFAjCRU7hBxny6t5eoNavgOzVblEeePor0AMv HqQioflhJ0cPNvB8KBOAhskl0h3YASzLK8XcgQPAcaONu15SdsKOuxN9AM4OFxPuoAiD9wss LhVJhcAfGszkGt5C5QM4c0K3JsKpQgLarq+6RJupd6Fj4meXiKBehBNnHC6eT8XC5ooHpLvd DnixzYyvYS8qDi41XHUZhFShF/zq0RzhFu2GwwMmz0ib4Z3BLo9XP+i4d9lzkBTO1C7gbqyA rf0Vntp4aL5Z5cQ8p7sg2NoX5qa3w9PXWrA1jFPe8MvVWczN86Gxeh0HwqrJZY4bPwcHLjZ4 LDBwrKHas9VyAJduHCfLgH/l/y0uANAEtrFqbWYaqxWpI5TsJ/9dnFSV2QFcrz04yQimpx6E WgDGAxYAeTi9hQ9qdkl9+DLJpzmsRpWqyVKwWgsQORdYjvv5SlXO76LUpQojowSRYrE4MipC LKS38uvOBkt9qDSJjs1gWTWrWa/DeF5+edgu4HgB3EKPzYKVl6JiumxXwpYGElqDXmtbjjZM TC7G78gvoNtkd68ubvWfx18+5CNKMbEm0xuLCyXnA9/bdjhDt/x+jClxouqV3LS5wtGWkuFT e0eI4lPZ+9CNtw2G9qN+c9bwvXL9UF2pbOOBbE187RFOedj+7c/7FnNWqxqZGZNVoF7sDpeT l57y5ywWu6Z9/uBO2bi+a1NBwoWhqe9Ubx6r3HcF/pNI1fZa7kqb92/Mafzl64io1uv3hhI6 3xo/m5V/Sz1NfSwfFG/iHD15WB+e83vuFxX3n/EuTY+YGi77MDk0MTmh8LPwJ9ixUZHw2bii wNnXw5KWD92OUGMf+SbShFYuEQbjGq3kX5P7sll2BAAA X-Brightmail-Tracker: H4sIAAAAAAAAAzWRfUzMcRzHfX/PHfFz2fq6LNthOJWHie+kssb6mYdYYcPkVr87TXedux48 P1/LCU1pXdL1yPRg53T1o0NyysPoGutmXISWaibu8hCKrvnv/fm83nt9/vgwuLiQkDBJ6lRe q5YnSykRUX9fGhg8qFiVsMA2OBN1C0YSvS2up1D5jx4MvSl3E6j5hpVGdS8u4uhKaxOJTPZn JGq4945A1z/+o+1GF4F6TNcA6i3spJDlfQeJuvq2oOe3iiiUbbaSqNbuolGlsx1Dly2/MVRm 9dBIf9tOI5etHqCTmXZsBeRqimsAJ7gqAOes+IpzNwtdNFdu68U4S9UpinvdYaO4GxVHOP2D IYI7W1cFuOHjl2jOYHdSnNsSyD0edNMbJm4VLU/kk5PSee38iJ2iXcUNDUBjGAJ7f1lDj4IR BzAAHwayi2FO1lfcAESMmBUAPPnoHDkGpsGRzBZ6LPvBq8M99FjpBAbfua34KKDYYHi3soka BVNYPYDOq6ew0QFnLxLwx/kmr8qP3QyLDCavimBnwVf5bm/2ZcNhTd4ANXZiOqw2N3mtPmwE /FLZ4t2L/3WOfb6A5YCJJWBcFZjKa3QqpUq3ULNIzWeE6OQqXZpaGZKQorIA7/tkMgHYqgZC mgHGgGYAGVw6xReYohLEvonyfft5bUq8Ni2Z1zWDAIaQ+vs6DI/ixaxSnsrv5nkNr/1PMcZH chTLe/4ktI1vPHgmKuxcnTkmRaTRKxWOO9+X9UtvN9a2fGCS//gNw1LAz/25cjXJfcvO1m2d /4mNnFTT1R9kFoiHe4jG1ty+b8oZ8WHi1BP6mMPVeEFQ+KtbUmlwOyN0GT+uB3GFvyo2Lv1T 2u5IwlUKxSrSOsfnZ2Rafot7SUBW9KEAdcSBjrSyDFHgMXncjOgDRqO+f4csnZ8XOVvgjheE eqK7R1a0xrZ15o0rGZ+7LChx28rZpaULdqx9v9vhCTls6srPWXdPWOKviJdNN+2fcHYgK10S 5Tn49NqA8N3fGUBOcsd2bAqXZK65PjWpHJnjtneeXjQUVtb2ctgzeYOU0O2SL5ThWp38L/3R jTQtAwAA X-CMS-MailID: 20221011125205epcas5p2ebee35403cadc0c1c455b6764d93341f X-Msg-Generator: CA X-Sendblock-Type: REQ_APPROVE CMS-TYPE: 105P DLP-Filter: Pass X-CFilter-Loop: Reflected X-CMS-RootMailID: 20221011125205epcas5p2ebee35403cadc0c1c455b6764d93341f References: <20221011122516.32135-1-aakarsh.jain@samsung.com> Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org From: Smitha T Murthy YV12 and I420 format (3-plane) support is added. Stride information is added to all formats and planes since it is necessary for YV12/I420 which are different from width. Cc: linux-fsd@tesla.com Signed-off-by: Smitha T Murthy Signed-off-by: Aakarsh Jain --- .../platform/samsung/s5p-mfc/regs-mfc-v12.h | 2 + .../platform/samsung/s5p-mfc/regs-mfc-v7.h | 1 + .../platform/samsung/s5p-mfc/regs-mfc-v8.h | 3 + .../platform/samsung/s5p-mfc/s5p_mfc_common.h | 4 + .../platform/samsung/s5p-mfc/s5p_mfc_dec.c | 45 ++++- .../platform/samsung/s5p-mfc/s5p_mfc_enc.c | 86 +++++++-- .../platform/samsung/s5p-mfc/s5p_mfc_opr.h | 6 +- .../platform/samsung/s5p-mfc/s5p_mfc_opr_v5.c | 12 +- .../platform/samsung/s5p-mfc/s5p_mfc_opr_v6.c | 168 +++++++++++++++--- 9 files changed, 281 insertions(+), 46 deletions(-) diff --git a/drivers/media/platform/samsung/s5p-mfc/regs-mfc-v12.h b/drivers/media/platform/samsung/s5p-mfc/regs-mfc-v12.h index 7cb74a9cb769..07cb218c0179 100644 --- a/drivers/media/platform/samsung/s5p-mfc/regs-mfc-v12.h +++ b/drivers/media/platform/samsung/s5p-mfc/regs-mfc-v12.h @@ -30,6 +30,8 @@ #define MFC_VERSION_V12 0xC0 #define MFC_NUM_PORTS_V12 1 #define S5P_FIMV_CODEC_VP9_ENC 27 +#define MFC_CHROMA_PAD_BYTES_V12 256 +#define S5P_FIMV_D_ALIGN_PLANE_SIZE_V12 256 /* Encoder buffer size for MFCv12 */ #define ENC_V120_BASE_SIZE(x, y) \ diff --git a/drivers/media/platform/samsung/s5p-mfc/regs-mfc-v7.h b/drivers/media/platform/samsung/s5p-mfc/regs-mfc-v7.h index 4a7adfdaa359..50f9bf0603c1 100644 --- a/drivers/media/platform/samsung/s5p-mfc/regs-mfc-v7.h +++ b/drivers/media/platform/samsung/s5p-mfc/regs-mfc-v7.h @@ -24,6 +24,7 @@ #define S5P_FIMV_E_ENCODED_SOURCE_FIRST_ADDR_V7 0xfa70 #define S5P_FIMV_E_ENCODED_SOURCE_SECOND_ADDR_V7 0xfa74 +#define S5P_FIMV_E_ENCODED_SOURCE_THIRD_ADDR_V7 0xfa78 #define S5P_FIMV_E_VP8_OPTIONS_V7 0xfdb0 #define S5P_FIMV_E_VP8_FILTER_OPTIONS_V7 0xfdb4 diff --git a/drivers/media/platform/samsung/s5p-mfc/regs-mfc-v8.h b/drivers/media/platform/samsung/s5p-mfc/regs-mfc-v8.h index 162e3c7e920f..0ef9eb2dff22 100644 --- a/drivers/media/platform/samsung/s5p-mfc/regs-mfc-v8.h +++ b/drivers/media/platform/samsung/s5p-mfc/regs-mfc-v8.h @@ -17,13 +17,16 @@ #define S5P_FIMV_D_MIN_SCRATCH_BUFFER_SIZE_V8 0xf108 #define S5P_FIMV_D_FIRST_PLANE_DPB_SIZE_V8 0xf144 #define S5P_FIMV_D_SECOND_PLANE_DPB_SIZE_V8 0xf148 +#define S5P_FIMV_D_THIRD_PLANE_DPB_SIZE_V8 0xf14C #define S5P_FIMV_D_MV_BUFFER_SIZE_V8 0xf150 #define S5P_FIMV_D_FIRST_PLANE_DPB_STRIDE_SIZE_V8 0xf138 #define S5P_FIMV_D_SECOND_PLANE_DPB_STRIDE_SIZE_V8 0xf13c +#define S5P_FIMV_D_THIRD_PLANE_DPB_STRIDE_SIZE_V8 0xf140 #define S5P_FIMV_D_FIRST_PLANE_DPB_V8 0xf160 #define S5P_FIMV_D_SECOND_PLANE_DPB_V8 0xf260 +#define S5P_FIMV_D_THIRD_PLANE_DPB_V8 0xf360 #define S5P_FIMV_D_MV_BUFFER_V8 0xf460 #define S5P_FIMV_D_NUM_MV_V8 0xf134 diff --git a/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_common.h b/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_common.h index 10abaa50d7db..f6ed3eeda6ba 100644 --- a/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_common.h +++ b/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_common.h @@ -56,6 +56,7 @@ #define MFC_NO_INSTANCE_SET -1 #define MFC_ENC_CAP_PLANE_COUNT 1 #define MFC_ENC_OUT_PLANE_COUNT 2 +#define VB2_MAX_PLANE_COUNT 3 #define STUFF_BYTE 4 #define MFC_MAX_CTRLS 147 @@ -182,6 +183,7 @@ struct s5p_mfc_buf { struct { size_t luma; size_t chroma; + size_t chroma_1; } raw; size_t stream; } cookie; @@ -682,6 +684,7 @@ struct s5p_mfc_ctx { int luma_size; int chroma_size; + int chroma_size_1; int mv_size; unsigned long consumed_stream; @@ -747,6 +750,7 @@ struct s5p_mfc_ctx { size_t scratch_buf_size; int is_10bit; int is_422; + int stride[VB2_MAX_PLANE_COUNT]; }; /* diff --git a/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_dec.c b/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_dec.c index e219cbcd86d5..317f796fffa1 100644 --- a/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_dec.c +++ b/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_dec.c @@ -56,6 +56,20 @@ static struct s5p_mfc_fmt formats[] = { .num_planes = 2, .versions = MFC_V6PLUS_BITS, }, + { + .fourcc = V4L2_PIX_FMT_YUV420M, + .codec_mode = S5P_MFC_CODEC_NONE, + .type = MFC_FMT_RAW, + .num_planes = 3, + .versions = MFC_V12_BIT, + }, + { + .fourcc = V4L2_PIX_FMT_YVU420M, + .codec_mode = S5P_MFC_CODEC_NONE, + .type = MFC_FMT_RAW, + .num_planes = 3, + .versions = MFC_V12_BIT + }, { .fourcc = V4L2_PIX_FMT_H264, .codec_mode = S5P_MFC_CODEC_H264_DEC, @@ -359,10 +373,15 @@ static int vidioc_g_fmt(struct file *file, void *priv, struct v4l2_format *f) /* Set pixelformat to the format in which MFC outputs the decoded frame */ pix_mp->pixelformat = ctx->dst_fmt->fourcc; - pix_mp->plane_fmt[0].bytesperline = ctx->buf_width; + pix_mp->plane_fmt[0].bytesperline = ctx->stride[0]; pix_mp->plane_fmt[0].sizeimage = ctx->luma_size; - pix_mp->plane_fmt[1].bytesperline = ctx->buf_width; + pix_mp->plane_fmt[1].bytesperline = ctx->stride[1]; pix_mp->plane_fmt[1].sizeimage = ctx->chroma_size; + if (ctx->dst_fmt->fourcc == V4L2_PIX_FMT_YUV420M || + ctx->dst_fmt->fourcc == V4L2_PIX_FMT_YVU420M) { + pix_mp->plane_fmt[2].bytesperline = ctx->stride[2]; + pix_mp->plane_fmt[2].sizeimage = ctx->chroma_size_1; + } } else if (f->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) { /* This is run on OUTPUT The buffer contains compressed image @@ -937,6 +956,9 @@ static int s5p_mfc_queue_setup(struct vb2_queue *vq, vq->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) { /* Output plane count is 2 - one for Y and one for CbCr */ *plane_count = 2; + if (ctx->dst_fmt->fourcc == V4L2_PIX_FMT_YUV420M || + ctx->dst_fmt->fourcc == V4L2_PIX_FMT_YVU420M) + *plane_count = 3; /* Setup buffer count */ if (*buf_count < ctx->pb_count) *buf_count = ctx->pb_count; @@ -955,12 +977,17 @@ static int s5p_mfc_queue_setup(struct vb2_queue *vq, vq->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) { psize[0] = ctx->luma_size; psize[1] = ctx->chroma_size; - + if (ctx->dst_fmt->fourcc == V4L2_PIX_FMT_YUV420M || + ctx->dst_fmt->fourcc == V4L2_PIX_FMT_YVU420M) + psize[2] = ctx->chroma_size_1; if (IS_MFCV6_PLUS(dev)) alloc_devs[0] = ctx->dev->mem_dev[BANK_L_CTX]; else alloc_devs[0] = ctx->dev->mem_dev[BANK_R_CTX]; alloc_devs[1] = ctx->dev->mem_dev[BANK_L_CTX]; + if (ctx->dst_fmt->fourcc == V4L2_PIX_FMT_YUV420M || + ctx->dst_fmt->fourcc == V4L2_PIX_FMT_YVU420M) + alloc_devs[2] = ctx->dev->mem_dev[BANK_L_CTX]; } else if (vq->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE && ctx->state == MFCINST_INIT) { psize[0] = ctx->dec_src_buf_size; @@ -994,12 +1021,24 @@ static int s5p_mfc_buf_init(struct vb2_buffer *vb) mfc_err("Plane buffer (CAPTURE) is too small\n"); return -EINVAL; } + if (ctx->dst_fmt->fourcc == V4L2_PIX_FMT_YUV420M || + ctx->dst_fmt->fourcc == V4L2_PIX_FMT_YVU420M) { + if (vb2_plane_size(vb, 2) < ctx->chroma_size_1) { + mfc_err("Plane buffer (CAPTURE) is too small\n"); + return -EINVAL; + } + } i = vb->index; ctx->dst_bufs[i].b = vbuf; ctx->dst_bufs[i].cookie.raw.luma = vb2_dma_contig_plane_dma_addr(vb, 0); ctx->dst_bufs[i].cookie.raw.chroma = vb2_dma_contig_plane_dma_addr(vb, 1); + if (ctx->dst_fmt->fourcc == V4L2_PIX_FMT_YUV420M || + ctx->dst_fmt->fourcc == V4L2_PIX_FMT_YVU420M) { + ctx->dst_bufs[i].cookie.raw.chroma_1 = + vb2_dma_contig_plane_dma_addr(vb, 2); + } ctx->dst_bufs_cnt++; } else if (vq->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) { if (IS_ERR_OR_NULL(ERR_PTR( diff --git a/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_enc.c b/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_enc.c index 197667ab1fbc..b761b9a31383 100644 --- a/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_enc.c +++ b/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_enc.c @@ -59,6 +59,20 @@ static struct s5p_mfc_fmt formats[] = { .num_planes = 2, .versions = MFC_V6PLUS_BITS, }, + { + .fourcc = V4L2_PIX_FMT_YUV420M, + .codec_mode = S5P_MFC_CODEC_NONE, + .type = MFC_FMT_RAW, + .num_planes = 3, + .versions = MFC_V12_BIT, + }, + { + .fourcc = V4L2_PIX_FMT_YVU420M, + .codec_mode = S5P_MFC_CODEC_NONE, + .type = MFC_FMT_RAW, + .num_planes = 3, + .versions = MFC_V12_BIT, + }, { .fourcc = V4L2_PIX_FMT_H264, .codec_mode = S5P_MFC_CODEC_H264_ENC, @@ -1369,14 +1383,20 @@ static int enc_pre_frame_start(struct s5p_mfc_ctx *ctx) struct s5p_mfc_dev *dev = ctx->dev; struct s5p_mfc_buf *dst_mb; struct s5p_mfc_buf *src_mb; - unsigned long src_y_addr, src_c_addr, dst_addr; + unsigned long src_y_addr, src_c_addr, src_c_1_addr, dst_addr; unsigned int dst_size; src_mb = list_entry(ctx->src_queue.next, struct s5p_mfc_buf, list); src_y_addr = vb2_dma_contig_plane_dma_addr(&src_mb->b->vb2_buf, 0); src_c_addr = vb2_dma_contig_plane_dma_addr(&src_mb->b->vb2_buf, 1); + if (ctx->src_fmt->fourcc == V4L2_PIX_FMT_YUV420M || + ctx->src_fmt->fourcc == V4L2_PIX_FMT_YVU420M) + src_c_1_addr = + vb2_dma_contig_plane_dma_addr(&src_mb->b->vb2_buf, 2); + else + src_c_1_addr = 0; s5p_mfc_hw_call(dev->mfc_ops, set_enc_frame_buffer, ctx, - src_y_addr, src_c_addr); + src_y_addr, src_c_addr, src_c_1_addr); dst_mb = list_entry(ctx->dst_queue.next, struct s5p_mfc_buf, list); dst_addr = vb2_dma_contig_plane_dma_addr(&dst_mb->b->vb2_buf, 0); @@ -1391,8 +1411,8 @@ static int enc_post_frame_start(struct s5p_mfc_ctx *ctx) { struct s5p_mfc_dev *dev = ctx->dev; struct s5p_mfc_buf *mb_entry; - unsigned long enc_y_addr = 0, enc_c_addr = 0; - unsigned long mb_y_addr, mb_c_addr; + unsigned long enc_y_addr = 0, enc_c_addr = 0, enc_c_1_addr = 0; + unsigned long mb_y_addr, mb_c_addr, mb_c_1_addr; int slice_type; unsigned int strm_size; @@ -1404,14 +1424,21 @@ static int enc_post_frame_start(struct s5p_mfc_ctx *ctx) mfc_read(dev, S5P_FIMV_ENC_SI_PIC_CNT)); if (slice_type >= 0) { s5p_mfc_hw_call(dev->mfc_ops, get_enc_frame_buffer, ctx, - &enc_y_addr, &enc_c_addr); + &enc_y_addr, &enc_c_addr, &enc_c_1_addr); list_for_each_entry(mb_entry, &ctx->src_queue, list) { mb_y_addr = vb2_dma_contig_plane_dma_addr( &mb_entry->b->vb2_buf, 0); mb_c_addr = vb2_dma_contig_plane_dma_addr( &mb_entry->b->vb2_buf, 1); - if ((enc_y_addr == mb_y_addr) && - (enc_c_addr == mb_c_addr)) { + if (ctx->src_fmt->fourcc == V4L2_PIX_FMT_YUV420M || + ctx->src_fmt->fourcc == V4L2_PIX_FMT_YVU420M) + mb_c_1_addr = vb2_dma_contig_plane_dma_addr + (&mb_entry->b->vb2_buf, 2); + else + mb_c_1_addr = 0; + if ((enc_y_addr == mb_y_addr) + && (enc_c_addr == mb_c_addr) + && (enc_c_1_addr == mb_c_1_addr)) { list_del(&mb_entry->list); ctx->src_queue_cnt--; vb2_buffer_done(&mb_entry->b->vb2_buf, @@ -1424,8 +1451,15 @@ static int enc_post_frame_start(struct s5p_mfc_ctx *ctx) &mb_entry->b->vb2_buf, 0); mb_c_addr = vb2_dma_contig_plane_dma_addr( &mb_entry->b->vb2_buf, 1); - if ((enc_y_addr == mb_y_addr) && - (enc_c_addr == mb_c_addr)) { + if (ctx->src_fmt->fourcc == V4L2_PIX_FMT_YUV420M || + ctx->src_fmt->fourcc == V4L2_PIX_FMT_YVU420M) + mb_c_1_addr = vb2_dma_contig_plane_dma_addr( + &mb_entry->b->vb2_buf, 2); + else + mb_c_1_addr = 0; + if ((enc_y_addr == mb_y_addr) + && (enc_c_addr == mb_c_addr) + && (enc_c_1_addr == mb_c_1_addr)) { list_del(&mb_entry->list); ctx->ref_queue_cnt--; vb2_buffer_done(&mb_entry->b->vb2_buf, @@ -1549,10 +1583,15 @@ static int vidioc_g_fmt(struct file *file, void *priv, struct v4l2_format *f) pix_fmt_mp->pixelformat = ctx->src_fmt->fourcc; pix_fmt_mp->num_planes = ctx->src_fmt->num_planes; - pix_fmt_mp->plane_fmt[0].bytesperline = ctx->buf_width; + pix_fmt_mp->plane_fmt[0].bytesperline = ctx->stride[0]; pix_fmt_mp->plane_fmt[0].sizeimage = ctx->luma_size; - pix_fmt_mp->plane_fmt[1].bytesperline = ctx->buf_width; + pix_fmt_mp->plane_fmt[1].bytesperline = ctx->stride[1]; pix_fmt_mp->plane_fmt[1].sizeimage = ctx->chroma_size; + if (ctx->src_fmt->fourcc == V4L2_PIX_FMT_YUV420M || + ctx->src_fmt->fourcc == V4L2_PIX_FMT_YVU420M) { + pix_fmt_mp->plane_fmt[2].bytesperline = ctx->stride[2]; + pix_fmt_mp->plane_fmt[2].sizeimage = ctx->chroma_size_1; + } } else { mfc_err("invalid buf type\n"); return -EINVAL; @@ -1636,9 +1675,14 @@ static int vidioc_s_fmt(struct file *file, void *priv, struct v4l2_format *f) s5p_mfc_hw_call(dev->mfc_ops, enc_calc_src_size, ctx); pix_fmt_mp->plane_fmt[0].sizeimage = ctx->luma_size; - pix_fmt_mp->plane_fmt[0].bytesperline = ctx->buf_width; + pix_fmt_mp->plane_fmt[0].bytesperline = ctx->stride[0]; pix_fmt_mp->plane_fmt[1].sizeimage = ctx->chroma_size; - pix_fmt_mp->plane_fmt[1].bytesperline = ctx->buf_width; + pix_fmt_mp->plane_fmt[1].bytesperline = ctx->stride[1]; + if (ctx->src_fmt->fourcc == V4L2_PIX_FMT_YUV420M || + ctx->src_fmt->fourcc == V4L2_PIX_FMT_YVU420M) { + pix_fmt_mp->plane_fmt[2].bytesperline = ctx->stride[2]; + pix_fmt_mp->plane_fmt[2].sizeimage = ctx->chroma_size_1; + } ctx->src_bufs_cnt = 0; ctx->output_state = QUEUE_FREE; @@ -2679,10 +2723,16 @@ static int s5p_mfc_queue_setup(struct vb2_queue *vq, psize[0] = ctx->luma_size; psize[1] = ctx->chroma_size; + if (ctx->src_fmt->fourcc == V4L2_PIX_FMT_YUV420M || + ctx->src_fmt->fourcc == V4L2_PIX_FMT_YVU420M) + psize[2] = ctx->chroma_size_1; if (IS_MFCV6_PLUS(dev)) { alloc_devs[0] = ctx->dev->mem_dev[BANK_L_CTX]; alloc_devs[1] = ctx->dev->mem_dev[BANK_L_CTX]; + if (ctx->src_fmt->fourcc == V4L2_PIX_FMT_YUV420M || + ctx->src_fmt->fourcc == V4L2_PIX_FMT_YVU420M) + alloc_devs[2] = ctx->dev->mem_dev[BANK_L_CTX]; } else { alloc_devs[0] = ctx->dev->mem_dev[BANK_R_CTX]; alloc_devs[1] = ctx->dev->mem_dev[BANK_R_CTX]; @@ -2721,6 +2771,10 @@ static int s5p_mfc_buf_init(struct vb2_buffer *vb) vb2_dma_contig_plane_dma_addr(vb, 0); ctx->src_bufs[i].cookie.raw.chroma = vb2_dma_contig_plane_dma_addr(vb, 1); + if (ctx->src_fmt->fourcc == V4L2_PIX_FMT_YUV420M || + ctx->src_fmt->fourcc == V4L2_PIX_FMT_YVU420M) + ctx->src_bufs[i].cookie.raw.chroma_1 = + vb2_dma_contig_plane_dma_addr(vb, 2); ctx->src_bufs_cnt++; } else { mfc_err("invalid queue type: %d\n", vq->type); @@ -2758,6 +2812,12 @@ static int s5p_mfc_buf_prepare(struct vb2_buffer *vb) mfc_err("plane size is too small for output\n"); return -EINVAL; } + if ((ctx->src_fmt->fourcc == V4L2_PIX_FMT_YUV420M || + ctx->src_fmt->fourcc == V4L2_PIX_FMT_YVU420M) && + (vb2_plane_size(vb, 2) < ctx->chroma_size_1)) { + mfc_err("plane size is too small for output\n"); + return -EINVAL; + } } else { mfc_err("invalid queue type: %d\n", vq->type); return -EINVAL; diff --git a/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_opr.h b/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_opr.h index a005623e2daa..700704985c26 100644 --- a/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_opr.h +++ b/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_opr.h @@ -295,9 +295,11 @@ struct s5p_mfc_hw_ops { int (*set_enc_stream_buffer)(struct s5p_mfc_ctx *ctx, unsigned long addr, unsigned int size); void (*set_enc_frame_buffer)(struct s5p_mfc_ctx *ctx, - unsigned long y_addr, unsigned long c_addr); + unsigned long y_addr, unsigned long c_addr, + unsigned long c_1_addr); void (*get_enc_frame_buffer)(struct s5p_mfc_ctx *ctx, - unsigned long *y_addr, unsigned long *c_addr); + unsigned long *y_addr, unsigned long *c_addr, + unsigned long *c_1_addr); void (*try_run)(struct s5p_mfc_dev *dev); void (*clear_int_flags)(struct s5p_mfc_dev *dev); int (*get_dspl_y_adr)(struct s5p_mfc_dev *dev); diff --git a/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_opr_v5.c b/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_opr_v5.c index 28a06dc343fd..fcfaf125a5a1 100644 --- a/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_opr_v5.c +++ b/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_opr_v5.c @@ -516,7 +516,8 @@ static int s5p_mfc_set_enc_stream_buffer_v5(struct s5p_mfc_ctx *ctx, } static void s5p_mfc_set_enc_frame_buffer_v5(struct s5p_mfc_ctx *ctx, - unsigned long y_addr, unsigned long c_addr) + unsigned long y_addr, unsigned long c_addr, + unsigned long c_1_addr) { struct s5p_mfc_dev *dev = ctx->dev; @@ -525,7 +526,8 @@ static void s5p_mfc_set_enc_frame_buffer_v5(struct s5p_mfc_ctx *ctx, } static void s5p_mfc_get_enc_frame_buffer_v5(struct s5p_mfc_ctx *ctx, - unsigned long *y_addr, unsigned long *c_addr) + unsigned long *y_addr, unsigned long *c_addr, + unsigned long *c_1_addr) { struct s5p_mfc_dev *dev = ctx->dev; @@ -1210,7 +1212,7 @@ static int s5p_mfc_run_enc_frame(struct s5p_mfc_ctx *ctx) if (list_empty(&ctx->src_queue)) { /* send null frame */ s5p_mfc_set_enc_frame_buffer_v5(ctx, dev->dma_base[BANK_R_CTX], - dev->dma_base[BANK_R_CTX]); + dev->dma_base[BANK_R_CTX], 0); src_mb = NULL; } else { src_mb = list_entry(ctx->src_queue.next, struct s5p_mfc_buf, @@ -1220,7 +1222,7 @@ static int s5p_mfc_run_enc_frame(struct s5p_mfc_ctx *ctx) /* send null frame */ s5p_mfc_set_enc_frame_buffer_v5(ctx, dev->dma_base[BANK_R_CTX], - dev->dma_base[BANK_R_CTX]); + dev->dma_base[BANK_R_CTX], 0); ctx->state = MFCINST_FINISHING; } else { src_y_addr = vb2_dma_contig_plane_dma_addr( @@ -1228,7 +1230,7 @@ static int s5p_mfc_run_enc_frame(struct s5p_mfc_ctx *ctx) src_c_addr = vb2_dma_contig_plane_dma_addr( &src_mb->b->vb2_buf, 1); s5p_mfc_set_enc_frame_buffer_v5(ctx, src_y_addr, - src_c_addr); + src_c_addr, 0); if (src_mb->flags & MFC_BUF_FLAG_EOS) ctx->state = MFCINST_FINISHING; } diff --git a/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_opr_v6.c b/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_opr_v6.c index 87bd10b34620..27c2ada381ec 100644 --- a/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_opr_v6.c +++ b/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_opr_v6.c @@ -506,16 +506,43 @@ static void s5p_mfc_dec_calc_dpb_size_v6(struct s5p_mfc_ctx *ctx) struct s5p_mfc_dev *dev = ctx->dev; ctx->buf_width = ALIGN(ctx->img_width, S5P_FIMV_NV12MT_HALIGN_V6); ctx->buf_height = ALIGN(ctx->img_height, S5P_FIMV_NV12MT_VALIGN_V6); + ctx->chroma_size_1 = 0; mfc_debug(2, "SEQ Done: Movie dimensions %dx%d,\n" "buffer dimensions: %dx%d\n", ctx->img_width, ctx->img_height, ctx->buf_width, ctx->buf_height); - ctx->luma_size = calc_plane(ctx->img_width, ctx->img_height); - ctx->chroma_size = calc_plane(ctx->img_width, (ctx->img_height >> 1)); + switch (ctx->dst_fmt->fourcc) { + case V4L2_PIX_FMT_NV12M: + case V4L2_PIX_FMT_NV21M: + ctx->stride[0] = ALIGN(ctx->img_width, + S5P_FIMV_NV12MT_HALIGN_V6); + ctx->stride[1] = ALIGN(ctx->img_width, + S5P_FIMV_NV12MT_HALIGN_V6); + ctx->luma_size = calc_plane(ctx->stride[0], ctx->img_height); + ctx->chroma_size = calc_plane(ctx->stride[1], + (ctx->img_height / 2)); + break; + case V4L2_PIX_FMT_YUV420M: + case V4L2_PIX_FMT_YVU420M: + ctx->stride[0] = ALIGN(ctx->img_width, + S5P_FIMV_NV12MT_HALIGN_V6); + ctx->stride[1] = ALIGN(ctx->img_width / 2, + S5P_FIMV_NV12MT_HALIGN_V6); + ctx->stride[2] = ALIGN(ctx->img_width / 2, + S5P_FIMV_NV12MT_HALIGN_V6); + ctx->luma_size = calc_plane(ctx->stride[0], ctx->img_height); + ctx->chroma_size = calc_plane(ctx->stride[1], + (ctx->img_height / 2)); + ctx->chroma_size_1 = calc_plane(ctx->stride[2], + (ctx->img_height / 2)); + break; + } + if (IS_MFCV8_PLUS(ctx->dev)) { /* MFCv8 needs additional 64 bytes for luma,chroma dpb*/ ctx->luma_size += S5P_FIMV_D_ALIGN_PLANE_SIZE_V8; ctx->chroma_size += S5P_FIMV_D_ALIGN_PLANE_SIZE_V8; + ctx->chroma_size_1 += S5P_FIMV_D_ALIGN_PLANE_SIZE_V8; } if (ctx->codec_mode == S5P_MFC_CODEC_H264_DEC || @@ -546,15 +573,53 @@ static void s5p_mfc_enc_calc_src_size_v6(struct s5p_mfc_ctx *ctx) mb_width = MB_WIDTH(ctx->img_width); mb_height = MB_HEIGHT(ctx->img_height); - ctx->buf_width = ALIGN(ctx->img_width, S5P_FIMV_NV12M_HALIGN_V6); - ctx->luma_size = ALIGN((mb_width * mb_height) * 256, 256); - ctx->chroma_size = ALIGN((mb_width * mb_height) * 128, 256); - - /* MFCv7 needs pad bytes for Luma and Chroma */ - if (IS_MFCV7_PLUS(ctx->dev)) { + if (IS_MFCV12(ctx->dev)) { + switch (ctx->src_fmt->fourcc) { + case V4L2_PIX_FMT_NV12M: + case V4L2_PIX_FMT_NV21M: + ctx->stride[0] = ALIGN(ctx->img_width, + S5P_FIMV_NV12M_HALIGN_V6); + ctx->stride[1] = ALIGN(ctx->img_width, + S5P_FIMV_NV12M_HALIGN_V6); + ctx->luma_size = ctx->stride[0] * + ALIGN(ctx->img_height, 16); + ctx->chroma_size = ctx->stride[0] * + ALIGN(ctx->img_height / 2, 16); + break; + case V4L2_PIX_FMT_YUV420M: + case V4L2_PIX_FMT_YVU420M: + ctx->stride[0] = ALIGN(ctx->img_width, + S5P_FIMV_NV12M_HALIGN_V6); + ctx->stride[1] = ALIGN(ctx->img_width / 2, + S5P_FIMV_NV12M_HALIGN_V6); + ctx->stride[2] = ALIGN(ctx->img_width / 2, + S5P_FIMV_NV12M_HALIGN_V6); + ctx->luma_size = ctx->stride[0] * + ALIGN(ctx->img_height, 16); + ctx->chroma_size = ctx->stride[1] * + ALIGN(ctx->img_height / 2, 16); + ctx->chroma_size_1 = ctx->stride[2] * + ALIGN(ctx->img_height / 2, 16); + break; + } ctx->luma_size += MFC_LUMA_PAD_BYTES_V7; - ctx->chroma_size += MFC_CHROMA_PAD_BYTES_V7; + ctx->chroma_size += MFC_CHROMA_PAD_BYTES_V12; + ctx->chroma_size_1 += MFC_CHROMA_PAD_BYTES_V12; + } else { + ctx->buf_width = ALIGN(ctx->img_width, + S5P_FIMV_NV12M_HALIGN_V6); + ctx->stride[0] = ctx->buf_width; + ctx->stride[1] = ctx->buf_width; + ctx->luma_size = ALIGN((mb_width * mb_height) * 256, 256); + ctx->chroma_size = ALIGN((mb_width * mb_height) * 128, 256); + ctx->chroma_size_1 = 0; + /* MFCv7 needs pad bytes for Luma and Chroma */ + if (IS_MFCV7_PLUS(ctx->dev)) { + ctx->luma_size += MFC_LUMA_PAD_BYTES_V7; + ctx->chroma_size += MFC_LUMA_PAD_BYTES_V7; + } } + } /* Set registers for decoding stream buffer */ @@ -600,15 +665,21 @@ static int s5p_mfc_set_dec_frame_buffer_v6(struct s5p_mfc_ctx *ctx) writel(ctx->total_dpb_count, mfc_regs->d_num_dpb); writel(ctx->luma_size, mfc_regs->d_first_plane_dpb_size); writel(ctx->chroma_size, mfc_regs->d_second_plane_dpb_size); - + if (ctx->dst_fmt->fourcc == V4L2_PIX_FMT_YUV420M || + ctx->dst_fmt->fourcc == V4L2_PIX_FMT_YVU420M) + writel(ctx->chroma_size_1, mfc_regs->d_third_plane_dpb_size); writel(buf_addr1, mfc_regs->d_scratch_buffer_addr); writel(ctx->scratch_buf_size, mfc_regs->d_scratch_buffer_size); if (IS_MFCV8_PLUS(dev)) { - writel(ctx->img_width, + writel(ctx->stride[0], mfc_regs->d_first_plane_dpb_stride_size); - writel(ctx->img_width, + writel(ctx->stride[1], mfc_regs->d_second_plane_dpb_stride_size); + if (ctx->dst_fmt->fourcc == V4L2_PIX_FMT_YUV420M || + ctx->dst_fmt->fourcc == V4L2_PIX_FMT_YVU420M) + writel(ctx->stride[2], + mfc_regs->d_third_plane_dpb_stride_size); } buf_addr1 += ctx->scratch_buf_size; @@ -637,6 +708,13 @@ static int s5p_mfc_set_dec_frame_buffer_v6(struct s5p_mfc_ctx *ctx) ctx->dst_bufs[i].cookie.raw.chroma); writel(ctx->dst_bufs[i].cookie.raw.chroma, mfc_regs->d_second_plane_dpb + i * 4); + if (ctx->dst_fmt->fourcc == V4L2_PIX_FMT_YUV420M || + ctx->dst_fmt->fourcc == V4L2_PIX_FMT_YVU420M) { + mfc_debug(2, "\tChroma_1 %d: %zx\n", i, + ctx->dst_bufs[i].cookie.raw.chroma_1); + writel(ctx->dst_bufs[i].cookie.raw.chroma_1, + mfc_regs->d_third_plane_dpb + i * 4); + } } if (ctx->codec_mode == S5P_MFC_CODEC_H264_DEC || ctx->codec_mode == S5P_MFC_CODEC_H264_MVC_DEC || @@ -695,20 +773,24 @@ static int s5p_mfc_set_enc_stream_buffer_v6(struct s5p_mfc_ctx *ctx, } static void s5p_mfc_set_enc_frame_buffer_v6(struct s5p_mfc_ctx *ctx, - unsigned long y_addr, unsigned long c_addr) + unsigned long y_addr, unsigned long c_addr, + unsigned long c_1_addr) { struct s5p_mfc_dev *dev = ctx->dev; const struct s5p_mfc_regs *mfc_regs = dev->mfc_regs; writel(y_addr, mfc_regs->e_source_first_plane_addr); writel(c_addr, mfc_regs->e_source_second_plane_addr); + writel(c_1_addr, mfc_regs->e_source_third_plane_addr); mfc_debug(2, "enc src y buf addr: 0x%08lx\n", y_addr); mfc_debug(2, "enc src c buf addr: 0x%08lx\n", c_addr); + mfc_debug(2, "enc src cr buf addr: 0x%08lx\n", c_1_addr); } static void s5p_mfc_get_enc_frame_buffer_v6(struct s5p_mfc_ctx *ctx, - unsigned long *y_addr, unsigned long *c_addr) + unsigned long *y_addr, unsigned long *c_addr, + unsigned long *c_1_addr) { struct s5p_mfc_dev *dev = ctx->dev; const struct s5p_mfc_regs *mfc_regs = dev->mfc_regs; @@ -716,12 +798,17 @@ static void s5p_mfc_get_enc_frame_buffer_v6(struct s5p_mfc_ctx *ctx, *y_addr = readl(mfc_regs->e_encoded_source_first_plane_addr); *c_addr = readl(mfc_regs->e_encoded_source_second_plane_addr); + if (ctx->src_fmt->fourcc == V4L2_PIX_FMT_YUV420M || + ctx->src_fmt->fourcc == V4L2_PIX_FMT_YVU420M) + *c_1_addr = readl(mfc_regs->e_encoded_source_third_plane_addr); + else + *c_1_addr = 0; enc_recon_y_addr = readl(mfc_regs->e_recon_luma_dpb_addr); enc_recon_c_addr = readl(mfc_regs->e_recon_chroma_dpb_addr); mfc_debug(2, "recon y addr: 0x%08lx y_addr: 0x%08lx\n", enc_recon_y_addr, *y_addr); - mfc_debug(2, "recon c addr: 0x%08lx\n", enc_recon_c_addr); + mfc_debug(2, "recon c addr: 0x%08lx c_addr: 0x%08lx\n", enc_recon_c_addr, *c_addr); } /* Set encoding ref & codec buffer */ @@ -898,6 +985,20 @@ static int s5p_mfc_set_enc_params(struct s5p_mfc_ctx *ctx) writel(reg, mfc_regs->e_enc_options); /* 0: NV12(CbCr), 1: NV21(CrCb) */ writel(0x0, mfc_regs->pixel_format); + } else if (ctx->src_fmt->fourcc == V4L2_PIX_FMT_YVU420M) { + /* 0: Linear, 1: 2D tiled*/ + reg = readl(mfc_regs->e_enc_options); + reg &= ~(0x1 << 7); + writel(reg, mfc_regs->e_enc_options); + /* 2: YV12(CrCb), 3: I420(CrCb) */ + writel(0x2, mfc_regs->pixel_format); + } else if (ctx->src_fmt->fourcc == V4L2_PIX_FMT_YUV420M) { + /* 0: Linear, 1: 2D tiled*/ + reg = readl(mfc_regs->e_enc_options); + reg &= ~(0x1 << 7); + writel(reg, mfc_regs->e_enc_options); + /* 2: YV12(CrCb), 3: I420(CrCb) */ + writel(0x3, mfc_regs->pixel_format); } /* memory structure recon. frame */ @@ -1804,8 +1905,12 @@ static int s5p_mfc_init_decode_v6(struct s5p_mfc_ctx *ctx) else writel(reg, mfc_regs->d_dec_options); - /* 0: NV12(CbCr), 1: NV21(CrCb) */ - if (ctx->dst_fmt->fourcc == V4L2_PIX_FMT_NV21M) + /* 0: NV12(CbCr), 1: NV21(CrCb), 2: YV12(CrCb), 3: I420(CbCr) */ + if (ctx->dst_fmt->fourcc == V4L2_PIX_FMT_YUV420M) + writel(0x3, mfc_regs->pixel_format); + else if (ctx->dst_fmt->fourcc == V4L2_PIX_FMT_YVU420M) + writel(0x2, mfc_regs->pixel_format); + else if (ctx->dst_fmt->fourcc == V4L2_PIX_FMT_NV21M) writel(0x1, mfc_regs->pixel_format); else writel(0x0, mfc_regs->pixel_format); @@ -1891,8 +1996,12 @@ static int s5p_mfc_init_encode_v6(struct s5p_mfc_ctx *ctx) /* Set stride lengths for v7 & above */ if (IS_MFCV7_PLUS(dev)) { - writel(ctx->img_width, mfc_regs->e_source_first_plane_stride); - writel(ctx->img_width, mfc_regs->e_source_second_plane_stride); + writel(ctx->stride[0], mfc_regs->e_source_first_plane_stride); + writel(ctx->stride[1], mfc_regs->e_source_second_plane_stride); + if (ctx->src_fmt->fourcc == V4L2_PIX_FMT_YUV420M || + ctx->src_fmt->fourcc == V4L2_PIX_FMT_YVU420M) + writel(ctx->stride[2], + mfc_regs->e_source_third_plane_stride); } writel(ctx->inst_no, mfc_regs->instance_id); @@ -2001,7 +2110,7 @@ static inline int s5p_mfc_run_enc_frame(struct s5p_mfc_ctx *ctx) struct s5p_mfc_dev *dev = ctx->dev; struct s5p_mfc_buf *dst_mb; struct s5p_mfc_buf *src_mb; - unsigned long src_y_addr, src_c_addr, dst_addr; + unsigned long src_y_addr, src_c_addr, src_c_1_addr, dst_addr; /* unsigned int src_y_size, src_c_size; */ @@ -2019,22 +2128,29 @@ static inline int s5p_mfc_run_enc_frame(struct s5p_mfc_ctx *ctx) if (list_empty(&ctx->src_queue)) { /* send null frame */ - s5p_mfc_set_enc_frame_buffer_v6(ctx, 0, 0); + s5p_mfc_set_enc_frame_buffer_v6(ctx, 0, 0, 0); src_mb = NULL; } else { src_mb = list_entry(ctx->src_queue.next, struct s5p_mfc_buf, list); src_mb->flags |= MFC_BUF_FLAG_USED; if (src_mb->b->vb2_buf.planes[0].bytesused == 0) { - s5p_mfc_set_enc_frame_buffer_v6(ctx, 0, 0); + s5p_mfc_set_enc_frame_buffer_v6(ctx, 0, 0, 0); ctx->state = MFCINST_FINISHING; } else { src_y_addr = vb2_dma_contig_plane_dma_addr(&src_mb->b->vb2_buf, 0); src_c_addr = vb2_dma_contig_plane_dma_addr(&src_mb->b->vb2_buf, 1); + if (ctx->src_fmt->fourcc == V4L2_PIX_FMT_YUV420M || + ctx->src_fmt->fourcc == V4L2_PIX_FMT_YVU420M) + src_c_1_addr = vb2_dma_contig_plane_dma_addr + (&src_mb->b->vb2_buf, 2); + else + src_c_1_addr = 0; mfc_debug(2, "enc src y addr: 0x%08lx\n", src_y_addr); mfc_debug(2, "enc src c addr: 0x%08lx\n", src_c_addr); - s5p_mfc_set_enc_frame_buffer_v6(ctx, src_y_addr, src_c_addr); + s5p_mfc_set_enc_frame_buffer_v6(ctx, src_y_addr, + src_c_addr, src_c_1_addr); if (src_mb->flags & MFC_BUF_FLAG_EOS) ctx->state = MFCINST_FINISHING; } @@ -2560,6 +2676,8 @@ const struct s5p_mfc_regs *s5p_mfc_init_regs_v6_plus(struct s5p_mfc_dev *dev) S5P_FIMV_E_ENCODED_SOURCE_FIRST_ADDR_V7); R(e_encoded_source_second_plane_addr, S5P_FIMV_E_ENCODED_SOURCE_SECOND_ADDR_V7); + R(e_encoded_source_third_plane_addr, + S5P_FIMV_E_ENCODED_SOURCE_THIRD_ADDR_V7); R(e_vp8_options, S5P_FIMV_E_VP8_OPTIONS_V7); if (!IS_MFCV8_PLUS(dev)) @@ -2574,16 +2692,20 @@ const struct s5p_mfc_regs *s5p_mfc_init_regs_v6_plus(struct s5p_mfc_dev *dev) R(d_cpb_buffer_offset, S5P_FIMV_D_CPB_BUFFER_OFFSET_V8); R(d_first_plane_dpb_size, S5P_FIMV_D_FIRST_PLANE_DPB_SIZE_V8); R(d_second_plane_dpb_size, S5P_FIMV_D_SECOND_PLANE_DPB_SIZE_V8); + R(d_third_plane_dpb_size, S5P_FIMV_D_THIRD_PLANE_DPB_SIZE_V8); R(d_scratch_buffer_addr, S5P_FIMV_D_SCRATCH_BUFFER_ADDR_V8); R(d_scratch_buffer_size, S5P_FIMV_D_SCRATCH_BUFFER_SIZE_V8); R(d_first_plane_dpb_stride_size, S5P_FIMV_D_FIRST_PLANE_DPB_STRIDE_SIZE_V8); R(d_second_plane_dpb_stride_size, S5P_FIMV_D_SECOND_PLANE_DPB_STRIDE_SIZE_V8); + R(d_third_plane_dpb_stride_size, + S5P_FIMV_D_THIRD_PLANE_DPB_STRIDE_SIZE_V8); R(d_mv_buffer_size, S5P_FIMV_D_MV_BUFFER_SIZE_V8); R(d_num_mv, S5P_FIMV_D_NUM_MV_V8); R(d_first_plane_dpb, S5P_FIMV_D_FIRST_PLANE_DPB_V8); R(d_second_plane_dpb, S5P_FIMV_D_SECOND_PLANE_DPB_V8); + R(d_third_plane_dpb, S5P_FIMV_D_THIRD_PLANE_DPB_V8); R(d_mv_buffer, S5P_FIMV_D_MV_BUFFER_V8); R(d_init_buffer_options, S5P_FIMV_D_INIT_BUFFER_OPTIONS_V8); R(d_available_dpb_flag_lower, S5P_FIMV_D_AVAILABLE_DPB_FLAG_LOWER_V8); From patchwork Tue Oct 11 12:25:10 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Aakarsh Jain X-Patchwork-Id: 614704 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C4EFDC43217 for ; Wed, 12 Oct 2022 03:49:54 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229799AbiJLDtx (ORCPT ); Tue, 11 Oct 2022 23:49:53 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46650 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229614AbiJLDsv (ORCPT ); Tue, 11 Oct 2022 23:48:51 -0400 Received: from mailout1.samsung.com (mailout1.samsung.com [203.254.224.24]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 39BA0AA375 for ; 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Tue, 11 Oct 2022 21:52:08 +0900 (KST) Received: from cheetah.sa.corp.samsungelectronics.net (unknown [107.109.115.53]) by epsmtip1.samsung.com (KnoxPortal) with ESMTPA id 20221011125205epsmtip14547c1b5301cedcadd47448896d0f682~dBM9ZM6dk2178621786epsmtip1t; Tue, 11 Oct 2022 12:52:05 +0000 (GMT) From: aakarsh jain To: linux-arm-kernel@lists.infradead.org, linux-media@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Cc: m.szyprowski@samsung.com, andrzej.hajda@intel.com, mchehab@kernel.org, hverkuil-cisco@xs4all.nl, ezequiel@vanguardiasur.com.ar, jernej.skrabec@gmail.com, benjamin.gaignard@collabora.com, stanimir.varbanov@linaro.org, dillon.minfei@gmail.com, david.plowman@raspberrypi.com, mark.rutland@arm.com, robh+dt@kernel.org, krzk+dt@kernel.org, andi@etezian.org, alim.akhtar@samsung.com, aswani.reddy@samsung.com, pankaj.dubey@samsung.com, linux-fsd@tesla.com, smitha.t@samsung.com, aakarsh.jain@samsung.com Subject: [Patch v3 09/15] media: s5p-mfc: Add support for rate controls in MFCv12 Date: Tue, 11 Oct 2022 17:55:10 +0530 Message-Id: <20221011122516.32135-10-aakarsh.jain@samsung.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20221011122516.32135-1-aakarsh.jain@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA0WTf0xbVRTHc/teX9vFkke3uSthwN6iMsKvOiiXCUiQsGeYBiXbdMaw2j4B Ka9NW5BtccAYAwpuEIQwREBKYfzYmAyQX0qBCgtR4uYoYdKxDQH5kf0ooEzItKWg/33Oud+T 8z3n3svHRFOECz+R1TJqVqqgiB14x+ABL5/HKErmXzqyB810Xuai+5UdBNKvzXHQlH4ZRwM3 2nmo7c5XGKofNnJRlWmUi77rf4ijb/+wnd66bMHRXNU1gObL7xGoddrMRQ8WjqNfuysIVHC9 nYuumiw8ZBi/xUF1rRscVNO+wkPZ35t4yNLbAdD5CyZOOKSbK5sB3WmpBfR4rRWju8otPFrf O8+hWxvzCHrS3EvQN2rT6ewf/8bpi22NgH5+7mserTONE/Ryqxs9srrMi3E6kRSSwEjljNqD YWVKeSIbH0pFx8a9GRco8Rf7iINREOXBSpOZUCrySIxPVKLCtgbKI1WqSLGlYqQaDeUXFqJW pmgZjwSlRhtKMSq5QhWg8tVIkzUpbLwvy2gPif39Xwu0CU8mJVhm0lVXnNP6C7qIDNDjpAMC PiQDYENdBqYDO/gisgfAm7/kE47ACmDP4gZXB/i2YBnAtk+2C/Q3K7gOTTeAxqfrW0E2B3Zn ZfHsKoL0gX0GI2HnXWQmgNO5WrsII7NwaPlpfVO0k4yF1tVnm4yTL8Pbxb8BOwvJMLg0PMpx tHOHTdeNmJ0FtvxTw9CmPUjmCGChsY9wiCKhId/AdfBOuDDcxnOwC5y/dGGLZXC6Zh5zsAK2 9H6JO/gNaLxTgdvHxMgDsKXbz5HeC0tGrm16wEgn+MX671t+hLCzcptfgRWTa1ttXeFgkwE4 mIaZ1T8Dx1aKABwbM/MKgVv5/y2qAWgELzEqTXI8owlUHWSZz/67NJkyuRVsvnSv6E7w8P4T 3wHA4YMBAPkYtUsIqiJkIqFceuo0o1bGqVMUjGYABNoWWIS57JYpbV+F1caJA4L9AyQSSUDw QYmY2iPUl3nJRGS8VMskMYyKUW/XcfgClwzO8Y1LXYv7PYnMR2Xo7tH43CDPs+n5g4c9V5QN i88/HjS6jw/lbuQg539O/akDaaNd9yhX53PfyM8UlfiZYt96tS7oblNHSHWNzu1EC5a6P3uo zpXNp1hq7FPXyqoPc/c1JJmLSoVls6dfr3t2MaL5UUvX29G3OydefEFgnipc/+CHEsXMyZwI Itx9JCjBeyLCvFpw9Z0a7+KjWPhfkWH1a/sk7qL38spSegfCZ8/zlUbrbN5K/7EHwoXS0isf 8Wfy3Tpi9XMTgqzaqUKXJTUr6i8+Etz4+SDeB3fPHMsOtry7EeYjf5yUGmVdq146E+VtSSPZ mr1ph6rfDwNnpU8my+opXJMgFXthao30XxaBCU9yBAAA X-Brightmail-Tracker: H4sIAAAAAAAAAzWRa0hTYRjHe8/OzjkKynEWvq2oWF7Aysoi3qjECuEoBSZlKEUNPfOSm7Jl 2kW00uVMorIkb008XpeWzUvTVumczm7qslxaS7uYZWKmFmaiNaVvv+f5/fk/Hx6KJ7iBC6ko 2XFWLhPHiAh7vL5FtGLdlMQvbIOpZhsa1OXw0cDNegJxU0MY6ucmcGSoqSNR7cs8HiozNfGR 2tjBR/eaP+Do7pd/1pxjxdGQ+jZAX3PfEUj7sYeP3g8fRN2N+QTKrK7joyqjlUQlFjOGSrUz GCqqmyRR2gMjiaz6eoBSlUbMFzKVNysBo7MWA8ZSPM5jGnKtJMPpv2KMVqMimLc9eoKpKU5m 0lqnceZSrQYws+cKSCbDaCGYCe0K5snPCTLQMdR+ezgbE3WCla/3OWofaR1Mjit3SmzObCBS wH3HDGBHQXoz5Nrz+RnAnhLQOgALJzp5C2I5nFO2kQvsDCtmh8iF0HkMGip750MEvQ4+Kmki bGIxnQagpUKF2QYenYfDqatNfFvKmd4H+8Z+z1fhtBt8kfUG2NiB9oEjpg5s4cRKeKu6ab7V 7t/+R0kbYWMBvQOe/X4duwwcC8EiDVjKximkEVLFxjhvGZvgpRBLFfGyCK+wWKkWzD/P01MH 9JoxLwPAKGAAkOKJFjsA9a4wgUO4+OQpVh57RB4fwyoMYBmFi1wcujIeHxHQEeLj7DGWjWPl /y1G2QlTMEn6p9nWU6+fmXtHx/V1S3JyhY8LvlBYb+7ZMn99AHT9XFj+KCjwjJNH61OXKnzv r2ivi2+chXMd+jTp5NiBCoHK9eEkiW9PLeJ2P/fNQ07uLVOgS7Lnifuhxt0hgZ4JYdyMaEap 3hkyh+83p2p7kpUBu7g7r1IMfTnBtcHX9m2JpxMjvZM6OA8/f1N7jMr0J0utCfX2k0WeTDrv mx6kcePUKl9V1OBwb3epZWt/QcnrC398hkdiWeroiMvq6TVr+82Sw4GT8k53y+npnsaBmkyx VJU98KvZ9UqfUhD9Q9c5XhrUPjoaf27TpwcoKVvoH3Q6ZYtE/l39rTRatkqEKyLFGz15coX4 L6Z0czkrAwAA X-CMS-MailID: 20221011125209epcas5p1518083b1a20d015021ec5f08c832fae3 X-Msg-Generator: CA X-Sendblock-Type: REQ_APPROVE CMS-TYPE: 105P DLP-Filter: Pass X-CFilter-Loop: Reflected X-CMS-RootMailID: 20221011125209epcas5p1518083b1a20d015021ec5f08c832fae3 References: <20221011122516.32135-1-aakarsh.jain@samsung.com> Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org From: Smitha T Murthy In MFCv12, the rc configs are changed with support for CBR loose, CBR tight and Variable Bitrate (VBR) added. Cc: linux-fsd@tesla.com Signed-off-by: Smitha T Murthy Signed-off-by: Aakarsh Jain --- .../platform/samsung/s5p-mfc/s5p_mfc_opr_v6.c | 22 +++++++++++++++---- .../platform/samsung/s5p-mfc/s5p_mfc_opr_v6.h | 1 + 2 files changed, 19 insertions(+), 4 deletions(-) diff --git a/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_opr_v6.c b/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_opr_v6.c index 27c2ada381ec..2194df7b6fbf 100644 --- a/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_opr_v6.c +++ b/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_opr_v6.c @@ -1037,10 +1037,24 @@ static int s5p_mfc_set_enc_params(struct s5p_mfc_ctx *ctx) /* reaction coefficient */ if (p->rc_frame) { - if (p->rc_reaction_coeff < TIGHT_CBR_MAX) /* tight CBR */ - writel(1, mfc_regs->e_rc_mode); - else /* loose CBR */ - writel(2, mfc_regs->e_rc_mode); + if (IS_MFCV12(dev)) { + /* loose CBR */ + if (p->rc_reaction_coeff < LOOSE_CBR_MAX) + writel(1, mfc_regs->e_rc_mode); + /* tight CBR */ + else if (p->rc_reaction_coeff < TIGHT_CBR_MAX) + writel(0, mfc_regs->e_rc_mode); + /* VBR */ + else + writel(2, mfc_regs->e_rc_mode); + } else { + /* tight CBR */ + if (p->rc_reaction_coeff < TIGHT_CBR_MAX) + writel(1, mfc_regs->e_rc_mode); + /* loose CBR */ + else + writel(2, mfc_regs->e_rc_mode); + } } /* seq header ctrl */ diff --git a/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_opr_v6.h b/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_opr_v6.h index 30269f3e68e8..24752a712fbf 100644 --- a/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_opr_v6.h +++ b/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_opr_v6.h @@ -40,6 +40,7 @@ #define ENC_H264_LEVEL_MAX 42 #define ENC_MPEG4_VOP_TIME_RES_MAX ((1 << 16) - 1) #define FRAME_DELTA_H264_H263 1 +#define LOOSE_CBR_MAX 5 #define TIGHT_CBR_MAX 10 #define ENC_HEVC_RC_FRAME_RATE_MAX ((1 << 16) - 1) #define ENC_HEVC_QP_INDEX_MIN -12 From patchwork Tue Oct 11 12:25:14 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Aakarsh Jain X-Patchwork-Id: 614703 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 277D1C433FE for ; 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Tue, 11 Oct 2022 12:52:22 +0000 (GMT) Received: from epsmgms1p1new.samsung.com (unknown [182.195.42.41]) by epsmtrp1.samsung.com (KnoxPortal) with ESMTP id 20221011125222epsmtrp165015956329610abae2d84a3f82bde22~dBNM-AA5-2654526545epsmtrp1O; Tue, 11 Oct 2022 12:52:22 +0000 (GMT) X-AuditID: b6c32a4a-259fb70000019a35-dd-63463901eba4 Received: from epsmtip1.samsung.com ( [182.195.34.30]) by epsmgms1p1new.samsung.com (Symantec Messaging Gateway) with SMTP id E4.1D.14392.60765436; Tue, 11 Oct 2022 21:52:22 +0900 (KST) Received: from cheetah.sa.corp.samsungelectronics.net (unknown [107.109.115.53]) by epsmtip1.samsung.com (KnoxPortal) with ESMTPA id 20221011125219epsmtip1fd42a1817ee88692a7c8dc315b836089~dBNJ8oHtt2178621786epsmtip1u; Tue, 11 Oct 2022 12:52:19 +0000 (GMT) From: aakarsh jain To: linux-arm-kernel@lists.infradead.org, linux-media@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Cc: m.szyprowski@samsung.com, andrzej.hajda@intel.com, mchehab@kernel.org, hverkuil-cisco@xs4all.nl, ezequiel@vanguardiasur.com.ar, jernej.skrabec@gmail.com, benjamin.gaignard@collabora.com, stanimir.varbanov@linaro.org, dillon.minfei@gmail.com, david.plowman@raspberrypi.com, mark.rutland@arm.com, robh+dt@kernel.org, krzk+dt@kernel.org, andi@etezian.org, alim.akhtar@samsung.com, aswani.reddy@samsung.com, pankaj.dubey@samsung.com, linux-fsd@tesla.com, smitha.t@samsung.com, aakarsh.jain@samsung.com Subject: [Patch v3 13/15] media: s5p-mfc: Load firmware for each run in MFCv12. Date: Tue, 11 Oct 2022 17:55:14 +0530 Message-Id: <20221011122516.32135-14-aakarsh.jain@samsung.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20221011122516.32135-1-aakarsh.jain@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA0WTe0xTVxzHc+5tbwuu5FrRHYgiKxsqGdhiCwcGuqDWOyUTYpzRbcGmvQFC X+ktzPkH62AwxkRkuImMAaEUE95vkEfAijMD58QRSJwtApO3TnkNwcFKW7b/Pr/v7/c7v8c5 h4vzRwhPbrxaT+vUMqWAcGU139631x+ESOXC4ZZd6GnrdTZ6UthMIOPyBIaGjfMsZG5o4qDG gR9xdONuNxsV9dxno5ZboyxUN2nz9l+3sNBEUTVAU/lWAtWPDbLRyPQZ9HtbAYEu1TaxUVWP hYNMQ/0YKqt/jaGSpgUOSuvs4SBLRzNAX6X3YO9DqrKwElCtllJADZXO4dTNfAuHMnZMYVR9 +TcE9Xiwg6AaSr+g0u6ssKjLjeWAWkv5iUNl9gwR1Hy9F9W7OM+JcjuXEBZHyxS0zptWyzWK eHVsuODEqZjDMZIgochfFIKCBd5qmYoOFxyJjPKXxittaxB4J8mUiTYpSsYwgv0Hw3SaRD3t Hadh9OECWqtQasXaAEamYhLVsQFqWh8qEgoDJbbA8wlx6/+YMK2Re8FUl80xAAMnE7hwISmG ZaODxAbzyXYAp6uwTOBq4zkA2/N/JRzGEoDp833EZkZvUS7b4egEsOXyJdxhpGGw6o8UsBFF kP6wy9Rtz3AnvwRwLEO/EYSTqSxoubdqL76NjIYTD4vxDWaR78BfCsvtOo88CGcfvcAd5XbD itpuO7vY9Jemn+09QXKdC4cNr509HYFXclOdvA1O3210TucJp7LTnSyHYyVTzkOVsKbjKsvB h2D3QIGNubbu9sGatv0OeRf8vrca22CcdINZq39iDp0HWws32RcWPF5mO3gnvF1hAg6m4LWi dueKcgCsMDwDV4BX/v8ligEoBx60llHF0oxEG6imP/vv2uQaVT2wv3W/461g5MmLADPAuMAM IBcXuPNAUYScz1PIPr9I6zQxukQlzZiBxLbAHNxzu1xj+yxqfYxIHCIUBwUFiUMOBIkEb/KM eX5yPhkr09MJNK2ldZt5GNfF04BV56vdqlaPnbk2WTG+Mh9p8HZ/IB2qnD2W538vwycV40iv Ng3tGW+OhaI3VnzWQ59aPti9g/H9zSM0KbsvInnmw94dyWXJeS9PWueWR63o5iuwZWtJTtLb r9JOqwYUC5/OZEqSO6MXUnjo1lFV7pY7WIbrzprlb0f2jvv9db7voY7hpXYZjj6P0GofnDw3 uS49cPa0aWC2jlhL128nrXuKT7jrrYuqHy4cEvDOcqvy7i+ZUe1x6NHCD37P593vrJK15qyt 4oHDtV5/G5eynp/y9fhI6ccPC//kRobi2dfYojovcFw6EdxQp+oKjXxrZfiR+WKlsKMfZ2G+ M6q26I+VlIDFxMlEfriOkf0La9gOzHQEAAA= X-Brightmail-Tracker: H4sIAAAAAAAAAzWRa0hTYRjHe8/OzcXsOBedNCxOmKQ4szTfbpJCcQi6EJhUlC47WLnNsZOV QaSZoSa1TKOpbeI2ZetCzry2aNnR0A9iF1wX10UxL7kytZJYWrP69nue35/n/+EhRVI9GkQe VR/ntGqFksHFaONjJiQST9+StsrwNhgONusx+N7QiEPT9BAC35kmUdhW30DAey8qRLD2iROD RqEbg02P+lFYN/zHPtW7UThkvAPgSPlbHNoHejH4YTQZPm+txGHx3QYM3hbcBLS4niKwxu5F YHXDFAHzHwgEdDsaATx/QUA20+wtwy3ANrvNgHWZJ0RsS7mbYE2OEYS12wpxtq/XgbP15rNs fvtPlL10zwbYmXM3CLZIcOHspD2E7fo2Sezy3yfeeJhTHj3BaaPiU8VHZn9ZEI2JPGWpu0zk gByiCPiRNBVDdxmvYkVATEqp+4D+8Wnqn1hCz17o+MeBtHVmiPgbykPoqsFruE/gVCT90OLE fUJG5QPaZS1EfIOIqkDp6RIn5ksFUjvp0pka1McoFUp3GmxzZyVUPD32elz0t2IpffOuc479 /uy/WjrmGqTUJjr3SxmiA/5VYJ4NLOY0vCpdxUdrotXcSTmvUPFZ6nR5WqbKDua+F76yGTTZ xuVtACFBG6BJESOTAGNimlRyWJF9mtNmpmizlBzfBoJJlFkk6SnqTJFS6YrjXAbHaTjtf4uQ fkE5SHdxZ31i6XSL9X7ABpI5s9cSp+/rOVewq8xtsm8M027XrR2OiHtvrtpRMFRZXrYvKubK mEfaHyANYGK3t7Zcq1UTy56t0QU6heev9qLrNgRQ75Tfl2Cr5d5VGvPBvoGMCe1yV09W/8tE dWqe91m1Gg1LVS74ltx5CcvNXG5kk3TJDO+sGIgdr7k+O1Ls9QQdijxQ4LB+lvu9Mcewo1b9 Zc/CPevrVCtLyhNCqiuro+IF2eaL28QGIZuJnTKLmrszPRFds/tLxZLS3fEa7FdoD+NKeKG7 mm2d/7HJJswcq+h26Be0wwc6WWN2YbuXb09wbl2R1DHoscp0OxkG5Y8oosNFWl7xG1d+CPws AwAA X-CMS-MailID: 20221011125222epcas5p1599424c2b8fe888dd9f9d04c76909c07 X-Msg-Generator: CA X-Sendblock-Type: REQ_APPROVE CMS-TYPE: 105P DLP-Filter: Pass X-CFilter-Loop: Reflected X-CMS-RootMailID: 20221011125222epcas5p1599424c2b8fe888dd9f9d04c76909c07 References: <20221011122516.32135-1-aakarsh.jain@samsung.com> Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org From: Smitha T Murthy In MFCv12, some section of firmware gets updated at each MFC run. Hence we need to reload original firmware for each run at the start. Cc: linux-fsd@tesla.com Signed-off-by: Smitha T Murthy Signed-off-by: Aakarsh Jain --- drivers/media/platform/samsung/s5p-mfc/s5p_mfc_ctrl.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_ctrl.c b/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_ctrl.c index 877e5bceb75b..a70283d4c519 100644 --- a/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_ctrl.c +++ b/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_ctrl.c @@ -51,8 +51,9 @@ int s5p_mfc_load_firmware(struct s5p_mfc_dev *dev) * into kernel. */ mfc_debug_enter(); - if (dev->fw_get_done) - return 0; + if (!IS_MFCV12(dev)) + if (dev->fw_get_done) + return 0; for (i = MFC_FW_MAX_VERSIONS - 1; i >= 0; i--) { if (!dev->variant->fw_name[i]) From patchwork Tue Oct 11 12:25:16 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Aakarsh Jain X-Patchwork-Id: 614702 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id BC94AC43217 for ; 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Tue, 11 Oct 2022 12:52:29 +0000 (GMT) Received: from epsmgms1p1new.samsung.com (unknown [182.195.42.41]) by epsmtrp2.samsung.com (KnoxPortal) with ESMTP id 20221011125229epsmtrp2206ccdadeb7f266ab4ab9b12e3d7d18e~dBNTQeBTR1820118201epsmtrp2Q; Tue, 11 Oct 2022 12:52:29 +0000 (GMT) X-AuditID: b6c32a49-319fb70000016970-22-6346392468ef Received: from epsmtip1.samsung.com ( [182.195.34.30]) by epsmgms1p1new.samsung.com (Symantec Messaging Gateway) with SMTP id B8.1D.14392.D0765436; Tue, 11 Oct 2022 21:52:29 +0900 (KST) Received: from cheetah.sa.corp.samsungelectronics.net (unknown [107.109.115.53]) by epsmtip1.samsung.com (KnoxPortal) with ESMTPA id 20221011125226epsmtip11bf61fb7e73799627eae74100ac2bdba~dBNQO9w_Y2675826758epsmtip1K; Tue, 11 Oct 2022 12:52:25 +0000 (GMT) From: aakarsh jain To: linux-arm-kernel@lists.infradead.org, linux-media@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Cc: m.szyprowski@samsung.com, andrzej.hajda@intel.com, mchehab@kernel.org, hverkuil-cisco@xs4all.nl, ezequiel@vanguardiasur.com.ar, jernej.skrabec@gmail.com, benjamin.gaignard@collabora.com, stanimir.varbanov@linaro.org, dillon.minfei@gmail.com, david.plowman@raspberrypi.com, mark.rutland@arm.com, robh+dt@kernel.org, krzk+dt@kernel.org, andi@etezian.org, alim.akhtar@samsung.com, aswani.reddy@samsung.com, pankaj.dubey@samsung.com, linux-fsd@tesla.com, smitha.t@samsung.com, aakarsh.jain@samsung.com Subject: [Patch v3 15/15] arm64: dts: fsd: Add MFC related DT enteries Date: Tue, 11 Oct 2022 17:55:16 +0530 Message-Id: <20221011122516.32135-16-aakarsh.jain@samsung.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20221011122516.32135-1-aakarsh.jain@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA0WTe0xTdxTH87u37W0JZXeI8ScBZI26iQLtLN0PI8whY9eJhumMhmzD2t4A Utra2w4H2YDxyGRixM0HCNQIDMfbAh1jMLtSZGPI0oxJIBYr+IJ1DikyxI2sD9z++5xzvueR c34/Lu5v5wRy05VaWqOUKgQcH5axb9PL4eujE2TCxtnN6F5XORvZq40cVLP4AEO3a5wsZG7v JFDHyEUc1Q+Y2EhvGWajb36YZKGrD11Ra7mNhR7oWwCarpjgIMPUTTa6M3MQ/dpdyUEn2zrZ qNliI1DdqBVDXxn+xtDlznkCFfVaCGTrMQJUWGzBdkCqqboJUF22WkCN1s7h1LcVNoKq6ZnG KEPDCQ5162YPh2qvzaWK+pdY1KmOBkAtf1pFUCWWUQ7lNIRQg0+cRJJfcsb2NFoqpzWhtFKm kqcrU2MEu/en7EyJkghF4aJo9JogVCnNpGME8YlJ4QnpCtcaBKEfShU6lytJyjCCyNjtGpVO S4emqRhtjIBWyxVqsTqCkWYyOmVqhJLWbhMJha9GuYSHM9LMPzWz1Q6f44v5y0QeuMEtAVwu JMXQ+ufhEuDD9Se/A7B16RfgNeYAzLf2YV5jAcCZaxOcEsDzZBj/cawEegE8Oz9FeI0iDF4f +sOj4pDh8FqdycMBZD6AU59p3SKcLGBB29Azwh1YRSbAovEhtptZ5AZYP3zGk8AnY+HE8CLm bbcONraZcDfzXP7Hddc57kKQLODBgrlmwiuKh0uFP6/wKjgz0LHCgdD5qHdlbhmcujyNe1kB W3u+ZHn5dWgaqWS5t4GTm2Brd6TXHQzPDrZ4ZsBJP1j67O7KPHzYVf2cN8LKW4tsLwfBvsY6 4GUKmhzdnvL+ZBmAg/o9p0FIxf8dLgHQANbSaiYzlWai1CIlnfXf1WSqTAPwPPWwXV3AZp+N MAOMC8wAcnFBAB/o42T+fLn0o2xao0rR6BQ0YwZRrv2V4YGrZSrXX1FqU0TiaKFYIpGIo7dK RII1/JoLYTJ/MlWqpTNoWk1rnudhXF5gHtYyvnXL/Q+M5fmnX7FrdtVeOtCf57hRejt4X35S 5VW/vUfwY8fi5zdP1sUeMQVI9xIPtXmfBBteuDiWc/5t3+LSUsJvT+v6A/0NtnfurT4TuS7h /RjhE+5Czu+tPn9Fdk5INlq2XDgPftwXsuHzF7+vhecetWsLHMd5I7p4YwayW3u+NmV1+0ri jlLFL3083par/E2//JZ5hD+9cJRrW6ST03hZE7sdawfEY8ybp+6cY/S2bsWhWXtQ0BpQltg0 95RqaZ6sOpiTfGUEe2+H7u7s/ceUX5VvjHM26oTIp1Av18j7Gt8odpZnxSVmZ5Ud0g4/fXem pH5nrq7ddyy78so2xf4vBCwmTSoKwzWM9F+rL0NMcwQAAA== X-Brightmail-Tracker: H4sIAAAAAAAAAzWRa0hTYRiA/c7OzcXkNIW+LroYXSjLNAs+rSyj4lQWUXSTbic9TGubc5ut AsnlpVq3OSjyNiunlWnqzGVlZGu1rJTEaJDNS6NMk25qmdQqJ/17eJ+H9/3x0gJxHj6JTlZq ebWSk0tJIW57KA2ZK5KtTAgf/D0OvavPI1CX2UaikuEeDHWWDODIXltHoZsvCwToirORQMWO FgLdevAWRzUf/tnWPDeOeopvANSb30Eiq+cVgbr7tqK2O4UkOlVdR6BKh5tCpa5WDJVZf2Ho ct0ghbLvOSjkbrABlJXjwJZBtsJcAdh6twWwLss3AXs7302xJQ29GGstP0Gyb141kGyt5Qib /WgEZ8/cLAes92gRxRocLpIdsIawT4cGqA0B8cLFibw8+QCvnhezR5hkb6okVP3Cg8N6L5UB mmkD8KchswDafvdjBiCkxcxdAFvdz/AxMQX+yXlMjXEgvObtocaiTAx67t4hRgXJzIX3SxvJ URHEZAPounbCt0rAFOBw2NToqwKZVTD79XMf48x0eKXFRI6yiImBHS3D2NgJCbxe3SgYZf9/ 86+lj32NmFkC9Z/PYUYQcBH4lYOJvEqjkCk0EaoIJa8L03AKTZpSFpaQorAC3/dmz6oHt8q/ hNkBRgM7gLRAGiQCxcsTxKJE7tBhXp2yW50m5zV2MJnGpRNELwxNu8WMjNPy+3lexav/W4z2 n5SBPasuUhxJ3CsxpYdPy1y/Iy0J7Y+c0IXNbOnq6zNTOTLzSOcuVPlk573VvQuzMr5e0ktM zsH0zbrm0FRF9M9QSunXRHwZ5BhnkyuLu7rFPl50SLd98+I0Y6ynrRLWLjrldx6vnyG2nNTa CkYkp4mapcZpxqfSmJCjO1IlG7+ZL0/dZNoXfz1dZ3shOWM0CPu4Y/rlZ9dVRJUpt2Z5Olas lfBBtvhg2cA8vT3Kq4tSOKIXOU+H0V3RNbkfStZ4l2YmtFeF9EemztkYF/snXOsJdBbLtUFV Qx9zY398/zQ/19Iul5TFBWM6bV6y8XhboVOzK/bCnoCzqm0N3YXvjVJck8RFzBaoNdxf4MS1 ViwDAAA= X-CMS-MailID: 20221011125229epcas5p434cecc44beb02450c876de71c0f06011 X-Msg-Generator: CA X-Sendblock-Type: REQ_APPROVE CMS-TYPE: 105P DLP-Filter: Pass X-CFilter-Loop: Reflected X-CMS-RootMailID: 20221011125229epcas5p434cecc44beb02450c876de71c0f06011 References: <20221011122516.32135-1-aakarsh.jain@samsung.com> Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org From: Smitha T Murthy Add MFC DT node and reserve memory node for MFC usage. Cc: linux-fsd@tesla.com Signed-off-by: Smitha T Murthy Signed-off-by: Aakarsh Jain --- arch/arm64/boot/dts/tesla/fsd.dtsi | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) diff --git a/arch/arm64/boot/dts/tesla/fsd.dtsi b/arch/arm64/boot/dts/tesla/fsd.dtsi index f35bc5a288c2..b2f7345d2cba 100644 --- a/arch/arm64/boot/dts/tesla/fsd.dtsi +++ b/arch/arm64/boot/dts/tesla/fsd.dtsi @@ -340,6 +340,18 @@ #clock-cells = <0>; }; + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + mfc_left: region@84000000 { + compatible = "shared-dma-pool"; + no-map; + reg = <0 0x84000000 0 0x8000000>; + }; + }; + soc: soc@0 { compatible = "simple-bus"; #address-cells = <2>; @@ -832,6 +844,15 @@ clock-names = "fin_pll", "mct"; }; + mfc: mfc@12880000 { + compatible = "tesla,fsd-mfc"; + reg = <0x0 0x12880000 0x0 0x10000>; + interrupts = ; + clock-names = "mfc"; + clocks = <&clock_mfc MFC_MFC_IPCLKPORT_ACLK>; + memory-region = <&mfc_left>; + }; + ufs: ufs@15120000 { compatible = "tesla,fsd-ufs"; reg = <0x0 0x15120000 0x0 0x200>, /* 0: HCI standard */