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[209.51.188.17]) by mx.google.com with ESMTPS id l30-20020a67d51e000000b003aa12bd2732si2387238vsj.163.2022.11.07.16.02.31 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Mon, 07 Nov 2022 16:02:31 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=dsC1oSDl; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1osC0r-0004BK-9Q; Mon, 07 Nov 2022 18:58:45 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1osC0p-0004B4-Sg for qemu-devel@nongnu.org; Mon, 07 Nov 2022 18:58:43 -0500 Received: from mail-wr1-x42a.google.com ([2a00:1450:4864:20::42a]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1osC0d-00005u-C4 for qemu-devel@nongnu.org; Mon, 07 Nov 2022 18:58:43 -0500 Received: by mail-wr1-x42a.google.com with SMTP id bk15so18471251wrb.13 for ; Mon, 07 Nov 2022 15:58:30 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=NSxc66Fm/34b2nxJZ5QbpZSZKGj6yqN6NZyd5TCHUxQ=; b=dsC1oSDlOD15/529xDLe1V0yCa25ADRM3otJbXCKDueymzLfm/UhETNInmmmtGowk9 +YJi7T75vLxsZJR6nKmYCZgFWYbtL9utL6W9eJcB+xhdVlAjvfUdWxS9/Z79GeGDlA/F aJINZWyDbh6HoeoJ2Aegw69UWaZ+8PhB0DHTRni34/osGj8Dbp+C/GFnJSy/XjOI+2Ln nx5nh84wZxJhOsEi19i4bnAjbqE4rY4+3TQ7s8Ppartggbp0+VAe0359YP0BycCuRgbj 9fl5HQW3cHN5OjCzQXRcy7SxnOuPDLW+G4lAnHEQGPGgDZkJRP6Y0nrycvCaTTBg/+9G 1y7w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=NSxc66Fm/34b2nxJZ5QbpZSZKGj6yqN6NZyd5TCHUxQ=; b=isaLw5wurrBTV0Dqvs3Cxm10JxElgntEAOXBI52ytwxnVov+xm6dCY4UaoV7ck3ttN 4YiH1zi8xe+EIWUbkEzPpkYDZbaau5DyY4SuPPRz3KQE8le3TFThCndEmSYc3SH5YgN1 fkLUs16YNn6D9HnP8nyo3gVh5MLXMNCn7cLQ5nHchK5fV+6fwoto/b3GS+fW5HxUHUHB sg0Qu0g2rU0w0UxbwQrxzS/Vorhcon+uuGgTk+uPYYhxLi1nrduYBG/GIifzU+zRpU5x pjwvzhniQuICrs+P5A89HRRAQw6o4FqfXrGaYn4AsexP3GgaYYLSooovr1lEN9cwM0n5 ttzQ== X-Gm-Message-State: ACrzQf0kLDOt2YHTErmFSx4GPGArO4ZaVKwjrnv7hkQRc+FJ4F5ux7iP ftb+R5idU1TsKi/pgMquBMAtO6wy+V0SRg== X-Received: by 2002:adf:d4d2:0:b0:236:594f:4a2c with SMTP id w18-20020adfd4d2000000b00236594f4a2cmr32728960wrk.705.1667865508886; Mon, 07 Nov 2022 15:58:28 -0800 (PST) Received: from localhost.localdomain ([185.126.107.38]) by smtp.gmail.com with ESMTPSA id l27-20020a05600c1d1b00b003b95ed78275sm10101767wms.20.2022.11.07.15.58.28 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Mon, 07 Nov 2022 15:58:28 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Aurelien Jarno , Aleksandar Rikalo , Jiaxun Yang , Richard Henderson Subject: [PULL 01/14] target/mips: Set CP0St_{KX, SX, UX} for Loongson-2F Date: Tue, 8 Nov 2022 00:58:09 +0100 Message-Id: <20221107235822.71458-2-philmd@linaro.org> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221107235822.71458-1-philmd@linaro.org> References: <20221107235822.71458-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::42a; envelope-from=philmd@linaro.org; helo=mail-wr1-x42a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Jiaxun Yang As per an unpublished document, in later reversion of chips CP0St_{KX, SX, UX} is not writeable and hardcoded to 1. Without those bits set, kernel is unable to access XKPHYS address segment. So just set them up on CPU reset. Signed-off-by: Jiaxun Yang Acked-by: Richard Henderson Message-Id: <20221031132531.18122-2-jiaxun.yang@flygoat.com> Signed-off-by: Philippe Mathieu-Daudé --- target/mips/cpu.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/target/mips/cpu.c b/target/mips/cpu.c index e997c1b9cb..7a565466cb 100644 --- a/target/mips/cpu.c +++ b/target/mips/cpu.c @@ -302,6 +302,12 @@ static void mips_cpu_reset(DeviceState *dev) env->CP0_EntryHi_ASID_mask = (env->CP0_Config5 & (1 << CP0C5_MI)) ? 0x0 : (env->CP0_Config4 & (1 << CP0C4_AE)) ? 0x3ff : 0xff; env->CP0_Status = (1 << CP0St_BEV) | (1 << CP0St_ERL); + if (env->insn_flags & INSN_LOONGSON2F) { + /* Loongson-2F has those bits hardcoded to 1 */ + env->CP0_Status |= (1 << CP0St_KX) | (1 << CP0St_SX) | + (1 << CP0St_UX); + } + /* * Vectored interrupts not implemented, timer on int 7, * no performance counters. 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However arg_BBIT.offset is unsigned. We need to cast it as signed to do address calculation. Signed-off-by: Jiaxun Yang Acked-by: Richard Henderson Acked-by: Pavel Dovgalyuk Reviewed-by: Philippe Mathieu-Daudé Message-Id: <20221031132531.18122-3-jiaxun.yang@flygoat.com> Signed-off-by: Philippe Mathieu-Daudé --- target/mips/tcg/octeon.decode | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/mips/tcg/octeon.decode b/target/mips/tcg/octeon.decode index 8929ad088e..0c787cb498 100644 --- a/target/mips/tcg/octeon.decode +++ b/target/mips/tcg/octeon.decode @@ -12,7 +12,7 @@ # BBIT132 111110 ..... ..... ................ %bbit_p 28:1 16:5 -BBIT 11 set:1 . 10 rs:5 ..... offset:16 p=%bbit_p +BBIT 11 set:1 . 10 rs:5 ..... offset:s16 p=%bbit_p # Arithmetic # BADDU rd, rs, rt From patchwork Mon Nov 7 23:58:11 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 622254 Delivered-To: patch@linaro.org Received: by 2002:a17:522:c983:b0:460:3032:e3c4 with SMTP id kr3csp2556514pvb; Mon, 7 Nov 2022 15:59:45 -0800 (PST) X-Google-Smtp-Source: AMsMyM7KqvhPMR4EseteXfCr1bygyvNJ72P/gFWOm5LFV/3RnygxG5Hx7T9eeXQKuqxzpWCOYh35 X-Received: by 2002:ac8:41c3:0:b0:3a5:528b:65b1 with SMTP id o3-20020ac841c3000000b003a5528b65b1mr19303683qtm.539.1667865585711; Mon, 07 Nov 2022 15:59:45 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1667865585; cv=none; d=google.com; s=arc-20160816; b=a/Xnhbjy9vyea0FCsuwaxz/pf9xvwR6mB3NA7o4O7924Xud4M4Q15t9LXRwVVTFIfv tYlCCpQXxI88aBGJ+f0DScEY+ni8v85LeD484SxuVaureRFnwOuutFij1eX7oJB6k5bk hxtgGiQfbEy2isex1oKn+2IB3z0aInr8dXucBzyVIlJ0ylsNb1o6Tvj4tpUjoiAmYTG6 u/vWBNMzbrBd97iN/bb51gNfPwZwHZuKFUc7hu/AfT9sn4MlpZ+FtsUMFnOilMNuKNlV KiUvYeWU9+kW2WkI3wbk/CxNn+dfztxsLF4wcSwSMsssxIS5hk7xyIAIcyYKsiT+4f2m xxJw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=CT2Moauv807B/rlILDZo2huTDc6KLxUQ9xta6J885G0=; b=JUxR1J8i2X9KF+EfHyoaN471JOFoRtuQjFLyeelzcHRo7FKBHe1Y9OodjaXOljSQsR BEnqZ3DA1Vty0AnRVFAi7kMxskJ5+nVfxq6sUAsp590QiSXc4w4DQe+pHsjVuYmB4hd1 36+/y3UokytyLTWV7cfnSsvF11iIXKNey9DfTidT+TIyfdCAaHzS1Man0RZIF3QQR0j/ M/iqhfHwJgJ4R464cA0P+VjQT1ae43ArsZyBkfjqop0f8GR719EQ522rCICGibpHG/KN piq6l5UnZm0jhe9HSsJbAKHBRLMDzL+w0wb802SEuhKxyScZZ/543JFzxSOASAMC+px+ 6FOw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Zcb9Hdcy; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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Octeons do not have DSP extension, but implement LBX-and-others. Signed-off-by: Pavel Dovgalyuk Reviewed-by: Philippe Mathieu-Daudé Message-Id: <166728058455.229236.13834649461181619195.stgit@pasha-ThinkPad-X280> Signed-off-by: Philippe Mathieu-Daudé --- target/mips/tcg/translate.c | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-) diff --git a/target/mips/tcg/translate.c b/target/mips/tcg/translate.c index 2f2d707a12..4c4bd0823d 100644 --- a/target/mips/tcg/translate.c +++ b/target/mips/tcg/translate.c @@ -12173,12 +12173,16 @@ enum { #include "nanomips_translate.c.inc" /* MIPSDSP functions. */ -static void gen_mipsdsp_ld(DisasContext *ctx, uint32_t opc, - int rd, int base, int offset) + +/* Indexed load is not for DSP only */ +static void gen_mips_lx(DisasContext *ctx, uint32_t opc, + int rd, int base, int offset) { TCGv t0; - check_dsp(ctx); + if (!(ctx->insn_flags & INSN_OCTEON)) { + check_dsp(ctx); + } t0 = tcg_temp_new(); if (base == 0) { @@ -14523,7 +14527,7 @@ static void decode_opc_special3_legacy(CPUMIPSState *env, DisasContext *ctx) case OPC_LBUX: case OPC_LHX: case OPC_LWX: - gen_mipsdsp_ld(ctx, op2, rd, rs, rt); + gen_mips_lx(ctx, op2, rd, rs, rt); break; default: /* Invalid */ MIPS_INVAL("MASK LX"); From patchwork Mon Nov 7 23:58:12 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 622566 Delivered-To: patch@linaro.org Received: by 2002:a17:522:c983:b0:460:3032:e3c4 with SMTP id kr3csp2559309pvb; Mon, 7 Nov 2022 16:03:28 -0800 (PST) X-Google-Smtp-Source: AMsMyM5198Yg/AxUwPXMLeVQUJcRQlSd3aZoJXe4s/Cbgs3AM9iuHVRrtcpsfg5qGdo8nkXgBJUG X-Received: by 2002:ae9:f301:0:b0:6e2:73ae:1258 with SMTP id p1-20020ae9f301000000b006e273ae1258mr37454743qkg.353.1667865808802; Mon, 07 Nov 2022 16:03:28 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1667865808; cv=none; d=google.com; s=arc-20160816; b=TeKW2+QLHzsvB+j4YAylHAMu7sK8NwNjkiaomF/vjF6yMWkrXjJKYTctDNFkTOLMKH NG2AdGnE606KDnA716xJ/NthYr3pjqkKAszFE5Ua/UvMk2plsS3UxnzZ1Z1lC6WseC3i fmKZdqvtaSQj4qBUi2CCDTqMoNxDE5mJA4HPGeczSKfcloMM8tv+bgtOt+iE4P0yEdgz RIx6RMUpDkRV5daWHPRxG0OrKnjdTjB9vk+jMSWldAabspMaGRbDepviBWdnO8Y+4pQy mMBH9VIWW6Si5Hms5dHtU5D2QlapprLedSd9H5smjHmy2l/awQFcuLb48khzAQQWTRSq viWg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=sVw69YQUrrPB4X3PpjsCj0UZM2xfPQqEeOeuKXhJayQ=; b=B56lAyPF/EgoOmpuEPARs3IW+A0vhoJcYTMl6GF/m0h+wNvWaX08uCbKMWiBlVOYYx NNbqEgoBhCJy1WkOn+U3YvzeGmoGED0nojZh0pQDSbb7Fjnx3brPc7PQm7ojeKCc0wqm baBHc3kEYNMzQd4mzU07es3ML08sZgPRtrKpDFjfArqdmiXJpWRnzmA49gNUSg7NMDbp l8AqkrnOLPGq8O4foeg4v1lfIOcN4585sXU31cQty5DTofXWY2BVtGMzmZ4ydc3Xdrb2 2QQ6hiHZBxeCWEkJ+FKftLNc8U4u7ak0+EdCHrwlPdg1toJWXqyHnAH6cHGoudab6gri EKHA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=yjfEny0E; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id cc15-20020a05622a410f00b00398f4bd7c06si5739143qtb.50.2022.11.07.16.03.28 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Mon, 07 Nov 2022 16:03:28 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=yjfEny0E; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1osC0v-0004EK-EW; Mon, 07 Nov 2022 18:58:49 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1osC0u-0004EC-Qs for qemu-devel@nongnu.org; Mon, 07 Nov 2022 18:58:48 -0500 Received: from mail-wm1-x32f.google.com ([2a00:1450:4864:20::32f]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1osC0s-0001Cc-5g for qemu-devel@nongnu.org; Mon, 07 Nov 2022 18:58:48 -0500 Received: by mail-wm1-x32f.google.com with SMTP id m7-20020a05600c090700b003cf8a105d9eso8090958wmp.5 for ; Mon, 07 Nov 2022 15:58:45 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=sVw69YQUrrPB4X3PpjsCj0UZM2xfPQqEeOeuKXhJayQ=; b=yjfEny0EGxwT8mwZOyfWVwU+bxJvl9fEgOs1l6MNqZ8OBuZw53TnI/A9QtcaGfh8+n M900QSoh+8fXDqYYRmleXvBAUn7RszrJDBbbf/ectoCt+cJkYoOGRpuQzl420UZz4IC7 Nn+So0FtwrCjStLJNawRjR/l2foA3sH1L4cQmh0kvyFP3eg2gQyS1OwUwg8bQjs1OcAQ gH7g7rMOkJHjvjpAfIyGLbjNmijrbbod/k8F31rRQ/Kq6+QNXV6AaQGVXPC5qs8euLkD tGYZnI3zXjNa2viTand6fN0XlBL60c2aatAaeU9skj7fuA/9Zs0nNHjOUwQ72950e7lD XxIg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=sVw69YQUrrPB4X3PpjsCj0UZM2xfPQqEeOeuKXhJayQ=; b=Bl28DRtO20Dy3SY9D855a7G8RfDcGm8BQNnowFqoSrLm1VSh3oCogheF1voZnzEFmi sERgUP2M78BoJa0T6gQGTC4R+EVcgE8Xhgac6SQuHNbpb0dwzsmZ4OfZocD68mrSDVWf tY69YCECpdrA4pb/+OgKvXETVgQZMpWQJIFV31MSbTZE/t16vwT9K5T4MaQ+yx22rNCk SR/nsv2X4IFgMRa4IHXXQb0hOkr3pf3hiMi+ZOgh/OFns0bmlj2CYjK6i6ioMx19aOda TozqXcA+uh24+tgLqEWaKsXg6DXh9O/tGrtJjT+WTOlU9FS4edSgW4RSuqGZNqMXHKuL WENw== X-Gm-Message-State: ACrzQf0i+VNgVCDtr02bMnnzMVte8fY18Ho8v+HIjF2JSrK9sc/zNh2h HtKYM73qhNa7zMCUuQGyDMNL6E6VbWpJrg== X-Received: by 2002:a05:600c:1d2a:b0:3cf:7332:946 with SMTP id l42-20020a05600c1d2a00b003cf73320946mr29055677wms.126.1667865523652; Mon, 07 Nov 2022 15:58:43 -0800 (PST) Received: from localhost.localdomain ([185.126.107.38]) by smtp.gmail.com with ESMTPSA id v1-20020a5d59c1000000b0023c508a1c24sm8369532wry.26.2022.11.07.15.58.42 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Mon, 07 Nov 2022 15:58:43 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Aurelien Jarno , Aleksandar Rikalo , Jiaxun Yang , Richard Henderson , Pavel Dovgalyuk Subject: [PULL 04/14] target/mips: Disable DSP ASE for Octeon68XX Date: Tue, 8 Nov 2022 00:58:12 +0100 Message-Id: <20221107235822.71458-5-philmd@linaro.org> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221107235822.71458-1-philmd@linaro.org> References: <20221107235822.71458-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32f; envelope-from=philmd@linaro.org; helo=mail-wm1-x32f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Jiaxun Yang I don't have access to Octeon68XX hardware but according to my investigation Octeon never had DSP ASE support. As per "Cavium Networks OCTEON Plus CN50XX Hardware Reference Manual" CP0C3_DSPP is reserved bit and read as 0. Also I do have access to a Ubiquiti Edgerouter 4 which has Octeon CN7130 processor and I can confirm CP0C3_DSPP is read as 0 on that processor. Further more, in linux kernel: arch/mips/include/asm/mach-cavium-octeon/cpu-feature-overrides.h cpu_has_dsp is overridden as 0. So I believe we shouldn't emulate DSP in QEMU as well. Signed-off-by: Jiaxun Yang Acked-by: Richard Henderson Reviewed-by: Pavel Dovgalyuk Message-Id: <20221031132531.18122-4-jiaxun.yang@flygoat.com> Signed-off-by: Philippe Mathieu-Daudé --- target/mips/cpu-defs.c.inc | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/target/mips/cpu-defs.c.inc b/target/mips/cpu-defs.c.inc index 7f53c94ec8..480e60aeec 100644 --- a/target/mips/cpu-defs.c.inc +++ b/target/mips/cpu-defs.c.inc @@ -934,7 +934,7 @@ const mips_def_t mips_defs[] = (1 << CP0C1_DS) | (4 << CP0C1_DL) | (1 << CP0C1_DA) | (1 << CP0C1_PC) | (1 << CP0C1_WR) | (1 << CP0C1_EP), .CP0_Config2 = MIPS_CONFIG2, - .CP0_Config3 = MIPS_CONFIG3 | (1 << CP0C3_LPA) | (1 << CP0C3_DSPP) , + .CP0_Config3 = MIPS_CONFIG3 | (1 << CP0C3_LPA), .CP0_Config4 = MIPS_CONFIG4 | (1U << CP0C4_M) | (0x3c << CP0C4_KScrExist) | (1U << CP0C4_MMUExtDef) | (3U << CP0C4_MMUSizeExt), @@ -946,7 +946,7 @@ const mips_def_t mips_defs[] = .CP0_Status_rw_bitmask = 0x12F8FFFF, .SEGBITS = 42, .PABITS = 49, - .insn_flags = CPU_MIPS64R2 | INSN_OCTEON | ASE_DSP, + .insn_flags = CPU_MIPS64R2 | INSN_OCTEON, .mmu_type = MMU_TYPE_R4000, }, From patchwork Mon Nov 7 23:58:13 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 622256 Delivered-To: patch@linaro.org Received: by 2002:a17:522:c983:b0:460:3032:e3c4 with SMTP id kr3csp2556622pvb; Mon, 7 Nov 2022 15:59:59 -0800 (PST) X-Google-Smtp-Source: AMsMyM5VFcd3gQSsw7aG6yduDwKnHofGayTc9RqhtRaa3FSSlEXzp+JyBnXooOXkT5XGtRKj0xtf X-Received: by 2002:ac8:6b46:0:b0:3a5:57f1:5159 with SMTP id x6-20020ac86b46000000b003a557f15159mr18598234qts.421.1667865599643; Mon, 07 Nov 2022 15:59:59 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1667865599; cv=none; d=google.com; s=arc-20160816; b=CzLVrnJW4dCQDEvUNisNOlzfhEy8ISbsHMxXPgTK02pijR2Wud7HBebAI95YBNXfH4 V84Ly9CVpvVR3aT3BR189+l24egzZPPpA4ZA1qJqzCGfEudnfl3Lxn/DdbX7EJzDCtZq YXHUsA7FO6S951HMItwJNNnUfthEDf4U7NdcNg57d+pTnNkof7lpGDls8t0GQMJtMGFd NJq4GmYYcjqk/lRTFX3qGQtQ8DutoLwBmvzv0jgN7Z/7V6PEpj/QR+Wi+SGJeZsbaLjX iZZMni7rLNtQsjIjoLyIKLYFy3s9ffC5BRj9voVRxSQDGVEwtzXP+e6K6EfDA47Qdjd9 ZygA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=5vUs7d8+PqaAE+DBpDZ/E5BEiMbZqrac7M3FLYPlREw=; b=VHmaDqZ4Ik1uQ00vyoQZGFLQ+5OcyOe6+85Zqi/JloGDg2cnKuRTFA0tGdDWUOzZEU fQp/rL6AoMJ10LWtvZti7CZBkQPfIW/rV4FCAKAJPDDwIiX9WreiIQs2ucsxtL68icL4 ATN2uI0623Su9Gfxy6/xDf+li34VVbppOLZuPJzu2fd1EMctMZMhdULzs4XrMpd+T/8V 213Gt9xof1RDtTS1PcEsoaFq2hacADZ+93FVZkWWRlQCQIvqarQm8nFBGtp0DR7auaGx +wznhpIbmP0SPQ2g42Ybubt7YfbnU9Pndr1u8ubepqYOGyBlvU54o1OLUergdDGRaP0T ZqyA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=ufFKXFLB; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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As the eligibility of 64 bit FP instructions is already determined by CP0St_FR, there is no need to check for COP1X again. Signed-off-by: Jiaxun Yang Reviewed-by: Philippe Mathieu-Daudé Message-Id: <20221102165719.190378-1-jiaxun.yang@flygoat.com> [PMD: Add missing trailing parenthesis (buildfix)] Signed-off-by: Philippe Mathieu-Daudé --- target/mips/tcg/translate.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/mips/tcg/translate.c b/target/mips/tcg/translate.c index 4c4bd0823d..624e6b7786 100644 --- a/target/mips/tcg/translate.c +++ b/target/mips/tcg/translate.c @@ -1545,7 +1545,7 @@ void check_cop1x(DisasContext *ctx) */ void check_cp1_64bitmode(DisasContext *ctx) { - if (unlikely(~ctx->hflags & (MIPS_HFLAG_F64 | MIPS_HFLAG_COP1X))) { + if (unlikely(~ctx->hflags & MIPS_HFLAG_F64)) { gen_reserved_instruction(ctx); } } From patchwork Mon Nov 7 23:58:14 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 622253 Delivered-To: patch@linaro.org Received: by 2002:a17:522:c983:b0:460:3032:e3c4 with SMTP id kr3csp2556482pvb; Mon, 7 Nov 2022 15:59:41 -0800 (PST) X-Google-Smtp-Source: AMsMyM7NhVR7iII54u2JwxnFPp28ITJj3WoUcSmzb305oDbn8mQz2msLw8tVnz8ZMoMPdisEmINv X-Received: by 2002:a37:5a42:0:b0:6ee:8f0a:9319 with SMTP id o63-20020a375a42000000b006ee8f0a9319mr36706099qkb.315.1667865581331; Mon, 07 Nov 2022 15:59:41 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1667865581; cv=none; d=google.com; s=arc-20160816; b=x906yHqyeqlYRJGOJI/uguKNhJUBLGIPtKWBNA53FPvn1uHEgVOl3XphPU4+Qea/3K ZSTgwXmFORqSo6Hf06d9/6xI7UC1YKPmt8CTmKlQYa9EIsHHS/SDz+PL/bkQaBzdvugN Jdob4rvWYcum8mEbOAngQRvcfwqF4xE/BMXRE2Pt2EnlC3WL9YC1zKWUBgXtZIRKQy7C KZ9azjDQ5NJMGWzplxGN5ZlQn1M6K39arLJ2UNpljmNuY9Yitdzo3TFswhdAtbN+6eiq LTqwVKJ5SP4SdVlUxRIvHVHBxZT19qPyvwY2uI1emuFIHkWg1U46Y/5MKkX5qGs8zRwu RYzg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=85x2IkSz6a0ndvbFw8yP07VnybynH46w15PMISZYCz4=; b=BF/z03dW5vwppm2he7FT5sQX7pbj1ihd560tZyELK0WY4mRl6wyct/ud2CAj5kTiFi bIUimqd3zRFLnGRg5IPt3t+QMhKZec77ntNmevRsNGmtTFcuXSDL/zCtU2kbREFSc8l3 eY5nnyK/jD362Ruw02vgCrw3E083spMC8RkWJKDs8JzEthKTRo28Kk+/XJoiX4uuNSmo M18fbXk3q8QU1ksXSX8fd1cTM8J4EQ3X75BZTQmw8NzOU6weNmL38u4f6jYKM0OegxQx N1Lm6/UYD8qJMXXYK/Mj/ne6ikM7TGdqmr1xYSINQq5JiYlvvC/9wg0VVY8UZQ8IzX5q U97g== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="lCcDOJ/X"; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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Mon, 07 Nov 2022 15:58:53 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Aurelien Jarno , Aleksandar Rikalo , Jiaxun Yang , Stefan Weil Subject: [PULL 06/14] disas/nanomips: Fix invalid PRId64 format calling img_format() Date: Tue, 8 Nov 2022 00:58:14 +0100 Message-Id: <20221107235822.71458-7-philmd@linaro.org> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221107235822.71458-1-philmd@linaro.org> References: <20221107235822.71458-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::434; envelope-from=philmd@linaro.org; helo=mail-wr1-x434.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Fix warnings such: disas/nanomips.c:3251:64: warning: format specifies type 'char *' but the argument has type 'int64' (aka 'long long') [-Wformat] return img_format("CACHE 0x%" PRIx64 ", %s(%s)", op_value, s_value, rs); ~~ ^~~~~~~ %lld To avoid crashes such (kernel from commit f375ad6a0d): $ qemu-system-mipsel -cpu I7200 -d in_asm -kernel generic_nano32r6el_page4k ... ---------------- IN: __bzero 0x805c6084: 20c4 6950 ADDU r13, a0, a2 0x805c6088: 9089 ADDIU a0, 1 Process 70261 stopped * thread #6, stop reason = EXC_BAD_ACCESS (code=1, address=0xfffffffffffffff0) frame #0: 0x00000001bfe38864 libsystem_platform.dylib`_platform_strlen + 4 libsystem_platform.dylib`: -> 0x1bfe38864 <+4>: ldr q0, [x1] 0x1bfe38868 <+8>: adr x3, #-0xc8 ; ___lldb_unnamed_symbol314 0x1bfe3886c <+12>: ldr q2, [x3], #0x10 0x1bfe38870 <+16>: and x2, x0, #0xf Target 0: (qemu-system-mipsel) stopped. (lldb) bt * thread #6, stop reason = EXC_BAD_ACCESS (code=1, address=0xfffffffffffffff0) * frame #0: 0x00000001bfe38864 libsystem_platform.dylib`_platform_strlen + 4 frame #1: 0x00000001bfce76a0 libsystem_c.dylib`__vfprintf + 4544 frame #2: 0x00000001bfd158b4 libsystem_c.dylib`_vasprintf + 280 frame #3: 0x0000000101c22fb0 libglib-2.0.0.dylib`g_vasprintf + 28 frame #4: 0x0000000101bfb7d8 libglib-2.0.0.dylib`g_strdup_vprintf + 32 frame #5: 0x000000010000fb70 qemu-system-mipsel`img_format(format=) at nanomips.c:103:14 [opt] frame #6: 0x0000000100018868 qemu-system-mipsel`SB_S9_(instruction=, info=) at nanomips.c:12616:12 [opt] frame #7: 0x000000010000f90c qemu-system-mipsel`print_insn_nanomips at nanomips.c:589:28 [opt] Fixes: 4066c152b3 ("disas/nanomips: Remove IMMEDIATE functions") Reported-by: Stefan Weil Reviewed-by: Stefan Weil Signed-off-by: Philippe Mathieu-Daudé Message-Id: <20221101114458.25756-2-philmd@linaro.org> --- disas/nanomips.c | 35 ++++++++++++++++++++--------------- 1 file changed, 20 insertions(+), 15 deletions(-) diff --git a/disas/nanomips.c b/disas/nanomips.c index 9647f1a8e3..6466c80dc5 100644 --- a/disas/nanomips.c +++ b/disas/nanomips.c @@ -3252,7 +3252,8 @@ static char *CACHE(uint64 instruction, Dis_info *info) const char *rs = GPR(rs_value, info); - return img_format("CACHE 0x%" PRIx64 ", %s(%s)", op_value, s_value, rs); + return img_format("CACHE 0x%" PRIx64 ", %" PRId64 "(%s)", + op_value, s_value, rs); } @@ -3274,7 +3275,8 @@ static char *CACHEE(uint64 instruction, Dis_info *info) const char *rs = GPR(rs_value, info); - return img_format("CACHEE 0x%" PRIx64 ", %s(%s)", op_value, s_value, rs); + return img_format("CACHEE 0x%" PRIx64 ", %" PRId64 "(%s)", + op_value, s_value, rs); } @@ -5173,7 +5175,7 @@ static char *DADDIU_48_(uint64 instruction, Dis_info *info) const char *rt = GPR(rt_value, info); - return img_format("DADDIU %s, %s", rt, s_value); + return img_format("DADDIU %s, %" PRId64, rt, s_value); } @@ -11859,7 +11861,7 @@ static char *PREF_S9_(uint64 instruction, Dis_info *info) const char *rs = GPR(rs_value, info); - return img_format("PREF 0x%" PRIx64 ", %s(%s)", + return img_format("PREF 0x%" PRIx64 ", %" PRId64 "(%s)", hint_value, s_value, rs); } @@ -11905,7 +11907,8 @@ static char *PREFE(uint64 instruction, Dis_info *info) const char *rs = GPR(rs_value, info); - return img_format("PREFE 0x%" PRIx64 ", %s(%s)", hint_value, s_value, rs); + return img_format("PREFE 0x%" PRIx64 ", %" PRId64 "(%s)", + hint_value, s_value, rs); } @@ -12079,7 +12082,7 @@ static char *REPL_PH(uint64 instruction, Dis_info *info) const char *rt = GPR(rt_value, info); - return img_format("REPL.PH %s, %s", rt, s_value); + return img_format("REPL.PH %s, %" PRId64, rt, s_value); } @@ -12613,7 +12616,7 @@ static char *SB_S9_(uint64 instruction, Dis_info *info) const char *rt = GPR(rt_value, info); const char *rs = GPR(rs_value, info); - return img_format("SB %s, %s(%s)", rt, s_value, rs); + return img_format("SB %s, %" PRId64 "(%s)", rt, s_value, rs); } @@ -12659,7 +12662,7 @@ static char *SBE(uint64 instruction, Dis_info *info) const char *rt = GPR(rt_value, info); const char *rs = GPR(rs_value, info); - return img_format("SBE %s, %s(%s)", rt, s_value, rs); + return img_format("SBE %s, %" PRId64 "(%s)", rt, s_value, rs); } @@ -12706,7 +12709,7 @@ static char *SC(uint64 instruction, Dis_info *info) const char *rt = GPR(rt_value, info); const char *rs = GPR(rs_value, info); - return img_format("SC %s, %s(%s)", rt, s_value, rs); + return img_format("SC %s, %" PRId64 "(%s)", rt, s_value, rs); } @@ -12729,7 +12732,7 @@ static char *SCD(uint64 instruction, Dis_info *info) const char *rt = GPR(rt_value, info); const char *rs = GPR(rs_value, info); - return img_format("SCD %s, %s(%s)", rt, s_value, rs); + return img_format("SCD %s, %" PRId64 "(%s)", rt, s_value, rs); } @@ -12776,7 +12779,7 @@ static char *SCE(uint64 instruction, Dis_info *info) const char *rt = GPR(rt_value, info); const char *rs = GPR(rs_value, info); - return img_format("SCE %s, %s(%s)", rt, s_value, rs); + return img_format("SCE %s, %" PRId64 "(%s)", rt, s_value, rs); } @@ -12868,7 +12871,7 @@ static char *SD_S9_(uint64 instruction, Dis_info *info) const char *rt = GPR(rt_value, info); const char *rs = GPR(rs_value, info); - return img_format("SD %s, %s(%s)", rt, s_value, rs); + return img_format("SD %s, %" PRId64 "(%s)", rt, s_value, rs); } @@ -12973,7 +12976,7 @@ static char *SDC1_S9_(uint64 instruction, Dis_info *info) const char *ft = FPR(ft_value, info); const char *rs = GPR(rs_value, info); - return img_format("SDC1 %s, %s(%s)", ft, s_value, rs); + return img_format("SDC1 %s, %" PRId64 "(%s)", ft, s_value, rs); } @@ -13066,7 +13069,8 @@ static char *SDC2(uint64 instruction, Dis_info *info) const char *rs = GPR(rs_value, info); - return img_format("SDC2 CP%" PRIu64 ", %s(%s)", cs_value, s_value, rs); + return img_format("SDC2 CP%" PRIu64 ", %" PRId64 "(%s)", + cs_value, s_value, rs); } @@ -13091,7 +13095,8 @@ static char *SDM(uint64 instruction, Dis_info *info) const char *rs = GPR(rs_value, info); uint64 count3 = encode_count3_from_count(count3_value); - return img_format("SDM %s, %s(%s), 0x%" PRIx64, rt, s_value, rs, count3); + return img_format("SDM %s, %" PRId64 "(%s), 0x%" PRIx64, + rt, s_value, rs, count3); } From patchwork Mon Nov 7 23:58:15 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 622249 Delivered-To: patch@linaro.org Received: by 2002:a17:522:c983:b0:460:3032:e3c4 with SMTP id kr3csp2556318pvb; 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Mon, 07 Nov 2022 15:58:58 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Aurelien Jarno , Aleksandar Rikalo , Jiaxun Yang , Stefan Weil Subject: [PULL 07/14] disas/nanomips: Fix invalid PRIx64 format calling img_format() Date: Tue, 8 Nov 2022 00:58:15 +0100 Message-Id: <20221107235822.71458-8-philmd@linaro.org> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221107235822.71458-1-philmd@linaro.org> References: <20221107235822.71458-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::42a; envelope-from=philmd@linaro.org; helo=mail-wr1-x42a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Fix: disas/nanomips.c:12231:62: warning: format specifies type 'char *' but the argument has type 'uint64' (aka 'unsigned long long') [-Wformat] return img_format("RESTOREF 0x%" PRIx64 ", %s", u_value, count_value); ~~ ^~~~~~~~~~~ %llu Fixes: 4066c152b3 ("disas/nanomips: Remove IMMEDIATE functions") Reported-by: Stefan Weil Reviewed-by: Stefan Weil Signed-off-by: Philippe Mathieu-Daudé Message-Id: <20221101114458.25756-3-philmd@linaro.org> --- disas/nanomips.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/disas/nanomips.c b/disas/nanomips.c index 6466c80dc5..e4b21e7c45 100644 --- a/disas/nanomips.c +++ b/disas/nanomips.c @@ -12235,7 +12235,8 @@ static char *RESTOREF(uint64 instruction, Dis_info *info) uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3__s3(instruction); - return img_format("RESTOREF 0x%" PRIx64 ", %s", u_value, count_value); + return img_format("RESTOREF 0x%" PRIx64 ", 0x%" PRIx64, + u_value, count_value); } From patchwork Mon Nov 7 23:58:16 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 622255 Delivered-To: patch@linaro.org Received: by 2002:a17:522:c983:b0:460:3032:e3c4 with SMTP id kr3csp2556530pvb; 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Mon, 07 Nov 2022 15:59:03 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Aurelien Jarno , Aleksandar Rikalo , Jiaxun Yang , Stefan Weil Subject: [PULL 08/14] disas/nanomips: Use G_GNUC_PRINTF to avoid invalid string formats Date: Tue, 8 Nov 2022 00:58:16 +0100 Message-Id: <20221107235822.71458-9-philmd@linaro.org> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221107235822.71458-1-philmd@linaro.org> References: <20221107235822.71458-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::42c; envelope-from=philmd@linaro.org; helo=mail-wr1-x42c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Suggested-by: Stefan Weil Reviewed-by: Stefan Weil Signed-off-by: Philippe Mathieu-Daudé Message-Id: <20221101114458.25756-4-philmd@linaro.org> --- disas/nanomips.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/disas/nanomips.c b/disas/nanomips.c index e4b21e7c45..3f45447292 100644 --- a/disas/nanomips.c +++ b/disas/nanomips.c @@ -95,7 +95,7 @@ typedef struct Pool { #define IMGASSERTONCE(test) -static char *img_format(const char *format, ...) +static char * G_GNUC_PRINTF(1, 2) img_format(const char *format, ...) { char *buffer; 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Mon, 07 Nov 2022 15:59:08 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Aurelien Jarno , Aleksandar Rikalo , Jiaxun Yang , Stefan Weil Subject: [PULL 09/14] disas/nanomips: Remove headers already included by "qemu/osdep.h" Date: Tue, 8 Nov 2022 00:58:17 +0100 Message-Id: <20221107235822.71458-10-philmd@linaro.org> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221107235822.71458-1-philmd@linaro.org> References: <20221107235822.71458-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::434; envelope-from=philmd@linaro.org; helo=mail-wr1-x434.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Reviewed-by: Stefan Weil Signed-off-by: Philippe Mathieu-Daudé Message-Id: <20221101114458.25756-5-philmd@linaro.org> --- disas/nanomips.c | 4 ---- 1 file changed, 4 deletions(-) diff --git a/disas/nanomips.c b/disas/nanomips.c index 3f45447292..821d4f8832 100644 --- a/disas/nanomips.c +++ b/disas/nanomips.c @@ -30,10 +30,6 @@ #include "qemu/osdep.h" #include "disas/dis-asm.h" -#include -#include -#include - typedef int64_t int64; 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The actual length returned from Disassemble is not used, because we have already determined the length while reading bytes. Fixes: nanomips.c: In function ‘print_insn_nanomips’: nanomips.c:21925:14: error: variable ‘insn1’ might be clobbered by ‘longjmp’ or ‘vfork’ [-Werror=clobbered] nanomips.c:21925:25: error: variable ‘insn2’ might be clobbered by ‘longjmp’ or ‘vfork’ [-Werror=clobbered] nanomips.c:21925:36: error: variable ‘insn3’ might be clobbered by ‘longjmp’ or ‘vfork’ [-Werror=clobbered] nanomips.c:21926:22: error: variable ‘buf’ might be clobbered by ‘longjmp’ or ‘vfork’ [-Werror=clobbered] Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson Message-Id: <20221106212852.152384-2-richard.henderson@linaro.org> --- disas/nanomips.c | 42 +++++++++++++++++------------------------- 1 file changed, 17 insertions(+), 25 deletions(-) diff --git a/disas/nanomips.c b/disas/nanomips.c index 821d4f8832..83a39a878c 100644 --- a/disas/nanomips.c +++ b/disas/nanomips.c @@ -21907,22 +21907,24 @@ static const Pool MAJOR[2] = { 0x0 }, /* P16 */ }; -static int nanomips_dis(char **buf, - Dis_info *info, - unsigned short one, - unsigned short two, - unsigned short three) +static bool nanomips_dis(char **buf, Dis_info *info, + unsigned short one, + unsigned short two, + unsigned short three) { uint16 bits[3] = {one, two, three}; - TABLE_ENTRY_TYPE type; - int size = Disassemble(bits, buf, &type, MAJOR, 2, info); - return size; + + /* Handle runtime errors. */ + if (unlikely(sigsetjmp(info->buf, 0) != 0)) { + return false; + } + return Disassemble(bits, buf, &type, MAJOR, ARRAY_SIZE(MAJOR), info) >= 0; } int print_insn_nanomips(bfd_vma memaddr, struct disassemble_info *info) { - int status; + int status, length; bfd_byte buffer[2]; uint16_t insn1 = 0, insn2 = 0, insn3 = 0; g_autofree char *buf = NULL; @@ -21952,6 +21954,7 @@ int print_insn_nanomips(bfd_vma memaddr, struct disassemble_info *info) } else { insn1 = bfd_getl16(buffer); } + length = 2; (*info->fprintf_func)(info->stream, "%04x ", insn1); /* Handle 32-bit opcodes. */ @@ -21967,6 +21970,7 @@ int print_insn_nanomips(bfd_vma memaddr, struct disassemble_info *info) } else { insn2 = bfd_getl16(buffer); } + length = 4; (*info->fprintf_func)(info->stream, "%04x ", insn2); } else { (*info->fprintf_func)(info->stream, " "); @@ -21984,27 +21988,15 @@ int print_insn_nanomips(bfd_vma memaddr, struct disassemble_info *info) } else { insn3 = bfd_getl16(buffer); } + length = 6; (*info->fprintf_func)(info->stream, "%04x ", insn3); } else { (*info->fprintf_func)(info->stream, " "); } - /* Handle runtime errors. */ - if (sigsetjmp(disassm_info.buf, 0) != 0) { - info->insn_type = dis_noninsn; - return insn3 ? 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This allows using a loop to print the bytes. Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson Message-Id: <20221106212852.152384-3-richard.henderson@linaro.org> --- disas/nanomips.c | 44 +++++++++++++++++++++----------------------- 1 file changed, 21 insertions(+), 23 deletions(-) diff --git a/disas/nanomips.c b/disas/nanomips.c index 83a39a878c..e462256760 100644 --- a/disas/nanomips.c +++ b/disas/nanomips.c @@ -21907,26 +21907,22 @@ static const Pool MAJOR[2] = { 0x0 }, /* P16 */ }; -static bool nanomips_dis(char **buf, Dis_info *info, - unsigned short one, - unsigned short two, - unsigned short three) +static bool nanomips_dis(const uint16_t *data, char **buf, Dis_info *info) { - uint16 bits[3] = {one, two, three}; TABLE_ENTRY_TYPE type; /* Handle runtime errors. */ if (unlikely(sigsetjmp(info->buf, 0) != 0)) { return false; } - return Disassemble(bits, buf, &type, MAJOR, ARRAY_SIZE(MAJOR), info) >= 0; + return Disassemble(data, buf, &type, MAJOR, ARRAY_SIZE(MAJOR), info) >= 0; } int print_insn_nanomips(bfd_vma memaddr, struct disassemble_info *info) { int status, length; bfd_byte buffer[2]; - uint16_t insn1 = 0, insn2 = 0, insn3 = 0; + uint16_t words[3] = { }; g_autofree char *buf = NULL; info->bytes_per_chunk = 2; @@ -21950,15 +21946,14 @@ int print_insn_nanomips(bfd_vma memaddr, struct disassemble_info *info) } if (info->endian == BFD_ENDIAN_BIG) { - insn1 = bfd_getb16(buffer); + words[0] = bfd_getb16(buffer); } else { - insn1 = bfd_getl16(buffer); + words[0] = bfd_getl16(buffer); } length = 2; - (*info->fprintf_func)(info->stream, "%04x ", insn1); /* Handle 32-bit opcodes. */ - if ((insn1 & 0x1000) == 0) { + if ((words[0] & 0x1000) == 0) { status = (*info->read_memory_func)(memaddr + 2, buffer, 2, info); if (status != 0) { (*info->memory_error_func)(status, memaddr + 2, info); @@ -21966,17 +21961,15 @@ int print_insn_nanomips(bfd_vma memaddr, struct disassemble_info *info) } if (info->endian == BFD_ENDIAN_BIG) { - insn2 = bfd_getb16(buffer); + words[1] = bfd_getb16(buffer); } else { - insn2 = bfd_getl16(buffer); + words[1] = bfd_getl16(buffer); } length = 4; - (*info->fprintf_func)(info->stream, "%04x ", insn2); - } else { - (*info->fprintf_func)(info->stream, " "); } + /* Handle 48-bit opcodes. */ - if ((insn1 >> 10) == 0x18) { + if ((words[0] >> 10) == 0x18) { status = (*info->read_memory_func)(memaddr + 4, buffer, 2, info); if (status != 0) { (*info->memory_error_func)(status, memaddr + 4, info); @@ -21984,17 +21977,22 @@ int print_insn_nanomips(bfd_vma memaddr, struct disassemble_info *info) } if (info->endian == BFD_ENDIAN_BIG) { - insn3 = bfd_getb16(buffer); + words[2] = bfd_getb16(buffer); } else { - insn3 = bfd_getl16(buffer); + words[2] = bfd_getl16(buffer); } length = 6; - (*info->fprintf_func)(info->stream, "%04x ", insn3); - } else { - (*info->fprintf_func)(info->stream, " "); } - if (nanomips_dis(&buf, &disassm_info, insn1, insn2, insn3)) { + for (int i = 0; i < ARRAY_SIZE(words); i++) { + if (i * 2 < length) { + (*info->fprintf_func)(info->stream, "%04x ", words[i]); + } else { + (*info->fprintf_func)(info->stream, " "); + } + } + + if (nanomips_dis(words, &buf, &disassm_info)) { (*info->fprintf_func) (info->stream, "%s", buf); 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Signed-off-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé Message-Id: <20221106023735.5277-4-richard.henderson@linaro.org> --- disas/nanomips.c | 48 +++++++++++++++++++----------------------------- 1 file changed, 19 insertions(+), 29 deletions(-) diff --git a/disas/nanomips.c b/disas/nanomips.c index e462256760..3b998118e3 100644 --- a/disas/nanomips.c +++ b/disas/nanomips.c @@ -21918,10 +21918,24 @@ static bool nanomips_dis(const uint16_t *data, char **buf, Dis_info *info) return Disassemble(data, buf, &type, MAJOR, ARRAY_SIZE(MAJOR), info) >= 0; } +static bool read_u16(uint16_t *ret, bfd_vma memaddr, + struct disassemble_info *info) +{ + int status = (*info->read_memory_func)(memaddr, (bfd_byte *)ret, 2, info); + if (status != 0) { + (*info->memory_error_func)(status, memaddr, info); + return false; + } + + if ((info->endian == BFD_ENDIAN_BIG) != HOST_BIG_ENDIAN) { + bswap16s(ret); + } + return true; +} + int print_insn_nanomips(bfd_vma memaddr, struct disassemble_info *info) { - int status, length; - bfd_byte buffer[2]; + int length; uint16_t words[3] = { }; g_autofree char *buf = NULL; @@ -21939,48 +21953,24 @@ int print_insn_nanomips(bfd_vma memaddr, struct disassemble_info *info) disassm_info.fprintf_func = info->fprintf_func; disassm_info.stream = info->stream; - status = (*info->read_memory_func)(memaddr, buffer, 2, info); - if (status != 0) { - (*info->memory_error_func)(status, memaddr, info); + if (!read_u16(&words[0], memaddr, info)) { return -1; } - - if (info->endian == BFD_ENDIAN_BIG) { - words[0] = bfd_getb16(buffer); - } else { - words[0] = bfd_getl16(buffer); - } length = 2; /* Handle 32-bit opcodes. */ if ((words[0] & 0x1000) == 0) { - status = (*info->read_memory_func)(memaddr + 2, buffer, 2, info); - if (status != 0) { - (*info->memory_error_func)(status, memaddr + 2, info); + if (!read_u16(&words[1], memaddr + 2, info)) { return -1; } - - if (info->endian == BFD_ENDIAN_BIG) { - words[1] = bfd_getb16(buffer); - } else { - words[1] = bfd_getl16(buffer); - } length = 4; } /* Handle 48-bit opcodes. */ if ((words[0] >> 10) == 0x18) { - status = (*info->read_memory_func)(memaddr + 4, buffer, 2, info); - if (status != 0) { - (*info->memory_error_func)(status, memaddr + 4, info); + if (!read_u16(&words[1], memaddr + 4, info)) { return -1; } - - if (info->endian == BFD_ENDIAN_BIG) { - words[2] = bfd_getb16(buffer); - } else { - words[2] = bfd_getl16(buffer); - } length = 6; } From patchwork Mon Nov 7 23:58:21 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 622547 Delivered-To: patch@linaro.org Received: by 2002:a17:522:c983:b0:460:3032:e3c4 with SMTP id kr3csp2558665pvb; Mon, 7 Nov 2022 16:02:30 -0800 (PST) X-Google-Smtp-Source: AMsMyM5oKvrL7+yXAhL+pNwdqD8HbF6urOtR7Hwfc5D/cQaBHgujj/5dsH0jB5qfTSruXCHo1P0B X-Received: by 2002:a05:6214:5182:b0:4bb:a323:4ca5 with SMTP id kl2-20020a056214518200b004bba3234ca5mr47173959qvb.121.1667865750783; Mon, 07 Nov 2022 16:02:30 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1667865750; cv=none; d=google.com; s=arc-20160816; b=OJJG2wlCsM3/Uh3suWLXTtUSI287ns6VhiV735L2pF2ZmUQoCvWFpfEWBni28PTiSp JsyLOP9QpgFPZkuy32YoDGlISoFDfquVHjMUgIMPcp4uho3em1erLDNQHm0NEEsYbSUC hGLCnMB47zIW2z0sLKLWpke3fFfdOoDL2pk/VFoLlefaloQXws1RHqyrdK793dHPwRG8 wqV1TgPAK0zmYK0C04eDU0X7rtyokYlLD3JiHJroOvnV9/5dq744IjvCYz5aSNoor0oA FoLa3n6h1ltcyKxRQCcoIWkd52L387mA6+/5lV6d/YA71b1+OqZbpQuwjjJZPUNU3Z03 fblQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=QvFVCFU+6/7VpsKGkw+DBrZFOFd7YMLOuvT51dahy9Q=; b=SBIDQjvmHeqs5xE1NI/GW6uIBm24rWsmXbwLhe3U0Yedu0s6h6pP7RBof2aUEA3LVL hlYP2l2zPlQiaBzL+REHei4RtbBOrgoVutlq9h+bUCFpEAv6DitX/UJfqSPAxJBGBeau oBQ0sbpW5XBXZzLxcAhIAt8+SSwYqNLYhTTW/vZHisjAfOh0vU+4CRHJnL7nNcH5uj/c +XmktjoUtokMXhDjKt+ad2cfPJcS3KykHtLrr1jRdNhMv1om1Zl+supQhkyPtawasRH/ 6+rvRaL2WSBvU0kLG9uiZ6mGNbRhxlMJRnpaEVwwm5soWlQpiQAIUsEqOYoZoDtXIP3D Kcew== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=GTrLTlGh; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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Signed-off-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé Message-Id: <20221106023735.5277-5-richard.henderson@linaro.org> --- disas/nanomips.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/disas/nanomips.c b/disas/nanomips.c index 3b998118e3..a0253598dd 100644 --- a/disas/nanomips.c +++ b/disas/nanomips.c @@ -21964,14 +21964,14 @@ int print_insn_nanomips(bfd_vma memaddr, struct disassemble_info *info) return -1; } length = 4; - } - /* Handle 48-bit opcodes. */ - if ((words[0] >> 10) == 0x18) { - if (!read_u16(&words[1], memaddr + 4, info)) { - return -1; + /* Handle 48-bit opcodes. */ + if ((words[0] >> 10) == 0x18) { + if (!read_u16(&words[1], memaddr + 4, info)) { + return -1; + } + length = 6; } - length = 6; } for (int i = 0; i < ARRAY_SIZE(words); i++) { From patchwork Mon Nov 7 23:58:22 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 622550 Delivered-To: patch@linaro.org Received: by 2002:a17:522:c983:b0:460:3032:e3c4 with SMTP id kr3csp2558821pvb; Mon, 7 Nov 2022 16:02:43 -0800 (PST) X-Google-Smtp-Source: AA0mqf6YzoaPXvBfzdXWQEYj9IQV5QJ/4Glv5/UQ33eFuAksHWUlVbLSCUrfaLYUWMhdeqxkuof2 X-Received: by 2002:a05:620a:3706:b0:6fa:e93b:f520 with SMTP id de6-20020a05620a370600b006fae93bf520mr4289495qkb.754.1667865763285; Mon, 07 Nov 2022 16:02:43 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1667865763; cv=none; d=google.com; s=arc-20160816; b=gj0rHDAJO90YboLnPvi8gXjcJlLKkCw/9/o/JC58NbcYbLSgtiML5ljCC4szAK7wnp IAmRyTfa4OODWpWjDAU88GQUrov8pBzks+5yQnUSn89EC5YYW0ODrvoztY7u8yvwMsOE rNtJ8MnhvHGrM8/JiJQgepHgcmoDJSuYOnA5wG/vLIVxJC/q45a9Wq/wzHXOY++nK3VN B/9wxRXthDibLU0s6NdwDpPj4TL+Nn4Pu7ivHMojyjM8//itlEXyLnaetfhJcxWjDYi3 VshI7nEd28bhWvWEU48ENJrTWkOKJJ5gMCzlhAQS5erYYDJZwrAl7uFJ/d6L/y2NMGvi ZdzQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=huU0VtkMiJEhV5c3xPWAeqKcLpg8EFCkMWMz+PzPUtI=; b=0X2IIwq8TctxjqNajSaE5qG34k0CAq6IQ3/ZrfyGPDwN8YQVfOxYdpbqtSD+I47G2S 0p757tNW6HSITHUbC8KpGYJ6XxNekNuWF53rL036sS4Yi/++Hb+11b/TmxkXioiBQSI3 4N7aNMQ3K/1cvTwvr7zRX27zx/lp2+VT2J63yYOkJZZUelE4p17HT/l614dO28GmYbub h+7/Y3RcWDE2lzY+jN/W2dPjEHWi6Iwj0c39xu6kYW2q0A/5LRcoC3NSbw8LDKp1r/zm /kqPcGTZxjUJLjb++1Xyly9+NO7ji1R5NsHmNxKVoTnNJOOb011gwQfcdbr9SpymgzCy 9NyQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=gNlKTYHd; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id i17-20020a05620a405100b006f61950a16bsi6275524qko.178.2022.11.07.16.02.43 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Mon, 07 Nov 2022 16:02:43 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=gNlKTYHd; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1osC1i-0005d2-VJ; Mon, 07 Nov 2022 18:59:39 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1osC1g-0005Wk-JY for qemu-devel@nongnu.org; Mon, 07 Nov 2022 18:59:36 -0500 Received: from mail-wr1-x42e.google.com ([2a00:1450:4864:20::42e]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1osC1e-0003ry-T8 for qemu-devel@nongnu.org; Mon, 07 Nov 2022 18:59:36 -0500 Received: by mail-wr1-x42e.google.com with SMTP id y16so18466817wrt.12 for ; Mon, 07 Nov 2022 15:59:34 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=huU0VtkMiJEhV5c3xPWAeqKcLpg8EFCkMWMz+PzPUtI=; b=gNlKTYHdGBUZGFMZ6eQY1b9PHiBxIkQurnAquU5vC/BYROMNxRKniKEK8feo/aoR1G 3v/sjVoMD4PxHvdqJWFso1PElunRvSaGs9BmS/uOyV5dR5c+NJLzcQhAXDFwL590yp4q BHsRG0zkwaandXCVt+YekrCmFmQx1o4niBBCE2fHvOsSmodmWFZGFeReBmwgYfqNrYzu rieQ8wB19/jYEOiN1Bunsqzkh7cjCZgAebpXEqSkQyqs3DCQXosp39elGPksGm16qycB RBsxN4b+D4elvwzvH6yRPMBNpMycBySmmYIPy/9SzrW2/ZylO0JXQdJc4/aVk4cdoGWP OT0Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=huU0VtkMiJEhV5c3xPWAeqKcLpg8EFCkMWMz+PzPUtI=; b=uVvVZ8blW+BXPdgthosoDbBSghIYEIxFSeOpreQoz888F0AHP3J/WE1Nuy12HxCjSG lXCus0M0Gf4i878njbV1gOayi/yiTe/yud0Ych/o5S6yizT6KasfD0AImCDpFLn8zNYW Pj63tQT/mkdAKESSfiiCSDAzPybIZUvcE7arumgO9QED2g8KNWrz1Z7UZjWguPWcifTg c2hBYdME7/Z0Ax8me2reWcrTm5fiSRLOZbnOT98KIjv3y75OK0qxuqEIk2lZBuegVlTq b/CCy3x7atHz4SC483UkaLik+3I1o6LU/qeo3qJbOUZkQdzvzKtN8QRFxoTxqoNCUhkD N16w== X-Gm-Message-State: ACrzQf22kpUN2f+bURF4Il0MEkcxqpCdCigf1Ka7Q21tE/7hZITq3PXA FKmRfBV8zeTJ4bfqOA5wPAFhrWaNB4aeaA== X-Received: by 2002:adf:de8e:0:b0:236:ea40:47ef with SMTP id w14-20020adfde8e000000b00236ea4047efmr22781708wrl.519.1667865573356; Mon, 07 Nov 2022 15:59:33 -0800 (PST) Received: from localhost.localdomain ([185.126.107.38]) by smtp.gmail.com with ESMTPSA id u8-20020a05600c19c800b003c6f8d30e40sm13859437wmq.31.2022.11.07.15.59.32 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Mon, 07 Nov 2022 15:59:33 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Aurelien Jarno , Aleksandar Rikalo , Jiaxun Yang , Vince Del Vecchio , Richard Henderson , Thomas Huth Subject: [PULL 14/14] MAINTAINERS: Inherit from nanoMIPS Date: Tue, 8 Nov 2022 00:58:22 +0100 Message-Id: <20221107235822.71458-15-philmd@linaro.org> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221107235822.71458-1-philmd@linaro.org> References: <20221107235822.71458-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::42e; envelope-from=philmd@linaro.org; helo=mail-wr1-x42e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org 6 months ago Stefan Pejic stepped in as nanoMIPS maintainer (see commit a 8e0e23445a "target/mips: Undeprecate nanoMIPS ISA support in QEMU"), however today his email is bouncing: ** Message blocked ** Your message to stefan.pejic@syrmia.com has been blocked. See technical details below for more information. The response from the remote server was: 550 5.4.1 Recipient address rejected: Access denied. AS(201806281) [DBAEUR03FT030.eop-EUR03.prod.protection.outlook.com] To avoid unmaintained code, I feel forced to merge this code back with the generic MIPS section. Historical references: - https://lore.kernel.org/qemu-devel/TY0PR03MB679726901BD6C6BE40114A2FE2A79@TY0PR03MB6797.apcprd03.prod.outlook.com/ - https://lore.kernel.org/qemu-devel/b858a20e97b74e7b90a94948314d0008@MTKMBS62N2.mediatek.inc/ Cc: Vince Del Vecchio Reviewed-by: Richard Henderson Message-Id: <49f41916-687f-b9e5-2de7-9c658fe0d4c7@linaro.org> Tested-by: Thomas Huth Signed-off-by: Philippe Mathieu-Daudé Message-Id: <20221101114458.25756-6-philmd@linaro.org> --- MAINTAINERS | 8 +------- 1 file changed, 1 insertion(+), 7 deletions(-) diff --git a/MAINTAINERS b/MAINTAINERS index 4adf8c65db..86bcd07a31 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -237,16 +237,10 @@ R: Jiaxun Yang R: Aleksandar Rikalo S: Odd Fixes F: target/mips/ -F: disas/mips.c +F: disas/*mips.c F: docs/system/cpu-models-mips.rst.inc F: tests/tcg/mips/ -MIPS TCG CPUs (nanoMIPS ISA) -M: Stefan Pejic -S: Maintained -F: disas/nanomips.* -F: target/mips/tcg/*nanomips* - NiosII TCG CPUs M: Chris Wulff M: Marek Vasut