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[209.51.188.17]) by mx.google.com with ESMTPS id gy15-20020a056214242f00b004b18caf88bbsi8294740qvb.360.2022.11.15.08.19.08 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Tue, 15 Nov 2022 08:19:08 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Y2g1G61i; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1ouydK-00076I-VQ; Tue, 15 Nov 2022 11:17:59 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ouyd4-0006xN-3A for qemu-devel@nongnu.org; Tue, 15 Nov 2022 11:17:47 -0500 Received: from mail-wr1-x42a.google.com ([2a00:1450:4864:20::42a]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1ouyd1-0007OT-Px for qemu-devel@nongnu.org; Tue, 15 Nov 2022 11:17:41 -0500 Received: by mail-wr1-x42a.google.com with SMTP id g12so24954849wrs.10 for ; Tue, 15 Nov 2022 08:17:39 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=A0oqifx7nFQ8c8YiTcc3Tl+0de2kLNp9JgSCsS2wc6A=; b=Y2g1G61i3bJUAmz4jbXwI5p43+lO5roHNTiJhMktsZClsJxJp6ZQIVc/NfhqOe48p4 Av+tXaQN4EgNwQ9k3Wudf9ahor4I5Gas0lu8gfyp1Jxx+FncKtUdXeGA63k+6tvcneA8 LbSNEmB3u33Zjb2FPQDk6nr6ECh8/eAi9FJol2slvKVJQlRlyZsma2ujWAvHhiPDMUQ8 NkxmxQyjx8QO6h16g8SlCoO7ohZuWZHsPY2/YllAS8VQEzO4ZsPXriMkkhSfYjMSKQuy uS5x4v4fTo/qlMwsToxPVX5Ndin1bj+ZWS/Uss6cDxShTZyiKUQmSnHLJ248G8i76TER 6ugQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=A0oqifx7nFQ8c8YiTcc3Tl+0de2kLNp9JgSCsS2wc6A=; b=x8+wnvAmwX2wf0z3tQEVuZIcrkVIKKpdW2HmxffQCYiaIdRLWCWkr5QQJNTV5DHsP0 KtyZDDzRVWbzugdrd/kQ4YiS3QEPnoUrgXeR62dQ+NI29j5JCYgvP4FdI7C20ASpbNSL SHLQWzcL0MuaErDITOskua4iYf6U5FzBoOdB/PMAneLkkTu6f7iagxMpfzECJ3Fat6rC 1VPAB8U1rnyxAFBJzl7kn4PbLxjBaaEl73iTb+PdEJgH4UOQDdJ8toQVyQ0PqwDYBCPo VsDP+Zu3/+PV/dWV8MoE0ygItH2FccXmjlnfdcDf2AfRXj2MPpwJ/6+L9XYfpAXiZGZP Ap5A== X-Gm-Message-State: ANoB5pnQ7NmLDDMlHNOrfEISmiA30gBpQNK53gjCkDAnagXKgET8R+Jy YAvw0lvzrYscw/0H9T/q/z1Q0Q== X-Received: by 2002:adf:f74f:0:b0:22c:f296:1120 with SMTP id z15-20020adff74f000000b0022cf2961120mr10803620wrp.369.1668529058001; Tue, 15 Nov 2022 08:17:38 -0800 (PST) Received: from zen.linaroharston ([185.81.254.11]) by smtp.gmail.com with ESMTPSA id q13-20020adfea0d000000b0023677fd2657sm12650100wrm.52.2022.11.15.08.17.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 15 Nov 2022 08:17:37 -0800 (PST) Received: from zen.lan (localhost [127.0.0.1]) by zen.linaroharston (Postfix) with ESMTP id EA5F31FFB8; Tue, 15 Nov 2022 16:17:36 +0000 (GMT) From: =?utf-8?q?Alex_Benn=C3=A9e?= To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, peter.maydell@linaro.org, =?utf-8?q?Alex_Benn=C3=A9?= =?utf-8?q?e?= , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= Subject: [PATCH v2 1/2] hw/intc: clean-up access to GIC multi-byte registers Date: Tue, 15 Nov 2022 16:17:35 +0000 Message-Id: <20221115161736.2425584-2-alex.bennee@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221115161736.2425584-1-alex.bennee@linaro.org> References: <20221115161736.2425584-1-alex.bennee@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::42a; envelope-from=alex.bennee@linaro.org; helo=mail-wr1-x42a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org gic_dist_readb was returning a word value which just happened to work as a result of the way we OR the data together. Lets fix it so only the explicit byte is returned for each part of GICD_TYPER. I've changed the return type to uint8_t although the overflow is only detected with an explicit -Wconversion. Signed-off-by: Alex Bennée Signed-off-by: Peter Maydell Reviewed-by: Philippe Mathieu-Daudé --- hw/intc/arm_gic.c | 16 ++++++++++------ 1 file changed, 10 insertions(+), 6 deletions(-) diff --git a/hw/intc/arm_gic.c b/hw/intc/arm_gic.c index 492b2421ab..1a04144c38 100644 --- a/hw/intc/arm_gic.c +++ b/hw/intc/arm_gic.c @@ -941,7 +941,7 @@ static void gic_complete_irq(GICState *s, int cpu, int irq, MemTxAttrs attrs) gic_update(s); } -static uint32_t gic_dist_readb(void *opaque, hwaddr offset, MemTxAttrs attrs) +static uint8_t gic_dist_readb(void *opaque, hwaddr offset, MemTxAttrs attrs) { GICState *s = (GICState *)opaque; uint32_t res; @@ -955,6 +955,7 @@ static uint32_t gic_dist_readb(void *opaque, hwaddr offset, MemTxAttrs attrs) cm = 1 << cpu; if (offset < 0x100) { if (offset == 0) { /* GICD_CTLR */ + /* We rely here on the only non-zero bits being in byte 0 */ if (s->security_extn && !attrs.secure) { /* The NS bank of this register is just an alias of the * EnableGrp1 bit in the S bank version. @@ -964,11 +965,14 @@ static uint32_t gic_dist_readb(void *opaque, hwaddr offset, MemTxAttrs attrs) return s->ctlr; } } - if (offset == 4) - /* Interrupt Controller Type Register */ - return ((s->num_irq / 32) - 1) - | ((s->num_cpu - 1) << 5) - | (s->security_extn << 10); + if (offset == 4) { + /* GICD_TYPER byte 0 */ + return ((s->num_irq / 32) - 1) | ((s->num_cpu - 1) << 5); + } + if (offset == 5) { + /* GICD_TYPER byte 1 */ + return (s->security_extn << 2); + } if (offset < 0x08) return 0; if (offset >= 0x80) { From patchwork Tue Nov 15 16:17:36 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Alex_Benn=C3=A9e?= X-Patchwork-Id: 624839 Delivered-To: patch@linaro.org Received: by 2002:a17:522:c983:b0:460:3032:e3c4 with SMTP id kr3csp3075779pvb; Tue, 15 Nov 2022 08:18:19 -0800 (PST) X-Google-Smtp-Source: AA0mqf58B7KYKOHBYN9Upf9Zqe4wjWDVY4q2DJ6CPM4Cr2bm0AB/6STPGN6mkEzolSv3OXvP/flJ X-Received: by 2002:ad4:43ca:0:b0:4bb:6093:22c with SMTP id o10-20020ad443ca000000b004bb6093022cmr17062410qvs.118.1668529099169; Tue, 15 Nov 2022 08:18:19 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1668529099; cv=none; d=google.com; s=arc-20160816; b=YiiaOwyBX8QEzkjl+pqOkrW3xuXI8jm6uxjPJ48v4Z6ARcgxcEaNBIg91L1U+s4Cnt x5lnMDmxpseW5vTpiPngY0NMI7wFpcHHdSlE7NpfpOZlVeN65kVBYrcNg8XQa7t1JsLn I0YMbo7824xL9dukrF417kT1H+OwFOO2Rm6kqx9lAlWE3t0uICG6cBXvH1NFcida3kg8 JIFCVic8UmxM7YqbylmUqFpyagH7ka9BjBL7y3yy1Rtz4v1FDffcuR3W2/BTaVULVhLr T9i50CNtYBGff9IEN9stsmO6Qb9X15ereRqxSsBjQ80n1t4sqTa888gC8nMmeshAGXnA K7jw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=NAqW3APFFPPxvWVL8GIJzMzxW4dvUOLuylOlFBUME2g=; b=W4a6vJSl7rjAgYOowTiRMSlCG/9tLAcYmc4txcMQkppzqiIB6YvGKjRP/MyTckBERO fR2QIx+MlQmWguSLYL/zcKljzFmwm7qQiqXDzixLE05B9AgVlFefNNe4MIi92brocPOt xoeggmuEI8TJHvfo3kKPtgIiHYF0j6X2tMLocwt7RIPuNZ6O91CkTQ8MXILeUpF5rLHr rkaiLm5resHa5XgmPqQKbcRybqAyOp1bcriQ/1b5vUBrkQsPLsR0g238MHezeKbHIpZj 8vB6ntkDQgZK4tIjvlvBkkh1EtV1Qpvt5mSa+PhPTK7s+/se2KruUmZLEAOKdoWJx1BD lHDQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=TcCH+Pd7; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id bl3-20020a05622a244300b003a54e5baebbsi7876137qtb.343.2022.11.15.08.18.19 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Tue, 15 Nov 2022 08:18:19 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=TcCH+Pd7; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1ouydE-00071c-Bc; Tue, 15 Nov 2022 11:17:57 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ouyd5-0006xP-Ay for qemu-devel@nongnu.org; Tue, 15 Nov 2022 11:17:47 -0500 Received: from mail-wm1-x32e.google.com ([2a00:1450:4864:20::32e]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1ouyd2-0007Oc-7r for qemu-devel@nongnu.org; Tue, 15 Nov 2022 11:17:41 -0500 Received: by mail-wm1-x32e.google.com with SMTP id o30so10008199wms.2 for ; Tue, 15 Nov 2022 08:17:39 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=NAqW3APFFPPxvWVL8GIJzMzxW4dvUOLuylOlFBUME2g=; b=TcCH+Pd75oykupDMLAkJtddHUIklztDt6cWO8/3OHFdQNNW5kNrHtBEmJKzsnAXQ9J y5efqVOd2up1BhldK4CtzuLciIL/TxARW3puo1+NF2q8mKY5+oRRohcQ1Lxcs5L1xWTl hBxJE1tQcOS8oLHD4/b32XfLokfP4nrYBWnYBaMuDpwzhYpzZ7+ZFXpb1nkNpTUyRmll Z8Y5yG8ehZqctBPB/vWId/ezzgtxY0d9LcwI1XC1n2w6L10E83PvqeDrfFf5PwkVMmlL 0rqjTqe7nc4harY7UJwbObSb4XOuvK47kxMLRvGzUfNPRoDcwXd4GfkLRsGOrc8mcZnk QrhQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=NAqW3APFFPPxvWVL8GIJzMzxW4dvUOLuylOlFBUME2g=; b=71KTAiZtnVxv/nN/i+nv46bJQM+twDUX+Ba36zxjNw+v9W+MIaiHdEA9FSKmXaI1fD 4uO5qIYai9vl+uq6onNNbJ8EVnytl3An4vmKxEDxZhbKW+1gXu5gE99zxqR0sI98INcD FuCsw0pOWVwLsBB3j6xQPJ55wGaB4lm/vostz0EViw5veXmMVCPEroxYeAF5N0SJlJIq aX4GxXlD4RqZxlx9pr8UFxU/X0aVawmLyz/u0q9osUDTMxoLoOZ6hPZqgOt1tZMD5h3G vnGCv0kYgke3ebLLXvLAv70UCZ+ZtFtJ1vulcyWJBHVP3VfLGdJDJYcGHakw45cxB84a 0e/A== X-Gm-Message-State: ANoB5pm+6yRrWMbjKx3Quk1m5DIWBcToy2LXjq8DEDb2mV9IdocW0nc3 5DHullmt/PFeCAoQurgVgZbDPQ== X-Received: by 2002:a1c:f709:0:b0:3cf:b287:7718 with SMTP id v9-20020a1cf709000000b003cfb2877718mr992407wmh.75.1668529058776; Tue, 15 Nov 2022 08:17:38 -0800 (PST) Received: from zen.linaroharston ([185.81.254.11]) by smtp.gmail.com with ESMTPSA id g13-20020a5d554d000000b002366e3f1497sm13055736wrw.6.2022.11.15.08.17.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 15 Nov 2022 08:17:37 -0800 (PST) Received: from zen.lan (localhost [127.0.0.1]) by zen.linaroharston (Postfix) with ESMTP id 0C8711FFBA; Tue, 15 Nov 2022 16:17:37 +0000 (GMT) From: =?utf-8?q?Alex_Benn=C3=A9e?= To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, peter.maydell@linaro.org, =?utf-8?q?Alex_Benn=C3=A9?= =?utf-8?q?e?= Subject: [PATCH v2 2/2] hw/intc: add implementation of GICD_IIDR to Arm GIC Date: Tue, 15 Nov 2022 16:17:36 +0000 Message-Id: <20221115161736.2425584-3-alex.bennee@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221115161736.2425584-1-alex.bennee@linaro.org> References: <20221115161736.2425584-1-alex.bennee@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32e; envelope-from=alex.bennee@linaro.org; helo=mail-wm1-x32e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org a66a24585f (hw/intc/arm_gic: Implement read of GICC_IIDR) implemented this for the CPU interface register. The fact we don't implement it shows up when running Xen with -d guest_error which is definitely wrong because the guest is perfectly entitled to read it. Signed-off-by: Alex Bennée Reviewed-by: Philippe Mathieu-Daudé --- v2 - checkpatch fixes. v3 - re-base on re-flow with if v4 - fix the commit message --- hw/intc/arm_gic.c | 12 +++++++++++- 1 file changed, 11 insertions(+), 1 deletion(-) diff --git a/hw/intc/arm_gic.c b/hw/intc/arm_gic.c index 1a04144c38..7a34bc0998 100644 --- a/hw/intc/arm_gic.c +++ b/hw/intc/arm_gic.c @@ -973,8 +973,18 @@ static uint8_t gic_dist_readb(void *opaque, hwaddr offset, MemTxAttrs attrs) /* GICD_TYPER byte 1 */ return (s->security_extn << 2); } - if (offset < 0x08) + if (offset == 8) { + /* GICD_IIDR byte 0 */ + return 0x3b; /* Arm JEP106 identity */ + } + if (offset == 9) { + /* GICD_IIDR byte 1 */ + return 0x04; /* Arm JEP106 identity */ + } + if (offset < 0x0c) { + /* All other bytes in this range are RAZ */ return 0; + } if (offset >= 0x80) { /* Interrupt Group Registers: these RAZ/WI if this is an NS * access to a GIC with the security extensions, or if the GIC