From patchwork Mon Mar 18 19:38:46 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Griffin X-Patchwork-Id: 160505 Delivered-To: patches@linaro.org Received: by 2002:a02:5cc1:0:0:0:0:0 with SMTP id w62csp3029460jad; Mon, 18 Mar 2019 12:40:55 -0700 (PDT) X-Received: by 2002:a05:600c:2144:: with SMTP id v4mr437784wml.4.1552938055297; Mon, 18 Mar 2019 12:40:55 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1552938055; cv=none; d=google.com; s=arc-20160816; b=PfugQfcVe8qj0P9hnmwfjzBqH7Q6hakv2PWq3qtWDximy/qOGgFn0dCcFZWi4kq+/Q czRyouway8Skjg2HbMB7xvYFmE8IpRECY+lQx3SZ7XbFpxsJ7YKijL/wAkjETEV7nNTE ux3EJVH9kQXA/nzSq3VWiMY6JF2eWm7QZ97fwyuIpak8jnr14Md3dm5nBtioLexfXV3f gsiZEkvNIisdV0MpGaNSqcBCL75CnHtLYxCLvAqEjmFzivXec0CbVfK2Viw7ZT499bsm gLRPdhvdJ7m8H8IfY7GTivCwJPUDSmz00Gv7hIfkrsnf4k/fEcuP87fkWg7E+VMsEsGt toiw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=2JfdqFXp8iuXVye70C9d3w4ZqFPTHaTQ8J8t0YbTu9k=; b=XTrqQ7m3ANj61kOUbmOGtOVh5VSbK+fV+oYLW53R4uYWwcjYyxarU3QQ/jGx378R2F L/AzGzn1CgFnNCFpSq3ag9z2rG/HPacWcW8i8UBEyUuKjBT1Gdc0IaGfMnixCD6WVneT pp7QfsGQYyW/VMmSox8NDmj559wD3n2VnA/QSnnD37CbOzaE7A+AIMX8iFaCPsnicRoz bh2ZBIzMyt0Cfq40IoMXLd224yvvRuhz2VshsjQH2mHmrvecjz7EzmBXOIA68FrZfQLr mfvrYmav3t2swsx4bcKtYBjOQYNP6e6KuAC8gxfHxBFyZTmLTuyoPRH5eKsivdYtELWU Z8Zg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=DReQPySj; spf=pass (google.com: domain of peter.griffin@linaro.org designates 209.85.220.65 as permitted sender) smtp.mailfrom=peter.griffin@linaro.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from mail-sor-f65.google.com (mail-sor-f65.google.com. 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[86.31.179.135]) by smtp.gmail.com with ESMTPSA id s10sm4583941wrv.56.2019.03.18.12.40.53 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 18 Mar 2019 12:40:54 -0700 (PDT) From: Peter Griffin To: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, airlied@linux.ie, daniel@ffwll.ch, robh+dt@kernel.org, mark.rutland@arm.com, p.zabel@pengutronix.de, xuwei5@hisilicon.com, mturquette@baylibre.com, sboyd@kernel.org Cc: john.stultz@linaro.org, dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, yuq825@gmail.com Subject: [PATCH v1 1/6] dt-bindings: gpu: mali-utgard: add hisilicon, hi6220-mali compatible Date: Mon, 18 Mar 2019 19:38:46 +0000 Message-Id: <1552937931-23050-2-git-send-email-peter.griffin@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1552937931-23050-1-git-send-email-peter.griffin@linaro.org> References: <1552937931-23050-1-git-send-email-peter.griffin@linaro.org> The Hisilicon hi6220 uses a Mali-450MP4 with 4 PPs, so add a compatible for it. Signed-off-by: Peter Griffin --- Documentation/devicetree/bindings/gpu/arm,mali-utgard.txt | 5 +++++ 1 file changed, 5 insertions(+) -- 2.7.4 diff --git a/Documentation/devicetree/bindings/gpu/arm,mali-utgard.txt b/Documentation/devicetree/bindings/gpu/arm,mali-utgard.txt index ae63f09..936a20a 100644 --- a/Documentation/devicetree/bindings/gpu/arm,mali-utgard.txt +++ b/Documentation/devicetree/bindings/gpu/arm,mali-utgard.txt @@ -23,6 +23,7 @@ Required properties: + rockchip,rk3228-mali + rockchip,rk3328-mali + stericsson,db8500-mali + + hisilicon,hi6220-mali - reg: Physical base address and length of the GPU registers @@ -97,6 +98,10 @@ to specify one more vendor-specific compatible, among: * interrupt-names and interrupts: + combined: combined interrupt of all of the above lines + - hisilicon,hi6220-mali + Required properties: + * resets: phandles to the reset lines for the GPU + Example: mali: gpu@1c40000 { From patchwork Mon Mar 18 19:38:47 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Griffin X-Patchwork-Id: 160506 Delivered-To: patches@linaro.org Received: by 2002:a02:5cc1:0:0:0:0:0 with SMTP id w62csp3029476jad; Mon, 18 Mar 2019 12:40:56 -0700 (PDT) X-Received: by 2002:adf:ee91:: with SMTP id b17mr504342wro.234.1552938056510; Mon, 18 Mar 2019 12:40:56 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1552938056; cv=none; d=google.com; s=arc-20160816; b=UKrSTT+XKqzDhj2k6xJsTjL+b8WXWhX2fLmB2LxeQ0sKi6jyb2eJPw6TSd86USParY h9C8+XIywOrdC4ferbDmJymzCT++T6LCq/zG/qxvASuKRqfQs8M3bwnlcMryuJd8g5qR Gs8ZJSmrKc01tbwGMM18opCwJpZ1c2yeXlUtUMThHR8GZObJgE+2S3/aiveZp2DaorXp qO7y64Dz1ef1aYFRtykfRWNmtplPHg77IhOb5HInp1MX5QdA7EjseiUTBXTZCkq4nIdV TQpo4vc/SCzU5/y73NoX+6q3txb+zgqivs2PaWNHtbL9UnAx0jWND+UpfWJe8ts+Ujye YO6g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=WEK+MgheKchhg0QX3P2gNwOnQXfun2RSNYUOC8zRsk4=; b=RhbrNjvc2eL4vHudvTEs+CA9xsH1Bxj5a3bnMuO7wlVNV8WHSVhoaJgRVM3szbRucf ioIzjkG6oTGlJcaXn1ESeKWvty0G23D2Q2SY6pVt4i/4nvqvkudvJRP0D8d+sHV2bn2t oRVwI4xB83Kp63sN4inO/4tyvtgAqmyc5BF7/EGZcUtmSi/M2aQLkTFkA8OvcxNYkQrO wIJQzeqnl9fynSlcaf/DYu9UMYfzlQ8zK5UbNhBlQdO2Kwb80+IYIl2zFPaJaM916XWU OGMdrMOHOHCo+EtbmlAEwcNbLixJ7S9rS3rVaXLtIVqWl5PQErfvbtWorFxFmzpAuY4x tk2Q== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="dsiYe/yZ"; spf=pass (google.com: domain of peter.griffin@linaro.org designates 209.85.220.65 as permitted sender) smtp.mailfrom=peter.griffin@linaro.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from mail-sor-f65.google.com (mail-sor-f65.google.com. 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[86.31.179.135]) by smtp.gmail.com with ESMTPSA id s10sm4583941wrv.56.2019.03.18.12.40.55 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 18 Mar 2019 12:40:55 -0700 (PDT) From: Peter Griffin To: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, airlied@linux.ie, daniel@ffwll.ch, robh+dt@kernel.org, mark.rutland@arm.com, p.zabel@pengutronix.de, xuwei5@hisilicon.com, mturquette@baylibre.com, sboyd@kernel.org Cc: john.stultz@linaro.org, dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, yuq825@gmail.com Subject: [PATCH v1 2/6] dt-bindings: reset: hisilicon: Update compatible documentation Date: Mon, 18 Mar 2019 19:38:47 +0000 Message-Id: <1552937931-23050-3-git-send-email-peter.griffin@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1552937931-23050-1-git-send-email-peter.griffin@linaro.org> References: <1552937931-23050-1-git-send-email-peter.griffin@linaro.org> The reset driver now supports the ao reset controller, so update the documentation to match. Signed-off-by: Peter Griffin --- Documentation/devicetree/bindings/reset/hisilicon,hi6220-reset.txt | 1 + 1 file changed, 1 insertion(+) -- 2.7.4 diff --git a/Documentation/devicetree/bindings/reset/hisilicon,hi6220-reset.txt b/Documentation/devicetree/bindings/reset/hisilicon,hi6220-reset.txt index c25da39..ea0a6a9 100644 --- a/Documentation/devicetree/bindings/reset/hisilicon,hi6220-reset.txt +++ b/Documentation/devicetree/bindings/reset/hisilicon,hi6220-reset.txt @@ -11,6 +11,7 @@ Required properties: - compatible: should be one of the following: - "hisilicon,hi6220-sysctrl", "syscon" : For peripheral reset controller. - "hisilicon,hi6220-mediactrl", "syscon" : For media reset controller. + - "hisilicon,hi6220-aoctrl", "syscon" : For ao reset controller. - reg: should be register base and length as documented in the datasheet - #reset-cells: 1, see below From patchwork Mon Mar 18 19:38:48 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Griffin X-Patchwork-Id: 160507 Delivered-To: patches@linaro.org Received: by 2002:a02:5cc1:0:0:0:0:0 with SMTP id w62csp3029489jad; Mon, 18 Mar 2019 12:40:57 -0700 (PDT) X-Received: by 2002:a1c:2097:: with SMTP id g145mr394230wmg.81.1552938057701; Mon, 18 Mar 2019 12:40:57 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1552938057; cv=none; d=google.com; s=arc-20160816; b=Jm80cNv+0+02pvBQQhnUwoNLAtT9xOhAyUiY5KdP28h2tpqvfD8DsLC5X85NtbidV+ HXP0cf59cRc3sQWQM9OqHSJh18oGihmw0QrFDbZYO6/GvxggRm+6jAMNMQedGyg8HyXh kezdNAMZ20XJACe7UPnm5INeNpNbA7YATO1qp3w321C6L6cma2nO8klp3ZbP7Ye+rPJw ytLopoU4/spmFYIsFKMdBnkvFIc7oL8akf2Kwc0VGaO4Mn8HG8gN9dR2PfY/Bv/jBtYX 7YUB8BDd24JVUHfPykhLL6Sds7rRrBE/rEerzxpSKIJ2DgN8B6ncQNAzSii0AdzP0vad gNJA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=iYcbdw0SobNZ1DKEtyOsg/AhnPu/CmThFhgWWs7DOwA=; b=EgBegfPAqY6Qnoe67d3bzdjluT2JvJr5sLtHqi0v825z6BLLSPnalDOWKS/QZvXCan IWOlBVGrCO/HGWM5fcerDpjFCNb/p+49HS98C5Bfs04R6DC38UI5EjghJNODcdtdOvYI Uij/gUU48NUZY4gho9Bq+Fpj+pwwzWUNax+Y7cWVE6+zjw/BBa2zXRHFUX5FMiSZhh1p B9+GjCnshX0GWSwInLX/JUQ7HZUPU3lInsEOATThfxPDhkIEjWEHJRjmSzDOg8XbwyUr 8rUExReCuu7PaggBMNUvu1oJuJfuEPoPHP7jIjVmjqZ9N8rSyw1MbnJAjSM24O0J+HUB KfZg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Zave381f; spf=pass (google.com: domain of peter.griffin@linaro.org designates 209.85.220.65 as permitted sender) smtp.mailfrom=peter.griffin@linaro.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from mail-sor-f65.google.com (mail-sor-f65.google.com. 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[86.31.179.135]) by smtp.gmail.com with ESMTPSA id s10sm4583941wrv.56.2019.03.18.12.40.56 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 18 Mar 2019 12:40:56 -0700 (PDT) From: Peter Griffin To: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, airlied@linux.ie, daniel@ffwll.ch, robh+dt@kernel.org, mark.rutland@arm.com, p.zabel@pengutronix.de, xuwei5@hisilicon.com, mturquette@baylibre.com, sboyd@kernel.org Cc: john.stultz@linaro.org, dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, yuq825@gmail.com Subject: [PATCH v1 3/6] arm64: dts: hisilicon: Add Mali-450 MP4 GPU DT entry Date: Mon, 18 Mar 2019 19:38:48 +0000 Message-Id: <1552937931-23050-4-git-send-email-peter.griffin@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1552937931-23050-1-git-send-email-peter.griffin@linaro.org> References: <1552937931-23050-1-git-send-email-peter.griffin@linaro.org> hi6220 has a Mali450 MP4 so lets add it into the DT. Signed-off-by: Peter Griffin --- arch/arm64/boot/dts/hisilicon/hi6220.dtsi | 38 +++++++++++++++++++++++++++++++ 1 file changed, 38 insertions(+) -- 2.7.4 diff --git a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi index 108e2a4..2072b63 100644 --- a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi +++ b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi @@ -260,6 +260,7 @@ compatible = "hisilicon,hi6220-aoctrl", "syscon"; reg = <0x0 0xf7800000 0x0 0x2000>; #clock-cells = <1>; + #reset-cells = <1>; }; sys_ctrl: sys_ctrl@f7030000 { @@ -1021,6 +1022,43 @@ clock-names = "apb_pclk"; cpu = <&cpu7>; }; + + mali: gpu@f4080000 { + compatible = "hisilicon,hi6220-mali", "arm,mali-450"; + reg = <0x0 0xf4080000 0x0 0x00040000>; + interrupt-parent = <&gic>; + interrupts = , + , + , + , + , + , + , + , + , + , + ; + + interrupt-names = "gp", + "gpmmu", + "pp", + "pp0", + "ppmmu0", + "pp1", + "ppmmu1", + "pp2", + "ppmmu2", + "pp3", + "ppmmu3"; + clocks = <&media_ctrl HI6220_G3D_CLK>, + <&media_ctrl HI6220_G3D_PCLK>; + clock-names = "core", "bus"; + assigned-clocks = <&media_ctrl HI6220_G3D_CLK>, + <&media_ctrl HI6220_G3D_PCLK>; + assigned-clock-rates = <500000000>, <144000000>; + reset-names = "ao_g3d", "media_g3d"; + resets = <&ao_ctrl AO_G3D>, <&media_ctrl MEDIA_G3D>; + }; }; }; From patchwork Mon Mar 18 19:38:49 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Griffin X-Patchwork-Id: 160508 Delivered-To: patches@linaro.org Received: by 2002:a02:5cc1:0:0:0:0:0 with SMTP id w62csp3029511jad; Mon, 18 Mar 2019 12:40:59 -0700 (PDT) X-Received: by 2002:adf:fb05:: with SMTP id c5mr13064437wrr.297.1552938059084; Mon, 18 Mar 2019 12:40:59 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1552938059; cv=none; d=google.com; s=arc-20160816; b=S02g1xZpb8o9d96s50hSArSdjRYXYvcUtjSKz5p/fG6DONhHT8usLkeGyQUNGvvh8A IsZ08OFpkFV1sb6C0CHgYfQGQz7mK48xEA73g0JChBxv+kQBHHCS7k4/ogs3UTudkPaD KQVPhtS+Y/gl1EYHWdxELOY9iXpTD8d1lJ3Wfs4sQF63CuVpcIhXbtqhmjBliyukdisy 16W4lhBU0NdJ99LGomlAc55ilOBB7wehBh+akh1FNTa2UywlxuWxgy57kqTH6OzpNPob F28rjy8fLcF/m5GwGqb/rRfFPw6EfPfgJjtiktfzgRw/L0v1rP1peltgVB8Iguk2LJA9 t0lA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=mCYuzjXjAhAdmGCTChMacQlApx18wWBt60iN6MyaJRQ=; b=fwQQAZ7bUheOQZjfWrIwZNtt8LlA8+86MlF3b3YVStQ/9noL3xG6KCO78r3znSwhdQ 1ayQRFwHxE7KiksFc0N2EK7lZxOEz6fG3gqVRFSIF/e3SsryqdaA3yKIEsEL27QlxDEC t57ZnCJJG3MdBrjy2ZDLaepjMTZEg7lRF3AvtfLhzKBhgT8sL65sWI6TSBZ+ssdql8uA 42tGt49IEUr2EQtablxyHkv4qG8/ZadXE6WtgVX7zg3tYp3dItL5Gut7NiQAbVTlK7L+ Z3abyin7cEnIPscHc57a/a7FzhynYvyMo3u6gbECnj2AFmToQfYKF4noQq66+Sg7XLfE 71DQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Hzvfasmh; spf=pass (google.com: domain of peter.griffin@linaro.org designates 209.85.220.65 as permitted sender) smtp.mailfrom=peter.griffin@linaro.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from mail-sor-f65.google.com (mail-sor-f65.google.com. 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[86.31.179.135]) by smtp.gmail.com with ESMTPSA id s10sm4583941wrv.56.2019.03.18.12.40.57 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 18 Mar 2019 12:40:57 -0700 (PDT) From: Peter Griffin To: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, airlied@linux.ie, daniel@ffwll.ch, robh+dt@kernel.org, mark.rutland@arm.com, p.zabel@pengutronix.de, xuwei5@hisilicon.com, mturquette@baylibre.com, sboyd@kernel.org Cc: john.stultz@linaro.org, dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, yuq825@gmail.com Subject: [PATCH v1 4/6] reset: hi6220: Add support for AO reset controller Date: Mon, 18 Mar 2019 19:38:49 +0000 Message-Id: <1552937931-23050-5-git-send-email-peter.griffin@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1552937931-23050-1-git-send-email-peter.griffin@linaro.org> References: <1552937931-23050-1-git-send-email-peter.griffin@linaro.org> This is required to bring Mali450 gpu out of reset. Signed-off-by: Peter Griffin --- drivers/reset/hisilicon/hi6220_reset.c | 51 +++++++++++++++++++++++++++++++++- 1 file changed, 50 insertions(+), 1 deletion(-) -- 2.7.4 diff --git a/drivers/reset/hisilicon/hi6220_reset.c b/drivers/reset/hisilicon/hi6220_reset.c index d5e5229..0cd5f92 100644 --- a/drivers/reset/hisilicon/hi6220_reset.c +++ b/drivers/reset/hisilicon/hi6220_reset.c @@ -36,6 +36,7 @@ enum hi6220_reset_ctrl_type { PERIPHERAL, MEDIA, + AO, }; struct hi6220_reset_data { @@ -95,6 +96,47 @@ static const struct reset_control_ops hi6220_media_reset_ops = { .deassert = hi6220_media_deassert, }; +#define AO_SCTRL_SC_PW_CLKEN0 0x800 +#define AO_SCTRL_SC_PW_CLKDIS0 0x804 + +#define AO_SCTRL_SC_PW_RSTEN0 0x810 +#define AO_SCTRL_SC_PW_RSTDIS0 0x814 + +#define AO_SCTRL_SC_PW_ISOEN0 0x820 +#define AO_SCTRL_SC_PW_ISODIS0 0x824 +#define AO_MAX_INDEX 12 + +static int hi6220_ao_assert(struct reset_controller_dev *rc_dev, + unsigned long idx) +{ + struct hi6220_reset_data *data = to_reset_data(rc_dev); + struct regmap *regmap = data->regmap; + int ret; + + ret = regmap_write(regmap, AO_SCTRL_SC_PW_RSTEN0, BIT(idx)); + ret |= regmap_write(regmap, AO_SCTRL_SC_PW_ISOEN0, BIT(idx)); + ret |= regmap_write(regmap, AO_SCTRL_SC_PW_CLKDIS0, BIT(idx)); + return ret; +} + +static int hi6220_ao_deassert(struct reset_controller_dev *rc_dev, + unsigned long idx) +{ + struct hi6220_reset_data *data = to_reset_data(rc_dev); + struct regmap *regmap = data->regmap; + int ret; + + ret = regmap_write(regmap, AO_SCTRL_SC_PW_RSTDIS0, BIT(idx)); + ret |= regmap_write(regmap, AO_SCTRL_SC_PW_ISODIS0, BIT(idx)); + ret |= regmap_write(regmap, AO_SCTRL_SC_PW_CLKEN0, BIT(idx)); + return ret; +} + +static const struct reset_control_ops hi6220_ao_reset_ops = { + .assert = hi6220_ao_assert, + .deassert = hi6220_ao_deassert, +}; + static int hi6220_reset_probe(struct platform_device *pdev) { struct device_node *np = pdev->dev.of_node; @@ -120,9 +162,12 @@ static int hi6220_reset_probe(struct platform_device *pdev) if (type == MEDIA) { data->rc_dev.ops = &hi6220_media_reset_ops; data->rc_dev.nr_resets = MEDIA_MAX_INDEX; - } else { + } else if (type == PERIPHERAL) { data->rc_dev.ops = &hi6220_peripheral_reset_ops; data->rc_dev.nr_resets = PERIPH_MAX_INDEX; + } else { + data->rc_dev.ops = &hi6220_ao_reset_ops; + data->rc_dev.nr_resets = AO_MAX_INDEX; } return reset_controller_register(&data->rc_dev); @@ -137,6 +182,10 @@ static const struct of_device_id hi6220_reset_match[] = { .compatible = "hisilicon,hi6220-mediactrl", .data = (void *)MEDIA, }, + { + .compatible = "hisilicon,hi6220-aoctrl", + .data = (void *)AO, + }, { /* sentinel */ }, }; MODULE_DEVICE_TABLE(of, hi6220_reset_match); From patchwork Mon Mar 18 19:38:50 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Griffin X-Patchwork-Id: 160509 Delivered-To: patches@linaro.org Received: by 2002:a02:5cc1:0:0:0:0:0 with SMTP id w62csp3029528jad; Mon, 18 Mar 2019 12:41:00 -0700 (PDT) X-Received: by 2002:a5d:530f:: with SMTP id e15mr2469114wrv.19.1552938060272; Mon, 18 Mar 2019 12:41:00 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1552938060; cv=none; d=google.com; s=arc-20160816; b=QixkkFhfPUSzYFK81xNcLm19QNOgX8HBM/eLH3HnYXDE0Y+5R2ggs86NyDX8mvxVm0 FZU4ytj2ly6lALf3IobJTwpTlPl8XvePhQZzJceAdVyby5s1JIW2AUAonesX5jhgS072 JFQMRWewz9WigOmLQ3ozOsomnXpRIq8jCYcsm6MtJ7LB3UYFk6wC/gehJLRuqNlosaWb FWnLv8LyqsQ2uCVuvs/eSR9DVwp0J86JRJpdYb0fkDCBcnNZndyAGIDyXJnwSenKFOTz hAIJ3h6Z1BTYcOTGLNwp9H0OJu7j7rjHnCnvtdLdN2aZ+NS6Li2CumvpcScxAxdH1W1W SucQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=2T8O0Mm4ruygwgr6c+1/UMNXLrosJEb50l9fzQq3+LI=; b=IU2EB+M4cnanLPTAHciV86ZKB0Iu8UFqaxfLQ4v1hrjGS8SoOKQx05JI18ZhZzT1vx 8bmyRAyBg4xiqT0K9USirA59/gaANQddblkl2QoO/qmHkXgw3UtOMT2fVUdmVtG4gc+r g1N+Ue+sb76oEGJgaLX6bz7e5CsLV+uLIp7mLcgTy1kuVaXANGVCqJT/kgpvTno2nD/G F9U81jrO1/gwrTUa7nlZT7FPY7tJcwoLxTtnF7Vbn6I4yinACLtk4GG1TMZZhVSlAc9O lC/+abtur5xH3bzQh6t4f2KFyNd0XoaSColpa73pDCwNUEJEu7iea5PKtgLb6x4ECq/E TM3A== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Uhf9yDYx; spf=pass (google.com: domain of peter.griffin@linaro.org designates 209.85.220.65 as permitted sender) smtp.mailfrom=peter.griffin@linaro.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from mail-sor-f65.google.com (mail-sor-f65.google.com. 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[86.31.179.135]) by smtp.gmail.com with ESMTPSA id s10sm4583941wrv.56.2019.03.18.12.40.58 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 18 Mar 2019 12:40:59 -0700 (PDT) From: Peter Griffin To: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, airlied@linux.ie, daniel@ffwll.ch, robh+dt@kernel.org, mark.rutland@arm.com, p.zabel@pengutronix.de, xuwei5@hisilicon.com, mturquette@baylibre.com, sboyd@kernel.org Cc: john.stultz@linaro.org, dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, yuq825@gmail.com Subject: [PATCH v1 5/6] dt-bindings: reset: hisilicon: Add ao reset controller Date: Mon, 18 Mar 2019 19:38:50 +0000 Message-Id: <1552937931-23050-6-git-send-email-peter.griffin@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1552937931-23050-1-git-send-email-peter.griffin@linaro.org> References: <1552937931-23050-1-git-send-email-peter.griffin@linaro.org> This is required to bring Mali450 gpu out of reset. Signed-off-by: Peter Griffin --- include/dt-bindings/reset/hisi,hi6220-resets.h | 7 +++++++ 1 file changed, 7 insertions(+) -- 2.7.4 diff --git a/include/dt-bindings/reset/hisi,hi6220-resets.h b/include/dt-bindings/reset/hisi,hi6220-resets.h index e7c362a8..63aff7d 100644 --- a/include/dt-bindings/reset/hisi,hi6220-resets.h +++ b/include/dt-bindings/reset/hisi,hi6220-resets.h @@ -73,4 +73,11 @@ #define MEDIA_MMU 6 #define MEDIA_XG2RAM1 7 +#define AO_G3D 1 +#define AO_CODECISP 2 +#define AO_MCPU 4 +#define AO_BBPHARQMEM 5 +#define AO_HIFI 8 +#define AO_ACPUSCUL2C 12 + #endif /*_DT_BINDINGS_RESET_CONTROLLER_HI6220*/ From patchwork Mon Mar 18 19:38:51 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Griffin X-Patchwork-Id: 160510 Delivered-To: patches@linaro.org Received: by 2002:a02:5cc1:0:0:0:0:0 with SMTP id w62csp3029548jad; Mon, 18 Mar 2019 12:41:01 -0700 (PDT) X-Received: by 2002:a1c:7a1a:: with SMTP id v26mr374749wmc.129.1552938061438; Mon, 18 Mar 2019 12:41:01 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1552938061; cv=none; d=google.com; s=arc-20160816; b=ehQr9urtEkHKfC390FmHfQ1U9Q2gdbcyo3lrRbU9YZtpAo2xvjM8SmUzcq4FcAfW88 yG2ZQBGn2oenAx58c6mxilRHe5+3Zj+L7Ob+mG/gvqDsTsqGuFG1GpWECm/+W1ke+t4W VZhlf7rLzTwAJcy0poIphV2GPVi+w0rxsseSmSeTPIqNU1JPOTJ4ou5cv8XUtNyubov+ 1Ji4nlX2c2T30asp9+/BQfG9U9TTRE4HP6ODMRZYMv9z1/o3TP5ShizSMaWlUoj8+uUc FuCjuTnY4+2vymvXnc0DVRiZH3dMXvaVYFmhcsxXsiqEdg8ARveVBaKUsKVYQ5M6vIE1 DinQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=f+uCN0dtjEGnlJv3pfIkjdcZRrqjbDiHnBp4IPbDmW4=; b=o1JnDWlwxe5VmGPemJEsPvWJkgve26wc+0ajYeYnK/jZJBjPM+fKduG5qlAAiU+b6k 6EuT6LwNF5599L3MXOsZB7iLg2g0KZCVcnzFL6Dl4JWTtjbPFoSMHTm28G+xstWcZMlP NqpPi006j+vbzmqxpXyfmNvSZZr0pUHRhI4qeNuLHrxWZ+5Tz/nIrYlD/1xwFqsvTteT TzPfi1vFYdSEcQBH0r+cvWgKsLExfV7UC2ospgUxKW1S3h5eMolqxhp/NSuVv1/+Cf63 Uu4x3IuwugdIU5m3GSrY/cFaLZaGpYBUfAdFSTgxVQ3YOG6mXLcexGV5G6j9AMNzlSf7 qN8A== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=rDY5Z6be; spf=pass (google.com: domain of peter.griffin@linaro.org designates 209.85.220.65 as permitted sender) smtp.mailfrom=peter.griffin@linaro.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from mail-sor-f65.google.com (mail-sor-f65.google.com. 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[86.31.179.135]) by smtp.gmail.com with ESMTPSA id s10sm4583941wrv.56.2019.03.18.12.41.00 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 18 Mar 2019 12:41:00 -0700 (PDT) From: Peter Griffin To: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, airlied@linux.ie, daniel@ffwll.ch, robh+dt@kernel.org, mark.rutland@arm.com, p.zabel@pengutronix.de, xuwei5@hisilicon.com, mturquette@baylibre.com, sboyd@kernel.org Cc: john.stultz@linaro.org, dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, yuq825@gmail.com Subject: [PATCH v1 6/6] clk: hi6220: use CLK_OF_DECLARE_DRIVER Date: Mon, 18 Mar 2019 19:38:51 +0000 Message-Id: <1552937931-23050-7-git-send-email-peter.griffin@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1552937931-23050-1-git-send-email-peter.griffin@linaro.org> References: <1552937931-23050-1-git-send-email-peter.griffin@linaro.org> As now we also need to probe in the reset driver as well. Signed-off-by: Peter Griffin --- drivers/clk/hisilicon/clk-hi6220.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- 2.7.4 diff --git a/drivers/clk/hisilicon/clk-hi6220.c b/drivers/clk/hisilicon/clk-hi6220.c index a87809d..952ffe2 100644 --- a/drivers/clk/hisilicon/clk-hi6220.c +++ b/drivers/clk/hisilicon/clk-hi6220.c @@ -89,7 +89,7 @@ static void __init hi6220_clk_ao_init(struct device_node *np) hisi_clk_register_gate_sep(hi6220_separated_gate_clks_ao, ARRAY_SIZE(hi6220_separated_gate_clks_ao), clk_data_ao); } -CLK_OF_DECLARE(hi6220_clk_ao, "hisilicon,hi6220-aoctrl", hi6220_clk_ao_init); +CLK_OF_DECLARE_DRIVER(hi6220_clk_ao, "hisilicon,hi6220-aoctrl", hi6220_clk_ao_init); /* clocks in sysctrl */