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[209.132.180.67]) by mx.google.com with ESMTP id c4si1666847pfn.83.2019.03.20.06.19.48; Wed, 20 Mar 2019 06:19:49 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=bSX2woIf; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728358AbfCTNTs (ORCPT + 7 others); Wed, 20 Mar 2019 09:19:48 -0400 Received: from mail-pf1-f178.google.com ([209.85.210.178]:41861 "EHLO mail-pf1-f178.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728351AbfCTNTr (ORCPT ); Wed, 20 Mar 2019 09:19:47 -0400 Received: by mail-pf1-f178.google.com with SMTP id d25so1913652pfn.8 for ; Wed, 20 Mar 2019 06:19:47 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :in-reply-to:references; bh=n8wsQ7ixOIiYIm36smSOqEN/oeuVV2Uzvv7QGvE7MK8=; b=bSX2woIfjmWZ6MS1ON7RyACNxWEuYrjBwDPqUi1qLKA3hblgxdLaH48iks0zZsZJEb OP6oO6NXNMEH4nf/TXWEf9rm/aGY09HYEtjkVIQSoDuDIRIxf0KamS6SzE5DVIe3gn35 XkLLALg20+EeVJ4Yq7hzJSvET5/aU3E87/jSJxFHnSw3M71nDkDk6UTWTDHsRKB22iAz 0AekHMAh8EFKvweDfVrsCO3QmUkBBEEmqLPM4OwShNP1pa+wzVV24A4mm9fOtbNVxDrp MuRV2HptsYAmCL8YC5Nt8/E1IpBj5d92gZ9XR51WMIJhySSWXsQBnd9ByXrKa3KTvEUs eh8Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:in-reply-to:references; bh=n8wsQ7ixOIiYIm36smSOqEN/oeuVV2Uzvv7QGvE7MK8=; b=WKKPY51mo/hYetae48sNW6w3uVQHGWsIJ4zmyk45nLx+XGx4LFiuJ1DiGTPQZkSXIU DeeRPRpIStmVoFW1NKEAYgzMOb2cTfUGgn+XVICtoz/e9IZGrTnuLBNgOzv/EZL/1Ab0 yP+mHf/LeYw0MwDtAy7z/qhn+AVucrmKiJVliB1QmKf6A93K6GAGbfOSUr5yZ56yg9jA q6nHTTWmwpbc1nZBo0hegu9AVIrle/PBRzxeZt8XC/IaGou+ooiy1iU+rSEK4T7NkNNS TjqSCLqpG9V8FQP9xmM5iBAECHFCgq1yiBhe3/Ge6A7phT+tE3n34HPFFzQVsEqM1cdk w/Ew== X-Gm-Message-State: APjAAAVuwUWNo8+Z4yiTB6IU63/Bt4AKjmakIA1KQs4j+bYYHy1ISJKi Hv1U2CV7TKFkODkCFVkv0i6Vbg== X-Received: by 2002:a17:902:b097:: with SMTP id p23mr8326788plr.36.1553087986870; Wed, 20 Mar 2019 06:19:46 -0700 (PDT) Received: from localhost ([114.143.122.221]) by smtp.gmail.com with ESMTPSA id i79sm5913448pfj.28.2019.03.20.06.19.45 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Wed, 20 Mar 2019 06:19:45 -0700 (PDT) From: Amit Kucheria To: linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, bjorn.andersson@linaro.org, edubezval@gmail.com, andy.gross@linaro.org, Daniel Lezcano , David Brown , Zhang Rui Cc: linux-pm@vger.kernel.org, devicetree@vger.kernel.org Subject: [PATCHv3 19/23] dt: thermal: tsens: Add bindings for qcs404 Date: Wed, 20 Mar 2019 18:47:59 +0530 Message-Id: <7e4fd2f96fecc4daaee6ff87e486891b2c0764f9.1553086065.git.amit.kucheria@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: References: In-Reply-To: References: Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org qcs404 uses v1 of the TSENS IP block. Create a fallback DT property "qcom,tsens-v1" to gather common code Signed-off-by: Amit Kucheria Reviewed-by: Rob Herring --- .../devicetree/bindings/thermal/qcom-tsens.txt | 14 ++++++++++++++ 1 file changed, 14 insertions(+) -- 2.17.1 diff --git a/Documentation/devicetree/bindings/thermal/qcom-tsens.txt b/Documentation/devicetree/bindings/thermal/qcom-tsens.txt index 1d9e8cf61018..673cc1831ee9 100644 --- a/Documentation/devicetree/bindings/thermal/qcom-tsens.txt +++ b/Documentation/devicetree/bindings/thermal/qcom-tsens.txt @@ -6,11 +6,14 @@ Required properties: - "qcom,msm8916-tsens" (MSM8916) - "qcom,msm8974-tsens" (MSM8974) - "qcom,msm8996-tsens" (MSM8996) + - "qcom,qcs404-tsens", "qcom,tsens-v1" (QCS404) - "qcom,msm8998-tsens", "qcom,tsens-v2" (MSM8998) - "qcom,sdm845-tsens", "qcom,tsens-v2" (SDM845) The generic "qcom,tsens-v2" property must be used as a fallback for any SoC with version 2 of the TSENS IP. MSM8996 is the only exception because the generic property did not exist when support was added. + Similarly, the generic "qcom,tsens-v1" property must be used as a fallback for + any SoC with version 1 of the TSENS IP. - reg: Address range of the thermal registers. New platforms containing v2.x.y of the TSENS IP must specify the SROT and TM @@ -39,3 +42,14 @@ tsens0: thermal-sensor@c263000 { #qcom,sensors = <13>; #thermal-sensor-cells = <1>; }; + +Example 3 (for any platform containing v1 of the TSENS IP): +tsens: thermal-sensor@4a9000 { + compatible = "qcom,qcs404-tsens", "qcom,tsens-v1"; + reg = <0x004a9000 0x1000>, /* TM */ + <0x004a8000 0x1000>; /* SROT */ + nvmem-cells = <&tsens_caldata>; + nvmem-cell-names = "calib"; + #qcom,sensors = <10>; + #thermal-sensor-cells = <1>; + };