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[93.5.22.158]) by smtp.googlemail.com with ESMTPSA id w10-20020a05600c474a00b003b435c41103sm11565885wmo.0.2022.11.25.07.11.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 25 Nov 2022 07:11:21 -0800 (PST) From: Alexandre Mergnat Date: Fri, 25 Nov 2022 16:10:12 +0100 Subject: [PATCH v6 01/10] dt-bindings: input: mtk-pmic-keys: add binding for MT6357 PMIC MIME-Version: 1.0 Message-Id: <20221005-mt6357-support-v6-1-4f589756befa@baylibre.com> References: <20221005-mt6357-support-v6-0-4f589756befa@baylibre.com> In-Reply-To: <20221005-mt6357-support-v6-0-4f589756befa@baylibre.com> To: Krzysztof Kozlowski , Sean Wang , Rob Herring , Matthias Brugger , Chen Zhong , Fabien Parent , Alessandro Zummo , Mark Brown , Alexandre Belloni , Flora Fu , Tianping Fang , Pavel Machek , Lee Jones , Liam Girdwood , Dmitry Torokhov Cc: Mattijs Korpershoek , Alexandre Mergnat , Rob Herring , AngeloGioacchino Del Regno , linux-rtc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Krzysztof Kozlowski , linux-mediatek@lists.infradead.org, linux-kernel@vger.kernel.org, Fabien Parent , linux-input@vger.kernel.org, devicetree@vger.kernel.org, linux-leds@vger.kernel.org X-Mailer: b4 0.10.1 X-Developer-Signature: v=1; a=openpgp-sha256; l=1006; i=amergnat@baylibre.com; h=from:subject:message-id; bh=acIU37N8P1oQiEeAFVfuuIgjK7XT7A/zFtqy1fGJDhM=; b=owEBbQKS/ZANAwAKAStGSZ1+MdRFAcsmYgBjgNsWWZDdwoLf/Rb2AU6TJp1j5Of+uaN7zUCgekqo ZCgL05SJAjMEAAEKAB0WIQQjG17X8+qqcA5g/osrRkmdfjHURQUCY4DbFgAKCRArRkmdfjHURa0oD/ 95wHQ5+U7hl58gSJwszReViGY6DKPWH/ihnDPhk6ryLI3o/2xnFnqVAVvNcZkKxIyXBRcnI2txdll8 ynvVkvnt1idkQevWBMNV30PTAgH+GUjeczGTSZZLA2e0iAPomE9YoCZI2JQgYDZLmvx77dB1m+7ayz Qr5xRPrkEUyYJfKtFHxMN28AeMia8+0o8N/sklrrj+1kPzFYub/LdhWGegOlV6D6MjVsfrCOhDFxts xgVeutSlAD4YlRmGvdGYirXOgqow21qIxkZkHidLJl3aEDx/9AAgreME6ARMXq1qsUu/9hsvS5S4sP tsRirbSAOaffwLolt4/RxvBk8j6G3yZAHIVwZQ6YEWZqS6jJh7Lhyho2/Pnm/xbx+ZLUf91zuNj3qs uUObedBl1h3FzF3fi8LFkc9zOVjVFUmkut18bgX5swXkCD8AxqX7WuaBFlW/rmzAF3Sq3Ibx3Wo5W6 ZGTMjv9e4smBWFkodhGM7Yg0pPgYF19EINb3CScsPvlWS6X01mq5aIQOS4QXtz4YeFh+2O7b2i/5O1 IyOB+/I8l9ft1cnu77UiIBHPjupGODDILzv2nzNXJcwf4thOr2wGKl/y7T0K05IB9ez8mvX4pr6crr Ozd7qR/UGNVRgAqDqxTbsArppi3rLfWempLVRSwW4f8J7uMSHPpkob6GBVkw== X-Developer-Key: i=amergnat@baylibre.com; a=openpgp; fpr=231B5ED7F3EAAA700E60FE8B2B46499D7E31D445 Precedence: bulk List-ID: X-Mailing-List: linux-leds@vger.kernel.org From: Fabien Parent Add binding documentation for the PMIC keys on MT6357. Signed-off-by: Fabien Parent Acked-by: Rob Herring Acked-by: Dmitry Torokhov Reviewed-by: AngeloGioacchino Del Regno Signed-off-by: Alexandre Mergnat --- Documentation/devicetree/bindings/input/mediatek,pmic-keys.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/input/mediatek,pmic-keys.yaml b/Documentation/devicetree/bindings/input/mediatek,pmic-keys.yaml index 2f72ec418415..037c3ae9f1c3 100644 --- a/Documentation/devicetree/bindings/input/mediatek,pmic-keys.yaml +++ b/Documentation/devicetree/bindings/input/mediatek,pmic-keys.yaml @@ -26,6 +26,7 @@ properties: enum: - mediatek,mt6323-keys - mediatek,mt6331-keys + - mediatek,mt6357-keys - mediatek,mt6358-keys - mediatek,mt6397-keys From patchwork Fri Nov 25 15:10:14 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexandre Mergnat X-Patchwork-Id: 628736 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id BC25BC47090 for ; Fri, 25 Nov 2022 15:11:29 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229753AbiKYPL2 (ORCPT ); Fri, 25 Nov 2022 10:11:28 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35740 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229661AbiKYPL0 (ORCPT ); Fri, 25 Nov 2022 10:11:26 -0500 Received: from mail-wr1-x42b.google.com (mail-wr1-x42b.google.com [IPv6:2a00:1450:4864:20::42b]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B74311F9D6 for ; Fri, 25 Nov 2022 07:11:25 -0800 (PST) Received: by mail-wr1-x42b.google.com with SMTP id g12so7162029wrs.10 for ; Fri, 25 Nov 2022 07:11:25 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20210112.gappssmtp.com; s=20210112; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=SERY71Vd1RHSOGeZoeNuejCrV5VkyCcMPbYPY5d0cXg=; b=CnUVkXQCV0WmPc2slCHcG/UmeprUoeDc+HlyXnUrx7JqxMpxCpCSA7pFyTYrn3mqf6 chG2YxoLRHhLgIiCELc++4B1UO7vEWIO0oHL6z/LV5CSTxCatVilLeg11jMkZCBQMWs3 zW1rSxQQf6k1mTmZojQfo+AVzx5qoZe9/cxOpyLTNcJJKKZ/JVHOjVrvrVtlzzAZjiWA AdCxHGywAm/G7J/6ExZqMAYEmYougS7BANF2KKGxYQf+O/ca1CLWhzgOzDRAu5nkw4BI +twOvRJipNrOLHGP757UiYCkaCsXZQC/C/MSNzWd5wmskYQprhUJm6FXSZTcpkXY1jub Lf2g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=SERY71Vd1RHSOGeZoeNuejCrV5VkyCcMPbYPY5d0cXg=; b=ys39k0Tt6cjjFgvs7LddGV1NXl6ddw4ySLeuro5uNFw2ORU3HMpKP+5o0nM6NwRUAB URmRQNtBPz/Dtgdv9SJ3GGLmji0B6oNsK5xTDETHsAv2BqxtujpneRbF6YaGGy0CMtez LsP44Bq6ERUvoZCkZ3sjSQ6TpgS3wdkr+Erm8DOsKJ1AcBR5E6wvXdzIm3lWePWKPRWd YkNfvxM3BnG0gCW+/P0BjQMffr3YTSf8Z5t5bVPjWJDZdVD8gEftOsIuHtr/vDi14cDq 47pI6zQ8eHDznTX104ZiHc/mmUI4opK5PrL6RT9q1ZjaOvIWwwgMXFk9g8KuntTXaQR1 wQFQ== X-Gm-Message-State: ANoB5pmli2mZUljHy9Flz+Gg8VlnhatXzEAHLOZEWAyrUFT/TXLgYdF8 TaVL3qGqGOUYCG9Q4RTQvogRzA== X-Google-Smtp-Source: AA0mqf4igpRB04xMtP9+f7/oC4bWlo8PKHx3XdmeOCBzo2w9zn/sPMuCZmOrNXrSKGKCwWr79oTWzw== X-Received: by 2002:a05:6000:12c3:b0:236:8130:56e7 with SMTP id l3-20020a05600012c300b00236813056e7mr23334960wrx.309.1669389084210; Fri, 25 Nov 2022 07:11:24 -0800 (PST) Received: from [127.0.1.1] (158.22.5.93.rev.sfr.net. [93.5.22.158]) by smtp.googlemail.com with ESMTPSA id w10-20020a05600c474a00b003b435c41103sm11565885wmo.0.2022.11.25.07.11.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 25 Nov 2022 07:11:23 -0800 (PST) From: Alexandre Mergnat Date: Fri, 25 Nov 2022 16:10:14 +0100 Subject: [PATCH v6 03/10] dt-bindings: rtc: mediatek: add MT6357 support MIME-Version: 1.0 Message-Id: <20221005-mt6357-support-v6-3-4f589756befa@baylibre.com> References: <20221005-mt6357-support-v6-0-4f589756befa@baylibre.com> In-Reply-To: <20221005-mt6357-support-v6-0-4f589756befa@baylibre.com> To: Krzysztof Kozlowski , Sean Wang , Rob Herring , Matthias Brugger , Chen Zhong , Fabien Parent , Alessandro Zummo , Mark Brown , Alexandre Belloni , Flora Fu , Tianping Fang , Pavel Machek , Lee Jones , Liam Girdwood , Dmitry Torokhov Cc: Mattijs Korpershoek , Alexandre Mergnat , Rob Herring , AngeloGioacchino Del Regno , linux-rtc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Krzysztof Kozlowski , linux-mediatek@lists.infradead.org, linux-kernel@vger.kernel.org, Fabien Parent , linux-input@vger.kernel.org, devicetree@vger.kernel.org, linux-leds@vger.kernel.org X-Mailer: b4 0.10.1 X-Developer-Signature: v=1; a=openpgp-sha256; l=1164; i=amergnat@baylibre.com; h=from:subject:message-id; bh=UVzrRIoQ4/WPI9WfRYNgs1FH7udWyYMvOv47aHSYxpY=; b=owEBbQKS/ZANAwAKAStGSZ1+MdRFAcsmYgBjgNsWWFNWP2r19g13DFXu9HWhIrsdMIy+ZJjgbRS0 4ii6dxSJAjMEAAEKAB0WIQQjG17X8+qqcA5g/osrRkmdfjHURQUCY4DbFgAKCRArRkmdfjHURbZuEA C1kbaOn8T/19Axqe3IfUlgoWPR1nuWLhIdexIoDHt5ai1UR3KlEIGPpLp5zkUbGqisBFdfLXUgdySq So0aFZ68mnCH8+tFAz4oqBHk/Kx/EoNpegC2r4cOtkqd3g0WemyRvhmdt22Suc+f5U1O55Hwk27fpT voC0B4CNXRlYSt8nhl/5UYmU/5Zx1wEoDNDoT8GGfg1khPYigJVg9qN54MyBAe5VhSW/+O5Lm/NHOw f0BNO7b0xqaQtiWHZxuBvbVR8pHjD8yaoUiueX7qsCRLCdiyNwOGm8NXBdP/33XuoIFGI6jWzUOka+ vw3G1++yCphEWdHa4oN9TZW1g7DKJvS0xqgceVp9+DhGR/nABNcrpXMXlVi/nbvCZrvWectGs9nmCv IG53KpWjnDuQHrQHGgafivFJ9OhnwAXLVDQSiwpyqB0dzr+kvITTfDJ5rgsajWG7YyPB4XVypVHV1H zp+a90msg74NHsfBUwX+yHan9SDPefltQZz7DCYJxHntrSK+uQaKkaqt13DkzOr+GJNxSp/bEntTII N2P+Wycdlai24xk0YFDSsTppcFqo3Mjyy/ZpB7QzHeclL+0FIuwzGvFNdzFdt23qwRQkRMgVu0RGS/ 8BubbetpaGvJv3LIsowBFn0x3WRA0DWP10IaGZvOmFWyX3zcVWGXOMdg3Zjg== X-Developer-Key: i=amergnat@baylibre.com; a=openpgp; fpr=231B5ED7F3EAAA700E60FE8B2B46499D7E31D445 Precedence: bulk List-ID: X-Mailing-List: linux-leds@vger.kernel.org Add binding documentation of mediatek,mt6397-rtc for mt6357 SoC. Acked-by: Rob Herring Signed-off-by: Alexandre Mergnat --- Documentation/devicetree/bindings/rtc/mediatek,mt6397-rtc.yaml | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/rtc/mediatek,mt6397-rtc.yaml b/Documentation/devicetree/bindings/rtc/mediatek,mt6397-rtc.yaml index 97b09c81e548..d582625430e3 100644 --- a/Documentation/devicetree/bindings/rtc/mediatek,mt6397-rtc.yaml +++ b/Documentation/devicetree/bindings/rtc/mediatek,mt6397-rtc.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/rtc/mediatek,mt6397-rtc.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: MediaTek MT6397/MT6366/MT6358/MT6323 RTC +title: MediaTek MT6397/MT6366/MT6358/MT6357/MT6323 RTC maintainers: - Tianping Fang @@ -23,6 +23,7 @@ properties: compatible: enum: - mediatek,mt6323-rtc + - mediatek,mt6357-rtc - mediatek,mt6358-rtc - mediatek,mt6366-rtc - mediatek,mt6397-rtc From patchwork Fri Nov 25 15:10:16 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexandre Mergnat X-Patchwork-Id: 628734 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 80C36C4708A for ; Fri, 25 Nov 2022 15:12:05 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229827AbiKYPME (ORCPT ); Fri, 25 Nov 2022 10:12:04 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36370 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230043AbiKYPLp (ORCPT ); Fri, 25 Nov 2022 10:11:45 -0500 Received: from mail-wr1-x429.google.com (mail-wr1-x429.google.com [IPv6:2a00:1450:4864:20::429]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3194C388 for ; Fri, 25 Nov 2022 07:11:27 -0800 (PST) Received: by mail-wr1-x429.google.com with SMTP id cl5so7172908wrb.9 for ; Fri, 25 Nov 2022 07:11:27 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20210112.gappssmtp.com; s=20210112; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=fFLpoKOjjafPrfMvZwJR0cikHQtMiBmS0YHJBgB8k3A=; b=Oa3XK1Awha+MfM4z1MyjpmDvL6US7UxH/bpAz9TrdTL4aHAHrIjgJA7Cfixm+/n0sg qsJrA6eXIdayf+W6K2aaGTOnYP4dE076b96CJZuYj57EMVgd53QdVN1tUMn8Owc4W5q9 jVr7LArK/KGmFN4O79LQz8sUzge1z0WhaH7a8JpH6YLvw0021fgS2O0jagFD4SU5EE8t 6OY4WHcNVuXMnF1p7IBCwEiaLbAM7m/M45/A3rvXj2ImyeXGmDD0wF5vvPjKWUVI2MZ6 0eHkUyV2r2aHNQwikxynxi8uBoipMc9IqRf02GNLNkKzwwZQDW1JTo6BxeJDJUtGiEvn jcSw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=fFLpoKOjjafPrfMvZwJR0cikHQtMiBmS0YHJBgB8k3A=; b=UUoKsQIf0TOmno2CRRMO+hgh69hKcdWSKW/qbHuVqw8sfqYB5YkzbswuMDM1Rxwo+k LVIRXDigAhHYUc0jFFEzV19OwOcCHJZoijQKEiTLh6D22fhZ13urRCNF+t7qpCO0ENUD eKBw3wAu3ZgJgED9QPOkgEw5sbIUx86DayywLjr5zsigeRKdURvXIK/SNWV2TSOjxa6F E/2KtRhhUM2NPaY2QqaO1YcGW91lnQBzrqS/Nnw6v7FyEQL0bSyVmdHKu2ZXmtyD06CP 5/O1tvqpj/yK308CkyZimkkxtKcG4bUHtwuAqg0MCbZOjIeXM4BXjzroOYJd52SYraBN iNoQ== X-Gm-Message-State: ANoB5pmWdsOUY74fSJk6vBPojoWjYwJePVF28oZU2Lb1IXOSC4I/BsFx dPrESAiAYmru8BNyppnm8WtIww== X-Google-Smtp-Source: AA0mqf7x166PwYc0AK1minps2ypKHTl4Drd2limM2an+XZCN8kqT5R585FRzD5cV/FU3ubAiz+wk8Q== X-Received: by 2002:a05:6000:128c:b0:236:e512:1a9e with SMTP id f12-20020a056000128c00b00236e5121a9emr14907787wrx.416.1669389086581; Fri, 25 Nov 2022 07:11:26 -0800 (PST) Received: from [127.0.1.1] (158.22.5.93.rev.sfr.net. [93.5.22.158]) by smtp.googlemail.com with ESMTPSA id w10-20020a05600c474a00b003b435c41103sm11565885wmo.0.2022.11.25.07.11.25 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 25 Nov 2022 07:11:26 -0800 (PST) From: Alexandre Mergnat Date: Fri, 25 Nov 2022 16:10:16 +0100 Subject: [PATCH v6 05/10] dt-bindings: soc: mediatek: convert pwrap documentation MIME-Version: 1.0 Message-Id: <20221005-mt6357-support-v6-5-4f589756befa@baylibre.com> References: <20221005-mt6357-support-v6-0-4f589756befa@baylibre.com> In-Reply-To: <20221005-mt6357-support-v6-0-4f589756befa@baylibre.com> To: Krzysztof Kozlowski , Sean Wang , Rob Herring , Matthias Brugger , Chen Zhong , Fabien Parent , Alessandro Zummo , Mark Brown , Alexandre Belloni , Flora Fu , Tianping Fang , Pavel Machek , Lee Jones , Liam Girdwood , Dmitry Torokhov Cc: Mattijs Korpershoek , Alexandre Mergnat , Rob Herring , AngeloGioacchino Del Regno , linux-rtc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Krzysztof Kozlowski , linux-mediatek@lists.infradead.org, linux-kernel@vger.kernel.org, Fabien Parent , linux-input@vger.kernel.org, devicetree@vger.kernel.org, linux-leds@vger.kernel.org X-Mailer: b4 0.10.1 X-Developer-Signature: v=1; a=openpgp-sha256; l=9574; i=amergnat@baylibre.com; h=from:subject:message-id; bh=lGcU/tLnBFuf2FChwx+BufI9cy58Bma4z2fSLbd1Gq8=; b=owEBbQKS/ZANAwAKAStGSZ1+MdRFAcsmYgBjgNsXrE+qken7Fg4GdIMw699mOYmNxNcxMzRrKYcW DqDHHiGJAjMEAAEKAB0WIQQjG17X8+qqcA5g/osrRkmdfjHURQUCY4DbFwAKCRArRkmdfjHURdcfD/ 4yUBxuy8lZAuqNkA98FGpztVt3vWRQg+DjKN+vKmyIg+em2/axvFo80WIiVPVkzWCXPRP3HLhGcUvt vyDGcS69fXg8EWL0G1pZHl2fmweNpTq0L1nFRpV1jpfeDNPmH9TBGO2MVkJ33q1Mi8Jc/7AGb3pCJ1 SZn7D7nkmcKjcac0cLWe4YBpnD7wtCb6OXGb+8VOPZtD4J7B/jJwzmVJluC6cBA6JTrtlQ9ImNC0m+ rhpCLu0m7w2uKvO1GSQO/lK2LoVEgYiEXvnx5gQtrqZ6cpFanYRx4RW7ZCNG4mnj4NExLHhJlL97Jr WBCx5niS8fGHK3SAWrYnbYrx4zM3NVvWkCsy26CNo8Em0InrrS1c4XZqvnP9fU3Qrf/rf/QUMtVIk4 8+vjaee5dLm2nCrEsYhDq3bLybbhaKfWgQgqdlHhlAHpeUrycQaQ2PY+to2wW870uE/bIjBPyWtygp XAGZIgl1UMhQCYQY3qANQYw/1rWZQZ/tX57qSIkhZz71SD4y2dS1ABdQFo33l2JAWRWy4hi3ZLn1+B QzCZ9XbYdETYL8ZMl8U5Mvaz/m0KlyJ0Z+erc7+CKyJZFdBWW7jza/EWDVmjG6awoT6bF9uLy5dbyk LKLTCDU8a0iLr1YIRW6ooy0xG5JvMAbxt/pNkWaUGkgqxH6wRTicTb7jg6aA== X-Developer-Key: i=amergnat@baylibre.com; a=openpgp; fpr=231B5ED7F3EAAA700E60FE8B2B46499D7E31D445 Precedence: bulk List-ID: X-Mailing-List: linux-leds@vger.kernel.org - Convert soc/mediatek/pwrap.txt to soc/mediatek/mediatek,pwrap.yaml - Add syscon compatible const for mt8186 and mt8195 to match the DTS needs. Signed-off-by: Alexandre Mergnat --- .../devicetree/bindings/leds/leds-mt6323.txt | 2 +- Documentation/devicetree/bindings/mfd/mt6397.txt | 2 +- .../bindings/soc/mediatek/mediatek,pwrap.yaml | 147 +++++++++++++++++++++ .../devicetree/bindings/soc/mediatek/pwrap.txt | 75 ----------- 4 files changed, 149 insertions(+), 77 deletions(-) diff --git a/Documentation/devicetree/bindings/leds/leds-mt6323.txt b/Documentation/devicetree/bindings/leds/leds-mt6323.txt index 45bf9f7d85f3..73353692efa1 100644 --- a/Documentation/devicetree/bindings/leds/leds-mt6323.txt +++ b/Documentation/devicetree/bindings/leds/leds-mt6323.txt @@ -9,7 +9,7 @@ MT6323 PMIC hardware. For MT6323 MFD bindings see: Documentation/devicetree/bindings/mfd/mt6397.txt For MediaTek PMIC wrapper bindings see: -Documentation/devicetree/bindings/soc/mediatek/pwrap.txt +Documentation/devicetree/bindings/soc/mediatek/mediatek,pwrap.yaml Required properties: - compatible : Must be "mediatek,mt6323-led" diff --git a/Documentation/devicetree/bindings/mfd/mt6397.txt b/Documentation/devicetree/bindings/mfd/mt6397.txt index 79aaf21af8e9..3bee4a42555d 100644 --- a/Documentation/devicetree/bindings/mfd/mt6397.txt +++ b/Documentation/devicetree/bindings/mfd/mt6397.txt @@ -13,7 +13,7 @@ MT6397/MT6323 is a multifunction device with the following sub modules: It is interfaced to host controller using SPI interface by a proprietary hardware called PMIC wrapper or pwrap. MT6397/MT6323 MFD is a child device of pwrap. See the following for pwarp node definitions: -../soc/mediatek/pwrap.txt +../soc/mediatek/mediatek,pwrap.yaml This document describes the binding for MFD device and its sub module. diff --git a/Documentation/devicetree/bindings/soc/mediatek/mediatek,pwrap.yaml b/Documentation/devicetree/bindings/soc/mediatek/mediatek,pwrap.yaml new file mode 100644 index 000000000000..3969871eaced --- /dev/null +++ b/Documentation/devicetree/bindings/soc/mediatek/mediatek,pwrap.yaml @@ -0,0 +1,147 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/soc/mediatek/mediatek,pwrap.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Mediatek PMIC Wrapper + +maintainers: + - Flora Fu + - Alexandre Mergnat + +description: + On MediaTek SoCs the PMIC is connected via SPI. The SPI master interface + is not directly visible to the CPU, but only through the PMIC wrapper + inside the SoC. The communication between the SoC and the PMIC can + optionally be encrypted. Also a non standard Dual IO SPI mode can be + used to increase speed. + + IP Pairing + + On MT8135 the pins of some SoC internal peripherals can be on the PMIC. + The signals of these pins are routed over the SPI bus using the pwrap + bridge. In the binding description below the properties needed for bridging + are marked with "IP Pairing". These are optional on SoCs which do not support + IP Pairing + +properties: + compatible: + oneOf: + - items: + - enum: + - mediatek,mt2701-pwrap + - mediatek,mt6765-pwrap + - mediatek,mt6779-pwrap + - mediatek,mt6797-pwrap + - mediatek,mt6873-pwrap + - mediatek,mt7622-pwrap + - mediatek,mt8135-pwrap + - mediatek,mt8173-pwrap + - mediatek,mt8183-pwrap + - mediatek,mt8186-pwrap + - mediatek,mt8188-pwrap + - mediatek,mt8195-pwrap + - mediatek,mt8365-pwrap + - mediatek,mt8516-pwrap + - items: + - enum: + - mediatek,mt8186-pwrap + - mediatek,mt8195-pwrap + - const: syscon + + reg: + minItems: 1 + items: + - description: PMIC wrapper registers + - description: IP pairing registers + + reg-names: + minItems: 1 + items: + - const: pwrap + - const: pwrap-bridge + + interrupts: + maxItems: 1 + + clocks: + minItems: 2 + items: + - description: SPI bus clock + - description: Main module clock + - description: System module clock + - description: Timer module clock + + clock-names: + minItems: 2 + items: + - const: spi + - const: wrap + - const: sys + - const: tmr + + resets: + minItems: 1 + items: + - description: PMIC wrapper reset + - description: IP pairing reset + + reset-names: + minItems: 1 + items: + - const: pwrap + - const: pwrap-bridge + + pmic: + type: object + +required: + - compatible + - reg + - reg-names + - interrupts + - clocks + - clock-names + +dependentRequired: + resets: [reset-names] + +allOf: + - if: + properties: + compatible: + contains: + const: mediatek,mt8365-pwrap + then: + properties: + clocks: + minItems: 4 + + clock-names: + minItems: 4 + +additionalProperties: false + +examples: + - | + #include + #include + #include + + soc { + #address-cells = <2>; + #size-cells = <2>; + pwrap@1000d000 { + compatible = "mediatek,mt8135-pwrap"; + reg = <0 0x1000f000 0 0x1000>, + <0 0x11017000 0 0x1000>; + reg-names = "pwrap", "pwrap-bridge"; + interrupts = ; + clocks = <&clk26m>, <&clk26m>; + clock-names = "spi", "wrap"; + resets = <&infracfg MT8135_INFRA_PMIC_WRAP_RST>, + <&pericfg MT8135_PERI_PWRAP_BRIDGE_SW_RST>; + reset-names = "pwrap", "pwrap-bridge"; + }; + }; diff --git a/Documentation/devicetree/bindings/soc/mediatek/pwrap.txt b/Documentation/devicetree/bindings/soc/mediatek/pwrap.txt deleted file mode 100644 index 8424b93c432e..000000000000 --- a/Documentation/devicetree/bindings/soc/mediatek/pwrap.txt +++ /dev/null @@ -1,75 +0,0 @@ -MediaTek PMIC Wrapper Driver - -This document describes the binding for the MediaTek PMIC wrapper. - -On MediaTek SoCs the PMIC is connected via SPI. The SPI master interface -is not directly visible to the CPU, but only through the PMIC wrapper -inside the SoC. The communication between the SoC and the PMIC can -optionally be encrypted. Also a non standard Dual IO SPI mode can be -used to increase speed. - -IP Pairing - -on MT8135 the pins of some SoC internal peripherals can be on the PMIC. -The signals of these pins are routed over the SPI bus using the pwrap -bridge. In the binding description below the properties needed for bridging -are marked with "IP Pairing". These are optional on SoCs which do not support -IP Pairing - -Required properties in pwrap device node. -- compatible: - "mediatek,mt2701-pwrap" for MT2701/7623 SoCs - "mediatek,mt6765-pwrap" for MT6765 SoCs - "mediatek,mt6779-pwrap" for MT6779 SoCs - "mediatek,mt6797-pwrap" for MT6797 SoCs - "mediatek,mt6873-pwrap" for MT6873/8192 SoCs - "mediatek,mt7622-pwrap" for MT7622 SoCs - "mediatek,mt8135-pwrap" for MT8135 SoCs - "mediatek,mt8173-pwrap" for MT8173 SoCs - "mediatek,mt8183-pwrap" for MT8183 SoCs - "mediatek,mt8186-pwrap" for MT8186 SoCs - "mediatek,mt8188-pwrap", "mediatek,mt8195-pwrap" for MT8188 SoCs - "mediatek,mt8195-pwrap" for MT8195 SoCs - "mediatek,mt8365-pwrap" for MT8365 SoCs - "mediatek,mt8516-pwrap" for MT8516 SoCs -- interrupts: IRQ for pwrap in SOC -- reg-names: "pwrap" is required; "pwrap-bridge" is optional. - "pwrap": Main registers base - "pwrap-bridge": bridge base (IP Pairing) -- reg: Must contain an entry for each entry in reg-names. -- clock-names: Must include the following entries: - "spi": SPI bus clock - "wrap": Main module clock - "sys": System module clock (for MT8365 SoC) - "tmr": Timer module clock (for MT8365 SoC) -- clocks: Must contain an entry for each entry in clock-names. - -Optional properities: -- reset-names: Some SoCs include the following entries: - "pwrap" - "pwrap-bridge" (IP Pairing) -- resets: Must contain an entry for each entry in reset-names. -- pmic: Using either MediaTek PMIC MFD as the child device of pwrap - See the following for child node definitions: - Documentation/devicetree/bindings/mfd/mt6397.txt - or the regulator-only device as the child device of pwrap, such as MT6380. - See the following definitions for such kinds of devices. - Documentation/devicetree/bindings/regulator/mt6380-regulator.txt - -Example: - pwrap: pwrap@1000f000 { - compatible = "mediatek,mt8135-pwrap"; - reg = <0 0x1000f000 0 0x1000>, - <0 0x11017000 0 0x1000>; - reg-names = "pwrap", "pwrap-bridge"; - interrupts = ; - resets = <&infracfg MT8135_INFRA_PMIC_WRAP_RST>, - <&pericfg MT8135_PERI_PWRAP_BRIDGE_SW_RST>; - reset-names = "pwrap", "pwrap-bridge"; - clocks = <&clk26m>, <&clk26m>; - clock-names = "spi", "wrap"; - - pmic { - compatible = "mediatek,mt6397"; - }; - }; From patchwork Fri Nov 25 15:10:19 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexandre Mergnat X-Patchwork-Id: 628733 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 32EBFC63705 for ; Fri, 25 Nov 2022 15:12:07 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230437AbiKYPMG (ORCPT ); Fri, 25 Nov 2022 10:12:06 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36382 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230287AbiKYPLw (ORCPT ); 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Signed-off-by: Alexandre Mergnat --- arch/arm64/boot/dts/mediatek/mt8173-elm.dtsi | 2 +- arch/arm64/boot/dts/mediatek/mt8173-evb.dts | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/mediatek/mt8173-elm.dtsi b/arch/arm64/boot/dts/mediatek/mt8173-elm.dtsi index e21feb85d822..a8f5c48e1782 100644 --- a/arch/arm64/boot/dts/mediatek/mt8173-elm.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8173-elm.dtsi @@ -913,7 +913,7 @@ &pwm0 { }; &pwrap { - pmic: mt6397 { + pmic: pmic { compatible = "mediatek,mt6397"; #address-cells = <1>; #size-cells = <1>; diff --git a/arch/arm64/boot/dts/mediatek/mt8173-evb.dts b/arch/arm64/boot/dts/mediatek/mt8173-evb.dts index 0b5f154007be..755df5694234 100644 --- a/arch/arm64/boot/dts/mediatek/mt8173-evb.dts +++ b/arch/arm64/boot/dts/mediatek/mt8173-evb.dts @@ -300,7 +300,7 @@ &pwrap { /* Only MT8173 E1 needs USB power domain */ power-domains = <&spm MT8173_POWER_DOMAIN_USB>; - pmic: mt6397 { + pmic: pmic { compatible = "mediatek,mt6397"; interrupt-parent = <&pio>; interrupts = <11 IRQ_TYPE_LEVEL_HIGH>; From patchwork Fri Nov 25 15:10:21 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexandre Mergnat X-Patchwork-Id: 628735 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0BD69C4167B for ; Fri, 25 Nov 2022 15:12:04 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230293AbiKYPMC (ORCPT ); Fri, 25 Nov 2022 10:12:02 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36354 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230304AbiKYPLx (ORCPT ); Fri, 25 Nov 2022 10:11:53 -0500 Received: from mail-wr1-x435.google.com (mail-wr1-x435.google.com [IPv6:2a00:1450:4864:20::435]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 07595442C6 for ; Fri, 25 Nov 2022 07:11:32 -0800 (PST) Received: by mail-wr1-x435.google.com with SMTP id i12so7257720wrb.0 for ; Fri, 25 Nov 2022 07:11:32 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20210112.gappssmtp.com; s=20210112; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=GI9uwBLCvWR3OgOlMBN6oypd3UQ7AbJ0Dp0NjT4lxFo=; b=y5RUebrSosy2L8xvLXYFCns40q1ccZYXsrxL96Zdy/w1f8IUjGbcslxtTTAUCw5Zf2 r0oEVT+9EOdOxceHOhesQ5oaAKvUqCaLSKQuoGcwH6Jw+EGfV+nGPnSH6xTlC1mWf8gy yDW4WfBJYb96R3/GYtwHKHOXKheyFVLafNQ0NdY+VwVcc1WmHK7770+jN+oTahL5MQ6b tDgh/a/fsFFR+IZpEksOItlBaWIrlzeNyO3t96xVUd+s/r2ytDD7d8KwyM3uehp2Lydj QfVHXhD0SaFet0Uu4Wl5SDa9ZZNd+Y/nT4bx1peIYjIRRYEWUX1RHJ1/K/vhIjO3tyMe yJbw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=GI9uwBLCvWR3OgOlMBN6oypd3UQ7AbJ0Dp0NjT4lxFo=; b=oFY1crcknvoXZfwLBG+rGDQx9NyWmTXy1ieau71axQ5j7ltrVQNleoXNC/Z6+II8l1 VFU7Mt4UmDGpDUuEcwZFzuiQg3mKW/vUfbgnrs261X4I1UJ3622Ycz23FrsOPR7fzBxE lngL2cruNrsa67Uq8tDV8IKZk87mXRmTiTt1KYgbzabi/uOcC1uOSXkiOU99E7xwkiPI rzb2t2VvqyO4jCuwpgrRnXmwhyNd17sxizHxH0w5M40lI3W1HiRlTN4RKSvnbIty/GK2 bBebkNYiwgaMcF66TOB4T+ekOtDPnT151as8vt2L5U6mm/GMlA0D9vg7Anu419gdRAfh wZIg== X-Gm-Message-State: ANoB5plFgFICQVipbBOMF/roJ0Ntex1iyHzwbTqUP0EL6eeLOFFbgNGN JXrJjuWZkFJxKPOWTVFshu93Uw== X-Google-Smtp-Source: AA0mqf5Sm1CglF3S+zaxYxLdfuEQZuiRkUPKCtH/xR0EmtMQinXAAzyozKSvPKTZfhFOX8ftLYr1qg== X-Received: by 2002:a5d:5f04:0:b0:241:e9a6:fb3 with SMTP id cl4-20020a5d5f04000000b00241e9a60fb3mr9087357wrb.462.1669389092434; Fri, 25 Nov 2022 07:11:32 -0800 (PST) Received: from [127.0.1.1] (158.22.5.93.rev.sfr.net. [93.5.22.158]) by smtp.googlemail.com with ESMTPSA id w10-20020a05600c474a00b003b435c41103sm11565885wmo.0.2022.11.25.07.11.31 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 25 Nov 2022 07:11:32 -0800 (PST) From: Alexandre Mergnat Date: Fri, 25 Nov 2022 16:10:21 +0100 Subject: [PATCH v6 10/10] Input: mtk-pmic-keys: add MT6357 support MIME-Version: 1.0 Message-Id: <20221005-mt6357-support-v6-10-4f589756befa@baylibre.com> References: <20221005-mt6357-support-v6-0-4f589756befa@baylibre.com> In-Reply-To: <20221005-mt6357-support-v6-0-4f589756befa@baylibre.com> To: Krzysztof Kozlowski , Sean Wang , Rob Herring , Matthias Brugger , Chen Zhong , Fabien Parent , Alessandro Zummo , Mark Brown , Alexandre Belloni , Flora Fu , Tianping Fang , Pavel Machek , Lee Jones , Liam Girdwood , Dmitry Torokhov Cc: Mattijs Korpershoek , Alexandre Mergnat , Rob Herring , AngeloGioacchino Del Regno , linux-rtc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Krzysztof Kozlowski , linux-mediatek@lists.infradead.org, linux-kernel@vger.kernel.org, Fabien Parent , linux-input@vger.kernel.org, devicetree@vger.kernel.org, linux-leds@vger.kernel.org X-Mailer: b4 0.10.1 X-Developer-Signature: v=1; a=openpgp-sha256; l=2028; i=amergnat@baylibre.com; h=from:subject:message-id; bh=K2/LktiwnSqpYUY/NYDB7cyyBwW4Kzl5Gx1VcVhpHIg=; b=owEBbQKS/ZANAwAKAStGSZ1+MdRFAcsmYgBjgNsXQIa1QEIipiruDB9u/aUJuuWuwrFMsam4SPLK 94W6b/+JAjMEAAEKAB0WIQQjG17X8+qqcA5g/osrRkmdfjHURQUCY4DbFwAKCRArRkmdfjHURavoEA CgtRyRJ2qwmMDOSz6ZGwn/ZANcUmntlsG2vnP8PVpIhZSEpmpPaOC9xB/4cyr6clGsvKNMESMH+Fqc rJFK0L9bcHTfUlN0fAGTvsyXEReg4k8e93E8QkPUAyLlgxoAM6Qkkxw9GrQyOShb5yXjyq39X1AFKj pGHZCnhO7JtRZkzj9ZUpgs+P2tSXss5FUFGbGco/PHUTrLhoIAU5C43uCE/pn3y9m1jGLPjtJuyV9v 6oCV70JLBrYCph2BNCrQdzD3vr1CzWBRTY0Z8ttPDnvTRWiZRb9/vWs+vb6raYU22UYt08uN8hidp9 oWT/CUu9l3hbh3i0E0a6aMXDNS5kIQBnLYZmfl478RtbxlzmhDA/94aFTLVRC1vEtICMvkfCc3P1z/ wIczGve0zj0fMM2Qh2YFcJmLk+T5N+cBGkAskB57Cct+9R8qKKyIhTeRT2Ljh/yIZsJB3O4Pem8nh8 gnFZ9WAyhkTJXlxv73g71vUG6uPiSKTmMw4P6ONR/Jq6szyRXT+3xUeoqpHX0dwrtBxn9CTl1M4gdM GbjY6xdJlez1nPoAXb8Y2LPaBIFeYsbbVjPpWhwOA/BXsy04UxEibIbNEfnSzwTb05A8O812vSsJaU u/j++N0Vyr0mINa1MQDkFOP4gs/9WWeaKwK7Tf96ZFi53RIYBcVW5VvsulZg== X-Developer-Key: i=amergnat@baylibre.com; a=openpgp; fpr=231B5ED7F3EAAA700E60FE8B2B46499D7E31D445 Precedence: bulk List-ID: X-Mailing-List: linux-leds@vger.kernel.org From: Fabien Parent Add PMIC Keys support on MT6357 SoC. Signed-off-by: Fabien Parent Reviewed-by: AngeloGioacchino Del Regno Reviewed-by: Mattijs Korpershoek Acked-by: Dmitry Torokhov Signed-off-by: Alexandre Mergnat --- drivers/input/keyboard/mtk-pmic-keys.c | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/drivers/input/keyboard/mtk-pmic-keys.c b/drivers/input/keyboard/mtk-pmic-keys.c index 9b34da0ec260..2a63e0718eb6 100644 --- a/drivers/input/keyboard/mtk-pmic-keys.c +++ b/drivers/input/keyboard/mtk-pmic-keys.c @@ -10,6 +10,7 @@ #include #include #include +#include #include #include #include @@ -90,6 +91,19 @@ static const struct mtk_pmic_regs mt6331_regs = { .rst_lprst_mask = MTK_PMIC_MT6331_RST_DU_MASK, }; +static const struct mtk_pmic_regs mt6357_regs = { + .keys_regs[MTK_PMIC_PWRKEY_INDEX] = + MTK_PMIC_KEYS_REGS(MT6357_TOPSTATUS, + 0x2, MT6357_PSC_TOP_INT_CON0, 0x5, + MTK_PMIC_PWRKEY_RST), + .keys_regs[MTK_PMIC_HOMEKEY_INDEX] = + MTK_PMIC_KEYS_REGS(MT6357_TOPSTATUS, + 0x8, MT6357_PSC_TOP_INT_CON0, 0xa, + MTK_PMIC_HOMEKEY_INDEX), + .pmic_rst_reg = MT6357_TOP_RST_MISC, + .rst_lprst_mask = MTK_PMIC_RST_DU_MASK, +}; + static const struct mtk_pmic_regs mt6358_regs = { .keys_regs[MTK_PMIC_PWRKEY_INDEX] = MTK_PMIC_KEYS_REGS(MT6358_TOPSTATUS, @@ -276,6 +290,9 @@ static const struct of_device_id of_mtk_pmic_keys_match_tbl[] = { }, { .compatible = "mediatek,mt6331-keys", .data = &mt6331_regs, + }, { + .compatible = "mediatek,mt6357-keys", + .data = &mt6357_regs, }, { .compatible = "mediatek,mt6358-keys", .data = &mt6358_regs,