From patchwork Sun Nov 27 07:31:35 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Icenowy Zheng X-Patchwork-Id: 629156 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A65CEC46467 for ; Sun, 27 Nov 2022 07:32:21 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229575AbiK0HcU (ORCPT ); Sun, 27 Nov 2022 02:32:20 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37308 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229574AbiK0HcT (ORCPT ); Sun, 27 Nov 2022 02:32:19 -0500 Received: from sender4-op-o18.zoho.com (sender4-op-o18.zoho.com [136.143.188.18]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id BEC8113D6F; Sat, 26 Nov 2022 23:32:17 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1669534324; cv=none; d=zohomail.com; s=zohoarc; b=Qotv6GeqOj0Ab/YYD1KPPJkeY5CFlrbtIL1sg6Jw/J8H9NNcayAATwXciWAPlSVczPUe9fm5Q08utNBzqBWUO16tasQ4nV/jhAjYhih6jgqDWUeYdALgKVME9ps7cwp0Y0XP/HI4eDEWHZccxu4OVZ9zCqWaab4CtJ5uu1BCAaw= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1669534324; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:MIME-Version:Message-ID:References:Subject:To; bh=ZIRgyJGgqD7T8i4Lu5EQRdpocsyZYGD68z5C8293zsY=; b=V5Nyn9QD+cCXn97nh568e2CFl8ORNTLKDLHFfjY1OGFLPY+iTJ2XTTCLjO7S3tuceX+3EO+G+9WP0As/1jalhmIVgAbt1Kbq3oenQ+N1NlzMZG93zcYaG6XWNBs5SfDFSfN+WO5VR78zKAIZ8CuJuSueQMTECW7R+Wc4Kw0alFg= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass header.i=icenowy.me; spf=pass smtp.mailfrom=uwu@icenowy.me; dmarc=pass header.from= DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; t=1669534324; s=zmail; d=icenowy.me; i=uwu@icenowy.me; h=From:From:To:To:Cc:Cc:Subject:Subject:Date:Date:Message-Id:Message-Id:In-Reply-To:References:MIME-Version:Content-Transfer-Encoding:Reply-To; bh=ZIRgyJGgqD7T8i4Lu5EQRdpocsyZYGD68z5C8293zsY=; b=dKcCOQtS0Y4nUtfWwXO+KIBMFPpoFZ6AUov5VO/vd8za7ieJD+9wq/igenSY/sS/ CenKFyWSQBAAbxgtZc2YYYVLC4WjTP3wIff5eTKwNHUZWcmfkjvfpwVhQaObzFvQN4y CFw/M77wuwmKXXKI+sD0br8UN6uDh0Emk3lOdjnk= Received: from edelgard.fodlan.icenowy.me (112.94.100.108 [112.94.100.108]) by mx.zohomail.com with SMTPS id 1669534322585494.052994322819; Sat, 26 Nov 2022 23:32:02 -0800 (PST) From: Icenowy Zheng To: Rob Herring , Krzysztof Kozlowski , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Greg Kroah-Hartman , Matthias Kaehlcke , Andre Przywara Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org, linux-usb@vger.kernel.org, Icenowy Zheng Subject: [PATCH 1/6] dt-bindings: vendor-prefixes: add Genesys Logic Date: Sun, 27 Nov 2022 15:31:35 +0800 Message-Id: <20221127073140.2093897-2-uwu@icenowy.me> X-Mailer: git-send-email 2.37.1 In-Reply-To: <20221127073140.2093897-1-uwu@icenowy.me> References: <20221127073140.2093897-1-uwu@icenowy.me> MIME-Version: 1.0 X-ZohoMailClient: External Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org Genesys Logic, Inc. is a manufacturer for interface chips, especially USB hubs. https://www.genesyslogic.com.tw/ Signed-off-by: Icenowy Zheng Acked-by: Krzysztof Kozlowski --- Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Documentation/devicetree/bindings/vendor-prefixes.yaml index 6e323a380294..43359c0ccaf5 100644 --- a/Documentation/devicetree/bindings/vendor-prefixes.yaml +++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml @@ -488,6 +488,8 @@ patternProperties: description: GE Fanuc Intelligent Platforms Embedded Systems, Inc. "^gemei,.*": description: Gemei Digital Technology Co., Ltd. + "^genesys,.*": + description: Genesys Logic, Inc. "^geniatech,.*": description: Geniatech, Inc. "^giantec,.*": From patchwork Sun Nov 27 07:31:36 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Icenowy Zheng X-Patchwork-Id: 628966 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 60DDCC46467 for ; Sun, 27 Nov 2022 07:32:37 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229602AbiK0Hcf (ORCPT ); Sun, 27 Nov 2022 02:32:35 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37564 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229597AbiK0Hcb (ORCPT ); Sun, 27 Nov 2022 02:32:31 -0500 Received: from sender4-op-o18.zoho.com (sender4-op-o18.zoho.com [136.143.188.18]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 56F0F13DC9; Sat, 26 Nov 2022 23:32:26 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1669534332; cv=none; d=zohomail.com; s=zohoarc; b=Y+/S6KSQmJ4YwNXfHe55b213QfStSast38O08enHhPq1yxXk4komFAx0q+9Pc3xIS9HY4y23JQ4vCK7+pv3jfne+gVl1odRyq8s3Rzk5u3m+5BcIDtMxPm3B2AKoPIUWzlQy7amKH3zFxwZMf0/k6do5n1+2LxFZo+rH85BT5GE= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1669534332; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:MIME-Version:Message-ID:References:Subject:To; bh=1C6hqrooialxkZsBgfuBXMNuzsLUfOjDavC8s3kDHqQ=; b=UzyDmdyRLGDtpeVzO9glIHL/10FDuFpEz37C3i5qup1dl5zAdc7xpZw/cI8Gg7m1FmJ/8HkFlaBWEL7RIOtJukcnX2Bvjz9wjMIa+vAR/PzXIE+lbJtNJUxgYHnrn3PFq6nQb0uX3RVCL8FFnImu8Z15i6I1WeWKex/4pdq+mxY= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass header.i=icenowy.me; spf=pass smtp.mailfrom=uwu@icenowy.me; dmarc=pass header.from= DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; t=1669534332; s=zmail; d=icenowy.me; i=uwu@icenowy.me; h=From:From:To:To:Cc:Cc:Subject:Subject:Date:Date:Message-Id:Message-Id:In-Reply-To:References:MIME-Version:Content-Transfer-Encoding:Reply-To; bh=1C6hqrooialxkZsBgfuBXMNuzsLUfOjDavC8s3kDHqQ=; b=bKbavFVeOxu6psP6wsB5jYdfZy01IGOH/aYEutrLVjW2slxafIOgpQLpQg6wb0yQ I49AP9dP7VWci9D1EGNRHjoaBrjGj3XxTsgd2WWExX7HAt4ok4LJ13wVMdM43j1LNfn 4fpOkLDHNPdPpqiwKh10CXPsCNQd8q8Mrd0/Pg8w= Received: from edelgard.fodlan.icenowy.me (112.94.100.108 [112.94.100.108]) by mx.zohomail.com with SMTPS id 1669534331301345.07916607731534; Sat, 26 Nov 2022 23:32:11 -0800 (PST) From: Icenowy Zheng To: Rob Herring , Krzysztof Kozlowski , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Greg Kroah-Hartman , Matthias Kaehlcke , Andre Przywara Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org, linux-usb@vger.kernel.org, Icenowy Zheng Subject: [PATCH 2/6] dt-bindings: usb: Add binding for Genesys Logic GL850G hub controller Date: Sun, 27 Nov 2022 15:31:36 +0800 Message-Id: <20221127073140.2093897-3-uwu@icenowy.me> X-Mailer: git-send-email 2.37.1 In-Reply-To: <20221127073140.2093897-1-uwu@icenowy.me> References: <20221127073140.2093897-1-uwu@icenowy.me> MIME-Version: 1.0 X-ZohoMailClient: External Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org The Genesys Logic GL850G is a USB 2.0 Single TT hub controller that features 4 downstream ports, an internal 5V-to-3.3V LDO regulator (can be bypassed) and an external reset pin. Add a device tree binding for its USB protocol part. The internal LDO is not covered by this and can just be modelled as a fixed regulator. Signed-off-by: Icenowy Zheng --- .../bindings/usb/genesys,gl850g.yaml | 48 +++++++++++++++++++ 1 file changed, 48 insertions(+) create mode 100644 Documentation/devicetree/bindings/usb/genesys,gl850g.yaml diff --git a/Documentation/devicetree/bindings/usb/genesys,gl850g.yaml b/Documentation/devicetree/bindings/usb/genesys,gl850g.yaml new file mode 100644 index 000000000000..d1fe539db399 --- /dev/null +++ b/Documentation/devicetree/bindings/usb/genesys,gl850g.yaml @@ -0,0 +1,48 @@ +# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/usb/realtek,rts5411.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Genesys Logic GL850G USB 2.0 hub controller + +maintainers: + - Icenowy Zheng + +allOf: + - $ref: usb-device.yaml# + +properties: + compatible: + items: + - enum: + - usb5e3,608 + + reg: true + + reset-gpios: + description: GPIO specifier for GRST# pin. + + vdd-supply: + description: + phandle to the regulator that provides power to the hub. + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + usb { + dr_mode = "host"; + #address-cells = <1>; + #size-cells = <0>; + + hub: hub@1 { + compatible = "usb5e3,608"; + reg = <1>; + reset-gpios = <&pio 7 2 GPIO_ACTIVE_LOW>; + }; + }; From patchwork Sun Nov 27 07:31:37 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Icenowy Zheng X-Patchwork-Id: 629155 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E53E2C46467 for ; Sun, 27 Nov 2022 07:32:50 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229614AbiK0Hcs (ORCPT ); Sun, 27 Nov 2022 02:32:48 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38440 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229618AbiK0Hcn (ORCPT ); Sun, 27 Nov 2022 02:32:43 -0500 Received: from sender4-op-o18.zoho.com (sender4-op-o18.zoho.com [136.143.188.18]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 54BC963E7; Sat, 26 Nov 2022 23:32:35 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1669534342; cv=none; d=zohomail.com; s=zohoarc; b=hj7/bFUVYhihM1GikmhedRj09QbrDWBjB0hES5R2Jq2mhZ5oNyOkqnyt6nlhdHQT3qBOz3Bry7OseIlJUk4bIfy6t2JSWKom1bgXzFOgXbCryRSMsQSxVqat4GvqYOdYgqOlcaPoc26Wcqqoqtxd2Ab+dbLJ/k3bU5jW/jhnhP4= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1669534342; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:MIME-Version:Message-ID:References:Subject:To; bh=W3L1gxk3bykxDA4m0BaAtEIoLOyC+p+JqRqguKBAXqc=; b=I2kBoj40phc4IK6iZhHjewrACylqPTeEE/wKmtnL/e0OAKNnopu342k+nEc8yZmQt+Abm+z0q6WbSxoa5p8xYUCORYKCkpAExDdVbsdWonWxAZzC0EgBKnpLdenbjZgCpW/E3mgqDHX7ot25hXd11a8U1EqxIc3ekTo/L81wwzc= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass header.i=icenowy.me; spf=pass smtp.mailfrom=uwu@icenowy.me; dmarc=pass header.from= DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; t=1669534342; s=zmail; d=icenowy.me; i=uwu@icenowy.me; h=From:From:To:To:Cc:Cc:Subject:Subject:Date:Date:Message-Id:Message-Id:In-Reply-To:References:MIME-Version:Content-Transfer-Encoding:Reply-To; bh=W3L1gxk3bykxDA4m0BaAtEIoLOyC+p+JqRqguKBAXqc=; b=XsKaS/9l26VWoqXTd662uao5C7vFNvnuRvxdXJGcniV8eDrk8H4vKNWRbi2PZcx9 1+XRtsmn6lRY+BZduFXPmXQzOb3JYUu3J7n6jhwE2IEAvpG57mQhBrPtfnmmKgmMlWF mpf6lTjy7fBOljEqnzI9f8Wqzk99tJXzQYaSFm+c= Received: from edelgard.fodlan.icenowy.me (112.94.100.108 [112.94.100.108]) by mx.zohomail.com with SMTPS id 1669534340551186.66915670319236; Sat, 26 Nov 2022 23:32:20 -0800 (PST) From: Icenowy Zheng To: Rob Herring , Krzysztof Kozlowski , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Greg Kroah-Hartman , Matthias Kaehlcke , Andre Przywara Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org, linux-usb@vger.kernel.org, Icenowy Zheng Subject: [PATCH 3/6] usb: misc: onboard_usb_hub: add Genesys Logic GL850G hub support Date: Sun, 27 Nov 2022 15:31:37 +0800 Message-Id: <20221127073140.2093897-4-uwu@icenowy.me> X-Mailer: git-send-email 2.37.1 In-Reply-To: <20221127073140.2093897-1-uwu@icenowy.me> References: <20221127073140.2093897-1-uwu@icenowy.me> MIME-Version: 1.0 X-ZohoMailClient: External Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org This is a 4-port USB 2.0 STT hub. Signed-off-by: Icenowy Zheng --- drivers/usb/misc/onboard_usb_hub.c | 2 ++ drivers/usb/misc/onboard_usb_hub.h | 5 +++++ 2 files changed, 7 insertions(+) diff --git a/drivers/usb/misc/onboard_usb_hub.c b/drivers/usb/misc/onboard_usb_hub.c index d63c63942af1..f5c71d724be6 100644 --- a/drivers/usb/misc/onboard_usb_hub.c +++ b/drivers/usb/misc/onboard_usb_hub.c @@ -334,6 +334,7 @@ static struct platform_driver onboard_hub_driver = { #define VENDOR_ID_MICROCHIP 0x0424 #define VENDOR_ID_REALTEK 0x0bda #define VENDOR_ID_TI 0x0451 +#define VENDOR_ID_GENESYS 0x05e3 /* * Returns the onboard_hub platform device that is associated with the USB @@ -414,6 +415,7 @@ static const struct usb_device_id onboard_hub_id_table[] = { { USB_DEVICE(VENDOR_ID_REALTEK, 0x5414) }, /* RTS5414 USB 2.1 */ { USB_DEVICE(VENDOR_ID_TI, 0x8140) }, /* TI USB8041 3.0 */ { USB_DEVICE(VENDOR_ID_TI, 0x8142) }, /* TI USB8041 2.0 */ + { USB_DEVICE(VENDOR_ID_GENESYS, 0x0608) }, /* Genesys Logic GL850G USB 2.0 */ {} }; MODULE_DEVICE_TABLE(usb, onboard_hub_id_table); diff --git a/drivers/usb/misc/onboard_usb_hub.h b/drivers/usb/misc/onboard_usb_hub.h index 34beab8bce3d..1ca188713b1f 100644 --- a/drivers/usb/misc/onboard_usb_hub.h +++ b/drivers/usb/misc/onboard_usb_hub.h @@ -22,6 +22,10 @@ static const struct onboard_hub_pdata ti_tusb8041_data = { .reset_us = 3000, }; +static const struct onboard_hub_pdata genesys_gl850g_data = { + .reset_us = 3, +}; + static const struct of_device_id onboard_hub_match[] = { { .compatible = "usb424,2514", .data = µchip_usb424_data, }, { .compatible = "usb451,8140", .data = &ti_tusb8041_data, }, @@ -30,6 +34,7 @@ static const struct of_device_id onboard_hub_match[] = { { .compatible = "usbbda,5411", .data = &realtek_rts5411_data, }, { .compatible = "usbbda,414", .data = &realtek_rts5411_data, }, { .compatible = "usbbda,5414", .data = &realtek_rts5411_data, }, + { .compatible = "usb5e3,608", .data = &genesys_gl850g_data, }, {} }; From patchwork Sun Nov 27 07:31:38 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Icenowy Zheng X-Patchwork-Id: 628965 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id EF5F9C352A1 for ; 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Sat, 26 Nov 2022 23:32:28 -0800 (PST) From: Icenowy Zheng To: Rob Herring , Krzysztof Kozlowski , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Greg Kroah-Hartman , Matthias Kaehlcke , Andre Przywara Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org, linux-usb@vger.kernel.org, Icenowy Zheng Subject: [PATCH 4/6] vendor-prefixes: Add Shenzhen Rongpin Electronics Co., Ltd Date: Sun, 27 Nov 2022 15:31:38 +0800 Message-Id: <20221127073140.2093897-5-uwu@icenowy.me> X-Mailer: git-send-email 2.37.1 In-Reply-To: <20221127073140.2093897-1-uwu@icenowy.me> References: <20221127073140.2093897-1-uwu@icenowy.me> MIME-Version: 1.0 X-ZohoMailClient: External Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org Add the vendor prefix for Shenzhen Rongpin Electronics Co., Ltd, which specializes in ARM SoMs and EVBs. Website: http://www.rpdzkj.com/ Signed-off-by: Icenowy Zheng Acked-by: Krzysztof Kozlowski --- Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Documentation/devicetree/bindings/vendor-prefixes.yaml index 43359c0ccaf5..952ddeed4b4a 100644 --- a/Documentation/devicetree/bindings/vendor-prefixes.yaml +++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml @@ -1091,6 +1091,8 @@ patternProperties: description: ROHM Semiconductor Co., Ltd "^ronbo,.*": description: Ronbo Electronics + "^rongpin,.*": + description: Shenzhen Rongpin Electronics Co., Ltd "^roofull,.*": description: Shenzhen Roofull Technology Co, Ltd "^roseapplepi,.*": From patchwork Sun Nov 27 07:31:39 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Icenowy Zheng X-Patchwork-Id: 629154 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6EB50C47088 for ; Sun, 27 Nov 2022 07:33:04 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229664AbiK0HdD (ORCPT ); Sun, 27 Nov 2022 02:33:03 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38594 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229630AbiK0Hcw (ORCPT ); Sun, 27 Nov 2022 02:32:52 -0500 Received: from sender4-op-o18.zoho.com (sender4-op-o18.zoho.com [136.143.188.18]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7600313DEF; Sat, 26 Nov 2022 23:32:51 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1669534358; cv=none; d=zohomail.com; s=zohoarc; b=SIv8Ig6OgvIMKrTGz383JJBDKwfW4WV7jMz2W6hB+6I0+GhTALZdxi0/47O9fF8rxyTWznhq9NojHO9edufr6Z6pkHORLxLyo1KCN1YEAzvbPRtHMVhOya5mRbnhArVC5xuf2ovRSgBlGDfoWpb6QemtlV+MRdDslFqQ9a4dtnU= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1669534358; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:MIME-Version:Message-ID:References:Subject:To; bh=PbjBuxSUHOSzyF8NtItKmDMy7yzUEN/jerT/ibZ1LOo=; b=UdrgHGkzG4OlVdaWJ/jWSswwLC/2yOEvsejTQmaalnSD3Zaj/sTQJRIMuQOTgXG6r/kS/V0M7eMuulrHhcBz9XgeY2QhYd2n76jlkT3FO5r4vkggS9r+yynsPIJ0xk6MIGRBOfhziFwqBkiXwk2IcSLzcHwptFQQEp91+z8g+cg= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass header.i=icenowy.me; spf=pass smtp.mailfrom=uwu@icenowy.me; dmarc=pass header.from= DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; t=1669534358; s=zmail; d=icenowy.me; i=uwu@icenowy.me; h=From:From:To:To:Cc:Cc:Subject:Subject:Date:Date:Message-Id:Message-Id:In-Reply-To:References:MIME-Version:Content-Transfer-Encoding:Reply-To; bh=PbjBuxSUHOSzyF8NtItKmDMy7yzUEN/jerT/ibZ1LOo=; b=giKK8+mNVv+P70N2mXPoRBDIbMv8pQ6rQhivTbMmJLPKI0o8OPWwYFb02xy2UQ1f Zq21FBGAUAIBBMU0jt7UCCR68P293HftORrXh0xoN4olUsGD2xA2TBCnANRcf8ozUJw YhdVmGr27VanIvyzzajb9SjsgKGx77KRjppniTNI= Received: from edelgard.fodlan.icenowy.me (112.94.100.108 [112.94.100.108]) by mx.zohomail.com with SMTPS id 1669534356435814.3503775168624; Sat, 26 Nov 2022 23:32:36 -0800 (PST) From: Icenowy Zheng To: Rob Herring , Krzysztof Kozlowski , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Greg Kroah-Hartman , Matthias Kaehlcke , Andre Przywara Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org, linux-usb@vger.kernel.org, Icenowy Zheng Subject: [PATCH 5/6] dt-bindings: arm: sunxi: add Rongpin RP-H6B board Date: Sun, 27 Nov 2022 15:31:39 +0800 Message-Id: <20221127073140.2093897-6-uwu@icenowy.me> X-Mailer: git-send-email 2.37.1 In-Reply-To: <20221127073140.2093897-1-uwu@icenowy.me> References: <20221127073140.2093897-1-uwu@icenowy.me> MIME-Version: 1.0 X-ZohoMailClient: External Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org Rongpin RP-H6B is a development board with RP-H6C SoM, which uses an Allwinner H6 SoC. Add compatible strings for it, including the board-specific compatible and the SoM compatible. Signed-off-by: Icenowy Zheng --- Documentation/devicetree/bindings/arm/sunxi.yaml | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/sunxi.yaml b/Documentation/devicetree/bindings/arm/sunxi.yaml index 3ad1cd50e3fe..482631815f2f 100644 --- a/Documentation/devicetree/bindings/arm/sunxi.yaml +++ b/Documentation/devicetree/bindings/arm/sunxi.yaml @@ -792,6 +792,12 @@ properties: - const: rervision,h3-dvk - const: allwinner,sun8i-h3 + - description: Rongpin RP-H6B development board + items: + - const: rongpin,rp-h6b + - const: rongpin,rp-h6c + - const: allwinner,sun50i-h6 + - description: Sinlinx SinA31s Core Board items: - const: sinlinx,sina31s From patchwork Sun Nov 27 07:31:40 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Icenowy Zheng X-Patchwork-Id: 628964 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 82300C46467 for ; Sun, 27 Nov 2022 07:33:21 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229587AbiK0HdU (ORCPT ); Sun, 27 Nov 2022 02:33:20 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38094 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229582AbiK0HdE (ORCPT ); Sun, 27 Nov 2022 02:33:04 -0500 Received: from sender4-op-o18.zoho.com (sender4-op-o18.zoho.com [136.143.188.18]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5BE1B11C08; Sat, 26 Nov 2022 23:33:03 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1669534368; cv=none; d=zohomail.com; s=zohoarc; b=AGvaJ/jG907SVOLpWsUVI6PrK6Sy/VmVmdAezPfoapCdIF6W04I9nwlaP5r3U7APLI/AH5/qzyr/qPcUFtCHmMO4M0l3c3svv/1oC/d4odxswor9davyiSscQJxDEbV/yISA6Cp5TjbkjJ1CbJnXgEoqgpMemh/uAEN/10kIcJM= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1669534368; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:MIME-Version:Message-ID:References:Subject:To; bh=1XEKMIJhOKAg/21e74ntHbbKbFLVliPY169ToAcHKgY=; b=KzxG7K6c8o34+gTWtr4YxowMEXsGiky49jZlomE+Ocpd75r0at4YfyWBx3RJjNrDE0K0b1JM9yvW7uUW5ufxKqOr42njzJJCeAs0kxHx6GtwiWCRUAReidRRnRIAZcZ1QJ1SBPUQsdT6YzzZ3MZtQwmA1NFMUeHde6NACwXIsyc= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass header.i=icenowy.me; spf=pass smtp.mailfrom=uwu@icenowy.me; dmarc=pass header.from= DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; t=1669534368; s=zmail; d=icenowy.me; i=uwu@icenowy.me; h=From:From:To:To:Cc:Cc:Subject:Subject:Date:Date:Message-Id:Message-Id:In-Reply-To:References:MIME-Version:Content-Transfer-Encoding:Reply-To; bh=1XEKMIJhOKAg/21e74ntHbbKbFLVliPY169ToAcHKgY=; b=It9TBGUkvi8phkuPQEmW5dEquwZslRwxh8avW5MW6xRZu52Cdzwo4boWmiW1id4L 8Pv5Jw8SuBEu0NovRxaIwcavmrpAt/bFhK4H2vJNtGOsoxvbTe5aKlkF9HMcos5yFr6 OLYb/+enkx8Bsg8Yyw+I3Qpf9zyLOmj5sE7mOq+0= Received: from edelgard.fodlan.icenowy.me (112.94.100.108 [112.94.100.108]) by mx.zohomail.com with SMTPS id 1669534367101715.605287846263; Sat, 26 Nov 2022 23:32:47 -0800 (PST) From: Icenowy Zheng To: Rob Herring , Krzysztof Kozlowski , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Greg Kroah-Hartman , Matthias Kaehlcke , Andre Przywara Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org, linux-usb@vger.kernel.org, Icenowy Zheng Subject: [PATCH 6/6] arm64: dts: allwinner: h6: add Rongpin RP-H6C SoM and RP-H6B board Date: Sun, 27 Nov 2022 15:31:40 +0800 Message-Id: <20221127073140.2093897-7-uwu@icenowy.me> X-Mailer: git-send-email 2.37.1 In-Reply-To: <20221127073140.2093897-1-uwu@icenowy.me> References: <20221127073140.2093897-1-uwu@icenowy.me> MIME-Version: 1.0 X-ZohoMailClient: External Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org Rongpin RP-H6C is an Allwinner H6 SoM by Rongpin, with Allwinner H6 SoC, AXP805 PMIC, LPDDR3 memory and eMMC storage on it. RP-H6B is their official evaluation board of RP-H6C, with an onboard GL850G USB hub, Ampak AP6212 Wi-Fi module and some circuits about LVDS display. It also exports the OTG USB port, the USB 3.0 port, PCIe bus (as mPCIe slot), internal Ethernet PHY, analog audio/video and HDMI port. Add a DTSI file for the SoM and a DTS for the full board. Signed-off-by: Icenowy Zheng --- arch/arm64/boot/dts/allwinner/Makefile | 1 + .../boot/dts/allwinner/sun50i-h6-rp-h6b.dts | 239 ++++++++++++++++++ .../boot/dts/allwinner/sun50i-h6-rp-h6c.dtsi | 180 +++++++++++++ 3 files changed, 420 insertions(+) create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-h6-rp-h6b.dts create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-h6-rp-h6c.dtsi diff --git a/arch/arm64/boot/dts/allwinner/Makefile b/arch/arm64/boot/dts/allwinner/Makefile index 6a96494a2e0a..e289fedcac29 100644 --- a/arch/arm64/boot/dts/allwinner/Makefile +++ b/arch/arm64/boot/dts/allwinner/Makefile @@ -36,6 +36,7 @@ dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h6-orangepi-lite2.dtb dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h6-orangepi-one-plus.dtb dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h6-pine-h64.dtb dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h6-pine-h64-model-b.dtb +dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h6-rp-h6b.dtb dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h6-tanix-tx6.dtb dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h6-tanix-tx6-mini.dtb dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h616-orangepi-zero2.dtb diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-rp-h6b.dts b/arch/arm64/boot/dts/allwinner/sun50i-h6-rp-h6b.dts new file mode 100644 index 000000000000..9fa40c365e63 --- /dev/null +++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-rp-h6b.dts @@ -0,0 +1,239 @@ +// SPDX-License-Identifier: (GPL-2.0+ or MIT) +/* + * Copyright (C) 2022 Icenowy Zheng + */ +/dts-v1/; + +#include "sun50i-h6-rp-h6c.dtsi" + +#include + +/ { + model = "Rongpin RP-H6B baseboard"; + compatible = "rongpin,rp-h6b", "rongpin,rp-h6c", + "allwinner,sun50i-h6"; + + aliases { + ethernet0 = &emac; + serial0 = &uart0; + /* + * Prioritize the external RTC because it's powered + * by a cell battery. + */ + rtc0 = &hym8563; + rtc1 = &rtc; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + hdmi_connector: connector { + compatible = "hdmi-connector"; + type = "a"; + + port { + hdmi_con_in: endpoint { + remote-endpoint = <&hdmi_out_con>; + }; + }; + }; + + leds { + compatible = "gpio-leds"; + + led { + label = "rongpin:red:link"; + gpios = <&r_pio 0 3 GPIO_ACTIVE_LOW>; /* PL3 */ + /* + * On the schematics this LED is marked as "lit when + * powering on and blinking when running". + */ + linux,default-trigger = "heartbeat"; + }; + }; + + /* + * The VDD_5V power rail is connected to the internal regulator + * of GL850G, to power up the 3.3V core of it. + */ + reg_v33_hub: v33-hub { + compatible = "regulator-fixed"; + regulator-name = "v33-hub"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + vin-supply = <®_vdd_5v>; + }; + + /* + * This board inputs 5V to AP6212 via a SS34 diode. Use this + * regulator as the model of the internal regulator of AP6212. + */ + reg_vcc3v3_ap6212: vcc3v3-ap6212 { + compatible = "regulator-fixed"; + regulator-name = "vcc3v3-ap6212"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + vin-supply = <®_ps>; + }; + + reg_vdd_5v: vdd-5v { + compatible = "regulator-fixed"; + regulator-name = "vdd-5v"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + startup-delay-us = <100000>; + gpio = <&r_pio 0 5 GPIO_ACTIVE_HIGH>; + enable-active-high; + vin-supply = <®_ps>; + }; + + /* For mPCIe slot WWAN modules / PCIe cards */ + reg_vdd_3g: vdd-3g { + compatible = "regulator-fixed"; + regulator-name = "vdd-3g"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + startup-delay-us = <100000>; + gpio = <&r_pio 0 7 GPIO_ACTIVE_HIGH>; + enable-active-high; + vin-supply = <®_ps>; + /* + * As a hack for lacking of control of a hub downstream + * port's Vbus. + */ + regulator-always-on; + }; + + wifi_pwrseq: wifi_pwrseq { + compatible = "mmc-pwrseq-simple"; + reset-gpios = <&r_pio 1 3 GPIO_ACTIVE_LOW>; /* PM3 */ + post-power-on-delay-ms = <200>; + }; +}; + +&de { + status = "okay"; +}; + +&ehci0 { + status = "okay"; +}; + +&ehci3 { + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; + + hub@1 { + /* Genesys Logic GL850G usb hub */ + compatible = "usb5e3,608"; + reg = <1>; + vdd-supply = <®_v33_hub>; + reset-gpios = <&pio 7 2 GPIO_ACTIVE_LOW>; + }; +}; + +&hdmi { + status = "okay"; +}; + +&hdmi_out { + hdmi_out_con: endpoint { + remote-endpoint = <&hdmi_con_in>; + }; +}; + +&i2c0 { + status = "okay"; + + hym8563: rtc@51 { + compatible = "haoyu,hym8563"; + reg = <0x51>; + #clock-cells = <0>; + }; +}; + +&mmc0 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc0_pins>; + vmmc-supply = <®_cldo1>; + cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; + bus-width = <4>; + status = "okay"; +}; + +&mmc1 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc1_pins>; + vmmc-supply = <®_vcc3v3_ap6212>; + vqmmc-supply = <®_bldo3>; + mmc-pwrseq = <&wifi_pwrseq>; + non-removable; + bus-width = <4>; + status = "okay"; + + brcmf: wifi@1 { + reg = <1>; + compatible = "brcm,bcm4329-fmac"; + interrupt-parent = <&r_pio>; + interrupts = <1 0 IRQ_TYPE_LEVEL_LOW>; /* PM0 */ + interrupt-names = "host-wake"; + }; +}; + +&ohci0 { + status = "okay"; +}; + +/* Converted from 12v with a fixed DC-DC on the baseboard */ +®_ps { + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; +}; + +&uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_ph_pins>; + status = "okay"; +}; + +/* Bluetooth */ +&uart1 { + pinctrl-names = "default"; + pinctrl-0 = <&uart1_pins>, <&uart1_rts_cts_pins>; + uart-has-rtscts; + status = "okay"; + + bluetooth { + compatible = "brcm,bcm43438-bt"; + max-speed = <1500000>; + clocks = <&rtc CLK_OSC32K_FANOUT>; + clock-names = "lpo"; + vbat-supply = <®_ps>; + vddio-supply = <®_bldo3>; + device-wakeup-gpios = <&r_pio 1 2 GPIO_ACTIVE_HIGH>; /* PM2 */ + shutdown-gpios = <&r_pio 1 4 GPIO_ACTIVE_HIGH>; /* PM4 */ + interrupt-parent = <&r_pio>; + interrupts = <1 1 IRQ_TYPE_EDGE_FALLING>; /* PM1 */ + interrupt-names = "host-wakeup"; + }; +}; + +&uart1_pins { + bias-pull-up; +}; + +&uart1_rts_cts_pins { + bias-pull-up; +}; + +&usb2otg { + dr_mode = "host"; + status = "okay"; +}; + +&usb2phy { + usb0_vbus-supply = <®_vdd_5v>; + status = "okay"; +}; diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-rp-h6c.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6-rp-h6c.dtsi new file mode 100644 index 000000000000..53822718e2d7 --- /dev/null +++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-rp-h6c.dtsi @@ -0,0 +1,180 @@ +// SPDX-License-Identifier: (GPL-2.0+ or MIT) +/* + * Copyright (C) 2019-2022 Icenowy Zheng + */ + +#include "sun50i-h6.dtsi" +#include "sun50i-h6-cpu-opp.dtsi" +#include "sun50i-h6-gpu-opp.dtsi" + +/ { + ext_osc32k: ext_osc32k_clk { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <32768>; + clock-output-names = "ext_osc32k"; + }; + + /* Marked 3.4v~5.5v on SoM schematics */ + reg_ps: ps { + compatible = "regulator-fixed"; + regulator-name = "ps"; + }; +}; + +&cpu0 { + cpu-supply = <®_dcdca>; +}; + +&gpu { + mali-supply = <®_dcdcc>; + status = "okay"; +}; + +&mmc2 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc2_pins>; + vmmc-supply = <®_cldo1>; + vqmmc-supply = <®_bldo2>; + non-removable; + cap-mmc-hw-reset; + bus-width = <8>; + status = "okay"; +}; + +&pio { + vcc-pc-supply = <®_bldo2>; + vcc-pd-supply = <®_aldo2>; + vcc-pg-supply = <®_bldo3>; +}; + +&r_pio { + /* + * FIXME: We can't add that supply for now since it would + * create a circular dependency between pinctrl, the regulator + * and the RSB Bus. + * + * vcc-pl-supply = <®_aldo1>; + */ + vcc-pm-supply = <®_bldo3>; +}; + +&r_rsb { + status = "okay"; + clock-frequency = <400000>; + + axp805: pmic@745 { + compatible = "x-powers,axp805", "x-powers,axp806"; + reg = <0x745>; + interrupt-parent = <&r_intc>; + interrupts = ; + interrupt-controller; + #interrupt-cells = <1>; + x-powers,self-working-mode; + vina-supply = <®_ps>; + vinb-supply = <®_ps>; + vinc-supply = <®_ps>; + vind-supply = <®_ps>; + vine-supply = <®_ps>; + aldoin-supply = <®_ps>; + bldoin-supply = <®_ps>; + cldoin-supply = <®_ps>; + + regulators { + reg_aldo1: aldo1 { + regulator-always-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc-pl"; + }; + + reg_aldo2: aldo2 { + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc-ac200"; + regulator-enable-ramp-delay = <100000>; + }; + + aldo3 { + /* unused */ + }; + + reg_bldo1: bldo1 { + regulator-always-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "vcc-bias-pll"; + }; + + reg_bldo2: bldo2 { + regulator-always-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "vcc-efuse-pcie-hdmi-io"; + }; + + reg_bldo3: bldo3 { + regulator-always-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "vcc-dcxoio"; + }; + + bldo4 { + /* unused */ + }; + + reg_cldo1: cldo1 { + /* This regulator is connected with ALDO3 */ + regulator-always-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc-3v3-2"; + }; + + cldo2 { + /* unused */ + }; + + cldo3 { + /* unused */ + }; + + reg_dcdca: dcdca { + regulator-always-on; + regulator-min-microvolt = <810000>; + regulator-max-microvolt = <1160000>; + regulator-ramp-delay = <2500>; + regulator-name = "vdd-cpu"; + }; + + reg_dcdcc: dcdcc { + regulator-min-microvolt = <810000>; + regulator-max-microvolt = <1080000>; + regulator-name = "vdd-gpu"; + }; + + reg_dcdcd: dcdcd { + regulator-always-on; + regulator-min-microvolt = <960000>; + regulator-max-microvolt = <960000>; + regulator-name = "vdd-sys"; + }; + + reg_dcdce: dcdce { + regulator-always-on; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-name = "vcc-dram"; + }; + + sw { + /* unused */ + }; + }; + }; +}; + +&rtc { + clocks = <&ext_osc32k>; +};