From patchwork Mon Dec 5 15:24:47 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Milen Mitkov \(Consultant\)" X-Patchwork-Id: 631106 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6C179C4708E for ; Mon, 5 Dec 2022 15:27:29 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232494AbiLEP12 (ORCPT ); Mon, 5 Dec 2022 10:27:28 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58920 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232792AbiLEP1D (ORCPT ); Mon, 5 Dec 2022 10:27:03 -0500 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id F050B1E72D; Mon, 5 Dec 2022 07:25:30 -0800 (PST) Received: from pps.filterd (m0279863.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 2B5Dk1CV014634; Mon, 5 Dec 2022 15:25:14 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=qcppdkim1; bh=bzcj5xVjRSmVIh/wqSOSKpnIOp0n6amFf3rtrbGSp9w=; b=a5syChQGOdmA2XyMyaexGLmtJgYcttv9lxtK44aTS/sNmw5YTlq7WyrWt/ygg/yU7iKM Edpy5OixsGlZt5FAWuweITY0KIsnixbZYRBnEkiTVy1mxzT+hxH4MLLrU10+Jct1v9EI D8SQxl3tr8EM3fEuNjCM6wlmwhRaLyRJF7asAldlSPSVKHObwby961cJdMoLNVD8VDpT fg/NeDlDlNP8dfG/Wk6TpOWcEOyAapmY6EZxGA54JIDPr9iCQS/dXQnFsyS2bZ+TEPI/ ioZ4NWBOrpixB8Os45mpsvdLOToo38eNnplo6PbWOEO9u3gZY5VfbVa+1HMopEFemE5u 7Q== Received: from nasanppmta03.qualcomm.com (i-global254.qualcomm.com [199.106.103.254]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3m7xp8mf7h-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 05 Dec 2022 15:25:13 +0000 Received: from nasanex01a.na.qualcomm.com ([10.52.223.231]) by NASANPPMTA03.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 2B5FPDxC006589 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 5 Dec 2022 15:25:13 GMT Received: from mmitkov.eu.qualcomm.com (10.80.80.8) by nasanex01a.na.qualcomm.com (10.52.223.231) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.36; Mon, 5 Dec 2022 07:25:09 -0800 From: To: , , , , , CC: , , , , , , , , Milen Mitkov Subject: [PATCH v6 1/4] media: camss: sm8250: Virtual channels for CSID Date: Mon, 5 Dec 2022 17:24:47 +0200 Message-ID: <20221205152450.1099-2-quic_mmitkov@quicinc.com> X-Mailer: git-send-email 2.37.3.windows.1 In-Reply-To: <20221205152450.1099-1-quic_mmitkov@quicinc.com> References: <20221205152450.1099-1-quic_mmitkov@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nasanex01a.na.qualcomm.com (10.52.223.231) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: FTyWUp5W5VrpPEhI-t_6VHhq1JkYpWce X-Proofpoint-GUID: FTyWUp5W5VrpPEhI-t_6VHhq1JkYpWce X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.923,Hydra:6.0.545,FMLib:17.11.122.1 definitions=2022-12-05_01,2022-12-05_01,2022-06-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxscore=0 clxscore=1015 phishscore=0 lowpriorityscore=0 suspectscore=0 spamscore=0 priorityscore=1501 mlxlogscore=999 malwarescore=0 bulkscore=0 impostorscore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2210170000 definitions=main-2212050127 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Milen Mitkov CSID hardware on SM8250 can demux up to 4 simultaneous streams based on virtual channel (vc) or datatype (dt). The CSID subdevice entity now has 4 source ports that can be enabled/disabled and thus can control which virtual channels are enabled. Datatype demuxing not tested. In order to keep a valid internal state of the subdevice, implicit format propagation from the sink to the source pads has been preserved. However, the format on each source pad can be different and in that case it must be configured explicitly. CSID's s_stream is called when any stream is started or stopped. It will call configure_streams() that will rewrite IRQ settings to HW. When multiple streams are running simultaneously there is an issue when writing IRQ settings for one stream while another is still running, thus avoid re-writing settings if they were not changed in link setup, or by fully powering off the CSID hardware. Signed-off-by: Milen Mitkov Reviewed-by: Robert Foss Tested-by: Bryan O'Donoghue Acked-by: Robert Foss --- .../platform/qcom/camss/camss-csid-gen2.c | 54 ++++++++++++------- .../media/platform/qcom/camss/camss-csid.c | 44 ++++++++++----- .../media/platform/qcom/camss/camss-csid.h | 11 +++- 3 files changed, 74 insertions(+), 35 deletions(-) diff --git a/drivers/media/platform/qcom/camss/camss-csid-gen2.c b/drivers/media/platform/qcom/camss/camss-csid-gen2.c index 2031bde13a93..0f8ac29d038d 100644 --- a/drivers/media/platform/qcom/camss/camss-csid-gen2.c +++ b/drivers/media/platform/qcom/camss/camss-csid-gen2.c @@ -334,13 +334,14 @@ static const struct csid_format csid_formats[] = { }, }; -static void csid_configure_stream(struct csid_device *csid, u8 enable) +static void __csid_configure_stream(struct csid_device *csid, u8 enable, u8 vc) { struct csid_testgen_config *tg = &csid->testgen; u32 val; u32 phy_sel = 0; u8 lane_cnt = csid->phy.lane_cnt; - struct v4l2_mbus_framefmt *input_format = &csid->fmt[MSM_CSID_PAD_SRC]; + /* Source pads matching RDI channels on hardware. Pad 1 -> RDI0, Pad 2 -> RDI1, etc. */ + struct v4l2_mbus_framefmt *input_format = &csid->fmt[MSM_CSID_PAD_FIRST_SRC + vc]; const struct csid_format *format = csid_get_fmt_entry(csid->formats, csid->nformats, input_format->code); @@ -351,8 +352,7 @@ static void csid_configure_stream(struct csid_device *csid, u8 enable) phy_sel = csid->phy.csiphy_id; if (enable) { - u8 vc = 0; /* Virtual Channel 0 */ - u8 dt_id = vc * 4; + u8 dt_id = vc; if (tg->enabled) { /* Config Test Generator */ @@ -395,42 +395,42 @@ static void csid_configure_stream(struct csid_device *csid, u8 enable) val |= format->data_type << RDI_CFG0_DATA_TYPE; val |= vc << RDI_CFG0_VIRTUAL_CHANNEL; val |= dt_id << RDI_CFG0_DT_ID; - writel_relaxed(val, csid->base + CSID_RDI_CFG0(0)); + writel_relaxed(val, csid->base + CSID_RDI_CFG0(vc)); /* CSID_TIMESTAMP_STB_POST_IRQ */ val = 2 << RDI_CFG1_TIMESTAMP_STB_SEL; - writel_relaxed(val, csid->base + CSID_RDI_CFG1(0)); + writel_relaxed(val, csid->base + CSID_RDI_CFG1(vc)); val = 1; - writel_relaxed(val, csid->base + CSID_RDI_FRM_DROP_PERIOD(0)); + writel_relaxed(val, csid->base + CSID_RDI_FRM_DROP_PERIOD(vc)); val = 0; - writel_relaxed(val, csid->base + CSID_RDI_FRM_DROP_PATTERN(0)); + writel_relaxed(val, csid->base + CSID_RDI_FRM_DROP_PATTERN(vc)); val = 1; - writel_relaxed(val, csid->base + CSID_RDI_IRQ_SUBSAMPLE_PERIOD(0)); + writel_relaxed(val, csid->base + CSID_RDI_IRQ_SUBSAMPLE_PERIOD(vc)); val = 0; - writel_relaxed(val, csid->base + CSID_RDI_IRQ_SUBSAMPLE_PATTERN(0)); + writel_relaxed(val, csid->base + CSID_RDI_IRQ_SUBSAMPLE_PATTERN(vc)); val = 1; - writel_relaxed(val, csid->base + CSID_RDI_RPP_PIX_DROP_PERIOD(0)); + writel_relaxed(val, csid->base + CSID_RDI_RPP_PIX_DROP_PERIOD(vc)); val = 0; - writel_relaxed(val, csid->base + CSID_RDI_RPP_PIX_DROP_PATTERN(0)); + writel_relaxed(val, csid->base + CSID_RDI_RPP_PIX_DROP_PATTERN(vc)); val = 1; - writel_relaxed(val, csid->base + CSID_RDI_RPP_LINE_DROP_PERIOD(0)); + writel_relaxed(val, csid->base + CSID_RDI_RPP_LINE_DROP_PERIOD(vc)); val = 0; - writel_relaxed(val, csid->base + CSID_RDI_RPP_LINE_DROP_PATTERN(0)); + writel_relaxed(val, csid->base + CSID_RDI_RPP_LINE_DROP_PATTERN(vc)); val = 0; - writel_relaxed(val, csid->base + CSID_RDI_CTRL(0)); + writel_relaxed(val, csid->base + CSID_RDI_CTRL(vc)); - val = readl_relaxed(csid->base + CSID_RDI_CFG0(0)); + val = readl_relaxed(csid->base + CSID_RDI_CFG0(vc)); val |= 1 << RDI_CFG0_ENABLE; - writel_relaxed(val, csid->base + CSID_RDI_CFG0(0)); + writel_relaxed(val, csid->base + CSID_RDI_CFG0(vc)); } if (tg->enabled) { @@ -456,7 +456,16 @@ static void csid_configure_stream(struct csid_device *csid, u8 enable) val = HALT_CMD_RESUME_AT_FRAME_BOUNDARY << RDI_CTRL_HALT_CMD; else val = HALT_CMD_HALT_AT_FRAME_BOUNDARY << RDI_CTRL_HALT_CMD; - writel_relaxed(val, csid->base + CSID_RDI_CTRL(0)); + writel_relaxed(val, csid->base + CSID_RDI_CTRL(vc)); +} + +static void csid_configure_stream(struct csid_device *csid, u8 enable) +{ + u8 i; + /* Loop through all enabled VCs and configure stream for each */ + for (i = 0; i < MSM_CSID_MAX_SRC_STREAMS; i++) + if (csid->phy.en_vc & BIT(i)) + __csid_configure_stream(csid, enable, i); } static int csid_configure_testgen_pattern(struct csid_device *csid, s32 val) @@ -502,6 +511,7 @@ static irqreturn_t csid_isr(int irq, void *dev) struct csid_device *csid = dev; u32 val; u8 reset_done; + int i; val = readl_relaxed(csid->base + CSID_TOP_IRQ_STATUS); writel_relaxed(val, csid->base + CSID_TOP_IRQ_CLEAR); @@ -510,8 +520,12 @@ static irqreturn_t csid_isr(int irq, void *dev) val = readl_relaxed(csid->base + CSID_CSI2_RX_IRQ_STATUS); writel_relaxed(val, csid->base + CSID_CSI2_RX_IRQ_CLEAR); - val = readl_relaxed(csid->base + CSID_CSI2_RDIN_IRQ_STATUS(0)); - writel_relaxed(val, csid->base + CSID_CSI2_RDIN_IRQ_CLEAR(0)); + /* Read and clear IRQ status for each enabled RDI channel */ + for (i = 0; i < MSM_CSID_MAX_SRC_STREAMS; i++) + if (csid->phy.en_vc & BIT(i)) { + val = readl_relaxed(csid->base + CSID_CSI2_RDIN_IRQ_STATUS(i)); + writel_relaxed(val, csid->base + CSID_CSI2_RDIN_IRQ_CLEAR(i)); + } val = 1 << IRQ_CMD_CLEAR; writel_relaxed(val, csid->base + CSID_IRQ_CMD); diff --git a/drivers/media/platform/qcom/camss/camss-csid.c b/drivers/media/platform/qcom/camss/camss-csid.c index 88f188e0f750..6360314f04a6 100644 --- a/drivers/media/platform/qcom/camss/camss-csid.c +++ b/drivers/media/platform/qcom/camss/camss-csid.c @@ -196,6 +196,8 @@ static int csid_set_power(struct v4l2_subdev *sd, int on) return ret; } + csid->phy.need_vc_update = true; + enable_irq(csid->irq); ret = csid->ops->reset(csid); @@ -249,7 +251,10 @@ static int csid_set_stream(struct v4l2_subdev *sd, int enable) return -ENOLINK; } - csid->ops->configure_stream(csid, enable); + if (csid->phy.need_vc_update) { + csid->ops->configure_stream(csid, enable); + csid->phy.need_vc_update = false; + } return 0; } @@ -460,6 +465,7 @@ static int csid_set_format(struct v4l2_subdev *sd, { struct csid_device *csid = v4l2_get_subdevdata(sd); struct v4l2_mbus_framefmt *format; + int i; format = __csid_get_format(csid, sd_state, fmt->pad, fmt->which); if (format == NULL) @@ -468,14 +474,14 @@ static int csid_set_format(struct v4l2_subdev *sd, csid_try_format(csid, sd_state, fmt->pad, &fmt->format, fmt->which); *format = fmt->format; - /* Propagate the format from sink to source */ + /* Propagate the format from sink to source pads */ if (fmt->pad == MSM_CSID_PAD_SINK) { - format = __csid_get_format(csid, sd_state, MSM_CSID_PAD_SRC, - fmt->which); + for (i = MSM_CSID_PAD_FIRST_SRC; i < MSM_CSID_PADS_NUM; ++i) { + format = __csid_get_format(csid, sd_state, i, fmt->which); - *format = fmt->format; - csid_try_format(csid, sd_state, MSM_CSID_PAD_SRC, format, - fmt->which); + *format = fmt->format; + csid_try_format(csid, sd_state, i, format, fmt->which); + } } return 0; @@ -738,7 +744,6 @@ static int csid_link_setup(struct media_entity *entity, struct csid_device *csid; struct csiphy_device *csiphy; struct csiphy_lanes_cfg *lane_cfg; - struct v4l2_subdev_format format = { 0 }; sd = media_entity_to_v4l2_subdev(entity); csid = v4l2_get_subdevdata(sd); @@ -761,11 +766,22 @@ static int csid_link_setup(struct media_entity *entity, lane_cfg = &csiphy->cfg.csi2->lane_cfg; csid->phy.lane_cnt = lane_cfg->num_data; csid->phy.lane_assign = csid_get_lane_assign(lane_cfg); + } + /* Decide which virtual channels to enable based on which source pads are enabled */ + if (local->flags & MEDIA_PAD_FL_SOURCE) { + struct v4l2_subdev *sd = media_entity_to_v4l2_subdev(entity); + struct csid_device *csid = v4l2_get_subdevdata(sd); + struct device *dev = csid->camss->dev; + + if (flags & MEDIA_LNK_FL_ENABLED) + csid->phy.en_vc |= BIT(local->index - 1); + else + csid->phy.en_vc &= ~BIT(local->index - 1); - /* Reset format on source pad to sink pad format */ - format.pad = MSM_CSID_PAD_SRC; - format.which = V4L2_SUBDEV_FORMAT_ACTIVE; - csid_set_format(&csid->subdev, NULL, &format); + csid->phy.need_vc_update = true; + + dev_dbg(dev, "%s: Enabled CSID virtual channels mask 0x%x\n", + __func__, csid->phy.en_vc); } return 0; @@ -816,6 +832,7 @@ int msm_csid_register_entity(struct csid_device *csid, struct v4l2_subdev *sd = &csid->subdev; struct media_pad *pads = csid->pads; struct device *dev = csid->camss->dev; + int i; int ret; v4l2_subdev_init(sd, &csid_v4l2_ops); @@ -852,7 +869,8 @@ int msm_csid_register_entity(struct csid_device *csid, } pads[MSM_CSID_PAD_SINK].flags = MEDIA_PAD_FL_SINK; - pads[MSM_CSID_PAD_SRC].flags = MEDIA_PAD_FL_SOURCE; + for (i = MSM_CSID_PAD_FIRST_SRC; i < MSM_CSID_PADS_NUM; ++i) + pads[i].flags = MEDIA_PAD_FL_SOURCE; sd->entity.function = MEDIA_ENT_F_PROC_VIDEO_PIXEL_FORMATTER; sd->entity.ops = &csid_media_ops; diff --git a/drivers/media/platform/qcom/camss/camss-csid.h b/drivers/media/platform/qcom/camss/camss-csid.h index f06040e44c51..d4b48432a097 100644 --- a/drivers/media/platform/qcom/camss/camss-csid.h +++ b/drivers/media/platform/qcom/camss/camss-csid.h @@ -19,8 +19,13 @@ #include #define MSM_CSID_PAD_SINK 0 -#define MSM_CSID_PAD_SRC 1 -#define MSM_CSID_PADS_NUM 2 +#define MSM_CSID_PAD_FIRST_SRC 1 +#define MSM_CSID_PADS_NUM 5 + +#define MSM_CSID_PAD_SRC (MSM_CSID_PAD_FIRST_SRC) + +/* CSID hardware can demultiplex up to 4 outputs */ +#define MSM_CSID_MAX_SRC_STREAMS 4 #define DATA_TYPE_EMBEDDED_DATA_8BIT 0x12 #define DATA_TYPE_YUV420_8BIT 0x18 @@ -81,6 +86,8 @@ struct csid_phy_config { u8 csiphy_id; u8 lane_cnt; u32 lane_assign; + u32 en_vc; + u8 need_vc_update; }; struct csid_device; From patchwork Mon Dec 5 15:24:48 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Milen Mitkov \(Consultant\)" X-Patchwork-Id: 632450 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8E66CC4321E for ; Mon, 5 Dec 2022 15:27:31 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232543AbiLEP13 (ORCPT ); Mon, 5 Dec 2022 10:27:29 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58908 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232776AbiLEP1B (ORCPT ); Mon, 5 Dec 2022 10:27:01 -0500 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id DA1CFCDB; Mon, 5 Dec 2022 07:25:30 -0800 (PST) Received: from pps.filterd (m0279866.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 2B5DrJFO016408; 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Mon, 5 Dec 2022 15:25:16 GMT Received: from mmitkov.eu.qualcomm.com (10.80.80.8) by nasanex01a.na.qualcomm.com (10.52.223.231) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.36; Mon, 5 Dec 2022 07:25:13 -0800 From: To: , , , , , CC: , , , , , , , , Milen Mitkov Subject: [PATCH v6 2/4] media: camss: vfe: Reserve VFE lines on stream start and link to CSID Date: Mon, 5 Dec 2022 17:24:48 +0200 Message-ID: <20221205152450.1099-3-quic_mmitkov@quicinc.com> X-Mailer: git-send-email 2.37.3.windows.1 In-Reply-To: <20221205152450.1099-1-quic_mmitkov@quicinc.com> References: <20221205152450.1099-1-quic_mmitkov@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nasanex01a.na.qualcomm.com (10.52.223.231) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: pTCbL8th3DBuxs2zSCslORXPF5UToGLg X-Proofpoint-ORIG-GUID: pTCbL8th3DBuxs2zSCslORXPF5UToGLg X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.923,Hydra:6.0.545,FMLib:17.11.122.1 definitions=2022-12-05_01,2022-12-05_01,2022-06-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 bulkscore=0 mlxlogscore=990 phishscore=0 malwarescore=0 impostorscore=0 suspectscore=0 adultscore=0 clxscore=1015 mlxscore=0 spamscore=0 priorityscore=1501 lowpriorityscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2210170000 definitions=main-2212050127 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Milen Mitkov For multiple virtual channels support, each VFE line can be in either ON, RESERVED or OFF states. This allows the starting and stopping of a VFE line independently of other active VFE lines. Also, link the CSID entity's source ports to corresponding VFE lines. Signed-off-by: Milen Mitkov Reviewed-by: Robert Foss Tested-by: Bryan O'Donoghue Acked-by: Robert Foss --- drivers/media/platform/qcom/camss/camss-vfe.c | 1 + drivers/media/platform/qcom/camss/camss.c | 2 +- 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/media/platform/qcom/camss/camss-vfe.c b/drivers/media/platform/qcom/camss/camss-vfe.c index a26e4a5d87b6..e0832f3f4f25 100644 --- a/drivers/media/platform/qcom/camss/camss-vfe.c +++ b/drivers/media/platform/qcom/camss/camss-vfe.c @@ -740,6 +740,7 @@ static int vfe_set_stream(struct v4l2_subdev *sd, int enable) int ret; if (enable) { + line->output.state = VFE_OUTPUT_RESERVED; ret = vfe->ops->vfe_enable(line); if (ret < 0) dev_err(vfe->camss->dev, diff --git a/drivers/media/platform/qcom/camss/camss.c b/drivers/media/platform/qcom/camss/camss.c index 9cda284f1e71..547099f8ed14 100644 --- a/drivers/media/platform/qcom/camss/camss.c +++ b/drivers/media/platform/qcom/camss/camss.c @@ -1320,7 +1320,7 @@ static int camss_register_entities(struct camss *camss) struct v4l2_subdev *vfe = &camss->vfe[k].line[j].subdev; ret = media_create_pad_link(&csid->entity, - MSM_CSID_PAD_SRC, + MSM_CSID_PAD_FIRST_SRC + j, &vfe->entity, MSM_VFE_PAD_SINK, 0); From patchwork Mon Dec 5 15:24:49 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Milen Mitkov \(Consultant\)" X-Patchwork-Id: 631107 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 33641C4332F for ; Mon, 5 Dec 2022 15:27:28 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232343AbiLEP10 (ORCPT ); Mon, 5 Dec 2022 10:27:26 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58922 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232782AbiLEP1D (ORCPT ); Mon, 5 Dec 2022 10:27:03 -0500 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0CEA01E72F; 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Mon, 05 Dec 2022 15:25:21 +0000 Received: from nasanex01a.na.qualcomm.com ([10.52.223.231]) by NASANPPMTA05.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 2B5FPKug013554 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 5 Dec 2022 15:25:20 GMT Received: from mmitkov.eu.qualcomm.com (10.80.80.8) by nasanex01a.na.qualcomm.com (10.52.223.231) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.36; Mon, 5 Dec 2022 07:25:17 -0800 From: To: , , , , , CC: , , , , , , , , Milen Mitkov Subject: [PATCH v6 3/4] media: camss: vfe-480: Multiple outputs support for SM8250 Date: Mon, 5 Dec 2022 17:24:49 +0200 Message-ID: <20221205152450.1099-4-quic_mmitkov@quicinc.com> X-Mailer: git-send-email 2.37.3.windows.1 In-Reply-To: <20221205152450.1099-1-quic_mmitkov@quicinc.com> References: <20221205152450.1099-1-quic_mmitkov@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nasanex01a.na.qualcomm.com (10.52.223.231) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: lFryR7Lu_uXvdoeB65q9hc0segT3GVLF X-Proofpoint-ORIG-GUID: lFryR7Lu_uXvdoeB65q9hc0segT3GVLF X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.923,Hydra:6.0.545,FMLib:17.11.122.1 definitions=2022-12-05_01,2022-12-05_01,2022-06-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 bulkscore=0 mlxlogscore=999 phishscore=0 malwarescore=0 impostorscore=0 suspectscore=0 adultscore=0 clxscore=1015 mlxscore=0 spamscore=0 priorityscore=1501 lowpriorityscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2210170000 definitions=main-2212050127 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Milen Mitkov On SM8250 each VFE supports at least 3 RDI channels, or 4 in case of VFE-Lite, so add appropriate IRQ setup and handling. Signed-off-by: Milen Mitkov Reviewed-by: Robert Foss Tested-by: Bryan O'Donoghue Acked-by: Robert Foss --- .../media/platform/qcom/camss/camss-vfe-480.c | 61 ++++++++++++------- 1 file changed, 40 insertions(+), 21 deletions(-) diff --git a/drivers/media/platform/qcom/camss/camss-vfe-480.c b/drivers/media/platform/qcom/camss/camss-vfe-480.c index 3aa962b5663b..f70aad2e8c23 100644 --- a/drivers/media/platform/qcom/camss/camss-vfe-480.c +++ b/drivers/media/platform/qcom/camss/camss-vfe-480.c @@ -94,6 +94,8 @@ static inline int bus_irq_mask_0_comp_done(struct vfe_device *vfe, int n) #define RDI_WM(n) ((IS_LITE ? 0 : 23) + (n)) #define RDI_COMP_GROUP(n) ((IS_LITE ? 0 : 11) + (n)) +#define MAX_VFE_OUTPUT_LINES 4 + static u32 vfe_hw_version(struct vfe_device *vfe) { u32 hw_version = readl_relaxed(vfe->base + VFE_HW_VERSION); @@ -171,12 +173,26 @@ static inline void vfe_reg_update_clear(struct vfe_device *vfe, static void vfe_enable_irq_common(struct vfe_device *vfe) { - /* enable only the IRQs used: rup and comp_done irqs for RDI0 */ + /* enable reset ack IRQ and top BUS status IRQ */ writel_relaxed(IRQ_MASK_0_RESET_ACK | IRQ_MASK_0_BUS_TOP_IRQ, vfe->base + VFE_IRQ_MASK(0)); - writel_relaxed(BUS_IRQ_MASK_0_RDI_RUP(vfe, 0) | - BUS_IRQ_MASK_0_COMP_DONE(vfe, RDI_COMP_GROUP(0)), - vfe->base + VFE_BUS_IRQ_MASK(0)); +} + +static void vfe_enable_lines_irq(struct vfe_device *vfe) +{ + int i; + u32 bus_irq_mask = 0; + + for (i = 0; i < MAX_VFE_OUTPUT_LINES; i++) { + /* Enable IRQ for newly added lines, but also keep already running lines's IRQ */ + if (vfe->line[i].output.state == VFE_OUTPUT_RESERVED || + vfe->line[i].output.state == VFE_OUTPUT_ON) { + bus_irq_mask |= BUS_IRQ_MASK_0_RDI_RUP(vfe, i) + | BUS_IRQ_MASK_0_COMP_DONE(vfe, RDI_COMP_GROUP(i)); + } + } + + writel_relaxed(bus_irq_mask, vfe->base + VFE_BUS_IRQ_MASK(0)); } static void vfe_isr_reg_update(struct vfe_device *vfe, enum vfe_line_id line_id); @@ -193,6 +209,7 @@ static irqreturn_t vfe_isr(int irq, void *dev) { struct vfe_device *vfe = dev; u32 status; + int i; status = readl_relaxed(vfe->base + VFE_IRQ_STATUS(0)); writel_relaxed(status, vfe->base + VFE_IRQ_CLEAR(0)); @@ -207,11 +224,14 @@ static irqreturn_t vfe_isr(int irq, void *dev) writel_relaxed(status, vfe->base + VFE_BUS_IRQ_CLEAR(0)); writel_relaxed(1, vfe->base + VFE_BUS_IRQ_CLEAR_GLOBAL); - if (status & BUS_IRQ_MASK_0_RDI_RUP(vfe, 0)) - vfe_isr_reg_update(vfe, 0); + /* Loop through all WMs IRQs */ + for (i = 0; i < MSM_VFE_IMAGE_MASTERS_NUM; i++) { + if (status & BUS_IRQ_MASK_0_RDI_RUP(vfe, i)) + vfe_isr_reg_update(vfe, i); - if (status & BUS_IRQ_MASK_0_COMP_DONE(vfe, RDI_COMP_GROUP(0))) - vfe_isr_wm_done(vfe, 0); + if (status & BUS_IRQ_MASK_0_COMP_DONE(vfe, RDI_COMP_GROUP(i))) + vfe_isr_wm_done(vfe, i); + } } return IRQ_HANDLED; @@ -234,24 +254,23 @@ static int vfe_get_output(struct vfe_line *line) struct vfe_device *vfe = to_vfe(line); struct vfe_output *output; unsigned long flags; - int wm_idx; spin_lock_irqsave(&vfe->output_lock, flags); output = &line->output; - if (output->state != VFE_OUTPUT_OFF) { + if (output->state > VFE_OUTPUT_RESERVED) { dev_err(vfe->camss->dev, "Output is running\n"); goto error; } output->wm_num = 1; - wm_idx = vfe_reserve_wm(vfe, line->id); - if (wm_idx < 0) { - dev_err(vfe->camss->dev, "Can not reserve wm\n"); - goto error_get_wm; - } - output->wm_idx[0] = wm_idx; + /* Correspondence between VFE line number and WM number. + * line 0 -> RDI 0, line 1 -> RDI1, line 2 -> RDI2, line 3 -> PIX/RDI3 + * Note this 1:1 mapping will not work for PIX streams. + */ + output->wm_idx[0] = line->id; + vfe->wm_output_map[line->id] = line->id; output->drop_update_idx = 0; @@ -259,11 +278,9 @@ static int vfe_get_output(struct vfe_line *line) return 0; -error_get_wm: - vfe_release_wm(vfe, output->wm_idx[0]); - output->state = VFE_OUTPUT_OFF; error: spin_unlock_irqrestore(&vfe->output_lock, flags); + output->state = VFE_OUTPUT_OFF; return -EINVAL; } @@ -279,7 +296,7 @@ static int vfe_enable_output(struct vfe_line *line) vfe_reg_update_clear(vfe, line->id); - if (output->state != VFE_OUTPUT_OFF) { + if (output->state > VFE_OUTPUT_RESERVED) { dev_err(vfe->camss->dev, "Output is not in reserved state %d\n", output->state); spin_unlock_irqrestore(&vfe->output_lock, flags); @@ -360,6 +377,8 @@ static int vfe_enable(struct vfe_line *line) vfe->stream_count++; + vfe_enable_lines_irq(vfe); + mutex_unlock(&vfe->stream_lock); ret = vfe_get_output(line); @@ -566,7 +585,7 @@ static const struct camss_video_ops vfe_video_ops_480 = { static void vfe_subdev_init(struct device *dev, struct vfe_device *vfe) { vfe->video_ops = vfe_video_ops_480; - vfe->line_num = 1; + vfe->line_num = MAX_VFE_OUTPUT_LINES; } const struct vfe_hw_ops vfe_ops_480 = { From patchwork Mon Dec 5 15:24:50 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Milen Mitkov \(Consultant\)" X-Patchwork-Id: 632451 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B6FE8C63705 for ; Mon, 5 Dec 2022 15:27:28 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232399AbiLEP11 (ORCPT ); Mon, 5 Dec 2022 10:27:27 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58912 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232788AbiLEP1D (ORCPT ); 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Mon, 05 Dec 2022 15:25:25 +0000 Received: from nasanex01a.na.qualcomm.com (corens_vlan604_snip.qualcomm.com [10.53.140.1]) by NASANPPMTA02.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 2B5FPOXg014300 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 5 Dec 2022 15:25:24 GMT Received: from mmitkov.eu.qualcomm.com (10.80.80.8) by nasanex01a.na.qualcomm.com (10.52.223.231) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.36; Mon, 5 Dec 2022 07:25:20 -0800 From: To: , , , , , CC: , , , , , , , , Milen Mitkov Subject: [PATCH v6 4/4] media: camss: sm8250: Pipeline starting and stopping for multiple virtual channels Date: Mon, 5 Dec 2022 17:24:50 +0200 Message-ID: <20221205152450.1099-5-quic_mmitkov@quicinc.com> X-Mailer: git-send-email 2.37.3.windows.1 In-Reply-To: <20221205152450.1099-1-quic_mmitkov@quicinc.com> References: <20221205152450.1099-1-quic_mmitkov@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nasanex01a.na.qualcomm.com (10.52.223.231) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: gZMFSZX_sUlS6aeY2VPif-JJlO0JXJ2k X-Proofpoint-GUID: gZMFSZX_sUlS6aeY2VPif-JJlO0JXJ2k X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.923,Hydra:6.0.545,FMLib:17.11.122.1 definitions=2022-12-05_01,2022-12-05_01,2022-06-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxlogscore=865 bulkscore=0 adultscore=0 clxscore=1015 priorityscore=1501 phishscore=0 suspectscore=0 spamscore=0 lowpriorityscore=0 impostorscore=0 malwarescore=0 mlxscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2210170000 definitions=main-2212050127 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Milen Mitkov Use the multistream series function video_device_pipeline_alloc_start to allows multiple clients of the same pipeline. If the VFE entity is used by another instance of the pipeline, the pipeline won't be stopped. This allows for stopping and starting streams at any point without disrupting the other running streams. To prepare and start multiple virtual channels each CSID source pad corresponding to a virtual channel must be linked to the corresponding IFE entity. Note that on SM8250 each CSID is connected, at the hardware level, to only one IFE. Thus, you must use CSID1 with IFE1 and you can't use it with IFE0 for example. Example: the following media controller setup expects multiplexed sensor data on CSIPHY2. Data will be passed on to CSID0, which will demux it to 2 streams - for RDI0 and RD1 ports of IFE0.: media-ctl -v -d /dev/media0 -V '"imx577 '22-001a'":0[fmt:SRGGB10/3840x2160 field:none]' media-ctl -V '"msm_csiphy2":0[fmt:SRGGB10/3840x2160]' media-ctl -V '"msm_csid0":0[fmt:SRGGB10/3840x2160]' media-ctl -V '"msm_csid0":1[fmt:SRGGB10/3840x2160]' media-ctl -V '"msm_csid0":2[fmt:SRGGB10/3840x2160]' media-ctl -V '"msm_vfe0_rdi0":0[fmt:SRGGB10/3840x2160]' media-ctl -V '"msm_vfe0_rdi1":0[fmt:SRGGB10/3840x2160]' media-ctl -l '"msm_csiphy2":1->"msm_csid0":0[1]' media-ctl -l '"msm_csid0":1->"msm_vfe0_rdi0":0[1]' media-ctl -l '"msm_csid0":2->"msm_vfe0_rdi1":0[1]' Note: CSID's entity pad 0 is a sink pad, pads 1..4 are source pads To start streaming a v4l2 client must open the corresponding /dev/videoN node. For example, with yavta: yavta -B capture-mplane -c -I -n 5 -f SRGGB10P -s 3840x2160 -F /dev/video0 yavta -B capture-mplane -c -I -n 5 -f SRGGB10P -s 3840x2160 -F /dev/video1 Note that IFEs (vfe0, vfe1) on SM8250 have 3 RDI ports and a single PIX port and IFELites (vfe2, vfe3) have 4 RDI ports and no PIX port. Signed-off-by: Milen Mitkov Reviewed-by: Robert Foss Tested-by: Bryan O'Donoghue Acked-by: Robert Foss --- .../media/platform/qcom/camss/camss-video.c | 21 ++++++++++++++++--- 1 file changed, 18 insertions(+), 3 deletions(-) diff --git a/drivers/media/platform/qcom/camss/camss-video.c b/drivers/media/platform/qcom/camss/camss-video.c index 41deda232e4a..12ac7d4d755e 100644 --- a/drivers/media/platform/qcom/camss/camss-video.c +++ b/drivers/media/platform/qcom/camss/camss-video.c @@ -351,6 +351,7 @@ static int video_get_subdev_format(struct camss_video *video, if (subdev == NULL) return -EPIPE; + memset(&fmt, 0, sizeof(fmt)); fmt.pad = pad; fmt.which = V4L2_SUBDEV_FORMAT_ACTIVE; @@ -493,9 +494,11 @@ static int video_start_streaming(struct vb2_queue *q, unsigned int count) struct v4l2_subdev *subdev; int ret; - ret = video_device_pipeline_start(vdev, &video->pipe); - if (ret < 0) + ret = video_device_pipeline_alloc_start(vdev); + if (ret < 0) { + dev_err(video->camss->dev, "Failed to start media pipeline: %d\n", ret); goto flush_buffers; + } ret = video_check_format(video); if (ret < 0) @@ -537,6 +540,7 @@ static void video_stop_streaming(struct vb2_queue *q) struct media_entity *entity; struct media_pad *pad; struct v4l2_subdev *subdev; + int ret; entity = &vdev->entity; while (1) { @@ -551,7 +555,18 @@ static void video_stop_streaming(struct vb2_queue *q) entity = pad->entity; subdev = media_entity_to_v4l2_subdev(entity); - v4l2_subdev_call(subdev, video, s_stream, 0); + ret = v4l2_subdev_call(subdev, video, s_stream, 0); + + if (entity->use_count > 1) { + /* Don't stop if other instances of the pipeline are still running */ + dev_dbg(video->camss->dev, "Video pipeline still used, don't stop streaming.\n"); + return; + } + + if (ret) { + dev_err(video->camss->dev, "Video pipeline stop failed: %d\n", ret); + return; + } } video_device_pipeline_stop(vdev);