From patchwork Fri Dec 16 21:42:09 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 634454 Delivered-To: patch@linaro.org Received: by 2002:a17:522:c983:b0:460:3032:e3c4 with SMTP id kr3csp1079953pvb; Fri, 16 Dec 2022 14:10:57 -0800 (PST) X-Google-Smtp-Source: AA0mqf6qIy3c455L/r9xyxg7O0lhn438iK9H7smL1sCgqK5zVbUaKd4eeANZtL4k+XUoeBaVTfqe X-Received: by 2002:a0c:e750:0:b0:4c6:a49e:c255 with SMTP id g16-20020a0ce750000000b004c6a49ec255mr40310129qvn.35.1671228656862; Fri, 16 Dec 2022 14:10:56 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1671228656; cv=none; d=google.com; s=arc-20160816; b=myDS6WUHmPW2It7kZQDM0dktbY9lq0OYI5IixJeAprkipi8hHNwRUeIZYScp0MA2W0 cnZDJypHWwYLtRZ+MEsEB7ewjxft8JL636CLpECseEJqe/sS5l0wOz9OdK7kWdWADwp/ 6ty+Y5ypvsb5TwRKDRGuqriCB7fNPqvrVQggCBm/IFlTN+wFBZEJD6xU0qqeybR0u/KI LRQyQ/11Fcq39NueaIpUzSiZq/IeiVSVu83M7YIlaPXBj/MuQSkNwxaMjqqFJiocE1cp xS8R6Bvx38YKZPr1uUNvvQW00Ca/4FpBWS6LnsJXfidDqh6gqMg+qjDYQXRGsWPjqo/3 WCSQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=VztGF32a3KriOcGzpvK3NxYNTE7OoAN19xqfTq2WZ4s=; b=Ea58i2duUHv1w2jssVA+2knwRs77OlHyGYm4tmgZ7SO1AiO0xqiwcUdcmAOS1g0TJ1 Xkhn5Mfb16ANmXCh7D/oebDUmxqaS0oa8PGi4KJjY1DVmCz+QANjMAF/wu5xNFTpVrwj Ak9TCVjcOIQPJkoMTojFMe20ASW7iKnE3mDS5p2qQGggB/AJr+QcH2nx+Kk4BIs50a3/ E8fSHdtuhwfRaRZTPIwUd2O86kc+IEjlzI6T8KU8bm6I8pIsMexC92Tjez1kSTXH7sUU xktWcrKopyWzjFzfmTlrqsvq1x4W7hWt+qwROI8AbE7/RBGgdMGRmY+eGVif5W+td3rC XZtw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=hkrEwZeq; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id hu11-20020a056214234b00b004c738885744si1624239qvb.64.2022.12.16.14.10.56 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Fri, 16 Dec 2022 14:10:56 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=hkrEwZeq; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1p6IU1-0005zX-25; Fri, 16 Dec 2022 16:43:09 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1p6ITj-0005vL-E1 for qemu-devel@nongnu.org; Fri, 16 Dec 2022 16:42:53 -0500 Received: from mail-wm1-x330.google.com ([2a00:1450:4864:20::330]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1p6ITg-0000ag-Uu for qemu-devel@nongnu.org; Fri, 16 Dec 2022 16:42:50 -0500 Received: by mail-wm1-x330.google.com with SMTP id ay14-20020a05600c1e0e00b003cf6ab34b61so5001037wmb.2 for ; Fri, 16 Dec 2022 13:42:48 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=VztGF32a3KriOcGzpvK3NxYNTE7OoAN19xqfTq2WZ4s=; b=hkrEwZeqSY3AbJL8JNf9sEqouXYxmQER+aBwTc93FOKBPHa9NJQWLJh5KcXFbFhvIw 2At5DZzlRXieDTVpZ/tZFcqu5WK3255/8ApmFrwlf5X30CsTF/cK2ckAmWLzPfqXCYx4 5ozVovpmX5cqA9wEtzEM7BtI2HEnHcBptY5DAO0jI6HD/79URPCQc3xanFu1j0Ot4iy6 2SYo+OvrvrTT0LJmNiotRDnyKdDCZAhd7Jp32QQfIGzRBITjc75eYuiKP4WZziNEKGb5 YIZPdtZLl+7Nb6TltXAL7IVeSwalaxXUyNep3x/6lCEyizdrXbYbLIu/w8cK688Ubcy1 SdVQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=VztGF32a3KriOcGzpvK3NxYNTE7OoAN19xqfTq2WZ4s=; b=zwey4XMU73tHJAHCgxnUmVADSAnmevQngiZweT2tJwHBoq9pDWQ7UCjuQS73c+48tm M39c4NGvNcyBJOTbY10CoaJKp1SD2OlSuKnRyYMa4/12iwBoQnjp4pE7CqhsgC5kTATi 21Nso0YtM29q4EL1mGh0f6JKse31gISymYRMcPcYDD+Qvcm0TeZmZJ984aCqWoasDYw8 o6R5+9gzlfs8MSF+r1f7evnu4jTzLuROZVzEGDA7vCcG+ISKMRp++waPPm9vYoPeMY6j zYi74nyuHcDt8dcIXQpPTBkeFj4qn5/2o79pWGnovynbB79VvaRvlwmPdyJcvJjtNtD2 iiOQ== X-Gm-Message-State: ANoB5pktq1+YUNE063Qo5gekOwVOTHGCBD3Yi9yTY5d2knWGntuQRhfx otb3vhrKOiow025DMmw0BYlAjUSs9zN2Jyit X-Received: by 2002:a05:600c:2252:b0:3d2:196c:270c with SMTP id a18-20020a05600c225200b003d2196c270cmr20402078wmm.31.1671226967308; Fri, 16 Dec 2022 13:42:47 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id y7-20020a05600c364700b003d33ab317dasm4135263wmq.14.2022.12.16.13.42.46 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 16 Dec 2022 13:42:46 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 01/36] hw/s390x/s390-pci-inst.c: Use device_cold_reset() to reset PCI devices Date: Fri, 16 Dec 2022 21:42:09 +0000 Message-Id: <20221216214244.1391647-2-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221216214244.1391647-1-peter.maydell@linaro.org> References: <20221216214244.1391647-1-peter.maydell@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::330; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x330.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org The semantic difference between the deprecated device_legacy_reset() function and the newer device_cold_reset() function is that the new function resets both the device itself and any qbuses it owns, whereas the legacy function resets just the device itself and nothing else. In s390-pci-inst.c we use device_legacy_reset() to reset an S390PCIBusDevice. This device doesn't have any child qbuses, so the functions do the same thing and we can stop using the deprecated one. Reviewed-by: Matthew Rosato Signed-off-by: Peter Maydell --- hw/s390x/s390-pci-inst.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/s390x/s390-pci-inst.c b/hw/s390x/s390-pci-inst.c index 66e764f9016..9abe95130c5 100644 --- a/hw/s390x/s390-pci-inst.c +++ b/hw/s390x/s390-pci-inst.c @@ -272,7 +272,7 @@ int clp_service_call(S390CPU *cpu, uint8_t r2, uintptr_t ra) stw_p(&ressetpci->hdr.rsp, CLP_RC_SETPCIFN_FHOP); goto out; } - device_legacy_reset(DEVICE(pbdev)); + device_cold_reset(DEVICE(pbdev)); pbdev->fh &= ~FH_MASK_ENABLE; pbdev->state = ZPCI_FS_DISABLED; stl_p(&ressetpci->fh, pbdev->fh); From patchwork Fri Dec 16 21:42:10 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 634460 Delivered-To: patch@linaro.org Received: by 2002:a17:522:c983:b0:460:3032:e3c4 with SMTP id kr3csp1080834pvb; Fri, 16 Dec 2022 14:12:53 -0800 (PST) X-Google-Smtp-Source: AA0mqf4Wl8dOTX/ofeLv0/jUP5eiELWxvxkzlIfq1Z5r19fKRi6ZduBVdgpI7APy40iqwwWvMLvK X-Received: by 2002:a05:6214:5cc5:b0:4c7:8122:b4be with SMTP id lk5-20020a0562145cc500b004c78122b4bemr42553383qvb.16.1671228773034; Fri, 16 Dec 2022 14:12:53 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1671228773; cv=none; d=google.com; s=arc-20160816; b=mRl4h9375Z0bMCzaPndGgagdDCbUVmxSMK3Gn9m3e4Im72Q7oSSic+xfSAaLWFGzYZ TzAwSyQJZrr7FsFdYXjdAnwcvJLlrG6lw4tR6AaodaehvdSbuCjlT9UFGykS+wQyoblv dS9FfL3eYeLlYK9SPpjEaRgmKuT2A2APG2mSt3hZubi0cTWkcmBmsLglySfOqvmVWbv8 HfMAomQEkK+eFFGzno75ATxU5hrEO0jMsCVHeL/Qrg+gVihCjytTPug76BxkdazJaUEd SdGX8YtzHmhPCSys5YphzJ0z/WYsOIfESXg58sknSD2Vo7jGjjG39UDDROzcOtk3MSGN Fd7Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=w2wDSdFPCVKSJxok1ajjwKeJYPQLxC628rf9HNcdV6c=; b=O+c6ZFWhDh8cFbJoERm5YbCj2cN/lpewaMTn42v0fpRvOs0OXYTNafZYHZbREbp45m vLoJb0b6JWXvoAdpmvg2Kar62OILNaHOlWFw3dnY3uUjhE3qD9q9tmABA/gmG/mziHg3 Lid/Am31LcDZng6ai3FsTfCVg2gz71/F7siOFYka+bS/uYq1gcLFFcHBlK//HS85h5Ax ZtEspobUQP5hJ690KZ2TAus07MxaO1T2Mg7p+2ghnMwIYEnaMsr5islu0ivrZjaTGvpn eU3FJ35nMO7J3J6o3i1n24qifeqP1aGjkUTfsEq7EbEXIG46lljyDeYSrmD5OMFuzLLx l9vw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=TriZc+aS; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id t18-20020a37ea12000000b006fab17b19f4si1430568qkj.350.2022.12.16.14.12.52 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Fri, 16 Dec 2022 14:12:53 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=TriZc+aS; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1p6IU6-00062J-8J; Fri, 16 Dec 2022 16:43:14 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1p6ITn-0005vt-43 for qemu-devel@nongnu.org; Fri, 16 Dec 2022 16:43:00 -0500 Received: from mail-wm1-x329.google.com ([2a00:1450:4864:20::329]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1p6ITi-0000aj-Gb for qemu-devel@nongnu.org; Fri, 16 Dec 2022 16:42:52 -0500 Received: by mail-wm1-x329.google.com with SMTP id bg10so2757352wmb.1 for ; Fri, 16 Dec 2022 13:42:49 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=w2wDSdFPCVKSJxok1ajjwKeJYPQLxC628rf9HNcdV6c=; b=TriZc+aSjCoL2CAUEgtfCW8ynwCVA4rO5WOuNzijboXViEUhZcyT+LUJYQhyo4b8QX HFPMSR+F4qAz6WZPZUe493k7a11q0KRxwSfcfnn6MPi73hyjQrXlR4ZoKFq7vhLGZCzi MTxE1jbwSa0ui7KOkrvc0fEqxNvfThMZ3sNPvCpdjqZewL8ANVE5RelYPIGINZz1T5uj SfFam0Aarb2Z7I6SDsSUGmiZHHerS6UMhlL9lwZk7jQZW7OcpaMMxuwoUJobWPpgXmoV l+cNS01L1KkSa+bb9l+aTnB0411gSQJkMGFmfK6YbDSPASasYpSdU6RRdovJ+pQo+MWt PAjQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=w2wDSdFPCVKSJxok1ajjwKeJYPQLxC628rf9HNcdV6c=; b=R+VMNlBCoDsoROThmY4nFe4jTJH32Dw69/qLtdu/jiNhHMipL30ZldFS64vAbgMJkL e5i++EGAFlvTYNza9QYUSHALI/pgmVEYJH5yhY8xsq4pFj8O+PALvXtQ8OuWyjM7aelR yM6lT4zk1LqNxhVe919DxYAXfU/RTrbjgvGc/A0RfbPmy95UoPp2uh7pl+OO7p6QUJug o+HWYxCj7pBxazOJKVwMnm5QNNrWAqf39CxYbOzFhaibZiE0uEN9y5HXwMnkMVJPZmBx Bk9CdznDSu/WpYmkJNt0CT0OBDHl/sCHpe1dLyegEQd7V5D1iJOfbXkNzqJi88VknCLH FrzA== X-Gm-Message-State: ANoB5plWeoMpmo7fgNTE9VfjxUp6HbSR31cE9CYn9/Ya/xstkapqaU1f jrV5eRxwdsEFWZoFwZ5b9pj1OrLn36FftAkf X-Received: by 2002:a05:600c:4451:b0:3cf:894d:1d06 with SMTP id v17-20020a05600c445100b003cf894d1d06mr27935399wmn.30.1671226968110; Fri, 16 Dec 2022 13:42:48 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id y7-20020a05600c364700b003d33ab317dasm4135263wmq.14.2022.12.16.13.42.47 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 16 Dec 2022 13:42:47 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 02/36] pci: Use device_cold_reset() and bus_cold_reset() Date: Fri, 16 Dec 2022 21:42:10 +0000 Message-Id: <20221216214244.1391647-3-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221216214244.1391647-1-peter.maydell@linaro.org> References: <20221216214244.1391647-1-peter.maydell@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::329; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x329.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org In the PCI subsystem we currently use the legacy function qdev_reset_all() and qbus_reset_all(). These perform a recursive reset, starting from either a qbus or a qdev. However they do not permit any of the devices in the tree to use three-phase reset, because device reset goes through the device_legacy_reset() function that only calls the single DeviceClass::reset method. Switch to using the device_cold_reset() and bus_cold_reset() functions. These also perform a recursive reset, where first the children are reset and then finally the parent, but they use the new (...in 2020...) Resettable mechanism, which supports both the old style single-reset method and also the new 3-phase reset handling. This should be a no-behaviour-change commit which just reduces the use of a deprecated API. Commit created with: sed -i -e 's/qdev_reset_all/device_cold_reset/g;s/qbus_reset_all/bus_cold_reset/g' hw/pci/*.c Signed-off-by: Peter Maydell --- hw/pci/pci.c | 6 +++--- hw/pci/pci_bridge.c | 2 +- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/hw/pci/pci.c b/hw/pci/pci.c index e6292d8060b..c61348dca01 100644 --- a/hw/pci/pci.c +++ b/hw/pci/pci.c @@ -378,14 +378,14 @@ static void pci_do_device_reset(PCIDevice *dev) */ void pci_device_reset(PCIDevice *dev) { - qdev_reset_all(&dev->qdev); + device_cold_reset(&dev->qdev); pci_do_device_reset(dev); } /* * Trigger pci bus reset under a given bus. - * Called via qbus_reset_all on RST# assert, after the devices - * have been reset qdev_reset_all-ed already. + * Called via bus_cold_reset on RST# assert, after the devices + * have been reset device_cold_reset-ed already. */ static void pcibus_reset(BusState *qbus) { diff --git a/hw/pci/pci_bridge.c b/hw/pci/pci_bridge.c index da34c8ebcd1..b2b180edd61 100644 --- a/hw/pci/pci_bridge.c +++ b/hw/pci/pci_bridge.c @@ -275,7 +275,7 @@ void pci_bridge_write_config(PCIDevice *d, newctl = pci_get_word(d->config + PCI_BRIDGE_CONTROL); if (~oldctl & newctl & PCI_BRIDGE_CTL_BUS_RESET) { /* Trigger hot reset on 0->1 transition. */ - qbus_reset_all(BUS(&s->sec_bus)); + bus_cold_reset(BUS(&s->sec_bus)); } } From patchwork Fri Dec 16 21:42:11 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 634488 Delivered-To: patch@linaro.org Received: by 2002:a17:522:c983:b0:460:3032:e3c4 with SMTP id kr3csp1087308pvb; Fri, 16 Dec 2022 14:30:00 -0800 (PST) X-Google-Smtp-Source: AMrXdXuDpVVpXWArLILqNNckVzyv+ntJiTOytnAft9IzLPpAF/rZzmIbZ3fP22cTWgTjjq/fSIpv X-Received: by 2002:a05:622a:254:b0:3a7:f93a:df8 with SMTP id c20-20020a05622a025400b003a7f93a0df8mr2143598qtx.61.1671229800134; Fri, 16 Dec 2022 14:30:00 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1671229800; cv=none; d=google.com; s=arc-20160816; b=T0ZA3VhSbX8yFID0er9NPmh2sdnLVsTJEgbsr+GDVjbTmf619IFY7GkHse8XM+9CpY 4lCXOg49/irinS0pZMSRXZ3ZOuqWrKqzhEE32bqYNXz+RvdOnagt6Mr3Qzfl+p27boIG BxLq0CPB0mwwifoLOARiGmZGQXsBeGv0eEgQZf2XiXWuqhAURKoVmj4LiBxsJf8jjCNC X7M247UPE02ximcbubZpPbjZIlcWXeb/635deX3Xv5vqKqNGTvFci+8ijJ2GiZFUl/N5 SUKLqyHrqTBE3V2UKetvXFdyTrZHcf6+A4gLXymZ2TTj7os63+p11TEg5yT5bZ+h5XW1 XA3g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=IHmzyE2rDA35kdIKQ9Wr9fAtvPOkZTN4VnNyKqozwiU=; b=0mSYXXmCX+JDeQ7nFAWmpJdKI1MWewPeFibVIMwin5Bw1wTrbliWpQbiRXeYFOw7FP RUiDdEX4hg7XdTxEaznLUQeCzJUA9Z3/Q4VPGgEC1CYdYEGELStqw8pjrhuOt7kNGc1P kq/mHbMz3c04THqpRQqzaEAISK8UWSbtDheDJdjHN2nrKkFd93bqeHd86zXrsxcUM7jP ExHXyyq5bU45r6ThG4A24cnYvrhidXDD9SDTHN0q5ErphijdyzW9pu9vZAAwXxfphqBc IgmqyhaBYufeRw+mC5HJhGaVRrCSLddtpKi5tNznj98KHL1Or2d5NxhbWv1XyFkkcTxJ mXuw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=zq1V6yKc; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id k8-20020a05620a414800b006ff0b187ba3si1690310qko.199.2022.12.16.14.30.00 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Fri, 16 Dec 2022 14:30:00 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=zq1V6yKc; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1p6IU2-00060h-BE; Fri, 16 Dec 2022 16:43:10 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1p6ITn-0005vs-6X for qemu-devel@nongnu.org; Fri, 16 Dec 2022 16:43:00 -0500 Received: from mail-wm1-x333.google.com ([2a00:1450:4864:20::333]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1p6ITi-0000ar-H4 for qemu-devel@nongnu.org; Fri, 16 Dec 2022 16:42:52 -0500 Received: by mail-wm1-x333.google.com with SMTP id v124-20020a1cac82000000b003cf7a4ea2caso4974247wme.5 for ; Fri, 16 Dec 2022 13:42:50 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=IHmzyE2rDA35kdIKQ9Wr9fAtvPOkZTN4VnNyKqozwiU=; b=zq1V6yKcG1RQwRej87Vri7480OhdoOMsyYXLfG7KoiwGLhS1Ney1DH0Kvf/xExDih3 4P8GnDJlLZl+M3CW0dRNGwexF7kOEHtCR6joYOMbvr//zdJ/bgenQQkxNdQxeQHHdBRe +IMJqu/IznUjmqJhpVYNX6O6uNZPsXKE814BmguxfJSvj9HnGvoeI4CHb3fsUd42DWNa cyjICycuBkurfsPIRz9xYOk3f9xgDUyedIudGZAXnNeXIXy2YrkLdqUTXP9n31PlTtMh XcKHyQc/0pxnLDQyXxJE29XeeGO/mjUu+h12HcXoLAGJQ/2BwJW8M5AyVVOCRebhJM7l F6vQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=IHmzyE2rDA35kdIKQ9Wr9fAtvPOkZTN4VnNyKqozwiU=; b=b8/PikDHs7Qbfk3JZSD/0Z0kLz7mDbMfLhaAHiFmoSJKT5wsbVt3AIu18ZIlugVYtN Y8woLlMeooaE5No8ztNRZK7v6qwi+76ERT8EvLOwK/WDB0vrgvCAlCDswTFvb+JU518k nlahCwJVIMmIUhPtlzF5uqSHP4oyYH06Cm/MUFDwgF+BjAfM05Lo0iDG8VV9XtTBygYB IGFHZUAQ48OTZ037WHmsH1Vbq9vnHj+P8zfUMMeZbmh6MalkSZ6MC6o78rSrpzt9wgEZ PjxW9RHDEl1wqos2EOIt3AmZIJCNUk5C5gf0nNsMOysTQOCZzkw7+KVci37MxoopMR62 WDWA== X-Gm-Message-State: ANoB5plCXGoXoIDidPv2ZhpCv2sb3YeZ/m16LhxzDLsL3i6fWyTa3wJ3 LEFR1JGnDO3R5dQkJrBICdvv6BfTn+fosmHJ X-Received: by 2002:a7b:cd8f:0:b0:3d1:baf7:ceae with SMTP id y15-20020a7bcd8f000000b003d1baf7ceaemr26923967wmj.39.1671226969011; Fri, 16 Dec 2022 13:42:49 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id y7-20020a05600c364700b003d33ab317dasm4135263wmq.14.2022.12.16.13.42.48 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 16 Dec 2022 13:42:48 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 03/36] hw/hyperv/vmbus: Use device_cold_reset() and bus_cold_reset() Date: Fri, 16 Dec 2022 21:42:11 +0000 Message-Id: <20221216214244.1391647-4-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221216214244.1391647-1-peter.maydell@linaro.org> References: <20221216214244.1391647-1-peter.maydell@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::333; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x333.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org In the vmbus code we currently use the legacy functions qdev_reset_all() and qbus_reset_all(). These perform a recursive reset, starting from either a qbus or a qdev. However they do not permit any of the devices in the tree to use three-phase reset, because device reset goes through the device_legacy_reset() function that only calls the single DeviceClass::reset method. Switch to using the device_cold_reset() and bus_cold_reset() functions. These also perform a recursive reset, where first the children are reset and then finally the parent, but they use the new (...in 2020...) Resettable mechanism, which supports both the old style single-reset method and also the new 3-phase reset handling. This should be a no-behaviour-change commit which just reduces the use of a deprecated API. Commit created with: sed -i -e 's/qdev_reset_all/device_cold_reset/g;s/qbus_reset_all/bus_cold_reset/g' hw/hyperv/*.c Signed-off-by: Peter Maydell --- hw/hyperv/vmbus.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/hw/hyperv/vmbus.c b/hw/hyperv/vmbus.c index 8ee08aea46c..271289f902f 100644 --- a/hw/hyperv/vmbus.c +++ b/hw/hyperv/vmbus.c @@ -1578,7 +1578,7 @@ static bool vmbus_initialized(VMBus *vmbus) static void vmbus_reset_all(VMBus *vmbus) { - qbus_reset_all(BUS(vmbus)); + bus_cold_reset(BUS(vmbus)); } static void post_msg(VMBus *vmbus, void *msgdata, uint32_t msglen) @@ -2035,7 +2035,7 @@ static void vdev_reset_on_close(VMBusDevice *vdev) } /* all channels closed -- reset device */ - qdev_reset_all(DEVICE(vdev)); + device_cold_reset(DEVICE(vdev)); } static void handle_close_channel(VMBus *vmbus, vmbus_message_close_channel *msg, From patchwork Fri Dec 16 21:42:12 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 634437 Delivered-To: patch@linaro.org Received: by 2002:a17:522:c983:b0:460:3032:e3c4 with SMTP id kr3csp1068589pvb; Fri, 16 Dec 2022 13:43:55 -0800 (PST) X-Google-Smtp-Source: AA0mqf41/Bvy3/uXIPg4f+chyuVV59ENEmjhKe8rCIicU5CRf0Z+7NGprfzRyBtdrmV7u63wxi3l X-Received: by 2002:ac8:7650:0:b0:3a7:e043:2d1b with SMTP id i16-20020ac87650000000b003a7e0432d1bmr47522080qtr.14.1671227035327; Fri, 16 Dec 2022 13:43:55 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1671227035; cv=none; d=google.com; s=arc-20160816; b=n3QNBe48zGi4He/hTpXEjVwkjoKdHphfxufoan9EWpgQOBx2CpN0v7SdJbfYXXjclW dzNZVEwnqlb5Lf7NBv1eMSZQaIuO32xbGqTc8CL6soGRtFmYgc2nH3FaNegO/lYkLEUp NF9CrVyRUbX6/eboBWBoLbDwLhuF8xsJsYxNtY+8PvnuysashVJwqBBrdH3TR1m/v/6k fgktnWv/VZ6qUUfw1fkgXWe+vbF5zbBFEgIYHtW96QNzrjZIjk/hU8yOs4z2ruhtHfQi tRJvU+bMiXjrUHEjHYGE74g83HHxDbdrOJ3N4Hq5UENEQ35wPxqigMBRQjnQ/QVpWGZx CvPg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=kcDNWul230g1IVkNvMU6uv+Q0A4IDRbxHNgR7Lo8f4I=; b=cuJ86H0rcucgPBOD8gERyfbkC8M6Gj7q8v2bDNhKNQOnj6G1Cn2/p8jY1gaMQLXhJc 35HbGXckUC+PxqJT4jEEZslOdH3fHqnl+dpcgzhzJRaRnNUgkIxnxd0/bDNu3VvD1Yu2 rtB/VkVPtY7gqcWNCleLxlpSvPka7PQqRtZSvLh0ttfd7Lk3XF3b65eSEWMU9YsmSAQK ziwPaH2FpPqo3cf0l+ubRTTkGQ900TKpX8NpuuzRoAT2za3ogwp1CtB3xe2RVnhLy7Z8 LzeYsf5oJ0V/FvzbJHQD0BR1CB8LzZ5E9uO4tyM+wa5sYb5lVpcaXIAhsb7GCI9s7Z67 uGEQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=juDv0skZ; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id x22-20020a05620a259600b006e3fcaa9da4si1510840qko.41.2022.12.16.13.43.55 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Fri, 16 Dec 2022 13:43:55 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=juDv0skZ; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1p6IUb-0006Dh-E3; Fri, 16 Dec 2022 16:43:45 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1p6ITn-0005vu-4Z for qemu-devel@nongnu.org; Fri, 16 Dec 2022 16:42:59 -0500 Received: from mail-wm1-x32a.google.com ([2a00:1450:4864:20::32a]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1p6ITj-0000b3-H8 for qemu-devel@nongnu.org; Fri, 16 Dec 2022 16:42:54 -0500 Received: by mail-wm1-x32a.google.com with SMTP id ja17so2736093wmb.3 for ; Fri, 16 Dec 2022 13:42:51 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=kcDNWul230g1IVkNvMU6uv+Q0A4IDRbxHNgR7Lo8f4I=; b=juDv0skZXjsshTGgySybu7ZeHIN26bAep0mzWhhX40uI9PJkXH0kz9bgga1neOn/GD CsSs41YAnUi5VCahRfREFaY+ziMR38X+EvMq8jADnR827dMOJD6khj6etsvgE8FR79ie RCim74SP2/10zmWTKC5n7qwMb/kkiUL/TUknDUXnj9TNa3bOyoW03mOGurhuS/J+fqPc JlW1jrMevoOreWkq/cX05wNn3HBOqZZ9iEEeYDMoXSVm5sK2n0magu7mGi0bF09fz9oH W1IKkaI5Qx1hZNtOk2cW7HOrniri2KcAi0gI7Z+4HohOomkAsoXq7Q9lGKF4F6EEbCk7 jbnQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=kcDNWul230g1IVkNvMU6uv+Q0A4IDRbxHNgR7Lo8f4I=; b=JoelUuPUg8Z39Ykv1OUjnVOh2jIQp5E19BUI8aliI6mIQacxkJ1kS4Frn33PfdtTuv 45VfYwOQ/SROree0HeJBhXSAMQGVfKuoNMni2xCzA1TenQ4WDVLp54jKKLFvI/GJy5XW GVTsJN/iNaVXytuXXEJx6Yi1ZoVmZt8qpZLDlWu9H1AmQxIoGeNQ4mdPHs5W9912E9Rp JPMaEMdaoKq2gw2cAqcUFxv/pjwO6/CHaSANClmpBufGXXYMoAJiIOKY6S86qqc1eFzs LduLvVo7RmangdA097gDJ6DvyhLc3ZJm5gHMJZyADyPGdsFHKx6pbeSZik0Mh8vj0fLa 1XNA== X-Gm-Message-State: AFqh2kp8YW3sNh4FW96aVuzRzSF0JK7UOvJ5CkoNHovi0R9wgo9KHBYi hFhn9MZjTHKeG7fv2tifxN9jjLMDaxNVp4Ym X-Received: by 2002:a05:600c:4d8a:b0:3d3:3d51:7d44 with SMTP id v10-20020a05600c4d8a00b003d33d517d44mr4869310wmp.33.1671226969986; Fri, 16 Dec 2022 13:42:49 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id y7-20020a05600c364700b003d33ab317dasm4135263wmq.14.2022.12.16.13.42.49 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 16 Dec 2022 13:42:49 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 04/36] Replace use of qdev_reset_all() with device_cold_reset() Date: Fri, 16 Dec 2022 21:42:12 +0000 Message-Id: <20221216214244.1391647-5-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221216214244.1391647-1-peter.maydell@linaro.org> References: <20221216214244.1391647-1-peter.maydell@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32a; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x32a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org The legacy function qdev_reset_all() performs a recursive reset, starting from a qdev. However, it does not permit any of the devices in the tree to use three-phase reset, because device reset goes through the device_legacy_reset() function that only calls the single DeviceClass::reset method. Switch to using the device_cold_reset() function instead. This also performs a recursive reset, where first the children are reset and then finally the parent, but it uses the new (...in 2020...) Resettable mechanism, which supports both the old style single-reset method and also the new 3-phase reset handling. This commit changes the five remaining uses of this function. Commit created with: sed -i -e 's/qdev_reset_all/device_cold_reset/g' hw/i386/xen/xen_platform.c hw/input/adb.c hw/remote/vfio-user-obj.c hw/s390x/s390-virtio-ccw.c hw/usb/dev-uas.c Signed-off-by: Peter Maydell --- hw/i386/xen/xen_platform.c | 2 +- hw/input/adb.c | 2 +- hw/remote/vfio-user-obj.c | 2 +- hw/s390x/s390-virtio-ccw.c | 2 +- hw/usb/dev-uas.c | 2 +- 5 files changed, 5 insertions(+), 5 deletions(-) diff --git a/hw/i386/xen/xen_platform.c b/hw/i386/xen/xen_platform.c index a64265cca07..7db0d94ec28 100644 --- a/hw/i386/xen/xen_platform.c +++ b/hw/i386/xen/xen_platform.c @@ -177,7 +177,7 @@ static void pci_xen_ide_unplug(DeviceState *dev, bool aux) blk_unref(blk); } } - qdev_reset_all(dev); + device_cold_reset(dev); } static void unplug_disks(PCIBus *b, PCIDevice *d, void *opaque) diff --git a/hw/input/adb.c b/hw/input/adb.c index 84331b9fce6..214ae6f42b3 100644 --- a/hw/input/adb.c +++ b/hw/input/adb.c @@ -43,7 +43,7 @@ static const char *adb_commands[] = { static void adb_device_reset(ADBDevice *d) { - qdev_reset_all(DEVICE(d)); + device_cold_reset(DEVICE(d)); } static int do_adb_request(ADBBusState *s, uint8_t *obuf, const uint8_t *buf, diff --git a/hw/remote/vfio-user-obj.c b/hw/remote/vfio-user-obj.c index 6d0310cec97..fe1fdfb5f70 100644 --- a/hw/remote/vfio-user-obj.c +++ b/hw/remote/vfio-user-obj.c @@ -678,7 +678,7 @@ static int vfu_object_device_reset(vfu_ctx_t *vfu_ctx, vfu_reset_type_t type) return 0; } - qdev_reset_all(DEVICE(o->pci_dev)); + device_cold_reset(DEVICE(o->pci_dev)); return 0; } diff --git a/hw/s390x/s390-virtio-ccw.c b/hw/s390x/s390-virtio-ccw.c index 2e64ffab45e..fab79045dd0 100644 --- a/hw/s390x/s390-virtio-ccw.c +++ b/hw/s390x/s390-virtio-ccw.c @@ -118,7 +118,7 @@ static void subsystem_reset(void) for (i = 0; i < ARRAY_SIZE(reset_dev_types); i++) { dev = DEVICE(object_resolve_path_type("", reset_dev_types[i], NULL)); if (dev) { - qdev_reset_all(dev); + device_cold_reset(dev); } } } diff --git a/hw/usb/dev-uas.c b/hw/usb/dev-uas.c index 5192b062d6f..88f99c05d53 100644 --- a/hw/usb/dev-uas.c +++ b/hw/usb/dev-uas.c @@ -791,7 +791,7 @@ static void usb_uas_task(UASDevice *uas, uas_iu *iu) case UAS_TMF_LOGICAL_UNIT_RESET: trace_usb_uas_tmf_logical_unit_reset(uas->dev.addr, tag, lun); - qdev_reset_all(&dev->qdev); + device_cold_reset(&dev->qdev); usb_uas_queue_response(uas, tag, UAS_RC_TMF_COMPLETE); break; From patchwork Fri Dec 16 21:42:13 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 634500 Delivered-To: patch@linaro.org Received: by 2002:a17:522:c983:b0:460:3032:e3c4 with SMTP id kr3csp1088637pvb; Fri, 16 Dec 2022 14:33:23 -0800 (PST) X-Google-Smtp-Source: AA0mqf5phjZNjVELDFnEteY3ks+wWRYrr7+pZboWcE6Vha76E41V/svUnkXQRUfJVMk76h5glKfr X-Received: by 2002:a05:622a:5d91:b0:3a6:9b7f:9da7 with SMTP id fu17-20020a05622a5d9100b003a69b7f9da7mr41192866qtb.59.1671230003663; Fri, 16 Dec 2022 14:33:23 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1671230003; cv=none; d=google.com; s=arc-20160816; b=iLsqeKgMKGFQyJLM1vImi1z6i713venhjSAvvzQagKOuCGCjZI54F2k9yi+7ahiPnI f6Hi8mUfOx89f4HQ+/rLlobLCGFHIeAIEhk0RakhnxTaiNQIDgDNHWzf49OxUIhyG5l4 QWZ1iQfC6IqsEf7Cup37aY0V2z7KQ7+BZz3Dj8qHE8b/yz1QSFp8hLxw8X2BQMTEQtPn UNmOq188YMzcep5cfAEWOPxJowJQTlnKzfB5kP+uE3yzAqV7E5577vQd3rf+BUSjSIJH RxIbZHMlrvuc8LfWRdjfsqeWrgZc19nEGtjyRl42OBrLH4xILEX89LppLw4P3gnJ0VBD bdzQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=3rFihcTTz1hAU/VaIjhHsYjodDtMKZcW8ITB9PAuu1c=; b=Nal0y7b/gQ6WCy+BmSzJIKX6Glx0DNrT/syMPq3oqV9vaK62PEq7GnNs6aJ2oxwTV9 30hk0/d3Cwb1lGvpDH0pVzp3GdEDgVnaPYiK5ib5HqKMED8j8TxzpWk2oWGAYt61fOtm E5yz5rbzrfe1oFJ1nJlGx7yFqVxcUUoKDK+ejws4M3ixBFu+AuqBRTLFs+4i2Deaz6Ds DoxnG4IFhutlm4K+BWuz6icElzaknaczGm+F2pN+756+TS/44JF1y9/TyQgM4vGD69Ys UlBKONXwblVVneLTOmHVwmJfYONL+Muwy+DEnwJzB//z7iTqFxifoxaFm51KzG5P7QaW yJlw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="PFbu/AWx"; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id h4-20020a05622a170400b0039cd73959fcsi1773560qtk.542.2022.12.16.14.33.23 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Fri, 16 Dec 2022 14:33:23 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="PFbu/AWx"; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1p6IU7-00063j-ON; Fri, 16 Dec 2022 16:43:15 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1p6ITp-0005wB-Rm for qemu-devel@nongnu.org; Fri, 16 Dec 2022 16:43:05 -0500 Received: from mail-wm1-x333.google.com ([2a00:1450:4864:20::333]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1p6ITk-0000bF-4s for qemu-devel@nongnu.org; Fri, 16 Dec 2022 16:42:56 -0500 Received: by mail-wm1-x333.google.com with SMTP id bi26-20020a05600c3d9a00b003d3404a89faso1997399wmb.1 for ; Fri, 16 Dec 2022 13:42:51 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=3rFihcTTz1hAU/VaIjhHsYjodDtMKZcW8ITB9PAuu1c=; b=PFbu/AWxefFZWrt3MHagX9W+kOp45Pnaov3xhECDCAJU0JAnW83gdL8kBtNx/7p+nT KtqfJf1p5f6S5CT+slh0cdnqII66FPZaQTFolIpiHvlOjrGV8sNCS3Fvmq9BEHbz24LL 3xDzT6BsUfRUbskfCeYNWUVmHtTFh8Ze0SMgzcVVQCd2EXZhCSMp2Sisqeg5iZ2ZrjUx 7PHw5lepF3xowz4vwpJlYPVhoCxjA4s2YikasLWFh2lXSCc5ic42oehQJMGex82QAlJ/ 8f442VVd4S3SwgeZUbPqrPXESvvYmrl0+L0cJlZJO4b/rCuSt3J2DyQY8oSQxQUS4V5p ZNhg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=3rFihcTTz1hAU/VaIjhHsYjodDtMKZcW8ITB9PAuu1c=; b=wKiZCite+EIoQae3PISdvvnh1TVev371b+0sacwwAP5fGyvVlfdb/uribC7hjLO1mb ww/u1fzb+mZ6m6SbmUjcjYMeHf02qTJYxt9Cl9EGTYdMW34SjdRdTGmPWqCIVYx/qT28 TTH5VlLaPug21Mh2GDT2ztKGxgnjURaKKwd6Ito3jkOhjADDFvomspr53xcmiKU3WLu+ Ew+Zhtzbc3h0WEE8pxDnezkTskN5OZlKoNoGK0d5xcD7Rx+AbbQwvxE4nvWFB6z8+j4A A8gBa3sa1BEkP0CyesyKF7skHA7QAE1/zrBOsh1XMwhiIhkUjt210uw3qSfpkklmzgU4 80Uw== X-Gm-Message-State: ANoB5plNZ8z/XoIHamK7nhAL1J9I0VK9hmsi3kB2tJ+As4OFVN18DkjC ujiUbPaEHA5nFpSoS3fTGXnXxJ0fvsjS2PXq X-Received: by 2002:a05:600c:4fd4:b0:3cf:75dc:12d3 with SMTP id o20-20020a05600c4fd400b003cf75dc12d3mr26962038wmq.23.1671226970864; Fri, 16 Dec 2022 13:42:50 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id y7-20020a05600c364700b003d33ab317dasm4135263wmq.14.2022.12.16.13.42.50 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 16 Dec 2022 13:42:50 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 05/36] qdev: Remove qdev_reset_all() and qbus_reset_all() Date: Fri, 16 Dec 2022 21:42:13 +0000 Message-Id: <20221216214244.1391647-6-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221216214244.1391647-1-peter.maydell@linaro.org> References: <20221216214244.1391647-1-peter.maydell@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::333; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x333.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Remove the qdev_reset_all() and qbus_reset_all() functions, now we have moved all the callers over to the new device_cold_reset() and bus_cold_reset() functions. Signed-off-by: Peter Maydell --- include/hw/qdev-core.h | 26 -------------------- hw/core/qdev.c | 54 ------------------------------------------ hw/core/trace-events | 5 ---- 3 files changed, 85 deletions(-) diff --git a/include/hw/qdev-core.h b/include/hw/qdev-core.h index 785dd5a56ef..c7eda169d78 100644 --- a/include/hw/qdev-core.h +++ b/include/hw/qdev-core.h @@ -743,32 +743,6 @@ int qdev_walk_children(DeviceState *dev, qdev_walkerfn *post_devfn, qbus_walkerfn *post_busfn, void *opaque); -/** - * @qdev_reset_all: - * Reset @dev. See @qbus_reset_all() for more details. - * - * Note: This function is deprecated and will be removed when it becomes unused. - * Please use device_cold_reset() now. - */ -void qdev_reset_all(DeviceState *dev); -void qdev_reset_all_fn(void *opaque); - -/** - * @qbus_reset_all: - * @bus: Bus to be reset. - * - * Reset @bus and perform a bus-level ("hard") reset of all devices connected - * to it, including recursive processing of all buses below @bus itself. A - * hard reset means that qbus_reset_all will reset all state of the device. - * For PCI devices, for example, this will include the base address registers - * or configuration space. - * - * Note: This function is deprecated and will be removed when it becomes unused. - * Please use bus_cold_reset() now. - */ -void qbus_reset_all(BusState *bus); -void qbus_reset_all_fn(void *opaque); - /** * device_cold_reset: * Reset device @dev and perform a recursive processing using the resettable diff --git a/hw/core/qdev.c b/hw/core/qdev.c index c0b77a62954..c5ea0adc713 100644 --- a/hw/core/qdev.c +++ b/hw/core/qdev.c @@ -250,60 +250,6 @@ void qdev_set_legacy_instance_id(DeviceState *dev, int alias_id, dev->alias_required_for_version = required_for_version; } -static int qdev_prereset(DeviceState *dev, void *opaque) -{ - trace_qdev_reset_tree(dev, object_get_typename(OBJECT(dev))); - return 0; -} - -static int qbus_prereset(BusState *bus, void *opaque) -{ - trace_qbus_reset_tree(bus, object_get_typename(OBJECT(bus))); - return 0; -} - -static int qdev_reset_one(DeviceState *dev, void *opaque) -{ - device_legacy_reset(dev); - - return 0; -} - -static int qbus_reset_one(BusState *bus, void *opaque) -{ - BusClass *bc = BUS_GET_CLASS(bus); - trace_qbus_reset(bus, object_get_typename(OBJECT(bus))); - if (bc->reset) { - bc->reset(bus); - } - return 0; -} - -void qdev_reset_all(DeviceState *dev) -{ - trace_qdev_reset_all(dev, object_get_typename(OBJECT(dev))); - qdev_walk_children(dev, qdev_prereset, qbus_prereset, - qdev_reset_one, qbus_reset_one, NULL); -} - -void qdev_reset_all_fn(void *opaque) -{ - qdev_reset_all(DEVICE(opaque)); -} - -void qbus_reset_all(BusState *bus) -{ - trace_qbus_reset_all(bus, object_get_typename(OBJECT(bus))); - qbus_walk_children(bus, qdev_prereset, qbus_prereset, - qdev_reset_one, qbus_reset_one, NULL); -} - -void qbus_reset_all_fn(void *opaque) -{ - BusState *bus = opaque; - qbus_reset_all(bus); -} - void device_cold_reset(DeviceState *dev) { resettable_reset(OBJECT(dev), RESET_TYPE_COLD); diff --git a/hw/core/trace-events b/hw/core/trace-events index 9b3ecce3b2f..6da317247f4 100644 --- a/hw/core/trace-events +++ b/hw/core/trace-events @@ -3,11 +3,6 @@ loader_write_rom(const char *name, uint64_t gpa, uint64_t size, bool isrom) "%s: # qdev.c qdev_reset(void *obj, const char *objtype) "obj=%p(%s)" -qdev_reset_all(void *obj, const char *objtype) "obj=%p(%s)" -qdev_reset_tree(void *obj, const char *objtype) "obj=%p(%s)" -qbus_reset(void *obj, const char *objtype) "obj=%p(%s)" -qbus_reset_all(void *obj, const char *objtype) "obj=%p(%s)" -qbus_reset_tree(void *obj, const char *objtype) "obj=%p(%s)" qdev_update_parent_bus(void *obj, const char *objtype, void *oldp, const char *oldptype, void *newp, const char *newptype) "obj=%p(%s) old_parent=%p(%s) new_parent=%p(%s)" # resettable.c From patchwork Fri Dec 16 21:42:14 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 634450 Delivered-To: patch@linaro.org Received: by 2002:a17:522:c983:b0:460:3032:e3c4 with SMTP id kr3csp1079153pvb; Fri, 16 Dec 2022 14:09:11 -0800 (PST) X-Google-Smtp-Source: AA0mqf6tXaEXbI/GFi2QOrkN/Dp4I4aP7oUHku4XCoCUhu61fVqOQi5uD4kixq3ksXobHV004b+A X-Received: by 2002:a67:2607:0:b0:3ac:faf8:82d1 with SMTP id m7-20020a672607000000b003acfaf882d1mr18762845vsm.29.1671228551639; Fri, 16 Dec 2022 14:09:11 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1671228551; cv=none; d=google.com; s=arc-20160816; b=JNDwRPOG6+2cfZgan86mb5H3GKuwfpmQpdpN7t/wgnfNiWX4FrQaJrAxYfu9rK34LT niai6dWnXAdTIV4oqcwi77Q5mPdE/8GVmWo2b+xQn56UU9Z4jxixNfUf25upW3xdjdda zzAq7wtNjjdJ5keKaS98A/+TDvRO8aHiSOkP2a0ne6bEq13CXXxkNjMJzYTaq7QQ+bfm yNlp9XJNLchndNYVLrAjuin6kxEUYGqcVVouUhK0GqUC6Rt4+NSba9wDjjo+ePfa/7MI 1lapYsPn3K+Oql77+aZk1h0EnXYg9taMAx//syIGiBM6CRupbh4wJ41QPBJHVeKo+sGh IDnQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=ejnwplBuFjPQYjVXN/BBF9M+6FV2TieQ9nezCnNqXI4=; b=BD7Uk6ZB08KBuJbiYikeEoKnAqmMmM5OH0CIocCeD4LYLVPZ0eBx78n7UMMKnt7LUo M8CoWNKNv5ULcADHjLGwyfv0kGU7wGnQnwI4fLt6fHF8w3nIp/M2GDKVU6daEiB623FS 0W4Z6+I9KoKSdstJUeZEn6bCfdN1A/tgk16Kx5Pbb9ExaPqf3e2ekyswMvuUD+tagZQd FwD6asxYRgctYqf/UBKOBUca2Xi9tKy+2gTRlohvJfWkeBlov9ZrrzDh3iABWXDeD0+X 3Xz9hSf+lSQb1/n65pUvgAfMFHku9LO9L5GP1gTrwzResm+/spbWYwFONCsFW8aQXS/v PhGQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=fpLbppGg; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id 130-20020a370a88000000b006ff1ad486b9si1426844qkk.519.2022.12.16.14.09.11 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Fri, 16 Dec 2022 14:09:11 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=fpLbppGg; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1p6IUb-0006EN-Fe; Fri, 16 Dec 2022 16:43:45 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1p6ITr-0005wP-T2 for qemu-devel@nongnu.org; Fri, 16 Dec 2022 16:43:05 -0500 Received: from mail-wm1-x336.google.com ([2a00:1450:4864:20::336]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1p6ITn-0000bU-RT for qemu-devel@nongnu.org; Fri, 16 Dec 2022 16:42:58 -0500 Received: by mail-wm1-x336.google.com with SMTP id z8-20020a05600c220800b003d33b0bda11so2965148wml.0 for ; Fri, 16 Dec 2022 13:42:52 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=ejnwplBuFjPQYjVXN/BBF9M+6FV2TieQ9nezCnNqXI4=; b=fpLbppGgUnqCSumlbXT80u7GXnt10v3E6uLy4P6P1PlzaXIAgl+XsmcY4RZWIyh2L8 wf4NSzvhh0SMmjgyeuygbF35SH+UO/4awNeSxHwSinDnVCYoOr196i44Rd+z+Boj3sPn a3COXyrpyDf6fsBF3BF8ibZIyc5GZZXjIn5XOsW2C7VSg3gO+quHkVSaTQZgKMdxrHIp 4F5HH6g1MevTxGAiTNY8y6LIV/nNmK6m5RyhYcZ7HLNea9VBRYzpO+1q3KLrFcxUnyfZ hjdnNF9N07/x4joPojOEXiBQ0mjH8FIK+iz/VMKAcVU/ZHHeE0YSb3+wL/Z6lZisUlMO Ky/g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=ejnwplBuFjPQYjVXN/BBF9M+6FV2TieQ9nezCnNqXI4=; b=WwQ/OL5ykOb70zbQBP2j2YSvnXNCNoO8BdhzOfclPRUUoN79u2k75fsqRhuhDyjqXZ tEVNIkZJpxv/PlWsNCUvUkmlZqjLiVZM6BU5/LNH7yMbOjUsdhgyxKEKusTCl6fRm1CJ 31IHZebgy1uAZlMI7xqJFLaSNFFjmrvTtAspavNGCtqvhMbR0VwN1RzQdJQqL9CZQ1qN 5xr6bJuM6RZuOxvBm2+Gu4A5a4szaORP/+o1sQG4G+1mLD+Bzf0P5eW2IFAaA0Qb8mhu VeA3FrUDMqxFuoCbHTdMWqxdCEcCZqFWydXRHeO1H2QosR5PfpBxeJJHeXSKTq1PEOwu CM1A== X-Gm-Message-State: ANoB5plqDpXhoVPRL4qUEEcTn8XqvFlKI0Bim9ZuDBQQHjLgmzw8q5g8 ALYpRdWKZ0/Ksgx7eYEXxDer4SJyW1kgARaz X-Received: by 2002:a05:600c:4494:b0:3d2:3d3c:46f7 with SMTP id e20-20020a05600c449400b003d23d3c46f7mr9234052wmo.30.1671226971698; Fri, 16 Dec 2022 13:42:51 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id y7-20020a05600c364700b003d33ab317dasm4135263wmq.14.2022.12.16.13.42.50 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 16 Dec 2022 13:42:51 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 06/36] hw: Remove device_legacy_reset() Date: Fri, 16 Dec 2022 21:42:14 +0000 Message-Id: <20221216214244.1391647-7-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221216214244.1391647-1-peter.maydell@linaro.org> References: <20221216214244.1391647-1-peter.maydell@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::336; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x336.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org The device_legacy_reset() function is now not used anywhere, so we can remove the implementation. Signed-off-by: Peter Maydell --- include/hw/qdev-core.h | 9 --------- hw/core/qdev.c | 10 ---------- hw/core/trace-events | 1 - 3 files changed, 20 deletions(-) diff --git a/include/hw/qdev-core.h b/include/hw/qdev-core.h index c7eda169d78..35fddb19a64 100644 --- a/include/hw/qdev-core.h +++ b/include/hw/qdev-core.h @@ -776,15 +776,6 @@ BusState *sysbus_get_default(void); char *qdev_get_fw_dev_path(DeviceState *dev); char *qdev_get_own_fw_dev_path_from_handler(BusState *bus, DeviceState *dev); -/** - * device_legacy_reset: - * - * Reset a single device (by calling the reset method). - * Note: This function is deprecated and will be removed when it becomes unused. - * Please use device_cold_reset() now. - */ -void device_legacy_reset(DeviceState *dev); - void device_class_set_props(DeviceClass *dc, Property *props); /** diff --git a/hw/core/qdev.c b/hw/core/qdev.c index c5ea0adc713..d759c4602c2 100644 --- a/hw/core/qdev.c +++ b/hw/core/qdev.c @@ -868,16 +868,6 @@ void device_class_set_parent_unrealize(DeviceClass *dc, dc->unrealize = dev_unrealize; } -void device_legacy_reset(DeviceState *dev) -{ - DeviceClass *klass = DEVICE_GET_CLASS(dev); - - trace_qdev_reset(dev, object_get_typename(OBJECT(dev))); - if (klass->reset) { - klass->reset(dev); - } -} - Object *qdev_get_machine(void) { static Object *dev; diff --git a/hw/core/trace-events b/hw/core/trace-events index 6da317247f4..56da55bd71d 100644 --- a/hw/core/trace-events +++ b/hw/core/trace-events @@ -2,7 +2,6 @@ loader_write_rom(const char *name, uint64_t gpa, uint64_t size, bool isrom) "%s: @0x%"PRIx64" size=0x%"PRIx64" ROM=%d" # qdev.c -qdev_reset(void *obj, const char *objtype) "obj=%p(%s)" qdev_update_parent_bus(void *obj, const char *objtype, void *oldp, const char *oldptype, void *newp, const char *newptype) "obj=%p(%s) old_parent=%p(%s) new_parent=%p(%s)" # resettable.c From patchwork Fri Dec 16 21:42:15 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 634464 Delivered-To: patch@linaro.org Received: by 2002:a17:522:c983:b0:460:3032:e3c4 with SMTP id kr3csp1081349pvb; Fri, 16 Dec 2022 14:14:14 -0800 (PST) X-Google-Smtp-Source: AA0mqf7nuPy4hURZ8QD+b4KUnz5UCwnczHzbTZgQ12YkqQ5nTsbVa+oZEPFNAtEu7gdfLnpM1a29 X-Received: by 2002:ac8:1481:0:b0:3a7:f091:bf3 with SMTP id l1-20020ac81481000000b003a7f0910bf3mr49480105qtj.59.1671228853867; Fri, 16 Dec 2022 14:14:13 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1671228853; cv=none; d=google.com; s=arc-20160816; b=x9ju3FEtBX33/kTMutkpU3hNxmhgdruFFlVKZu3jRPiUelQn1kLdSGdt7TxK0Eol8a 3s2mqYg7ScMO2kbAQ+Un7zk2FYqKXDfxn3gDPhiuONyCNEDZJc4TOtr775a6E5Ih1uHJ PRQMRK+LhpGFw7AVPT20djjCR1eprPeZMcHW2xoVs30QxZf0wzDmcoMQ+UVpYMxvdplO 2KF8vxA8pxGeuTariWdDlJM2QD6AoaeAfXvBrh7EJGN9FW1EoAueOlatSCzCqu5RqtXa ZdKMpin3q1VQv/Ji4Dt1b/0a2LZZn5nsvbeR9b3p35Sm4qTfitdOdSxkANnsunHmhbOY m7Bw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=++dngzwVZrf/lhItKbFYZlrrhOCx5GYOttIsi96mUbc=; b=tGVSGqZp49WQzuyVw8hh+I0RvhW8TxCG/HzZvaBHc2FTX/MYHDIWo1q9JMW/3iOOCj bFVvZpj9RPEmOrZwI9KkAzB3bpqM0LiwPXygjT/AJFMmQnmKEW8YAJqqhqjGPugyJYj3 M9WgpoaqgqZ18UBwakYwi3TgzM5aYM22BkRcaA/YOj/UcmiS+cJLQl+JIbENMydZiNIa irQD6PfamzAYmOsXQgj3gkwmWH0d29pN6djmxs9QqgrCQ36MHy1sQ+r/MaeKUoc18Bq5 JHUGpN3aQo72Es3z39BGSPXtQ1c39rn/P21C4KuOQd2+ta1MEyrTbkjMCkmTbTYrdoUi 0GZg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=sqpalmsf; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id t20-20020ac87614000000b003a5cd4b067csi1477852qtq.776.2022.12.16.14.14.13 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Fri, 16 Dec 2022 14:14:13 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=sqpalmsf; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1p6IU3-000611-5g; Fri, 16 Dec 2022 16:43:11 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1p6ITs-0005wb-LF for qemu-devel@nongnu.org; Fri, 16 Dec 2022 16:43:05 -0500 Received: from mail-wm1-x334.google.com ([2a00:1450:4864:20::334]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1p6ITn-0000be-ST for qemu-devel@nongnu.org; Fri, 16 Dec 2022 16:42:59 -0500 Received: by mail-wm1-x334.google.com with SMTP id bi26-20020a05600c3d9a00b003d3404a89faso1997425wmb.1 for ; Fri, 16 Dec 2022 13:42:54 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=++dngzwVZrf/lhItKbFYZlrrhOCx5GYOttIsi96mUbc=; b=sqpalmsfwALTaW8MdpFF1E7RvU8ya5O9lmA4aQfi4/GH//mRnNYxfxAtEZJCTdPkfj 2WjuWLhzV9FeEPmhzK1SiuZs1RIC703Dbfub5+jZQfI499pBguzPfFgH2jl/+uxaAdPQ e0KLwJefBb3ji1f9hQJ0CJe0y1UzaK9TCGQBWSthHvZejmw3Vy3/oZJdPDus0BsPFIZ2 OYYl7wGVPCnWqcHMBqhwRSfX872/0ZKGLlGgwNCDU/NCTTMHEcEf6LOfaoAzKhFWj+R5 9SedeesR6PVTDR1JIW6ykKiHUnYyfkfBWVGStQhzBkjS0L8dF3tEXPeHDhan8XID/u+O O9cw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=++dngzwVZrf/lhItKbFYZlrrhOCx5GYOttIsi96mUbc=; b=p9yJuT6CtfIUyBHGth3A0V5f/OWVLn0qkJreydYYNUpUT4v4g0Qgm0nSjlHMbJCLgK wJNpl1QRj3rwMyyeXDhsCDOxddETibg5y4WzhFMGZS9xp+ADJFCTMfzCom2crVHSTa/0 yJVdx47fzUAiJJGE0BJOKMiySZelZmD0lVT98uhZttcjgO7ziTwaq+QKW1iBwd2fLHAb lNMGUq5AvWmUjd2gMpYc2sKoJFWuyDBAC0OaCHOLGaqEATf+arrSNST9imvHA3ffPRWq 77mZC7aReiKCRTrgNa26BcQDym9ehON3YdDEE2bSPWZLQZgeOT24L4mbGuWhkaKvnK9C q28A== X-Gm-Message-State: ANoB5pkrAUmGXEeSNfbiGMD12+45b7U9bQPlGAn3B6NEFXhlPjJBtHF7 5wIxJHCFuqm7s4IbsWisgMQ3Hf39feq9oaDv X-Received: by 2002:a05:600c:384e:b0:3cf:a483:3100 with SMTP id s14-20020a05600c384e00b003cfa4833100mr28021532wmr.3.1671226972536; Fri, 16 Dec 2022 13:42:52 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id y7-20020a05600c364700b003d33ab317dasm4135263wmq.14.2022.12.16.13.42.51 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 16 Dec 2022 13:42:52 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 07/36] hw/input/ps2: Convert TYPE_PS2_DEVICE to 3-phase reset Date: Fri, 16 Dec 2022 21:42:15 +0000 Message-Id: <20221216214244.1391647-8-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221216214244.1391647-1-peter.maydell@linaro.org> References: <20221216214244.1391647-1-peter.maydell@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::334; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x334.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Convert the parent class TYPE_PS2_DEVICE to 3-phase reset. Note that we need an 'exit' phase function as well as the usual 'hold' phase function, because changing outbound IRQ line state is only permitted in 'exit'. (Strictly speaking it's not supposed to be done in a legacy reset handler either, but you can often get away with it.) Signed-off-by: Peter Maydell Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Message-id: 20221109170009.3498451-2-peter.maydell@linaro.org --- hw/input/ps2.c | 14 +++++++++++--- 1 file changed, 11 insertions(+), 3 deletions(-) diff --git a/hw/input/ps2.c b/hw/input/ps2.c index 05cf7111e31..47a5d68e300 100644 --- a/hw/input/ps2.c +++ b/hw/input/ps2.c @@ -1001,12 +1001,18 @@ void ps2_write_mouse(PS2MouseState *s, int val) } } -static void ps2_reset(DeviceState *dev) +static void ps2_reset_hold(Object *obj) { - PS2State *s = PS2_DEVICE(dev); + PS2State *s = PS2_DEVICE(obj); s->write_cmd = -1; ps2_reset_queue(s); +} + +static void ps2_reset_exit(Object *obj) +{ + PS2State *s = PS2_DEVICE(obj); + ps2_lower_irq(s); } @@ -1281,8 +1287,10 @@ static void ps2_init(Object *obj) static void ps2_class_init(ObjectClass *klass, void *data) { DeviceClass *dc = DEVICE_CLASS(klass); + ResettableClass *rc = RESETTABLE_CLASS(klass); - dc->reset = ps2_reset; + rc->phases.hold = ps2_reset_hold; + rc->phases.exit = ps2_reset_exit; set_bit(DEVICE_CATEGORY_INPUT, dc->categories); } From patchwork Fri Dec 16 21:42:16 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 634474 Delivered-To: patch@linaro.org Received: by 2002:a17:522:c983:b0:460:3032:e3c4 with SMTP id kr3csp1084284pvb; Fri, 16 Dec 2022 14:21:27 -0800 (PST) X-Google-Smtp-Source: AA0mqf6f6Unp+DGchkgdeebHIYpFo/w4Xy5CDo0hCzGz1Y+Jg1ABWG4RWP3GgYZ2LYuFqSFlkDIA X-Received: by 2002:ac8:647:0:b0:3a6:9069:ed37 with SMTP id e7-20020ac80647000000b003a69069ed37mr37296418qth.2.1671229287498; Fri, 16 Dec 2022 14:21:27 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1671229287; cv=none; d=google.com; s=arc-20160816; b=GcwhNXQQaLBOH77WAL61aCImrHxxRk05iplZK0Px6AOer2xFYYDfaWACLktrn4IQdJ rkQxQOtR1Vtgk0636gWO5G1ihOZR9LgFUNK2tlsjOouqNZ2C0NCBeiADZccacRZ1AvTN dcuE45ZXLOpO85x+J0KVLIoIGd1KipV87fOywvlzBJT1h/sNRYvI5sUDnNU5YZHdDT0x N+lAcQBUM0ZZlc8pcMC8OWB5R9bhEr8+KhSrv5cHRjBb3xELBMSDFSyz1PGvcG1TEjX2 kKp3/KCVQQlO1LzlQBpD78A/UQ98gd+j0RHR3qcvRmQmr4COMk6V9daKk7f3MPqiSc2f AD4Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=18PIUptsG0HDozMjNUaDXZMKAMCj9HHUBMVLqT4eZ7w=; b=jEj4lS677wSYEsYhzHRaN+/rj0hZkZtfN3Pb72Bx7tRxjl6I2GKrp8XMIw8HAEyBO3 5u8h9bG3yQYJR1WRJ2lP2jC7kzC4xnOViatQTg6hnXZ5KHEcV0xISTKXjT9gU7z9NfBO iA4h9dlM9mDm/rjBBlSE+fHxM1oC3EAiqOLEZe1SOldfj0MhT0klzNzaoNNzMr8ek7Gu mbvfTOlgC3PmoiXFOcv9flm5yi8MaJCdMl9WcKYWT4oUdnRV/uFyW/aCdgWuUNAW3WuF BqQiibe0GOfiLhI9ojLca6C08XGP8Z5UMpZ2y3vRr439ejfflfMfyl3YYK6xv0L6uWfM S5DQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=ht1iUpW1; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id bv14-20020a05622a0a0e00b003a57645c04esi1693730qtb.590.2022.12.16.14.21.27 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Fri, 16 Dec 2022 14:21:27 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=ht1iUpW1; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1p6IU5-00061q-8o; Fri, 16 Dec 2022 16:43:13 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1p6ITs-0005wa-LD for qemu-devel@nongnu.org; Fri, 16 Dec 2022 16:43:05 -0500 Received: from mail-wm1-x330.google.com ([2a00:1450:4864:20::330]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1p6ITp-0000bj-Is for qemu-devel@nongnu.org; Fri, 16 Dec 2022 16:43:00 -0500 Received: by mail-wm1-x330.google.com with SMTP id i187-20020a1c3bc4000000b003d1e906ca23so2079437wma.3 for ; Fri, 16 Dec 2022 13:42:56 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=18PIUptsG0HDozMjNUaDXZMKAMCj9HHUBMVLqT4eZ7w=; b=ht1iUpW1qxl9jPHRbqK1PQnKRpCmqA23TW4jbkZS3CLntLX+X822yx8MKgOZOFsX7t N1Ms6bz7Ib/0VNvIr7oOUGB8XV393hObh7hIDKOhFRcWTAHBaTEhvzXyJwG11vs+ezhH Hn+nhwotYTLK6seOWbOHkxNP4JSeiVzhP/IYFtdsyX1Mfwk0DRUfRGAu41RftL633QZs qQ5mzJSYGFBgmKJCSV9sSBOFZE3BGmlCxIkbZt6EB5p9b6np08+7tWxWBJ8+jimQ9/Kn SU4zyxsi/fplCJiDmDNW4xjECPCD5l3geHD5gtEFNKA1FrknkUzmt97mMs4cg8yKd+l9 Vb1g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=18PIUptsG0HDozMjNUaDXZMKAMCj9HHUBMVLqT4eZ7w=; b=6HICtwH96e25CTrZWX0HBHCXG8jigwzgxeF53KhJMa+DSQ0Uq1gk8e9j+fmDr8hZ19 SbkcNfbuMdoWhbNTiMILGHUH6PLbTEDFOL9oQCw8Nb/6HIguz0mM4k7ac5hyRNJTCNa/ 4WjYunp773uDeY3dXRLgASjFlCczRFE9fu3jY+O9pFCCKDezd7KwP3XdEgXRe/MSZOQz DBw4bptfOyyz+EV/pbeLbH/oCCAhI2uTkQDNPtgmCBNqqmEvpdiaHgAuXyirpYdmUeab yyue3lEKL8kf8H/gcghmar5OJke9Ag2eO7Xkl+s38kPK1dWPB7rQiY7SY3DpSitATb5z a2cw== X-Gm-Message-State: ANoB5pm8xPLsYXPemBTHqnneAjqJdeyZAMFW5tVxrGWDRAWxAN+V8GD8 dBgJ1CyRhcT9DPJs/pFuGHj33ypEQz2KGfuF X-Received: by 2002:a05:600c:3d8f:b0:3cf:a18d:399c with SMTP id bi15-20020a05600c3d8f00b003cfa18d399cmr26796086wmb.1.1671226973402; Fri, 16 Dec 2022 13:42:53 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id y7-20020a05600c364700b003d33ab317dasm4135263wmq.14.2022.12.16.13.42.52 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 16 Dec 2022 13:42:52 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 08/36] hw/input/ps2.c: Convert TYPE_PS2_{KBD, MOUSE}_DEVICE to 3-phase reset Date: Fri, 16 Dec 2022 21:42:16 +0000 Message-Id: <20221216214244.1391647-9-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221216214244.1391647-1-peter.maydell@linaro.org> References: <20221216214244.1391647-1-peter.maydell@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::330; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x330.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Convert the child classes TYPE_PS2_KBD_DEVICE and TYPE_PS2_MOUSE_DEVICE to the 3-phase reset system. This allows us to stop using the old device_class_set_parent_reset() function. We don't need to register an 'exit' phase function for the subclasses, because they have no work to do in that phase. Passing NULL to resettable_class_set_parent_phases() will result in the parent class method being called for that phase, so we don't need to register a function purely to chain to the parent 'exit' phase function. Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé Message-id: 20221109170009.3498451-3-peter.maydell@linaro.org --- include/hw/input/ps2.h | 2 +- hw/input/ps2.c | 31 ++++++++++++++++++++----------- 2 files changed, 21 insertions(+), 12 deletions(-) diff --git a/include/hw/input/ps2.h b/include/hw/input/ps2.h index ff777582cd6..cd61a634c39 100644 --- a/include/hw/input/ps2.h +++ b/include/hw/input/ps2.h @@ -36,7 +36,7 @@ struct PS2DeviceClass { SysBusDeviceClass parent_class; - DeviceReset parent_reset; + ResettablePhases parent_phases; }; /* diff --git a/hw/input/ps2.c b/hw/input/ps2.c index 47a5d68e300..3253ab6a92c 100644 --- a/hw/input/ps2.c +++ b/hw/input/ps2.c @@ -1042,13 +1042,16 @@ static void ps2_common_post_load(PS2State *s) q->cwptr = ccount ? (q->rptr + ccount) & (PS2_BUFFER_SIZE - 1) : -1; } -static void ps2_kbd_reset(DeviceState *dev) +static void ps2_kbd_reset_hold(Object *obj) { - PS2DeviceClass *ps2dc = PS2_DEVICE_GET_CLASS(dev); - PS2KbdState *s = PS2_KBD_DEVICE(dev); + PS2DeviceClass *ps2dc = PS2_DEVICE_GET_CLASS(obj); + PS2KbdState *s = PS2_KBD_DEVICE(obj); trace_ps2_kbd_reset(s); - ps2dc->parent_reset(dev); + + if (ps2dc->parent_phases.hold) { + ps2dc->parent_phases.hold(obj); + } s->scan_enabled = 1; s->translate = 0; @@ -1056,13 +1059,16 @@ static void ps2_kbd_reset(DeviceState *dev) s->modifiers = 0; } -static void ps2_mouse_reset(DeviceState *dev) +static void ps2_mouse_reset_hold(Object *obj) { - PS2DeviceClass *ps2dc = PS2_DEVICE_GET_CLASS(dev); - PS2MouseState *s = PS2_MOUSE_DEVICE(dev); + PS2DeviceClass *ps2dc = PS2_DEVICE_GET_CLASS(obj); + PS2MouseState *s = PS2_MOUSE_DEVICE(obj); trace_ps2_mouse_reset(s); - ps2dc->parent_reset(dev); + + if (ps2dc->parent_phases.hold) { + ps2dc->parent_phases.hold(obj); + } s->mouse_status = 0; s->mouse_resolution = 0; @@ -1245,10 +1251,12 @@ static void ps2_mouse_realize(DeviceState *dev, Error **errp) static void ps2_kbd_class_init(ObjectClass *klass, void *data) { DeviceClass *dc = DEVICE_CLASS(klass); + ResettableClass *rc = RESETTABLE_CLASS(klass); PS2DeviceClass *ps2dc = PS2_DEVICE_CLASS(klass); dc->realize = ps2_kbd_realize; - device_class_set_parent_reset(dc, ps2_kbd_reset, &ps2dc->parent_reset); + resettable_class_set_parent_phases(rc, NULL, ps2_kbd_reset_hold, NULL, + &ps2dc->parent_phases); dc->vmsd = &vmstate_ps2_keyboard; } @@ -1262,11 +1270,12 @@ static const TypeInfo ps2_kbd_info = { static void ps2_mouse_class_init(ObjectClass *klass, void *data) { DeviceClass *dc = DEVICE_CLASS(klass); + ResettableClass *rc = RESETTABLE_CLASS(klass); PS2DeviceClass *ps2dc = PS2_DEVICE_CLASS(klass); dc->realize = ps2_mouse_realize; - device_class_set_parent_reset(dc, ps2_mouse_reset, - &ps2dc->parent_reset); + resettable_class_set_parent_phases(rc, NULL, ps2_mouse_reset_hold, NULL, + &ps2dc->parent_phases); dc->vmsd = &vmstate_ps2_mouse; } From patchwork Fri Dec 16 21:42:17 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 634486 Delivered-To: patch@linaro.org Received: by 2002:a17:522:c983:b0:460:3032:e3c4 with SMTP id kr3csp1086963pvb; Fri, 16 Dec 2022 14:29:00 -0800 (PST) X-Google-Smtp-Source: AA0mqf4Du13AOynsfN/5faBTnis4tT2lYTL08hpzgPlpdut8M70OyMnpAMWs8RDPCQ8zX5AhMheA X-Received: by 2002:a05:622a:5a87:b0:3a5:723e:8c22 with SMTP id fz7-20020a05622a5a8700b003a5723e8c22mr41727284qtb.47.1671229740200; Fri, 16 Dec 2022 14:29:00 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1671229740; cv=none; d=google.com; s=arc-20160816; b=SrS43HvoDXfGKOhN+wjWq7U5cWkgM0jl3wc4BRSmc3a3xQIbfQNjq2do9rhd/+yPkN RzrGGCezlHofMSLaFnTqZ+CksUtZ6Fouw6teKos8zbRRAwpT4J0n0XBXzUK5K6forgYb Shnw/DOCNd+uGhCfeKBG0u7s1RbrYsTmEaPsY5jI04i4Yoy2+kCh7tpzr6S71Qf+NNiS 05+GP1A3tS2lkdneAjkVgRs3B70qiXAcY6XkfazuKXWvcp7623JmTIdD/1GELsGSYE8q ADwVPL6MxUoQGJipJnDCYzioyLYpEoNCIr+WVCBQC0AS8NPGJA+knwWy3pp4iF7DvT/J O7fw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=A2o/3JD/47KFZGGuCaIY7m7S85np6OtsBKjDrudLLbI=; b=ZA64rW1S3rPY/FzsA+Je3KE4unuYJLgN9sJ5goCil2FdMMhZCm5ihBJy1MSjX5RNLI KOFWLjQCWlPlEaYvoXLQwrEl1TmF9BNXLxfMemVleoQNKO8wXmAl8c0ApJUH1btGY7ps FXOrasSsDFn6mdKnD57bf9sOtpzFy1TV4sZjkdwOgovB5vvGSY+0wjJkZIVWCG/MV4K5 Eo5C/DQG0QzkZMfM5IYDglaVp0q9ot7/yf3tCFQENGducbMRiCae6ykdjBPtz8mBwD6b b35m+pfabCnsqCF51Pm6WYZj7Pegqihttbe/LdYt35Prq+sA/R4jI4TU49K47pD238g2 V/Ew== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=hcsLKqGh; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id r9-20020ac84249000000b003a7e6b0073csi1589618qtm.60.2022.12.16.14.29.00 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Fri, 16 Dec 2022 14:29:00 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=hcsLKqGh; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1p6IU2-00060g-6w; Fri, 16 Dec 2022 16:43:10 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1p6ITr-0005wQ-Sx for qemu-devel@nongnu.org; Fri, 16 Dec 2022 16:43:05 -0500 Received: from mail-wm1-x330.google.com ([2a00:1450:4864:20::330]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1p6ITn-0000bu-Gu for qemu-devel@nongnu.org; Fri, 16 Dec 2022 16:42:58 -0500 Received: by mail-wm1-x330.google.com with SMTP id ja17so2736186wmb.3 for ; Fri, 16 Dec 2022 13:42:55 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=A2o/3JD/47KFZGGuCaIY7m7S85np6OtsBKjDrudLLbI=; b=hcsLKqGhSuByZBWzM6fIlTEEvqViVoWa5KW1CJ1tcEdkIWrkmG7xpg1mwLz+PiOvEY bN5RGmJMiQWY9sczcyD/iDjdibM78JVn2XodSvPBW9aG95Xfjw2L3oPL6EtpluUyEgAy /xm4J7S0WNAI7CqB5VI91oFCC5G+RNKykPRSCX5pFDRVrLiwvImDj/zAAkbEFmo/15Hn 7N8vZCd3ER09NZRZvu879A/5DseqXmYGGQjwGKoZ+dxMYNXySkXntVfeMd7WhQESy929 Wn5V6yXWl9NfeXv//Zh5V2eR6HKjOCcp3Q0cVMtlkgwENo97CBASs/I1ORI7mYbcUFQ+ JKAg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=A2o/3JD/47KFZGGuCaIY7m7S85np6OtsBKjDrudLLbI=; b=2887D0EQqVzvBBRu1WQG0oBmgx74nWe4nVJEZQ+tQG5DNkyGn6tb7iqB3HuDuJukpd CZxACVpPr5dAF4oYwGGVQKISHGJbncT0dLFYPnouGIGfL1GKiNjX4O0KHC7KORX1c5tx hfNpRAyCH/ezxjFtK5YwXFztO32/VoAtoL9YgMXEHYcJTMHxABsFSaKcafDGx+uxAnrc /DXPXQO954A10/+KNraDLRjYgIFLjzfgRyYrkpWK1sqTm98JtLnnTWe0sCA8ziinXjd6 X+14wKeyTz4pX2KtZKTwvTL4KasO1bIk5buI9ANsSFlEd32Tt6OEM/PORR8nIS7AeB7e z3tA== X-Gm-Message-State: ANoB5pk+lYgFzqjeDqVJuCHzckCNLB8gOlUlzASNY4b/4bhyMaQHWXg4 yG9l2w7umq+yQ448GZV7gEBqZRH7pFCpI8P5 X-Received: by 2002:a7b:c4d2:0:b0:3d1:f270:a81e with SMTP id g18-20020a7bc4d2000000b003d1f270a81emr27490719wmk.17.1671226974271; Fri, 16 Dec 2022 13:42:54 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id y7-20020a05600c364700b003d33ab317dasm4135263wmq.14.2022.12.16.13.42.53 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 16 Dec 2022 13:42:53 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 09/36] hw/misc/mos6522: Convert TYPE_MOS6522 to 3-phase reset Date: Fri, 16 Dec 2022 21:42:17 +0000 Message-Id: <20221216214244.1391647-10-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221216214244.1391647-1-peter.maydell@linaro.org> References: <20221216214244.1391647-1-peter.maydell@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::330; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x330.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Convert the TYPE_MOS6522 parent class to use 3-phase reset. This is a prerequisite for converting its subclasses. Signed-off-by: Peter Maydell Acked-by: Mark Cave-Ayland Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Message-id: 20221110143459.3833425-2-peter.maydell@linaro.org --- hw/misc/mos6522.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/hw/misc/mos6522.c b/hw/misc/mos6522.c index fe38c44426b..0ed631186c3 100644 --- a/hw/misc/mos6522.c +++ b/hw/misc/mos6522.c @@ -643,9 +643,9 @@ const VMStateDescription vmstate_mos6522 = { } }; -static void mos6522_reset(DeviceState *dev) +static void mos6522_reset_hold(Object *obj) { - MOS6522State *s = MOS6522(dev); + MOS6522State *s = MOS6522(obj); s->b = 0; s->a = 0; @@ -705,9 +705,10 @@ static Property mos6522_properties[] = { static void mos6522_class_init(ObjectClass *oc, void *data) { DeviceClass *dc = DEVICE_CLASS(oc); + ResettableClass *rc = RESETTABLE_CLASS(oc); MOS6522DeviceClass *mdc = MOS6522_CLASS(oc); - dc->reset = mos6522_reset; + rc->phases.hold = mos6522_reset_hold; dc->vmsd = &vmstate_mos6522; device_class_set_props(dc, mos6522_properties); mdc->portB_write = mos6522_portB_write; From patchwork Fri Dec 16 21:42:18 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 634457 Delivered-To: patch@linaro.org Received: by 2002:a17:522:c983:b0:460:3032:e3c4 with SMTP id kr3csp1080138pvb; Fri, 16 Dec 2022 14:11:19 -0800 (PST) X-Google-Smtp-Source: AA0mqf6uLN9aBqvMEAeHPc7DUPXd4W2MDuDdbtENRTUsmx9bukXDCDGOfIOan0iYADjsoD2bsWmo X-Received: by 2002:a67:6d01:0:b0:3aa:8a33:ce9f with SMTP id i1-20020a676d01000000b003aa8a33ce9fmr19989760vsc.3.1671228679405; Fri, 16 Dec 2022 14:11:19 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1671228679; cv=none; d=google.com; s=arc-20160816; b=09HBIbGQyd4GNjuQJjvtb9O1IddKuzz6B5T6AY1bt8GVpcpM/8THTRBQR+conk3eG2 61cNIsCKiAqBo2Odh+YVmma+mFsDb1D8vHVTLCgGsX4NWgz+t1qdMYv5+rQXsMKEzBNS DvuMVm5meQhfRORKUZo/FaXv2WgyzfIakaZvO5a7qiuZ2n6MqI7rAjHWSBpwFFq5tREb PjwedplIc3c3QKJdscTy8ASJfPTEKJnAZoT9cT7Y/yGD6YrZRParJuMSZftb9o+JbFwv CM6vUC6PfhIiRjFxG7JP7ZoD1ic7qhcMWcUg7qh9uRdSoDXoyW2c2bFEmMsY0nzuKMp5 LrTw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=21r9CxWzALIMyBFcFfX8uwReEH2XuTI7G3xkkaCFq6A=; b=tZuMBBp8yfCfAmOQj5yMmgU18tIadpFcc/E/SyrKx66PfI31r/6AV07qtjH/qs2rQO 0ZmxwRt2dIVgOW2wCwm9B/oiqzpdpwjSNGLXXXEqZVYkGJAZ88DOqmxedYlp4jwZEtIx DfYP75GrGo/XYKYh8JMDcRFGm46d8j6Ba7m2aaU0Ds1BFcRHFysKpT7jU7+7Sk0oX+uM OQySJP208k/NVHl0zTPZYqsYdkdx4hNbwOW8Wl3ERjzFBnxmiMOfM1JLwZp5UDnz13GE 5nbOwxM8NyS5TobHYFGbTsN294UUT5KXHV5o9FdZIbK5bEeL8rJxP1moIXnaQo1NoZ7A PgZg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="crP/Tftt"; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id i13-20020a05620a27cd00b006fedaa5d032si1552304qkp.122.2022.12.16.14.11.19 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Fri, 16 Dec 2022 14:11:19 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="crP/Tftt"; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1p6IU3-000613-7P; Fri, 16 Dec 2022 16:43:11 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1p6ITs-0005wc-Ly for qemu-devel@nongnu.org; Fri, 16 Dec 2022 16:43:05 -0500 Received: from mail-wm1-x330.google.com ([2a00:1450:4864:20::330]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1p6ITp-0000cM-Dn for qemu-devel@nongnu.org; Fri, 16 Dec 2022 16:43:00 -0500 Received: by mail-wm1-x330.google.com with SMTP id o5-20020a05600c510500b003d21f02fbaaso4980547wms.4 for ; Fri, 16 Dec 2022 13:42:56 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=21r9CxWzALIMyBFcFfX8uwReEH2XuTI7G3xkkaCFq6A=; b=crP/TfttSK1H9ClAZxV2e+sRHm+opVPbaC/rcihlXWVYIPxl/bblQDGQ3rgiG12Soa dc4U17rO2ch32duTgbBJSoCEpfhEg+9h1EuXsZDP4JLEfyfrz+KwBQwDpyX5/5ZHoGUS iSchmil9dzQaPF7xSfgfg0lNJB/9jxCGMGndY/WmpF0XMrGMyy8MI7w7yaXkR4GgANLJ D6fIiOs/fpDVGkr/R0N4cIC7GVDvN71WPQ9TzwQZGwLUJaNy+PFtC4Bv+55Ekan0rQrl vTKdGmUFfTH5A5k0BXEM3RQATQyPw0dOBUALFs4CTxEcBtRmEWxoFZOzwZ4CB49xhRIS a90w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=21r9CxWzALIMyBFcFfX8uwReEH2XuTI7G3xkkaCFq6A=; b=5mnhMycq+zlVEoyO0RrFgFcttKTXwfpNPLB+WsagXe2+qB3BcgVt/+aY2Jdkknh9I0 4yCvOTE7zyz8jbbiQSQhZ/SNrIdwjja9g1NzsTr106t3eMC/SfUdWrmWrbLDcY5eB25h bXdYfBndPoNU9puSsFfVqqezl3RA3h6nsqmqhAAxprNjrBaqwrW4osywlZGqWAs2TD7B wT32Foy4pNAyIk8hoCjTVdqFhJVED5U8zDV2sXEO1Q1umDNpJl0ojqc6zlQXNqI9G4W5 abE9diIkUnq5dfZlp8zfzuF1l4y0LlDLswmKY9XPaskFXCTsipAekw/UwLVehtqNd6RB 5qGQ== X-Gm-Message-State: ANoB5pklbEx6rWqD8ZHNF2ZZdnVLLvm2jmP0jTGVF/QQiAwRYUThLVR3 40nZcpqrICQNNy0q23I1w+q+MBYm2ccm6aH8 X-Received: by 2002:a05:600c:3b8e:b0:3cf:d428:21d6 with SMTP id n14-20020a05600c3b8e00b003cfd42821d6mr27388700wms.3.1671226975217; Fri, 16 Dec 2022 13:42:55 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id y7-20020a05600c364700b003d33ab317dasm4135263wmq.14.2022.12.16.13.42.54 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 16 Dec 2022 13:42:54 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 10/36] hw/misc: Convert TYPE_MOS6522 subclasses to 3-phase reset Date: Fri, 16 Dec 2022 21:42:18 +0000 Message-Id: <20221216214244.1391647-11-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221216214244.1391647-1-peter.maydell@linaro.org> References: <20221216214244.1391647-1-peter.maydell@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::330; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x330.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Convert the various subclasses of TYPE_MOS6522 to 3-phase reset. This removes some uses of device_class_set_parent_reset(), which we would eventually like to be able to get rid of. Signed-off-by: Peter Maydell Acked-by: Mark Cave-Ayland Reviewed-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé Message-id: 20221110143459.3833425-3-peter.maydell@linaro.org --- include/hw/misc/mos6522.h | 2 +- hw/misc/mac_via.c | 26 ++++++++++++++++---------- hw/misc/macio/cuda.c | 14 ++++++++------ hw/misc/macio/pmu.c | 14 ++++++++------ 4 files changed, 33 insertions(+), 23 deletions(-) diff --git a/include/hw/misc/mos6522.h b/include/hw/misc/mos6522.h index 0bc22a83957..05872fffc92 100644 --- a/include/hw/misc/mos6522.h +++ b/include/hw/misc/mos6522.h @@ -157,7 +157,7 @@ OBJECT_DECLARE_TYPE(MOS6522State, MOS6522DeviceClass, MOS6522) struct MOS6522DeviceClass { DeviceClass parent_class; - DeviceReset parent_reset; + ResettablePhases parent_phases; void (*portB_write)(MOS6522State *dev); void (*portA_write)(MOS6522State *dev); /* These are used to influence the CUDA MacOS timebase calibration */ diff --git a/hw/misc/mac_via.c b/hw/misc/mac_via.c index f42c12755a9..076d18e5fd9 100644 --- a/hw/misc/mac_via.c +++ b/hw/misc/mac_via.c @@ -975,14 +975,16 @@ static int via1_post_load(void *opaque, int version_id) } /* VIA 1 */ -static void mos6522_q800_via1_reset(DeviceState *dev) +static void mos6522_q800_via1_reset_hold(Object *obj) { - MOS6522Q800VIA1State *v1s = MOS6522_Q800_VIA1(dev); + MOS6522Q800VIA1State *v1s = MOS6522_Q800_VIA1(obj); MOS6522State *ms = MOS6522(v1s); MOS6522DeviceClass *mdc = MOS6522_GET_CLASS(ms); ADBBusState *adb_bus = &v1s->adb_bus; - mdc->parent_reset(dev); + if (mdc->parent_phases.hold) { + mdc->parent_phases.hold(obj); + } ms->timers[0].frequency = VIA_TIMER_FREQ; ms->timers[1].frequency = VIA_TIMER_FREQ; @@ -1097,11 +1099,12 @@ static Property mos6522_q800_via1_properties[] = { static void mos6522_q800_via1_class_init(ObjectClass *oc, void *data) { DeviceClass *dc = DEVICE_CLASS(oc); + ResettableClass *rc = RESETTABLE_CLASS(oc); MOS6522DeviceClass *mdc = MOS6522_CLASS(oc); dc->realize = mos6522_q800_via1_realize; - device_class_set_parent_reset(dc, mos6522_q800_via1_reset, - &mdc->parent_reset); + resettable_class_set_parent_phases(rc, NULL, mos6522_q800_via1_reset_hold, + NULL, &mdc->parent_phases); dc->vmsd = &vmstate_q800_via1; device_class_set_props(dc, mos6522_q800_via1_properties); } @@ -1123,12 +1126,14 @@ static void mos6522_q800_via2_portB_write(MOS6522State *s) } } -static void mos6522_q800_via2_reset(DeviceState *dev) +static void mos6522_q800_via2_reset_hold(Object *obj) { - MOS6522State *ms = MOS6522(dev); + MOS6522State *ms = MOS6522(obj); MOS6522DeviceClass *mdc = MOS6522_GET_CLASS(ms); - mdc->parent_reset(dev); + if (mdc->parent_phases.hold) { + mdc->parent_phases.hold(obj); + } ms->timers[0].frequency = VIA_TIMER_FREQ; ms->timers[1].frequency = VIA_TIMER_FREQ; @@ -1183,10 +1188,11 @@ static const VMStateDescription vmstate_q800_via2 = { static void mos6522_q800_via2_class_init(ObjectClass *oc, void *data) { DeviceClass *dc = DEVICE_CLASS(oc); + ResettableClass *rc = RESETTABLE_CLASS(oc); MOS6522DeviceClass *mdc = MOS6522_CLASS(oc); - device_class_set_parent_reset(dc, mos6522_q800_via2_reset, - &mdc->parent_reset); + resettable_class_set_parent_phases(rc, NULL, mos6522_q800_via2_reset_hold, + NULL, &mdc->parent_phases); dc->vmsd = &vmstate_q800_via2; mdc->portB_write = mos6522_q800_via2_portB_write; } diff --git a/hw/misc/macio/cuda.c b/hw/misc/macio/cuda.c index 0d4c13319a8..853e88bfedd 100644 --- a/hw/misc/macio/cuda.c +++ b/hw/misc/macio/cuda.c @@ -589,12 +589,14 @@ static void mos6522_cuda_portB_write(MOS6522State *s) cuda_update(cs); } -static void mos6522_cuda_reset(DeviceState *dev) +static void mos6522_cuda_reset_hold(Object *obj) { - MOS6522State *ms = MOS6522(dev); + MOS6522State *ms = MOS6522(obj); MOS6522DeviceClass *mdc = MOS6522_GET_CLASS(ms); - mdc->parent_reset(dev); + if (mdc->parent_phases.hold) { + mdc->parent_phases.hold(obj); + } ms->timers[0].frequency = CUDA_TIMER_FREQ; ms->timers[1].frequency = (SCALE_US * 6000) / 4700; @@ -602,11 +604,11 @@ static void mos6522_cuda_reset(DeviceState *dev) static void mos6522_cuda_class_init(ObjectClass *oc, void *data) { - DeviceClass *dc = DEVICE_CLASS(oc); + ResettableClass *rc = RESETTABLE_CLASS(oc); MOS6522DeviceClass *mdc = MOS6522_CLASS(oc); - device_class_set_parent_reset(dc, mos6522_cuda_reset, - &mdc->parent_reset); + resettable_class_set_parent_phases(rc, NULL, mos6522_cuda_reset_hold, + NULL, &mdc->parent_phases); mdc->portB_write = mos6522_cuda_portB_write; mdc->get_timer1_counter_value = cuda_get_counter_value; mdc->get_timer2_counter_value = cuda_get_counter_value; diff --git a/hw/misc/macio/pmu.c b/hw/misc/macio/pmu.c index 70562ed8d07..97ef8c771b6 100644 --- a/hw/misc/macio/pmu.c +++ b/hw/misc/macio/pmu.c @@ -797,14 +797,16 @@ static void mos6522_pmu_portB_write(MOS6522State *s) pmu_update(ps); } -static void mos6522_pmu_reset(DeviceState *dev) +static void mos6522_pmu_reset_hold(Object *obj) { - MOS6522State *ms = MOS6522(dev); + MOS6522State *ms = MOS6522(obj); MOS6522PMUState *mps = container_of(ms, MOS6522PMUState, parent_obj); PMUState *s = container_of(mps, PMUState, mos6522_pmu); MOS6522DeviceClass *mdc = MOS6522_GET_CLASS(ms); - mdc->parent_reset(dev); + if (mdc->parent_phases.hold) { + mdc->parent_phases.hold(obj); + } ms->timers[0].frequency = VIA_TIMER_FREQ; ms->timers[1].frequency = (SCALE_US * 6000) / 4700; @@ -814,11 +816,11 @@ static void mos6522_pmu_reset(DeviceState *dev) static void mos6522_pmu_class_init(ObjectClass *oc, void *data) { - DeviceClass *dc = DEVICE_CLASS(oc); + ResettableClass *rc = RESETTABLE_CLASS(oc); MOS6522DeviceClass *mdc = MOS6522_CLASS(oc); - device_class_set_parent_reset(dc, mos6522_pmu_reset, - &mdc->parent_reset); + resettable_class_set_parent_phases(rc, NULL, mos6522_pmu_reset_hold, + NULL, &mdc->parent_phases); mdc->portB_write = mos6522_pmu_portB_write; } From patchwork Fri Dec 16 21:42:19 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 634456 Delivered-To: patch@linaro.org Received: by 2002:a17:522:c983:b0:460:3032:e3c4 with SMTP id kr3csp1079981pvb; Fri, 16 Dec 2022 14:11:00 -0800 (PST) X-Google-Smtp-Source: AA0mqf5bDV4GaaiSDka/2f3RBV6L4BZC9vlr7DSWaCCCsu6mWk0cmjJY2N/R/6pdnjlGO9TnCPtj X-Received: by 2002:a05:622a:4d0b:b0:3a8:1d3c:47e1 with SMTP id fd11-20020a05622a4d0b00b003a81d3c47e1mr28727492qtb.58.1671228659922; Fri, 16 Dec 2022 14:10:59 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1671228659; cv=none; d=google.com; s=arc-20160816; b=LQP5TRgQlAU3a7KIw5CF/rNY/GhvW8H1QRhzLlNBtfuwy03z5liP1JyGnYQRk1Y/BM i6xrxKG89rPTkRHyDwsQ0X6mA9OoJKiH/cK3Uwmw2W65BVXMRhvIGDiNVAI2JMr4xIVC aW56Uuy6spLFyTs1D/r/4xbMS4aIZ2oPIaEDvtWix9BMQ1pxoQa4AFTl6T/AvQACbsWd Bgyb2thxUH5UdLzHx5YDbBoqqgEnxorQIaXzu1Qff0pAZW3tU6T8MqWZ+ttFjJuGKm/H f1YGp4cGMkOlEHfoslCHUf6eyav21ZcVwYEZpxb2sZ346AAq1aJP0xeVbuyHIDHD3jGr XWxg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=7JDlZZ95XjtIp7lmmMxiRnDc54R2t8VHCWZoay81uuo=; b=BunBjyR7jj4bWLnVEeh0ZkEmKiAWJ1YzE2BaoZgQ6+39uZyS5UAg7SEYKctd0co+ct Oa3sgYURmnmnZEWMhJuyT5LVDxxcbMrErnSXNSut9Ime+hJQtIFUdLRp7jbqk4KRHYCQ GYYe/WH3Rb8jXrjFbBIjpjbsdCRpKAkwriPCV3kYtC6ycHRRn8HHl5/ncdt0uk+847ym 1/bqGmGxherTMLhiYTItzN/0LFVs/U7xBC2DwZOYzNuvk8tk+RoYgiVbT7E4u82OSCit VvKZQLYfLN7xTnaKUez1WQSIiKhs6lpbzpUVoRfqSV9PNSwgy2jeS8aKBi/klrCd4mHz VD2A== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=qb+2tEd3; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id l10-20020ac84a8a000000b003a97befcdb9si332709qtq.641.2022.12.16.14.10.59 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Fri, 16 Dec 2022 14:10:59 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=qb+2tEd3; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1p6IU6-00062M-AD; Fri, 16 Dec 2022 16:43:14 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1p6ITt-0005wj-Db for qemu-devel@nongnu.org; Fri, 16 Dec 2022 16:43:05 -0500 Received: from mail-wm1-x32d.google.com ([2a00:1450:4864:20::32d]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1p6ITp-0000ck-JY for qemu-devel@nongnu.org; Fri, 16 Dec 2022 16:43:01 -0500 Received: by mail-wm1-x32d.google.com with SMTP id f13-20020a1cc90d000000b003d08c4cf679so2678214wmb.5 for ; Fri, 16 Dec 2022 13:42:57 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=7JDlZZ95XjtIp7lmmMxiRnDc54R2t8VHCWZoay81uuo=; b=qb+2tEd3ZMRI8oYO2pEAvtPDETaxH9yq6tRX2MTRfIVo+B74H2pXLtzp3KkZodsm3y WCmFGJxa8y9CkLDa2W0eDB2vFcZ4TxJWQ+gldQs1YjA997ivDEoQF1GYJN0mbZYgU12J FYVTwXzFcmAm8Eq5nd70M2GQE47NnqCrD7UdYAQa70HD23lVv0GhoybGJLDFUXq3NjfG evCXr5/9tO1z8Bl+7SsVsigyu8IPZ5phwLA2P269051HeIgBHNc3tsbLOR6Z77LIhyUw 5igU4q8iba7+adblpWac6kZopYKgpWmLaOV/HdGaCO8aeqXkK4rPUrOq390NWJXpTXNJ 45JA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=7JDlZZ95XjtIp7lmmMxiRnDc54R2t8VHCWZoay81uuo=; b=bnHpzsN/up1ud/+/6wAH5Q3jgEvVMLMdyfAN32cMipchTYe25WrFqXdRC1OXN61doh GJdZE+0CyWcGyOy/Isg+ABiMWLCPVlr9nUmjIsCwvv+cpZp0jE3/mWvnbZ2ZonGz5+Zy TUtvnPPxL1Bi4b3jORiFlqQsBvWCgLEC126x43WgJtwEKYMpB91DsY/4daoPjHYSh5it xGmGITiZVnPbRvbftf5Mgky/MSsTqkIBbOsCXBTjCdggC7IAvwMbcA+B5IKkMKG5VyHx QUsMTe3HOHGo79SxKibq/s/UAoKAsQ4uuIr0wTcn30SYbjzT0fRr5c85V0NqGGJ3v6D0 XnQw== X-Gm-Message-State: ANoB5pnJUMY8rYPbAsRxUyukmzgAr8PrEVrMxETji6LSpqAyHL4KR3qH f4RGKbUjWlsRI2a5AqlA4zGBV8G8fecrPD1R X-Received: by 2002:a05:600c:1e01:b0:3cf:a4fa:510 with SMTP id ay1-20020a05600c1e0100b003cfa4fa0510mr26952345wmb.30.1671226976267; Fri, 16 Dec 2022 13:42:56 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id y7-20020a05600c364700b003d33ab317dasm4135263wmq.14.2022.12.16.13.42.55 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 16 Dec 2022 13:42:55 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 11/36] hw/core/cpu-common: Convert TYPE_CPU class to 3-phase reset Date: Fri, 16 Dec 2022 21:42:19 +0000 Message-Id: <20221216214244.1391647-12-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221216214244.1391647-1-peter.maydell@linaro.org> References: <20221216214244.1391647-1-peter.maydell@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32d; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x32d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Convert the parent class TYPE_CPU to 3-phase reset. This is a necessary prerequisite to converting the subclasses. Signed-off-by: Peter Maydell Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Reviewed-by: Alistair Francis Message-id: 20221124115023.2437291-2-peter.maydell@linaro.org --- hw/core/cpu-common.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/hw/core/cpu-common.c b/hw/core/cpu-common.c index f9fdd46b9d7..78b5f350a00 100644 --- a/hw/core/cpu-common.c +++ b/hw/core/cpu-common.c @@ -116,9 +116,9 @@ void cpu_reset(CPUState *cpu) trace_guest_cpu_reset(cpu); } -static void cpu_common_reset(DeviceState *dev) +static void cpu_common_reset_hold(Object *obj) { - CPUState *cpu = CPU(dev); + CPUState *cpu = CPU(obj); CPUClass *cc = CPU_GET_CLASS(cpu); if (qemu_loglevel_mask(CPU_LOG_RESET)) { @@ -259,6 +259,7 @@ static int64_t cpu_common_get_arch_id(CPUState *cpu) static void cpu_class_init(ObjectClass *klass, void *data) { DeviceClass *dc = DEVICE_CLASS(klass); + ResettableClass *rc = RESETTABLE_CLASS(klass); CPUClass *k = CPU_CLASS(klass); k->parse_features = cpu_common_parse_features; @@ -269,7 +270,7 @@ static void cpu_class_init(ObjectClass *klass, void *data) set_bit(DEVICE_CATEGORY_CPU, dc->categories); dc->realize = cpu_common_realizefn; dc->unrealize = cpu_common_unrealizefn; - dc->reset = cpu_common_reset; + rc->phases.hold = cpu_common_reset_hold; cpu_class_init_props(dc); /* * Reason: CPUs still need special care by board code: wiring up From patchwork Fri Dec 16 21:42:20 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 634501 Delivered-To: patch@linaro.org Received: by 2002:a17:522:c983:b0:460:3032:e3c4 with SMTP id kr3csp1088710pvb; Fri, 16 Dec 2022 14:33:33 -0800 (PST) X-Google-Smtp-Source: AA0mqf7PjgS/cj/GzVA1aJBqF+5ANvZVNFmy7cXHe5ujtvvdKU2IvOzg2ndBt0MER/Gb8P3GHiZe X-Received: by 2002:a0c:ed46:0:b0:4dd:6e9f:697d with SMTP id v6-20020a0ced46000000b004dd6e9f697dmr31665261qvq.25.1671230013160; Fri, 16 Dec 2022 14:33:33 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1671230013; cv=none; d=google.com; s=arc-20160816; b=tWX9xuLL1hxjP2vmh1noaLcruIE1evPXMqPuWzyyiqw+wXUQ17as/+FhNUkJd9dWzj Fod9e6RBoPjFo7JhTPWxecYSl1nFa1ejulPbhIKTRZleFvrqAD2s+KRLUWJtt44NoQe3 kSfnSdVJpVut+jwX/nUSPMbO9NSA5JjJQeIJ7qSE0nul9/NlpjXy9bSmFLM2zPdlYB6V 3Zrje8FdxvYClo68XhR39H84YHquTXcA1uSafZ+MXoCdEqNxP4oTzgSNJey6gMeBsRr6 EDVHOX8XG8RoFs75Lr8EWukFZjcgVpWa8BiZiEZmuSe7z8qQROlBtLCeW9y1ORUVShS7 m7yA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=dunqq5wh2SHxaxGYJwoMKd8AXFWzRcMTlvb9MMShOc4=; b=0jkLCIjEkZXzNkP66UBwoHJ1VmWkXPj15HrHrHcGlV/XvmQY6UklU08yAFvxQq9C+h imPh3VUbEJtGZDrFBfpLNO8u6iNfvGa9+nkez05PokMcYpI5WQSeQtsFY+G0/OoxJmFV KJKP4cVOFPd+s1H8/LAGTzB8HCvMQKRxbn3wG4eyiivvKJzmb/5ChUU3p18COqtfItrb y6SQLk8H8owh5iIC4J+BDd81wpLE8OrXa+SZkouPuCBVXUalKxG0HvDhyX9ASd39MXmS o6kZL+L++UsW7pop3ldNP6PweE8EIg04KTBTgzCC8/7bL4lR3EVukEKIZLaEI+iptyQf clkw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=TLP1xrFh; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id t19-20020a05620a451300b006f95e20a78dsi1691669qkp.556.2022.12.16.14.33.33 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Fri, 16 Dec 2022 14:33:33 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=TLP1xrFh; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1p6IU7-00063k-QC; Fri, 16 Dec 2022 16:43:16 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1p6ITt-0005wk-VA for qemu-devel@nongnu.org; Fri, 16 Dec 2022 16:43:05 -0500 Received: from mail-wm1-x333.google.com ([2a00:1450:4864:20::333]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1p6ITr-0000bF-7y for qemu-devel@nongnu.org; Fri, 16 Dec 2022 16:43:01 -0500 Received: by mail-wm1-x333.google.com with SMTP id bi26-20020a05600c3d9a00b003d3404a89faso1997490wmb.1 for ; Fri, 16 Dec 2022 13:42:57 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=dunqq5wh2SHxaxGYJwoMKd8AXFWzRcMTlvb9MMShOc4=; b=TLP1xrFhSRfMUMqkyT+dTh13tj/ELikcOblvMo5R4hWvlrtYhcjuUN6HLzod2ptn1w Oqoq1DPOcKAHWBfL+Aj3n/yRsgVN+OapNb/SvOCE9SObATp7P+J2RV1OM5TB0vWJl9th bm4g6Ubj8U6N6u740R2JhQh60fjcbi2+LEZF4qpT2WC2TO7mdZ4EITBWVztM+op1CuiF LL/1Aw8uPsUC/WXlhu3tKUlwoAM9dTzKQdFShaUjG/zEAG0l8mEGTOwn70Jcg0epu6iP TnYsEj8P1lhhy7BbRzF3/AYQsGqzdrxwBz3v2hLGdJzy2Boz16fNT+5GPgboR4nlAEAg OotQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=dunqq5wh2SHxaxGYJwoMKd8AXFWzRcMTlvb9MMShOc4=; b=41PqaYvSLc2yzR9BiOhFSMkjFrlJwc5NUKStJbZ1YXbHioMzPO23oHVvjF/XIEnN97 Egua7iPWLRHNGnZ785yk3fNfMxRFbX7kbah/muXRv2z4OQX7xKL+YYFAtcGnPgXEnWVN UNSzVDD+JWr8aYMe0jfCthILUJn4+3kVKumqn55KAENQ+tSzXhZnq7jzxOVpvbBjS5yZ hrSuv+0qvFGNYWnNfY/oTR3x4rdT7lHBkWKUOr5Iafbb7iXdpHJDQyar9v1QjP77pdWK QwQqgU5kWbyDb7FO6TVjPc2z9Rq/yZAII3QMDsR8ULP7AiEtTFmO/FVUZ3vOCNhJAe9J 5WiA== X-Gm-Message-State: ANoB5pnRM/ShBShCqJ98M4CIfRPO1H6GeER7guH9GuJZPDTEb6qaABcy Y6FV9M70f3FkjpEtFZ3XPSl7unCVzOKB8BVF X-Received: by 2002:a05:600c:3d06:b0:3c6:e60f:3f55 with SMTP id bh6-20020a05600c3d0600b003c6e60f3f55mr26989589wmb.12.1671226977379; Fri, 16 Dec 2022 13:42:57 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id y7-20020a05600c364700b003d33ab317dasm4135263wmq.14.2022.12.16.13.42.56 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 16 Dec 2022 13:42:56 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 12/36] target/arm: Convert to 3-phase reset Date: Fri, 16 Dec 2022 21:42:20 +0000 Message-Id: <20221216214244.1391647-13-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221216214244.1391647-1-peter.maydell@linaro.org> References: <20221216214244.1391647-1-peter.maydell@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::333; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x333.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Convert the Arm CPU class to use 3-phase reset, so it doesn't need to use device_class_set_parent_reset() any more. Signed-off-by: Peter Maydell Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Reviewed-by: Alistair Francis Reviewed-by: Cédric Le Goater Message-id: 20221124115023.2437291-3-peter.maydell@linaro.org --- target/arm/cpu-qom.h | 4 ++-- target/arm/cpu.c | 13 +++++++++---- 2 files changed, 11 insertions(+), 6 deletions(-) diff --git a/target/arm/cpu-qom.h b/target/arm/cpu-qom.h index 64c44cef2dd..514c22ced9b 100644 --- a/target/arm/cpu-qom.h +++ b/target/arm/cpu-qom.h @@ -43,7 +43,7 @@ void aarch64_cpu_register(const ARMCPUInfo *info); /** * ARMCPUClass: * @parent_realize: The parent class' realize handler. - * @parent_reset: The parent class' reset handler. + * @parent_phases: The parent class' reset phase handlers. * * An ARM CPU model. */ @@ -54,7 +54,7 @@ struct ARMCPUClass { const ARMCPUInfo *info; DeviceRealize parent_realize; - DeviceReset parent_reset; + ResettablePhases parent_phases; }; diff --git a/target/arm/cpu.c b/target/arm/cpu.c index 0f55004d7e7..2fa022f62ba 100644 --- a/target/arm/cpu.c +++ b/target/arm/cpu.c @@ -202,14 +202,16 @@ static void cp_reg_check_reset(gpointer key, gpointer value, gpointer opaque) assert(oldvalue == newvalue); } -static void arm_cpu_reset(DeviceState *dev) +static void arm_cpu_reset_hold(Object *obj) { - CPUState *s = CPU(dev); + CPUState *s = CPU(obj); ARMCPU *cpu = ARM_CPU(s); ARMCPUClass *acc = ARM_CPU_GET_CLASS(cpu); CPUARMState *env = &cpu->env; - acc->parent_reset(dev); + if (acc->parent_phases.hold) { + acc->parent_phases.hold(obj); + } memset(env, 0, offsetof(CPUARMState, end_reset_fields)); @@ -2211,12 +2213,15 @@ static void arm_cpu_class_init(ObjectClass *oc, void *data) ARMCPUClass *acc = ARM_CPU_CLASS(oc); CPUClass *cc = CPU_CLASS(acc); DeviceClass *dc = DEVICE_CLASS(oc); + ResettableClass *rc = RESETTABLE_CLASS(oc); device_class_set_parent_realize(dc, arm_cpu_realizefn, &acc->parent_realize); device_class_set_props(dc, arm_cpu_properties); - device_class_set_parent_reset(dc, arm_cpu_reset, &acc->parent_reset); + + resettable_class_set_parent_phases(rc, NULL, arm_cpu_reset_hold, NULL, + &acc->parent_phases); cc->class_by_name = arm_cpu_class_by_name; cc->has_work = arm_cpu_has_work; From patchwork Fri Dec 16 21:42:21 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 634443 Delivered-To: patch@linaro.org Received: by 2002:a17:522:c983:b0:460:3032:e3c4 with SMTP id kr3csp1076140pvb; Fri, 16 Dec 2022 14:03:16 -0800 (PST) X-Google-Smtp-Source: AA0mqf5VlVsHeVnWSOJLdKOx9lRfzOCnmzmxNUg5L/smiAz+QDWGgu8swuXemZVzjspPlIr2v8cP X-Received: by 2002:a0c:aa9a:0:b0:4d7:45fb:f5ab with SMTP id f26-20020a0caa9a000000b004d745fbf5abmr36802554qvb.51.1671228195897; Fri, 16 Dec 2022 14:03:15 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1671228195; cv=none; d=google.com; s=arc-20160816; b=mz+JDcLKPSnAsOWrnQSDr260wlIl6SOA5MjNbjSlZSFo0irOuBTZNu1EVjY8MwTEy9 M7NqDW19j+VTAruIPm2Qv6kOLNN4MfZPEAoi/RCNkfY5raTR7fzhKLS7xbirldqjWWEv EGPO9XECR9DGgsf7XzT3vUopXts2scBBBQuie/dVQtuZwgQrH2FyPudV2QLxPwqDVzqK LC13+wGFtvrmzW1CBA61bIjqrx6RhLtfwKS4XLWAhS383sal2RseUpOFtcs2GcZgVa/+ cVUNGALeXv5KTl/qrJc4Px0Yuo+0j4zLfgRlcXVbYQPQznivmuAf9NqpE+AjKgInx9g5 HSGg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=PZCvJDQbNUr26OElgPGYt8xyDSU+rXGhRrJxQ62tt6I=; b=KBVuIiGDPjpBC9AMeth+tvoViHx2bKG1c7Te9CDuwg1BbV/XeJutV1iGAHNafZk2mL mSOvpSlmdgQBNBj3fKtcUlG8VjBcn8Bh+pzcAc7haTX2cEhmV/7tV9Js9CXbkDGV6Z6P M8/L40PKmpzcOTumE8DDJOShHytSDB9lLmfDIwJU19pibIcgDIEgnQJ1ueVAscDGo9X4 3Oj+9j6Ba0LMjkamK3vn8w4Duu/UFFfU0SS0u7FfIFZqwkMSqBJrR9GCQ+oENxQUM/6C no521aWmjnjVrkVB7sQcFj/ywNYdvq0HxWorQJTeNTOap4PGeRsUD/0RR7Vo/EkRpCG1 uWog== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=YYoy1aO3; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id iw8-20020a0562140f2800b004ad70cb5675si1642805qvb.393.2022.12.16.14.03.15 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Fri, 16 Dec 2022 14:03:15 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=YYoy1aO3; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1p6IU4-00061Q-9s; Fri, 16 Dec 2022 16:43:12 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1p6ITt-0005wl-WA for qemu-devel@nongnu.org; Fri, 16 Dec 2022 16:43:06 -0500 Received: from mail-wm1-x335.google.com ([2a00:1450:4864:20::335]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1p6ITs-0000eW-Dd for qemu-devel@nongnu.org; Fri, 16 Dec 2022 16:43:01 -0500 Received: by mail-wm1-x335.google.com with SMTP id o15so2731588wmr.4 for ; Fri, 16 Dec 2022 13:42:59 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=PZCvJDQbNUr26OElgPGYt8xyDSU+rXGhRrJxQ62tt6I=; b=YYoy1aO3+lYoJh64G7LrZ1tDNp8x8plOkrOQNOYbQDes7vVon9JENG5KNnXcZAAiCx HMB7H5RvVMRahEd05i2omeeWh6daUiF/QHDkS6NKFdBFLpA4z+RJS4eGtztqFetahV2A NTW6SrhgZNrwgFSKMRbmFtpV5zJiTYTl/lBts4mPnsKwZ+SdIhWYvCngYaj7DieSJs5P fZtkBVWat/jZBaSZSRCu1EtKB1mdP0p7nzWFdhv+lytBMZYHDEOij6yZFdKLeiV7V35G 9iAI4qhgIWJBjE8mnwZxcnbJu4M+hRFD48vsHAliymr30BO+Ly21Sx7cgzXume0VM8jg veYg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=PZCvJDQbNUr26OElgPGYt8xyDSU+rXGhRrJxQ62tt6I=; b=1pEM7DM6xqGTjRrotcuqX7n4KtUiYxo/ee/SbdsvOju9lQL09eBZ10vWWcV/Swzcj0 EEZRi5PwZGlyWS7SEOlBK+i7a9+Ux8mnqIjdavVtGaAGByWTKftwiqOJWP0MPlzNc0nq jVKdWQiLmR0vCi8TYj7nxQ0Se5FBGOTBrCnKPWy01THC3zocO/gmTAFiE8SUfUmHNKr0 SEhQvDQ/XjhasBmLb+raATWg//gljTg4y1p9X+7dhBBjgtGcG8Wh60MUxL1DQ1Ln5IZK Yvr1cdR5HRsspisHJQXC7liIBRZ1Qb4ln0Xn5su93WD2XXTcHNmty+q8P4wso2sU/SZv +Smw== X-Gm-Message-State: ANoB5plbhX23i+yHNCpKwZHLHKA1Jxv+WKZQoWw2dyeMzF8Z0sptGTpn mmDIwJ1Oc38u8xQbOCifaL2VQ9gdpZlv8iXY X-Received: by 2002:a05:600c:3c95:b0:3cf:e7c8:494 with SMTP id bg21-20020a05600c3c9500b003cfe7c80494mr26547301wmb.29.1671226978353; Fri, 16 Dec 2022 13:42:58 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id y7-20020a05600c364700b003d33ab317dasm4135263wmq.14.2022.12.16.13.42.57 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 16 Dec 2022 13:42:57 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 13/36] target/avr: Convert to 3-phase reset Date: Fri, 16 Dec 2022 21:42:21 +0000 Message-Id: <20221216214244.1391647-14-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221216214244.1391647-1-peter.maydell@linaro.org> References: <20221216214244.1391647-1-peter.maydell@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::335; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x335.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Convert the avr CPU class to use 3-phase reset, so it doesn't need to use device_class_set_parent_reset() any more. Signed-off-by: Peter Maydell Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Reviewed-by: Alistair Francis Reviewed-by: Cédric Le Goater Message-id: 20221124115023.2437291-4-peter.maydell@linaro.org --- target/avr/cpu-qom.h | 4 ++-- target/avr/cpu.c | 13 +++++++++---- 2 files changed, 11 insertions(+), 6 deletions(-) diff --git a/target/avr/cpu-qom.h b/target/avr/cpu-qom.h index b5c3507d6d7..01ea5f160b6 100644 --- a/target/avr/cpu-qom.h +++ b/target/avr/cpu-qom.h @@ -31,7 +31,7 @@ OBJECT_DECLARE_CPU_TYPE(AVRCPU, AVRCPUClass, AVR_CPU) /** * AVRCPUClass: * @parent_realize: The parent class' realize handler. - * @parent_reset: The parent class' reset handler. + * @parent_phases: The parent class' reset phase handlers. * * A AVR CPU model. */ @@ -40,7 +40,7 @@ struct AVRCPUClass { CPUClass parent_class; /*< public >*/ DeviceRealize parent_realize; - DeviceReset parent_reset; + ResettablePhases parent_phases; }; diff --git a/target/avr/cpu.c b/target/avr/cpu.c index c7295b488d1..d0139804b9f 100644 --- a/target/avr/cpu.c +++ b/target/avr/cpu.c @@ -67,14 +67,16 @@ static void avr_restore_state_to_opc(CPUState *cs, env->pc_w = data[0]; } -static void avr_cpu_reset(DeviceState *ds) +static void avr_cpu_reset_hold(Object *obj) { - CPUState *cs = CPU(ds); + CPUState *cs = CPU(obj); AVRCPU *cpu = AVR_CPU(cs); AVRCPUClass *mcc = AVR_CPU_GET_CLASS(cpu); CPUAVRState *env = &cpu->env; - mcc->parent_reset(ds); + if (mcc->parent_phases.hold) { + mcc->parent_phases.hold(obj); + } env->pc_w = 0; env->sregI = 1; @@ -223,9 +225,12 @@ static void avr_cpu_class_init(ObjectClass *oc, void *data) DeviceClass *dc = DEVICE_CLASS(oc); CPUClass *cc = CPU_CLASS(oc); AVRCPUClass *mcc = AVR_CPU_CLASS(oc); + ResettableClass *rc = RESETTABLE_CLASS(oc); device_class_set_parent_realize(dc, avr_cpu_realizefn, &mcc->parent_realize); - device_class_set_parent_reset(dc, avr_cpu_reset, &mcc->parent_reset); + + resettable_class_set_parent_phases(rc, NULL, avr_cpu_reset_hold, NULL, + &mcc->parent_phases); cc->class_by_name = avr_cpu_class_by_name; From patchwork Fri Dec 16 21:42:22 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 634452 Delivered-To: patch@linaro.org Received: by 2002:a17:522:c983:b0:460:3032:e3c4 with SMTP id kr3csp1079344pvb; Fri, 16 Dec 2022 14:09:35 -0800 (PST) X-Google-Smtp-Source: AA0mqf5q2avLURHb1Bnb69Phfrq+B2mKtxjOGaQ6Qw1cClCh9dtxtaFvm9vnVEbK4UIzUHoFqPpa X-Received: by 2002:a05:6122:e42:b0:3be:21e0:5dfe with SMTP id bj2-20020a0561220e4200b003be21e05dfemr16084379vkb.0.1671228575215; Fri, 16 Dec 2022 14:09:35 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1671228575; cv=none; d=google.com; s=arc-20160816; b=OU6kv5eQQFbPipFAsSKGMuaq1EINVKtQd7HjkF1y+7TIDDX4qL3uf5J4D3D0TAiWAr Dn4mJwrY+bjepwV3XGROVvmTAktvVQ/0QiIUjbCZJV12vBsNV5pgQAXeFtge/iGsD/+Q T/Y9nPq0+mnHzYQO6PD5oFnVhW49rupHBKf1EvkH30e7qJTEY+pvg4cjyuIIOUf3lD5r JrP3gFwRU6TsMHpqL42RJgB027vm2hmUXZT4U+oe2qahv+K5D9ZPbisHKYL0T/czCILk Lqtps3TFD3MFE6hT/FBL+I90VFiF9qU/EXOiwg6in2Iym3BMb5qvG4c9xZvJkA1pOMzM WKuQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=q8tZDsND3tybaP48R6M+gEKoRel5tUUnDBAqMV6lK9Q=; b=tkKreCSqfnl7rw7pumM9tmKQW/lgJrfKZAuZvKILpv5RTv3wnTyBThp459Bj97FkPx RAZ+0qFjUDUgwLhL/8KPEgV9qkKAxbJHtdeZaPlsQn1hmqcULB+Jii7rkMTrHxfExehN +Ca4MaON27z3bPPXDlBSVJOPusercnQWr/OpTzJkB+VnwSbphjPm8FFvT3UnAiQ5weHP 9A6Hhx6+DT8x8goji+62KW0agpGti07oVOSI+iH+ml+4HCaXoKAdpZZ0xflpzrnUD3bh JDEykfQJ+aQpcwMUHmsmPgxlJ//JM4VsTZQayii2DpmOeZf9mRMzOFWnpB+UpoJaB69M wN8g== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=EfjNw6lL; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id u3-20020ae9c003000000b006fca0358d87si1466179qkk.239.2022.12.16.14.09.35 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Fri, 16 Dec 2022 14:09:35 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=EfjNw6lL; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1p6IU2-00060x-T6; Fri, 16 Dec 2022 16:43:10 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1p6ITu-0005wq-IP for qemu-devel@nongnu.org; Fri, 16 Dec 2022 16:43:06 -0500 Received: from mail-wm1-x32d.google.com ([2a00:1450:4864:20::32d]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1p6ITs-0000ea-P6 for qemu-devel@nongnu.org; Fri, 16 Dec 2022 16:43:02 -0500 Received: by mail-wm1-x32d.google.com with SMTP id bi26-20020a05600c3d9a00b003d3404a89faso1997512wmb.1 for ; Fri, 16 Dec 2022 13:43:00 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=q8tZDsND3tybaP48R6M+gEKoRel5tUUnDBAqMV6lK9Q=; b=EfjNw6lLQ7hF6jJDimXg59ek5raX471SFaougtz/J6/qx3/dk8eIHkCB7Tma4zLBOQ +GomQ3uBMM6PHaQf3nvFLWHRcKHZZHhYXkLLruIPh8DVp7zWrl6zEEUK8YVypbceI8es ISSngj/3F5005JvE7/WfuRi3sbiMidwk+K0txKaxHhf8yfwiH67icNNQigy1xHS8PfhN Zsv6QQ4wUrR3zXcJSvCIkUoSbsXV9rqvNPSUBugvqIEpt1Dup54jf/psbiBX+jByQXs7 Cv4CAgpxA/6RL4qV5xA5Qnh6eW/9TkmFkIYtv0ER3hd8uQzTGhxCOMHLsLcRmTLe58Lu I9JQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=q8tZDsND3tybaP48R6M+gEKoRel5tUUnDBAqMV6lK9Q=; b=rwUTXFVNZOYKbv5FO6gF3xnhRPepPaYg+xMstd7TXC0UTQK4CBPCroG8ZAJq+l170R GhYKpvJcUVZNUl7hiLRrrFcbqFnyW+4X5a1Htl3dF4+mf9N8P5nJfpd32BRT0GQvyrRC mjQVJoeZb7fnEQ539AadhXgE0DRgTF5L8te+TVM9jNFXiKkhtBgN/mCWDCQtRWyMy7Wx aRMu1xy6MOzwRTW3PVlGMmxCSVcfi3fgsvU9jL205FjRuwNDf9UFKXNGjHSy98ZDw6aH zVZ0XK5+rsbixSVxe/i5WFEr1Nr5+zRwboeq6I6+cO2IwnKyfLartOsDZG318d9OGSMf RCJQ== X-Gm-Message-State: ANoB5pl4hGWl3SJoKf2RMMK7AuZd4iBqucgTmn3Ryexf79E+u00RmH4N fHGjjEfhcuCGrNa1PbaCBPnv/qtT3xlzNIud X-Received: by 2002:a05:600c:3b93:b0:3d2:3e75:7bb9 with SMTP id n19-20020a05600c3b9300b003d23e757bb9mr8073893wms.34.1671226979235; Fri, 16 Dec 2022 13:42:59 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id y7-20020a05600c364700b003d33ab317dasm4135263wmq.14.2022.12.16.13.42.58 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 16 Dec 2022 13:42:58 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 14/36] target/cris: Convert to 3-phase reset Date: Fri, 16 Dec 2022 21:42:22 +0000 Message-Id: <20221216214244.1391647-15-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221216214244.1391647-1-peter.maydell@linaro.org> References: <20221216214244.1391647-1-peter.maydell@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32d; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x32d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Convert the cris CPU class to use 3-phase reset, so it doesn't need to use device_class_set_parent_reset() any more. Signed-off-by: Peter Maydell Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Reviewed-by: Alistair Francis Reviewed-by: Cédric Le Goater Reviewed-by: Edgar E. Iglesias Message-id: 20221124115023.2437291-5-peter.maydell@linaro.org --- target/cris/cpu-qom.h | 4 ++-- target/cris/cpu.c | 12 ++++++++---- 2 files changed, 10 insertions(+), 6 deletions(-) diff --git a/target/cris/cpu-qom.h b/target/cris/cpu-qom.h index 71e8af0e70a..431a1d536a9 100644 --- a/target/cris/cpu-qom.h +++ b/target/cris/cpu-qom.h @@ -30,7 +30,7 @@ OBJECT_DECLARE_CPU_TYPE(CRISCPU, CRISCPUClass, CRIS_CPU) /** * CRISCPUClass: * @parent_realize: The parent class' realize handler. - * @parent_reset: The parent class' reset handler. + * @parent_phases: The parent class' reset phase handlers. * @vr: Version Register value. * * A CRIS CPU model. @@ -41,7 +41,7 @@ struct CRISCPUClass { /*< public >*/ DeviceRealize parent_realize; - DeviceReset parent_reset; + ResettablePhases parent_phases; uint32_t vr; }; diff --git a/target/cris/cpu.c b/target/cris/cpu.c index fb05dc6f9ab..a6a93c23595 100644 --- a/target/cris/cpu.c +++ b/target/cris/cpu.c @@ -56,15 +56,17 @@ static bool cris_cpu_has_work(CPUState *cs) return cs->interrupt_request & (CPU_INTERRUPT_HARD | CPU_INTERRUPT_NMI); } -static void cris_cpu_reset(DeviceState *dev) +static void cris_cpu_reset_hold(Object *obj) { - CPUState *s = CPU(dev); + CPUState *s = CPU(obj); CRISCPU *cpu = CRIS_CPU(s); CRISCPUClass *ccc = CRIS_CPU_GET_CLASS(cpu); CPUCRISState *env = &cpu->env; uint32_t vr; - ccc->parent_reset(dev); + if (ccc->parent_phases.hold) { + ccc->parent_phases.hold(obj); + } vr = env->pregs[PR_VR]; memset(env, 0, offsetof(CPUCRISState, end_reset_fields)); @@ -305,11 +307,13 @@ static void cris_cpu_class_init(ObjectClass *oc, void *data) DeviceClass *dc = DEVICE_CLASS(oc); CPUClass *cc = CPU_CLASS(oc); CRISCPUClass *ccc = CRIS_CPU_CLASS(oc); + ResettableClass *rc = RESETTABLE_CLASS(oc); device_class_set_parent_realize(dc, cris_cpu_realizefn, &ccc->parent_realize); - device_class_set_parent_reset(dc, cris_cpu_reset, &ccc->parent_reset); + resettable_class_set_parent_phases(rc, NULL, cris_cpu_reset_hold, NULL, + &ccc->parent_phases); cc->class_by_name = cris_cpu_class_by_name; cc->has_work = cris_cpu_has_work; From patchwork Fri Dec 16 21:42:23 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 634441 Delivered-To: patch@linaro.org Received: by 2002:a17:522:c983:b0:460:3032:e3c4 with SMTP id kr3csp1071657pvb; Fri, 16 Dec 2022 13:51:53 -0800 (PST) X-Google-Smtp-Source: AA0mqf4bR2+yOt1gojxP/kHQ0O3lWSCYa6QTlBx/qDkF2MyPObAOPI4TyGE/hCVjdGS900JQLC8I X-Received: by 2002:ac8:7949:0:b0:3a8:991:bfa5 with SMTP id r9-20020ac87949000000b003a80991bfa5mr38147604qtt.44.1671227513637; Fri, 16 Dec 2022 13:51:53 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1671227513; cv=none; d=google.com; s=arc-20160816; b=Q4tk+u1S2tNF/lphWyNniG4tgU3AjdWIzN0/pIm+yT8ZhY6vRK8VGyVAIFVAuybWCP 8Zm+5PvEHGKNSU0cd9r9aaVNfPCh6ZugC0hB5aTvJHYwvhI3kYcNcFfbqgI6JZyOcOpn lmyXoDubV8FLXj3BZ/81ECRrSXQUBT+nQX1aBNSoLqXl/wtchde/SZwT9T75fGcZVD4U FKvfckolkVYFdLgUnez8zmTmAW+z9beND1jjYar2TAglOtT4yHxBv7XsArFgPmPlVIp6 FJyo1sfWDWU0L0MfWdrcvAbllW+By5YSO2aEYrAvDNVNF27dCx1FZDYtJaGQro1AnLvo Qa9g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=NlLR2z3qolE9UkVci7mw2GXgMx349fCTP5JUzSE62RQ=; b=ERIs+Tc3hO0gegV9PURRkZHZXXaeUsesfJm/GWSZTAFt7dmdVeSdlbWOk3HstX3YlH lBdrLXSJN9sey0q07bPcqrcwY+plb9zg3pYWZ6kM5ydwG4l1KdCUa4OY6mZPE/sRH/CF bsqMx/O1YM2T+PIux2EjzhQlwS8U1gdrAEzL/p3QXWsxFQDGhZYSYaSfw2aMNCnF81E+ 2+GejvtQu9wD+dH0xTj5uaVJgV8UDx1Az07CGFWqagEsaGu1ykD8O078sYi1dOOCi9Fy d1t5GlP5etX48QesJkY59Sey7x/fIKUhvp8dGx3eZeq0MqKGtj5OuWlyYPM08LSUrb4Z MiBg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=bScts5i5; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id r13-20020ac867cd000000b0039a1d73d2dcsi1509587qtp.226.2022.12.16.13.51.53 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Fri, 16 Dec 2022 13:51:53 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=bScts5i5; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1p6IU4-00061Z-EU; Fri, 16 Dec 2022 16:43:12 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1p6ITu-0005wt-M5 for qemu-devel@nongnu.org; Fri, 16 Dec 2022 16:43:06 -0500 Received: from mail-wm1-x330.google.com ([2a00:1450:4864:20::330]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1p6ITs-0000ag-QB for qemu-devel@nongnu.org; Fri, 16 Dec 2022 16:43:02 -0500 Received: by mail-wm1-x330.google.com with SMTP id ay14-20020a05600c1e0e00b003cf6ab34b61so5001336wmb.2 for ; Fri, 16 Dec 2022 13:43:00 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=NlLR2z3qolE9UkVci7mw2GXgMx349fCTP5JUzSE62RQ=; b=bScts5i56vU/uLIcXiRNf5AUdcGkeLW/PbIaYPQDLAKftZ0zUFClUy1QiLY5G/mFv8 cjiMAZLn/f9h54F0QUyPR6Q/IQqPpzwBsCHOpFhCFvL8QNDyBT5ZCnVy8cPBLp0hy566 s0OVA6AsXFBl8IMs5VSdI3GPrZ9egUxh5eWAeoJQM8CQxCm7EKGU7SHhF/B6FZur5ELF 0nP9JAMSmW9jNUBwDfsj4gBE4cnP71dylBMOBvUNxo9tQ6obw+bnfVqGE+4As4b8xm0h G0Hjj4HCmdm8+JV73KL5ckyQ4oFYaWW7WhCSmtxKdQC/TBopys5bHMVFq8MHRA3Rdv9J 9hQQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=NlLR2z3qolE9UkVci7mw2GXgMx349fCTP5JUzSE62RQ=; b=K/W2zd4B7z3G/7qCgKKiO7smGVzBp/QVRjiQaMo/Tk2J0SAWponU46ljaAtitWWZwu rP87/wnRR8mJSF7tkVJWCBITvPXDNSMHzymHOfzRBIfOknIC9VOhMBwGi9VCit+vDElB aoPUYBvBmODXkDf6CYSCbP3VrjTgvoETEVqLIhtlQelHVn0cPgF7UjkKc2etwltpjl+b ELmkojwLkgPu9pQ+fmu3MKPX5u2uDry3Ko/5nSNQhTb62t0Def5C/NSbRuLbRtFriuQ+ lWqGVQQLZ5B025DxjPam8o9HGrSCVy4Vn4us1A9HC4GGp/rriU5Lfw0oB2T+d7ogf1kT 4oYg== X-Gm-Message-State: AFqh2koxjrSiFoP7zcS6nhmk70GQR0FnQWzDqnIj448xHnH1pq9ZrvFv Es37d0BnJCji8ZEsKWmYeCDJPSvN3LyWwoU4 X-Received: by 2002:a05:600c:1e29:b0:3d3:404a:8a1b with SMTP id ay41-20020a05600c1e2900b003d3404a8a1bmr3957083wmb.8.1671226980085; Fri, 16 Dec 2022 13:43:00 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id y7-20020a05600c364700b003d33ab317dasm4135263wmq.14.2022.12.16.13.42.59 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 16 Dec 2022 13:42:59 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 15/36] target/hexagon: Convert to 3-phase reset Date: Fri, 16 Dec 2022 21:42:23 +0000 Message-Id: <20221216214244.1391647-16-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221216214244.1391647-1-peter.maydell@linaro.org> References: <20221216214244.1391647-1-peter.maydell@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::330; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x330.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Convert the hexagon CPU class to use 3-phase reset, so it doesn't need to use device_class_set_parent_reset() any more. Signed-off-by: Peter Maydell Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Reviewed-by: Alistair Francis Reviewed-by: Cédric Le Goater Reviewed-by: Edgar E. Iglesias Reviewed-by: Taylor Simpson Message-id: 20221124115023.2437291-6-peter.maydell@linaro.org --- target/hexagon/cpu.h | 2 +- target/hexagon/cpu.c | 12 ++++++++---- 2 files changed, 9 insertions(+), 5 deletions(-) diff --git a/target/hexagon/cpu.h b/target/hexagon/cpu.h index 2a65a57bab3..794a0453fd4 100644 --- a/target/hexagon/cpu.h +++ b/target/hexagon/cpu.h @@ -137,7 +137,7 @@ typedef struct HexagonCPUClass { CPUClass parent_class; /*< public >*/ DeviceRealize parent_realize; - DeviceReset parent_reset; + ResettablePhases parent_phases; } HexagonCPUClass; struct ArchCPU { diff --git a/target/hexagon/cpu.c b/target/hexagon/cpu.c index 03221fbdc28..658ca4ff783 100644 --- a/target/hexagon/cpu.c +++ b/target/hexagon/cpu.c @@ -281,14 +281,16 @@ static void hexagon_restore_state_to_opc(CPUState *cs, env->gpr[HEX_REG_PC] = data[0]; } -static void hexagon_cpu_reset(DeviceState *dev) +static void hexagon_cpu_reset_hold(Object *obj) { - CPUState *cs = CPU(dev); + CPUState *cs = CPU(obj); HexagonCPU *cpu = HEXAGON_CPU(cs); HexagonCPUClass *mcc = HEXAGON_CPU_GET_CLASS(cpu); CPUHexagonState *env = &cpu->env; - mcc->parent_reset(dev); + if (mcc->parent_phases.hold) { + mcc->parent_phases.hold(obj); + } set_default_nan_mode(1, &env->fp_status); set_float_detect_tininess(float_tininess_before_rounding, &env->fp_status); @@ -339,11 +341,13 @@ static void hexagon_cpu_class_init(ObjectClass *c, void *data) HexagonCPUClass *mcc = HEXAGON_CPU_CLASS(c); CPUClass *cc = CPU_CLASS(c); DeviceClass *dc = DEVICE_CLASS(c); + ResettableClass *rc = RESETTABLE_CLASS(c); device_class_set_parent_realize(dc, hexagon_cpu_realize, &mcc->parent_realize); - device_class_set_parent_reset(dc, hexagon_cpu_reset, &mcc->parent_reset); + resettable_class_set_parent_phases(rc, NULL, hexagon_cpu_reset_hold, NULL, + &mcc->parent_phases); cc->class_by_name = hexagon_cpu_class_by_name; cc->has_work = hexagon_cpu_has_work; From patchwork Fri Dec 16 21:42:24 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 634459 Delivered-To: patch@linaro.org Received: by 2002:a17:522:c983:b0:460:3032:e3c4 with SMTP id kr3csp1080751pvb; Fri, 16 Dec 2022 14:12:43 -0800 (PST) X-Google-Smtp-Source: AA0mqf4D6mhEipUWAL9cG9wcDkBl5lC8tJQpFVkH6Uo/rtIyrIl68+0YcrCaEWSSBXQhcEzS2vdv X-Received: by 2002:a05:6214:5449:b0:4e8:c749:73a7 with SMTP id kz9-20020a056214544900b004e8c74973a7mr22859693qvb.37.1671228763469; Fri, 16 Dec 2022 14:12:43 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1671228763; cv=none; d=google.com; s=arc-20160816; b=N0qEQqu4BicpEhdzqE1m6Inc0Hz7xvPGM6k8V6QP8uZb4mlldJEXEiG3/iSR9g0+OB zWy4jAzfK4oEqoTSVRqSIHPu/Pkca0/FKbIJ0AZN6SeryghBXDO1/OAUNG/WxvZI/mo4 tdjhgYi8W0pHsS7gSU89oo1XEygFMr4PfeI1J1IhGjnk1WHxA0Z/Jr6CHd6BP0xMhs9V 0qYDi6Qql9gGS5e4g484z19wSQ1PCAW3/RxggicQkPrJI5UWplM9HbF9HAArnqUxdxKF WpMcgQBQ4NAwUqNQ9vQ5vClZY7prOKm7HEEcekqe9CwuxuN5ULIj+XydJ8ZKHU4Ay9iD GAeQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=JHNhVzZ7q07vjZsQq3XKlgrS7g2PS5zs14Th7/Xr78I=; b=IWQUJUo+1Sgk8QNTOuVirF+npHl+subx69zSj64VV8Lz0pZCYuBoii6rBe2gw4BTsU FvgSqyUkBKhplg75lNVf5Ss2Xi+x4XJcn/yIkuA7ZZSUKcy48ece136Y0Y6E5N0joqc/ QFyZDdg/vmysWoPjrfB5Jz7goYNZf0X6vlsWeyg/kQ8XQHcPWugdHp51JCJAfvtGtoM8 3DrdGGOu9nrwWUSAahAeWjSJ+MEppCxl7SwwWiLnKUorwrxT+cgyDmmDDmxsacBED/AR cVstzQJLgR8WSQdQmAo9UF8mI8tP/KaEP1xLs0HnKpUzgTgYxrFWRcdgn4+t0FoGSc0b M61Q== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=dHHcUfTE; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id dl11-20020a05620a1d0b00b006ced0d02b95si1417944qkb.72.2022.12.16.14.12.43 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Fri, 16 Dec 2022 14:12:43 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=dHHcUfTE; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1p6IU4-00061L-55; Fri, 16 Dec 2022 16:43:12 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1p6ITw-0005wx-3z for qemu-devel@nongnu.org; Fri, 16 Dec 2022 16:43:06 -0500 Received: from mail-wm1-x32f.google.com ([2a00:1450:4864:20::32f]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1p6ITu-0000fE-EE for qemu-devel@nongnu.org; Fri, 16 Dec 2022 16:43:03 -0500 Received: by mail-wm1-x32f.google.com with SMTP id v7so2786418wmn.0 for ; Fri, 16 Dec 2022 13:43:02 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=JHNhVzZ7q07vjZsQq3XKlgrS7g2PS5zs14Th7/Xr78I=; b=dHHcUfTEe3uzd7KDM0p+Bh7WAxnBRKrUCEiZcuVdJdse7QHSYJnwNkF27ItWWbRry4 aW9ZNCGPzUgklzofxwPWylpw3OuCceMsg5MDtOZ3mdsx7vEiYkRk4kmydZfazwL/ijP5 1fWqkwk3w9aVzvE8mlM7Q3YXtEORO9y53W83LcymuHJxO203li9Yzeti0VZ6nXBpRSdz 7AUl/jsy01h/VB8T4yyu/2RDFqTyg2WRlsdSTidvlQkagczpMlGERcU76QRpYRNkUciv CszSUZSRKyt6Wf+6viMwqJC3cj2IDAZcQrNx/W8Ms4ibucJ4DlNNUKSF1CPh5Se4rHRu ODtw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=JHNhVzZ7q07vjZsQq3XKlgrS7g2PS5zs14Th7/Xr78I=; b=BI6JpMQKuBnUMJut2+fbMR/S3J/v2CMCPsl6NbLrpdDmmgWD0P7nZ0+56lLTro9/ch 3wDhV9S0y+7mBWlDfGq0e7Rp8wIWsVw6kgnooubbSY7h+lzVhLAjAbFAzrrk4Xpv23pN SX+UfcZGChbKLJem7eAd3Tf4OIJ5AVG7Kha6bfuouIAKwx6QFW1eSd9hmEmrO/2wn+NL jZBkNRN9axrqSEhv3Vc77VDYwVh2AnOlBL9ZjavhzN67eY3gEGrFyDcBCjdKrQoqASAi tbP1UfoKbWF+2gwv3XlhafRiiOPgTcQ+C+Co8jKX49CbvexBOOKUggmCcCDb3aZaZstw K9dQ== X-Gm-Message-State: ANoB5pk+Oy9rz9T3UsoazeovKGM/nmqQvAftynXVt6ygWEN3J4NN1SEL SLAql98oydBsJqpy72HWCwr/5eEVg1rSS34G X-Received: by 2002:a05:600c:35c4:b0:3cf:85f7:bbc4 with SMTP id r4-20020a05600c35c400b003cf85f7bbc4mr27647692wmq.2.1671226980957; Fri, 16 Dec 2022 13:43:00 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id y7-20020a05600c364700b003d33ab317dasm4135263wmq.14.2022.12.16.13.43.00 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 16 Dec 2022 13:43:00 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 16/36] target/i386: Convert to 3-phase reset Date: Fri, 16 Dec 2022 21:42:24 +0000 Message-Id: <20221216214244.1391647-17-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221216214244.1391647-1-peter.maydell@linaro.org> References: <20221216214244.1391647-1-peter.maydell@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32f; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x32f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Convert the i386 CPU class to use 3-phase reset, so it doesn't need to use device_class_set_parent_reset() any more. Signed-off-by: Peter Maydell Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Reviewed-by: Alistair Francis Reviewed-by: Cédric Le Goater Reviewed-by: Edgar E. Iglesias Reviewed-by: Taylor Simpson Message-id: 20221124115023.2437291-7-peter.maydell@linaro.org --- target/i386/cpu-qom.h | 4 ++-- target/i386/cpu.c | 12 ++++++++---- 2 files changed, 10 insertions(+), 6 deletions(-) diff --git a/target/i386/cpu-qom.h b/target/i386/cpu-qom.h index c557a522e1e..2350f4ae609 100644 --- a/target/i386/cpu-qom.h +++ b/target/i386/cpu-qom.h @@ -42,7 +42,7 @@ typedef struct X86CPUModel X86CPUModel; * @migration_safe: See CpuDefinitionInfo::migration_safe * @static_model: See CpuDefinitionInfo::static * @parent_realize: The parent class' realize handler. - * @parent_reset: The parent class' reset handler. + * @parent_phases: The parent class' reset phase handlers. * * An x86 CPU model or family. */ @@ -67,7 +67,7 @@ struct X86CPUClass { DeviceRealize parent_realize; DeviceUnrealize parent_unrealize; - DeviceReset parent_reset; + ResettablePhases parent_phases; }; diff --git a/target/i386/cpu.c b/target/i386/cpu.c index ae502f0bfea..3410e5e4702 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -5877,9 +5877,9 @@ static void x86_cpu_set_sgxlepubkeyhash(CPUX86State *env) #endif } -static void x86_cpu_reset(DeviceState *dev) +static void x86_cpu_reset_hold(Object *obj) { - CPUState *s = CPU(dev); + CPUState *s = CPU(obj); X86CPU *cpu = X86_CPU(s); X86CPUClass *xcc = X86_CPU_GET_CLASS(cpu); CPUX86State *env = &cpu->env; @@ -5887,7 +5887,9 @@ static void x86_cpu_reset(DeviceState *dev) uint64_t xcr0; int i; - xcc->parent_reset(dev); + if (xcc->parent_phases.hold) { + xcc->parent_phases.hold(obj); + } memset(env, 0, offsetof(CPUX86State, end_reset_fields)); @@ -7111,6 +7113,7 @@ static void x86_cpu_common_class_init(ObjectClass *oc, void *data) X86CPUClass *xcc = X86_CPU_CLASS(oc); CPUClass *cc = CPU_CLASS(oc); DeviceClass *dc = DEVICE_CLASS(oc); + ResettableClass *rc = RESETTABLE_CLASS(oc); FeatureWord w; device_class_set_parent_realize(dc, x86_cpu_realizefn, @@ -7119,7 +7122,8 @@ static void x86_cpu_common_class_init(ObjectClass *oc, void *data) &xcc->parent_unrealize); device_class_set_props(dc, x86_cpu_properties); - device_class_set_parent_reset(dc, x86_cpu_reset, &xcc->parent_reset); + resettable_class_set_parent_phases(rc, NULL, x86_cpu_reset_hold, NULL, + &xcc->parent_phases); cc->reset_dump_flags = CPU_DUMP_FPU | CPU_DUMP_CCOP; cc->class_by_name = x86_cpu_class_by_name; From patchwork Fri Dec 16 21:42:25 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 634494 Delivered-To: patch@linaro.org Received: by 2002:a17:522:c983:b0:460:3032:e3c4 with SMTP id kr3csp1087894pvb; Fri, 16 Dec 2022 14:31:27 -0800 (PST) X-Google-Smtp-Source: AA0mqf4i7aslTCtowfvgaii5dV46uwSciHrp1yDa7cG8Suu8ErI+msl7L6N+RSDesIizyaze0JO0 X-Received: by 2002:a05:622a:1b92:b0:3a5:1dcb:d231 with SMTP id bp18-20020a05622a1b9200b003a51dcbd231mr62683963qtb.59.1671229887055; Fri, 16 Dec 2022 14:31:27 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1671229887; cv=none; d=google.com; s=arc-20160816; b=cR+zN3GgPvLMchXK+ThF0GFkWazsW2JWxNkwxRzBGM1Wha8vuqNCnAdt1NwI8xYC+6 cuuqehESuHk/6+OKdeX5y1qDUIEHFj//RDkm0975qHYu73/JixNETBMfJzrjA63DDR5l pCivWsZ9C22GHxePm0PCaHqaUe8F16oDRNepRUSDCKyo41dN7JX3vQ5Zsg3sgZmP3otW E8IknXuHnF+o7qZctKi1BARBpkysG6kcIfm+UiRBoMoA1jf3WhSQFslYcVuGzy7DYwyX ZCmDyg31jRqQxbxrFKy6wfRXZJ0iatLqWC3gygaDrY0iGO6MdnDYjwE0jJ4c70qkA2ZP 8ASw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=9VfBPDH2IM8XoXDsV415IlApTEkb1iN+XBOOUvBnr0A=; b=bnrk6jLoK3Im4Cw41/Zwd0BWb62tXxv3bgB8lMd2gdPjyG2L74jmOL6MYTsz4dzZx1 aXDcuCrqXDB668yttyQSq85ykPtpqKGgYXttMHk6t2i+w79FcLOI+a9gJ1Z6Qa6BshB4 Y1WJaCTxq9HePHIYi1f5vCJKx2bCQXTQCjVRzvFO8LNMPjlvdsM9nmgP+WfuAAHWYexN XrT0kNSqE5XIPY2xeHZIFCRSUjE7KOXhRVuvlyiCYnImCzwzoq+dHKU+JiCJp7vqrv8P kOeEs0qwIBqsHhej/0l94Q5qtUOKDnP7mhJzunf1Kx/cB2e/cnOTJO9iS1x/oXlozt38 TBBQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=HwEA7ZHl; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id c68-20020a379a47000000b006fcadcd7351si1422892qke.361.2022.12.16.14.31.26 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Fri, 16 Dec 2022 14:31:27 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=HwEA7ZHl; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1p6IU5-00061r-Kn; Fri, 16 Dec 2022 16:43:13 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1p6ITw-0005x7-V1 for qemu-devel@nongnu.org; Fri, 16 Dec 2022 16:43:06 -0500 Received: from mail-wm1-x331.google.com ([2a00:1450:4864:20::331]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1p6ITv-0000fW-BL for qemu-devel@nongnu.org; Fri, 16 Dec 2022 16:43:04 -0500 Received: by mail-wm1-x331.google.com with SMTP id k22-20020a05600c1c9600b003d1ee3a6289so2697596wms.2 for ; Fri, 16 Dec 2022 13:43:02 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=9VfBPDH2IM8XoXDsV415IlApTEkb1iN+XBOOUvBnr0A=; b=HwEA7ZHlNTjz8Zjg2hMtQtIQhuEtcOCn8g0voGgT/Qfp2Iiynn5gmBSoaanEQFdrZ8 0eC6m37EyvWgR8JWlInxWS51ZQyBkqzIPHR1mw5HjRaT+GeCvWYl+wu6WbCAs2v7dyZ8 SslZ6hngnwSJSor4uZJJUjOkbK32gSeMBV+Nb9/DbCpulYIYYb+LuEYk7JOXo6zirVeW JfkhATlrRPG3jPrKZPaHi2fPW5XK13ora/rrNWmdkapZD7ersTq4qf3IKi9JltQej+Ux vEgoqXlRn3Mky34Q82bAr5sdDimBzCmTAllTSbX3CS/fJ/IDmprEfr+ghENsHhkDMi1O VY3Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=9VfBPDH2IM8XoXDsV415IlApTEkb1iN+XBOOUvBnr0A=; b=D2SzgWsmJITkuJG/97TyUDzG7sBxQBwbH7KeAYy+iTJeK0/g96/1d5HV+GEiLN3XR2 j2k+6SMGTwbb6Rr08/lhY29x9Ji2NDbRgt8roHPeNuAO1aBwE5a0CuHnOGPgrunh0bKf jr6sx+rrUtGtwNLzFCczpDfoehBZ7Atyor/dE5vlaSWma0gVBqINAofTfXXdUBFTatNt OvDrbpUsnsB25Q19oqOIuaF64wZLMUH0Bq19Yl916MSEQZRdFMDOUpXmVK80qq5BuF0B V/UxpTiHp/TK32CcEfE8PMioGnKFrvkRFenaIB2BRzGc66+OoIfyApoHFYg7q17e/SCt 2PLw== X-Gm-Message-State: ANoB5pl7qnM3fGqPHlhQh4niH0SHLP44vA0sCDQOSHnqGshObdcNg7cO 9blxfaFMiwtOvDUwJ85A/JYRv7irfwHNEkY1 X-Received: by 2002:a05:600c:2285:b0:3d2:26cd:3b1e with SMTP id 5-20020a05600c228500b003d226cd3b1emr16887366wmf.28.1671226981955; Fri, 16 Dec 2022 13:43:01 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id y7-20020a05600c364700b003d33ab317dasm4135263wmq.14.2022.12.16.13.43.01 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 16 Dec 2022 13:43:01 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 17/36] target/loongarch: Convert to 3-phase reset Date: Fri, 16 Dec 2022 21:42:25 +0000 Message-Id: <20221216214244.1391647-18-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221216214244.1391647-1-peter.maydell@linaro.org> References: <20221216214244.1391647-1-peter.maydell@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::331; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x331.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Convert the loongarch CPU class to use 3-phase reset, so it doesn't need to use device_class_set_parent_reset() any more. Signed-off-by: Peter Maydell Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Reviewed-by: Alistair Francis Reviewed-by: Cédric Le Goater Reviewed-by: Edgar E. Iglesias Reviewed-by: Taylor Simpson Message-id: 20221124115023.2437291-8-peter.maydell@linaro.org --- target/loongarch/cpu.h | 4 ++-- target/loongarch/cpu.c | 12 ++++++++---- 2 files changed, 10 insertions(+), 6 deletions(-) diff --git a/target/loongarch/cpu.h b/target/loongarch/cpu.h index e15c633b0bf..e35cf655975 100644 --- a/target/loongarch/cpu.h +++ b/target/loongarch/cpu.h @@ -356,7 +356,7 @@ OBJECT_DECLARE_CPU_TYPE(LoongArchCPU, LoongArchCPUClass, /** * LoongArchCPUClass: * @parent_realize: The parent class' realize handler. - * @parent_reset: The parent class' reset handler. + * @parent_phases: The parent class' reset phase handlers. * * A LoongArch CPU model. */ @@ -366,7 +366,7 @@ struct LoongArchCPUClass { /*< public >*/ DeviceRealize parent_realize; - DeviceReset parent_reset; + ResettablePhases parent_phases; }; /* diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c index e7b0e12be6a..290ab4d526b 100644 --- a/target/loongarch/cpu.c +++ b/target/loongarch/cpu.c @@ -450,14 +450,16 @@ void loongarch_cpu_list(void) g_slist_free(list); } -static void loongarch_cpu_reset(DeviceState *dev) +static void loongarch_cpu_reset_hold(Object *obj) { - CPUState *cs = CPU(dev); + CPUState *cs = CPU(obj); LoongArchCPU *cpu = LOONGARCH_CPU(cs); LoongArchCPUClass *lacc = LOONGARCH_CPU_GET_CLASS(cpu); CPULoongArchState *env = &cpu->env; - lacc->parent_reset(dev); + if (lacc->parent_phases.hold) { + lacc->parent_phases.hold(obj); + } env->fcsr0_mask = FCSR0_M1 | FCSR0_M2 | FCSR0_M3; env->fcsr0 = 0x0; @@ -694,10 +696,12 @@ static void loongarch_cpu_class_init(ObjectClass *c, void *data) LoongArchCPUClass *lacc = LOONGARCH_CPU_CLASS(c); CPUClass *cc = CPU_CLASS(c); DeviceClass *dc = DEVICE_CLASS(c); + ResettableClass *rc = RESETTABLE_CLASS(c); device_class_set_parent_realize(dc, loongarch_cpu_realizefn, &lacc->parent_realize); - device_class_set_parent_reset(dc, loongarch_cpu_reset, &lacc->parent_reset); + resettable_class_set_parent_phases(rc, NULL, loongarch_cpu_reset_hold, NULL, + &lacc->parent_phases); cc->class_by_name = loongarch_cpu_class_by_name; cc->has_work = loongarch_cpu_has_work; From patchwork Fri Dec 16 21:42:26 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 634489 Delivered-To: patch@linaro.org Received: by 2002:a17:522:c983:b0:460:3032:e3c4 with SMTP id kr3csp1087349pvb; Fri, 16 Dec 2022 14:30:06 -0800 (PST) X-Google-Smtp-Source: AMrXdXvgitJtrSaJGQDF6FXh8cKDrBsVB24OoLcMIvVTQ/wSUCOfLo2aKZUWxght4NMGDAkKU1k4 X-Received: by 2002:ad4:46d4:0:b0:4c6:ef2f:827a with SMTP id pm20-20020ad446d4000000b004c6ef2f827amr104232qvb.5.1671229806555; Fri, 16 Dec 2022 14:30:06 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1671229806; cv=none; d=google.com; s=arc-20160816; b=V/u9PfOqw6OBtSD9Y5h3v16hKMMtuhCL5zPRnieclRb3WzcSNUksSsa9ZiqzFyumpS fsbvtFZUl5LoIzIpoOFtaVnYt+rinKQh5JtsAZAEyMl57dTNgQxoNhIkexf3dnB39vMt xuT+HDtZtln0KtTBAigaTSBvkLcG5R2nRrXWPA/O8+1QkhCeROskREJ4MnbOoAnKxB4U RXTcq7AXzqF+ifwYONeFFegOh6FvvAUfebSgn/Sd3myrgc3hmmZXg5IbXw1hzcXxfFUf vaUth8FgL2HKP6PPYqsF9eP3F4aMDp4/dRCk9m354cmTuSMSrwMAczsEYarECS+5NmGu PMrQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=W0Sgz5RvbZ0+7rq6tAt31bRICOQNwLU3F3RWRUnkyZA=; b=JH1ExqjubgMVHBrxSThh1l9K8BcBAXdzjneXngC9AmKsVDXIS4WeodXb3TWMwehily 6HJj/+LpylSW/1w2jIdrrzzOqb99XIYeDfV/XBqtKTTX65006FSJQzxoYWTCacy5IVUg qmot+E7lROpAFi43mEr0H4yjczPIy4ZU6ZwKGWWkCYhNJurCmqsrmLZVQ66qh8me2zsI otayFQziYQPNf5AkMjuk27M0VWfqstOww4B93BmpKumq5QS00vT65cYwnJ075+jmLrbS 66F92pFO6TybIExcaMCAnBTP/Uq5R8AO5KHuig9NdXFRhydFDhXasCn8fxKFp++EXu6D oN8g== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=nWYsTOO2; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id d188-20020ae9efc5000000b006fed545443bsi1522255qkg.488.2022.12.16.14.30.06 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Fri, 16 Dec 2022 14:30:06 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=nWYsTOO2; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1p6IU5-00061p-5g; Fri, 16 Dec 2022 16:43:13 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1p6ITy-0005y7-DH for qemu-devel@nongnu.org; Fri, 16 Dec 2022 16:43:06 -0500 Received: from mail-wm1-x334.google.com ([2a00:1450:4864:20::334]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1p6ITw-0000fi-Fk for qemu-devel@nongnu.org; Fri, 16 Dec 2022 16:43:05 -0500 Received: by mail-wm1-x334.google.com with SMTP id m19so2730337wms.5 for ; Fri, 16 Dec 2022 13:43:04 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=W0Sgz5RvbZ0+7rq6tAt31bRICOQNwLU3F3RWRUnkyZA=; b=nWYsTOO2+5yZnowRxnSCb+4nrpmfb6c4N60eN+rF9JxW2PjqLssYlEw1w362oz3xKY 5BHROy0SxGdher1BMmUD2L2IXQal2z4sgDLwdti4/4NA/6C5agcrRT0X9gUFHjztRGmZ wNgMneY42Y0K3cs36xArbgGINwLDEc8icKzGRiOvo94Vw27UxP7iH/ImsHFpU8wfE7eC xBFbAzcZrwk0VwCBvGCS856/FLviYEkZFEXllIau6HwK4J2+I+xjzodFDLkb4lZ3IGgB pigOzFfWsIDfccaBtlO3LJYk1wryTjVV7SBl37Rla4cp6kAbSUP89PR/br3bpivJWpzH 43MQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=W0Sgz5RvbZ0+7rq6tAt31bRICOQNwLU3F3RWRUnkyZA=; b=oxA1H4YpJTm7vvXzmMV2U3gxXHnOMiXb+LWkH4qGYkpKhWaovhNOmB92JIvLIMUW2T x2aPY8bfjc2uF9UP1YhsAgwWqhbGt2+govFDR/YuWMzLae/BdBSvurHxOlYZmeiv1fsA XUbK6eV4Pdx6H+BEJ6nBY61D5E2Vlkd8af7HVedgMQsmXx+7BW0jZN7wiMpGyTdUfP0I M34madyVZ6TUX0FYf+wDDnhra6Pw8cUs7cxjYaZXVjEABW8X8x+Q53Cbb18YBIBcIer2 idmDUqbXZr3AF6mzLv9bxuP9SVxEJJMkk1cm6O1N+AHfeBciGbY1w5o1ZWcoILXdlHB7 VrlA== X-Gm-Message-State: ANoB5pmg8k5kTJmQxP2ud4Eff7ncnBhQ5n6hRm0GwkIc515nuSUxDx8i ZuxZyDFSTMKXnbILhshNdfKi2pdcUn+4Fa7h X-Received: by 2002:a05:600c:3b9c:b0:3d1:e710:98ec with SMTP id n28-20020a05600c3b9c00b003d1e71098ecmr35682143wms.21.1671226983264; Fri, 16 Dec 2022 13:43:03 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id y7-20020a05600c364700b003d33ab317dasm4135263wmq.14.2022.12.16.13.43.02 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 16 Dec 2022 13:43:02 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 18/36] target/m68k: Convert to 3-phase reset Date: Fri, 16 Dec 2022 21:42:26 +0000 Message-Id: <20221216214244.1391647-19-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221216214244.1391647-1-peter.maydell@linaro.org> References: <20221216214244.1391647-1-peter.maydell@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::334; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x334.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Convert the m68k CPU class to use 3-phase reset, so it doesn't need to use device_class_set_parent_reset() any more. Signed-off-by: Peter Maydell Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Reviewed-by: Alistair Francis Reviewed-by: Cédric Le Goater Reviewed-by: Edgar E. Iglesias Reviewed-by: Taylor Simpson Message-id: 20221124115023.2437291-9-peter.maydell@linaro.org --- target/m68k/cpu-qom.h | 4 ++-- target/m68k/cpu.c | 12 ++++++++---- 2 files changed, 10 insertions(+), 6 deletions(-) diff --git a/target/m68k/cpu-qom.h b/target/m68k/cpu-qom.h index cd9687192cd..0ec7750a926 100644 --- a/target/m68k/cpu-qom.h +++ b/target/m68k/cpu-qom.h @@ -30,7 +30,7 @@ OBJECT_DECLARE_CPU_TYPE(M68kCPU, M68kCPUClass, M68K_CPU) /* * M68kCPUClass: * @parent_realize: The parent class' realize handler. - * @parent_reset: The parent class' reset handler. + * @parent_phases: The parent class' reset phase handlers. * * A Motorola 68k CPU model. */ @@ -40,7 +40,7 @@ struct M68kCPUClass { /*< public >*/ DeviceRealize parent_realize; - DeviceReset parent_reset; + ResettablePhases parent_phases; }; diff --git a/target/m68k/cpu.c b/target/m68k/cpu.c index b67ddea2aee..99af1ab541a 100644 --- a/target/m68k/cpu.c +++ b/target/m68k/cpu.c @@ -66,16 +66,18 @@ static void m68k_unset_feature(CPUM68KState *env, int feature) env->features &= ~BIT_ULL(feature); } -static void m68k_cpu_reset(DeviceState *dev) +static void m68k_cpu_reset_hold(Object *obj) { - CPUState *s = CPU(dev); + CPUState *s = CPU(obj); M68kCPU *cpu = M68K_CPU(s); M68kCPUClass *mcc = M68K_CPU_GET_CLASS(cpu); CPUM68KState *env = &cpu->env; floatx80 nan = floatx80_default_nan(NULL); int i; - mcc->parent_reset(dev); + if (mcc->parent_phases.hold) { + mcc->parent_phases.hold(obj); + } memset(env, 0, offsetof(CPUM68KState, end_reset_fields)); #ifdef CONFIG_SOFTMMU @@ -552,10 +554,12 @@ static void m68k_cpu_class_init(ObjectClass *c, void *data) M68kCPUClass *mcc = M68K_CPU_CLASS(c); CPUClass *cc = CPU_CLASS(c); DeviceClass *dc = DEVICE_CLASS(c); + ResettableClass *rc = RESETTABLE_CLASS(c); device_class_set_parent_realize(dc, m68k_cpu_realizefn, &mcc->parent_realize); - device_class_set_parent_reset(dc, m68k_cpu_reset, &mcc->parent_reset); + resettable_class_set_parent_phases(rc, NULL, m68k_cpu_reset_hold, NULL, + &mcc->parent_phases); cc->class_by_name = m68k_cpu_class_by_name; cc->has_work = m68k_cpu_has_work; From patchwork Fri Dec 16 21:42:27 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 634468 Delivered-To: patch@linaro.org Received: by 2002:a17:522:c983:b0:460:3032:e3c4 with SMTP id kr3csp1082514pvb; Fri, 16 Dec 2022 14:16:59 -0800 (PST) X-Google-Smtp-Source: AA0mqf6vRWYQrUn2u82eAE+72WKYmJUPSdCyYawwloTC2+3iy2it6ZCfCkoGC/UktGD+DnhYsf05 X-Received: by 2002:a0c:c58e:0:b0:4c6:5682:887c with SMTP id a14-20020a0cc58e000000b004c65682887cmr43330260qvj.17.1671229019389; Fri, 16 Dec 2022 14:16:59 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1671229019; cv=none; d=google.com; s=arc-20160816; b=T0JQHSCGUMFeotYpAkeKB4lHWEfKNgJbpPIsiqIzKvBbMIvd/oS52r7xhinwZAPWNq WDE+BW4qcFvO91pnVJdeTgTisaIXDc+we/CSIehvVVI34J7OkVnehKo2br9zcJon+g7/ uoQ30B100z8sgznEZdh8UbOIq2v8GOfRvi2kM3mV2B80y3+3W9eoUTtdYsQgncSC8UiO TYYp2G6h7eJrgPDKUedVXGmCWgU2kTirc4VbSyPe/K/CAh6n9XLRQ6ehozZ/sk2KsR9Y YlU/iYPMGHD44i/b7nuJhVHM7yKvIIjRe2hKXMt1KVaWl5FALbjQ4B8edZhMsCQyIXav okGg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=B378x5OhsXxdbYk6KqXx4tmBaBnAJUAFvnfZ7I26cuw=; b=W6TY5EJgHLreLM+SUFJGQVqKavTkBU/ygPhmHkx0g6PGtesGxCbriRwiVUZQRAQAwy eW2fdSg7cAP7rG0ZLPR5newx7W7Z4zXV62GNbRwS/LcpSmhSkJKtVlnQ/3tQfabfIWbN 0Viz8IuLTgjuZQ6bxSovvFL/pjvTpFMNhMVHnfyCMtfhTMWvvwr61RPaG2ZCGDzgOEnr bP27yGolcb2nwcp/K87kEgX6KO6kptTVu2ISUwVD9bDplJ+WgamO+M+M0Fts8meSfAQg JKrHN5v5DAgqm4l+GfLd7hb2l/ycDvmHxT7dyyg3QEBvJxTLUzyGSoicXUSadY7B0MXB i+yw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="kAPsUCy/"; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id hu15-20020a056214234f00b004ba170c195esi1687919qvb.48.2022.12.16.14.16.59 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Fri, 16 Dec 2022 14:16:59 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="kAPsUCy/"; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1p6IUe-0006Mu-Pc; Fri, 16 Dec 2022 16:43:48 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1p6IU1-00060G-5o for qemu-devel@nongnu.org; Fri, 16 Dec 2022 16:43:09 -0500 Received: from mail-wm1-x331.google.com ([2a00:1450:4864:20::331]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1p6ITx-0000fr-FI for qemu-devel@nongnu.org; Fri, 16 Dec 2022 16:43:07 -0500 Received: by mail-wm1-x331.google.com with SMTP id p13-20020a05600c468d00b003cf8859ed1bso2706736wmo.1 for ; Fri, 16 Dec 2022 13:43:05 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=B378x5OhsXxdbYk6KqXx4tmBaBnAJUAFvnfZ7I26cuw=; b=kAPsUCy/qj/ZQYxNQkc7OPBW5+fyTP1cmBmMZQXw22aa7Pz+1wFbiV4XI1YrQrcT/1 H1QPpVtB+90vqgRtgRF4E3KR+14nmo4XED2osQOQJOJ07wMSPUgZPaoadqWQaW1aGQsa pANCkpXvUdSwk6vkyMnGCZIQTcpz7n41wwI6dbbGj8xX1R4xvMuYl7Xmjnoxlf+qdT7A qlUvX9HHYqvpqWnSZEvJf+0rGA12LAk72Yn0ZAr2S+n3a1y9F7SRjqrcQpShUx8VpX4W 6GOBzLKcMRu08tU4fNIlurydA/j/SJ8Bwos+5ig/jhm+V134Rj+QkfzyYuYbyt1IiE6j c8hA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=B378x5OhsXxdbYk6KqXx4tmBaBnAJUAFvnfZ7I26cuw=; b=BpMjpDr2rlzCDIjqX4krJrfLAl3Mnv4VOyI6U2xXegcBR+EQuhpjr1XqXHeOUTLW/h 0hMjk7brETLUIinQ2aV1f8agKSJvqGoNgM4oAbhdlV/mRyIUJM+SCty0KJ9k6jrVbZ2j 2I/Q11+dWPBB9kcIMPo8sIFPGNiMZVWQ8m7nittWFFGgKRzMGyY8TXSe761C3+7DPNDi PjItK+wDML+Gm0rkclhnXdCtqRiykpkYoVgpbyNRiOU/RY2zVN4U0huI4w1DzFK62+ov vy2QA872vuunkKfoun5vCb31uPi0m5nmyyigs1bVNf+HLEJHxp/rJCpO7JN6BcKXg0r4 6Mmw== X-Gm-Message-State: AFqh2kqlDaMxdpEnLvl4AOAWRAyk/3eeJzqMgmfbbZjazHUVqCUazFXA EEU1aepWIQ5WYvmvxnLVHABqijH8qc2dcCdb X-Received: by 2002:a7b:cc85:0:b0:3d3:3c93:af5e with SMTP id p5-20020a7bcc85000000b003d33c93af5emr5337292wma.35.1671226984176; Fri, 16 Dec 2022 13:43:04 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id y7-20020a05600c364700b003d33ab317dasm4135263wmq.14.2022.12.16.13.43.03 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 16 Dec 2022 13:43:03 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 19/36] target/microblaze: Convert to 3-phase reset Date: Fri, 16 Dec 2022 21:42:27 +0000 Message-Id: <20221216214244.1391647-20-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221216214244.1391647-1-peter.maydell@linaro.org> References: <20221216214244.1391647-1-peter.maydell@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::331; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x331.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Convert the microblaze CPU class to use 3-phase reset, so it doesn't need to use device_class_set_parent_reset() any more. Signed-off-by: Peter Maydell Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Reviewed-by: Alistair Francis Reviewed-by: Cédric Le Goater Reviewed-by: Edgar E. Iglesias Reviewed-by: Taylor Simpson Message-id: 20221124115023.2437291-10-peter.maydell@linaro.org --- target/microblaze/cpu-qom.h | 4 ++-- target/microblaze/cpu.c | 12 ++++++++---- 2 files changed, 10 insertions(+), 6 deletions(-) diff --git a/target/microblaze/cpu-qom.h b/target/microblaze/cpu-qom.h index 255b39a45df..cda9220fa99 100644 --- a/target/microblaze/cpu-qom.h +++ b/target/microblaze/cpu-qom.h @@ -30,7 +30,7 @@ OBJECT_DECLARE_CPU_TYPE(MicroBlazeCPU, MicroBlazeCPUClass, MICROBLAZE_CPU) /** * MicroBlazeCPUClass: * @parent_realize: The parent class' realize handler. - * @parent_reset: The parent class' reset handler. + * @parent_phases: The parent class' reset phase handlers. * * A MicroBlaze CPU model. */ @@ -40,7 +40,7 @@ struct MicroBlazeCPUClass { /*< public >*/ DeviceRealize parent_realize; - DeviceReset parent_reset; + ResettablePhases parent_phases; }; diff --git a/target/microblaze/cpu.c b/target/microblaze/cpu.c index 89e493f3ff7..817681f9b21 100644 --- a/target/microblaze/cpu.c +++ b/target/microblaze/cpu.c @@ -162,14 +162,16 @@ static void microblaze_cpu_set_irq(void *opaque, int irq, int level) } #endif -static void mb_cpu_reset(DeviceState *dev) +static void mb_cpu_reset_hold(Object *obj) { - CPUState *s = CPU(dev); + CPUState *s = CPU(obj); MicroBlazeCPU *cpu = MICROBLAZE_CPU(s); MicroBlazeCPUClass *mcc = MICROBLAZE_CPU_GET_CLASS(cpu); CPUMBState *env = &cpu->env; - mcc->parent_reset(dev); + if (mcc->parent_phases.hold) { + mcc->parent_phases.hold(obj); + } memset(env, 0, offsetof(CPUMBState, end_reset_fields)); env->res_addr = RES_ADDR_NONE; @@ -399,10 +401,12 @@ static void mb_cpu_class_init(ObjectClass *oc, void *data) DeviceClass *dc = DEVICE_CLASS(oc); CPUClass *cc = CPU_CLASS(oc); MicroBlazeCPUClass *mcc = MICROBLAZE_CPU_CLASS(oc); + ResettableClass *rc = RESETTABLE_CLASS(oc); device_class_set_parent_realize(dc, mb_cpu_realizefn, &mcc->parent_realize); - device_class_set_parent_reset(dc, mb_cpu_reset, &mcc->parent_reset); + resettable_class_set_parent_phases(rc, NULL, mb_cpu_reset_hold, NULL, + &mcc->parent_phases); cc->class_by_name = mb_cpu_class_by_name; cc->has_work = mb_cpu_has_work; From patchwork Fri Dec 16 21:42:28 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 634438 Delivered-To: patch@linaro.org Received: by 2002:a17:522:c983:b0:460:3032:e3c4 with SMTP id kr3csp1068738pvb; Fri, 16 Dec 2022 13:44:18 -0800 (PST) X-Google-Smtp-Source: AA0mqf7yF0QDl+JXYO8+8H+/ZBan1F1WYVq5j0I6++bhmM+HVuc6KptG+WZ3G1zNpfTE2fpBW06X X-Received: by 2002:a0c:ecd2:0:b0:4c6:e598:239 with SMTP id o18-20020a0cecd2000000b004c6e5980239mr45959088qvq.24.1671227058629; Fri, 16 Dec 2022 13:44:18 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1671227058; cv=none; d=google.com; s=arc-20160816; b=Y/LfPxFgReCUJbYzVz52DYKadnZG51I2vU0o9HXhR0m1DVc0tlMOioXhEE3irttZvZ Qs7CYwvODtBtuskAwon//EhhAmiwtgNLsxeZzzkTSz3qmtvvg7+fdNtDEJ5J9KOYlM9+ HmgdgBrCvLdtma9eBX1v3udKGNFN7LOVhb7BpHbxeXl4w8DWVKHS3xAb3eMl+//NIIwp xRuqgDptGMS49t107CE/qp+q6GUNxXttu6d0hwb4Ppn6C1xCnfpovX21dIqvnqYB7HiC MD3CGHtPu/na6Kuy0xNIRajaiRLEjMm4hvIXMDn4Pg8T1SKvO/qYVlkzArT3f9bJL14Q LsZQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=16RWnagd9d1NknqwhBiXGx22YuZemZqKb+dy4GTRhZI=; b=RiKkLrCtsPgdlZc9udVym3oVHPZkrrCkIiHNmrzGaPXqChWfpUvuwSZm9AulMu9gj3 rPZIXSBOKSKTKQqzympQBSjTYXu4ZJFf+fiuXhJtg+sFQun3bV/7HQhAIamoWwY0XJ04 4gNTxGKYwmxRg2EBwjhUgt1kItn8KBN+KKgN+E5EGP1pIiwXzfmjX+fUOhnjPB2owT0I YwdT0lu8zFfDRQodiMT7pMQIDkIQuPqNr7nVC//Be7aQEtcYqJdeJlsdxAqcC3ZITmcH NDhy4uyzuXvaIUtAu1wCqQRNvjoi7bHhCObIf0uOOrZdLoJC4iGMM4mugqUfr+GNCoKZ trow== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=dSvQmiaC; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id x16-20020ae9e910000000b006fc295001f1si1347165qkf.687.2022.12.16.13.44.18 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Fri, 16 Dec 2022 13:44:18 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=dSvQmiaC; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1p6IU6-00062r-Qe; Fri, 16 Dec 2022 16:43:14 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1p6IU1-00060F-4j for qemu-devel@nongnu.org; Fri, 16 Dec 2022 16:43:09 -0500 Received: from mail-wm1-x32f.google.com ([2a00:1450:4864:20::32f]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1p6ITx-0000fE-UP for qemu-devel@nongnu.org; Fri, 16 Dec 2022 16:43:07 -0500 Received: by mail-wm1-x32f.google.com with SMTP id v7so2786536wmn.0 for ; Fri, 16 Dec 2022 13:43:05 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=16RWnagd9d1NknqwhBiXGx22YuZemZqKb+dy4GTRhZI=; b=dSvQmiaCDmRZCe7E5ePevTKglqWb81nbePehtv9MS7AGMK+RPntTz+o3mJDsJEftsw yNk9fTFcqTin0UT2Jp/t9hLqTczIXMTec8RDy9bo1reir0z3gqI/VyZNMbDlQjd30CDn EmdmJS2IWu7WwBowZfoAHoAkXjPaHm3lSmz/eGYiW5BlOowcPdOvAW6gpfRFkIGDTQPG O4axZXF94r6pp9JZADNXJr2HkVLGHrRDmjujR8hO9CK+ofBvcwIr9qovLz0ulwEr7PZ7 Z3FQCSevY+on/VFsXlKKps8o3jvztIvMhz0zg1fjeUB8FBheKvpraV5I7NmTnr2rS1Ny kMew== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=16RWnagd9d1NknqwhBiXGx22YuZemZqKb+dy4GTRhZI=; b=g30GDlGnG7U+AbOsTC62Kfft91GXsELwkQwP9Zn/Vv+VccQ7NxN7kE0qF8rC7N51Mv lizXJp74hCTu61LouYD+bLAZbeI1+w2zXWItkFNDs6xSWCXANcdOlQLSc8uJI4jMKmJM AiZ6GPdEKGZZUtf5ayzXRMgVszEG8clahs/+2DFcVGslqRGe/hUHNnuPMLj+w6dNQWJr EVO4xCnQkfXTZ5yRGdWKDVi/Wu+6n6SM7NiINeIuRWaD23jiBk21wEdetS0Gku2LsUyX S+shATyQxPofqHaLjFYrEUFUfSGWDBRHhY/cGU/Qluk5Zory8b7t9OBDMAuQ20QT7Bc6 WuaQ== X-Gm-Message-State: AFqh2kpQ2dYnVf9WlCOF81zHh1ZTfE7prYSV8GtQCpOxqsRTP4Gaur4/ 5oXrjFSzL4pMIfw8eMrWWSSPxz5C5XtuIf5f X-Received: by 2002:a7b:c3d5:0:b0:3d3:396e:5e36 with SMTP id t21-20020a7bc3d5000000b003d3396e5e36mr6069498wmj.0.1671226985116; Fri, 16 Dec 2022 13:43:05 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id y7-20020a05600c364700b003d33ab317dasm4135263wmq.14.2022.12.16.13.43.04 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 16 Dec 2022 13:43:04 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 20/36] target/mips: Convert to 3-phase reset Date: Fri, 16 Dec 2022 21:42:28 +0000 Message-Id: <20221216214244.1391647-21-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221216214244.1391647-1-peter.maydell@linaro.org> References: <20221216214244.1391647-1-peter.maydell@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32f; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x32f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Convert the mips CPU class to use 3-phase reset, so it doesn't need to use device_class_set_parent_reset() any more. Signed-off-by: Peter Maydell Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Reviewed-by: Alistair Francis Reviewed-by: Cédric Le Goater Reviewed-by: Edgar E. Iglesias Reviewed-by: Taylor Simpson Message-id: 20221124115023.2437291-11-peter.maydell@linaro.org --- target/mips/cpu-qom.h | 4 ++-- target/mips/cpu.c | 12 ++++++++---- 2 files changed, 10 insertions(+), 6 deletions(-) diff --git a/target/mips/cpu-qom.h b/target/mips/cpu-qom.h index e28b5296073..0dffab453b2 100644 --- a/target/mips/cpu-qom.h +++ b/target/mips/cpu-qom.h @@ -34,7 +34,7 @@ OBJECT_DECLARE_CPU_TYPE(MIPSCPU, MIPSCPUClass, MIPS_CPU) /** * MIPSCPUClass: * @parent_realize: The parent class' realize handler. - * @parent_reset: The parent class' reset handler. + * @parent_phases: The parent class' reset phase handlers. * * A MIPS CPU model. */ @@ -44,7 +44,7 @@ struct MIPSCPUClass { /*< public >*/ DeviceRealize parent_realize; - DeviceReset parent_reset; + ResettablePhases parent_phases; const struct mips_def_t *cpu_def; /* Used for the jazz board to modify mips_cpu_do_transaction_failed. */ diff --git a/target/mips/cpu.c b/target/mips/cpu.c index 7a565466cb3..c614b04607a 100644 --- a/target/mips/cpu.c +++ b/target/mips/cpu.c @@ -182,14 +182,16 @@ static bool mips_cpu_has_work(CPUState *cs) #include "cpu-defs.c.inc" -static void mips_cpu_reset(DeviceState *dev) +static void mips_cpu_reset_hold(Object *obj) { - CPUState *cs = CPU(dev); + CPUState *cs = CPU(obj); MIPSCPU *cpu = MIPS_CPU(cs); MIPSCPUClass *mcc = MIPS_CPU_GET_CLASS(cpu); CPUMIPSState *env = &cpu->env; - mcc->parent_reset(dev); + if (mcc->parent_phases.hold) { + mcc->parent_phases.hold(obj); + } memset(env, 0, offsetof(CPUMIPSState, end_reset_fields)); @@ -562,10 +564,12 @@ static void mips_cpu_class_init(ObjectClass *c, void *data) MIPSCPUClass *mcc = MIPS_CPU_CLASS(c); CPUClass *cc = CPU_CLASS(c); DeviceClass *dc = DEVICE_CLASS(c); + ResettableClass *rc = RESETTABLE_CLASS(c); device_class_set_parent_realize(dc, mips_cpu_realizefn, &mcc->parent_realize); - device_class_set_parent_reset(dc, mips_cpu_reset, &mcc->parent_reset); + resettable_class_set_parent_phases(rc, NULL, mips_cpu_reset_hold, NULL, + &mcc->parent_phases); cc->class_by_name = mips_cpu_class_by_name; cc->has_work = mips_cpu_has_work; From patchwork Fri Dec 16 21:42:29 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 634439 Delivered-To: patch@linaro.org Received: by 2002:a17:522:c983:b0:460:3032:e3c4 with SMTP id kr3csp1069046pvb; Fri, 16 Dec 2022 13:44:52 -0800 (PST) X-Google-Smtp-Source: AMrXdXvqAUcjIscmZCsf7A3s66tNJ39tIkSy6ME+XvF/iAy7cJdnsYgZxV0+7pdVjaJhpDF2+fNp X-Received: by 2002:ac8:4e08:0:b0:3a8:dae:d985 with SMTP id c8-20020ac84e08000000b003a80daed985mr1251512qtw.14.1671227092711; Fri, 16 Dec 2022 13:44:52 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1671227092; cv=none; d=google.com; s=arc-20160816; b=Pb5FUWDLi7+xATlf1aMQ56JbBdtVGFkuD0AQeqT96VOn8TS0lfrfsjOCAgbJQCxK9E 28ip82fxTBIDt35FRO8oQ4c0h/Iq2H+oct/ha/M22djwdDgYfMTh1Z/hq7bO3TRcBGh1 hZJspeX9/Co9QuxCuCmJXwtBwZaj5iWvWVSVUGxUOZM4JizYDOtJ/Ypyd0faPXnmRZsF C8QpILHXg3gSxiaQfM8+jD4/cDvhN5cd2k0qcMXvudzOfEgh22HdtcX3eI0vpbF5qNLM TbL3lRT9QcA7T+bs8HFmFheyRt6A/946qpAz1y+jLiTv9XoqJdmxfw2ZmtR2R3+OaKqP W1/w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=MOyQoEElJBaMGAXsx9Bs+8ElHc6eJlOS6vtS/o3/iRQ=; b=LKfOVRm5TB9VayWP5BLYEozbAqCgsZXDWQCpuknLM685BMl/6YdsUCNMiVN/TGMucU Jlr7Ke6mr1hLBvuwHZCD4Vgi385G9cQ+CnZYSL/RpeKAcWElQXwbTHOcio8u3T13AVgl 9j2qVFC9ZwYFwXICZxQUX0p7KHYzCyOZGQFO+AtoJVR0xSFzYWANudohsCVm3tXJcHbp wFNuU9Z9wzK4g4rpatb4tkjffopT10rg7GFYqD5WWQH9vRBLYNYlkIh1gbkYTGdH8Thy IyHITVUmTSvX0ISkaUZ4UDIVkXFOd1wWleQ2o+F0w/DXqJGLwVKaWx6ulWjUNwQLfgcw sbHg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Mk4Fepy0; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id fc22-20020a05622a489600b003a6894892d2si1483493qtb.736.2022.12.16.13.44.52 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Fri, 16 Dec 2022 13:44:52 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Mk4Fepy0; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1p6IUk-0006Wu-IW; Fri, 16 Dec 2022 16:43:54 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1p6IU2-00060k-Jr for qemu-devel@nongnu.org; Fri, 16 Dec 2022 16:43:10 -0500 Received: from mail-wm1-x330.google.com ([2a00:1450:4864:20::330]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1p6IU0-0000gB-MY for qemu-devel@nongnu.org; Fri, 16 Dec 2022 16:43:10 -0500 Received: by mail-wm1-x330.google.com with SMTP id c65-20020a1c3544000000b003cfffd00fc0so5012555wma.1 for ; Fri, 16 Dec 2022 13:43:06 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=MOyQoEElJBaMGAXsx9Bs+8ElHc6eJlOS6vtS/o3/iRQ=; b=Mk4Fepy0U0cPiNS5365h9QbHPPvpxQbAuYJUZyD51QOktcVaYvR+KQc/cfZcg2EOeL nGFbFSbt4hNGgLpa3+7piKO60fmY7iiXnlGRzLOAPm0narcIRo5mUhv0QGasti9evCgD xv424sYlTzRj1w4UJtjqOEv9eU62pptWQsSUb85zmTwFSTUDEK5qsB2Nl5Lt0D8WfZMm irDcUDxRZvkX559zfu8wVjbVdFlbRNqgW/M/JTbBnG82VxbRy2WatbdZd5KTyNznJXks y7P2ZBQ1qN9GvMjar/sKg5qOiR2mcnXpFlXVl/RCKzzdwFK7e0kpUD1+qL69oAqhIC3G zULQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=MOyQoEElJBaMGAXsx9Bs+8ElHc6eJlOS6vtS/o3/iRQ=; b=m4q+gGmCWTwTG8OFzZM7maL8Bl/T4+b4e728owAiKBi2CHmsE1up3bjQdtCVh8Ap/k g8VvJiJjhOGR7XOFDnKvVipYddUa7gIRMY/2wtOhyvHHbQCdNKHvO4sDr50MZf6FHJX+ 9uPpDb71xAw85gw22+sLEEeHFLdls2j5gE4iT1OtvpfhxqQe+69hFWWjkx8Bp7b2PuuU J0OT9l12tSDrOKoZqazr7B1Rc77ArU0JrLVfTAR7gR6NByYNmAjaYDChEK2YLk/18+vd F2IM1mvbNs6RZaUXQ+OATClwR2EPvaUnBpnILvUFvjF/xxxB9huboRoPUJdnjgx+FJrw 5rkg== X-Gm-Message-State: ANoB5pk8VOpXVJ49dQuIHxN0E7Djo1SYmJEBTQvcus1TStpeaH5MyAUW V+AQFw0VPO8tGTOMGViARYWTWzJxixjSuE9Z X-Received: by 2002:a05:600c:6002:b0:3cf:8260:6364 with SMTP id az2-20020a05600c600200b003cf82606364mr27394783wmb.37.1671226986083; Fri, 16 Dec 2022 13:43:06 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id y7-20020a05600c364700b003d33ab317dasm4135263wmq.14.2022.12.16.13.43.05 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 16 Dec 2022 13:43:05 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 21/36] target/nios2: Convert to 3-phase reset Date: Fri, 16 Dec 2022 21:42:29 +0000 Message-Id: <20221216214244.1391647-22-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221216214244.1391647-1-peter.maydell@linaro.org> References: <20221216214244.1391647-1-peter.maydell@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::330; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x330.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Convert the nios2 CPU class to use 3-phase reset, so it doesn't need to use device_class_set_parent_reset() any more. Signed-off-by: Peter Maydell Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Reviewed-by: Alistair Francis Reviewed-by: Cédric Le Goater Reviewed-by: Edgar E. Iglesias Reviewed-by: Taylor Simpson Message-id: 20221124115023.2437291-12-peter.maydell@linaro.org --- target/nios2/cpu.h | 4 ++-- target/nios2/cpu.c | 12 ++++++++---- 2 files changed, 10 insertions(+), 6 deletions(-) diff --git a/target/nios2/cpu.h b/target/nios2/cpu.h index f85581ee560..b1a55490747 100644 --- a/target/nios2/cpu.h +++ b/target/nios2/cpu.h @@ -37,7 +37,7 @@ OBJECT_DECLARE_CPU_TYPE(Nios2CPU, Nios2CPUClass, NIOS2_CPU) /** * Nios2CPUClass: - * @parent_reset: The parent class' reset handler. + * @parent_phases: The parent class' reset phase handlers. * * A Nios2 CPU model. */ @@ -47,7 +47,7 @@ struct Nios2CPUClass { /*< public >*/ DeviceRealize parent_realize; - DeviceReset parent_reset; + ResettablePhases parent_phases; }; #define TARGET_HAS_ICE 1 diff --git a/target/nios2/cpu.c b/target/nios2/cpu.c index 9a5351bc81d..cff30823dad 100644 --- a/target/nios2/cpu.c +++ b/target/nios2/cpu.c @@ -57,14 +57,16 @@ static bool nios2_cpu_has_work(CPUState *cs) return cs->interrupt_request & CPU_INTERRUPT_HARD; } -static void nios2_cpu_reset(DeviceState *dev) +static void nios2_cpu_reset_hold(Object *obj) { - CPUState *cs = CPU(dev); + CPUState *cs = CPU(obj); Nios2CPU *cpu = NIOS2_CPU(cs); Nios2CPUClass *ncc = NIOS2_CPU_GET_CLASS(cpu); CPUNios2State *env = &cpu->env; - ncc->parent_reset(dev); + if (ncc->parent_phases.hold) { + ncc->parent_phases.hold(obj); + } memset(env->ctrl, 0, sizeof(env->ctrl)); env->pc = cpu->reset_addr; @@ -371,11 +373,13 @@ static void nios2_cpu_class_init(ObjectClass *oc, void *data) DeviceClass *dc = DEVICE_CLASS(oc); CPUClass *cc = CPU_CLASS(oc); Nios2CPUClass *ncc = NIOS2_CPU_CLASS(oc); + ResettableClass *rc = RESETTABLE_CLASS(oc); device_class_set_parent_realize(dc, nios2_cpu_realizefn, &ncc->parent_realize); device_class_set_props(dc, nios2_properties); - device_class_set_parent_reset(dc, nios2_cpu_reset, &ncc->parent_reset); + resettable_class_set_parent_phases(rc, NULL, nios2_cpu_reset_hold, NULL, + &ncc->parent_phases); cc->class_by_name = nios2_cpu_class_by_name; cc->has_work = nios2_cpu_has_work; From patchwork Fri Dec 16 21:42:30 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 634444 Delivered-To: patch@linaro.org Received: by 2002:a17:522:c983:b0:460:3032:e3c4 with SMTP id kr3csp1076145pvb; Fri, 16 Dec 2022 14:03:16 -0800 (PST) X-Google-Smtp-Source: AA0mqf5RCLhn2iS7cbODa+fB2oBvHNb6HWfcJDW2ZnIHQ1uz7HCWAzD6ciORN4O5rIvxa/sxCfrU X-Received: by 2002:a05:622a:91:b0:3a8:133a:9686 with SMTP id o17-20020a05622a009100b003a8133a9686mr44894595qtw.12.1671228196391; Fri, 16 Dec 2022 14:03:16 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1671228196; cv=none; d=google.com; s=arc-20160816; b=KKfb7hvXN2iYrmSkHLI7a5SvvmJCAYPcTP2dtRuoraqqAT7DSJ0dBZp4Drca/4duaJ G+8/5qSS/YeYUv8uBd25+pp7qd7asajgsfyqHFVN0MVFYY8XTC8kW8fGvr9HRK0mQTVI 05WZziYq8CrMxsl/Q1S2co08BGb6tuVC+pxLM1ON1x6uNaOufziX//zAe4ZCB3ytkwh/ JGDZVC6nLKJDw3ly01r6N0hkgPkOongaOouyj2XZNQ1ddOyGHGtC+x1rZRYYyyhQ4woD v1mENuDSEba2wJUcIRUHtwezRtZfu+1fpkGWrNNE94kGuVOqf9FotpAakm6t8MDpWMU1 inIg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=3wlQ3hEbEsOsTOS6YZN+KsSVSdVU6IjrEOLfitW6DbU=; b=eES4KsBsaugxCpRV8qGY2y66uiAkrs6g1mgzu9EQ27FvbkPpuak5NqmwKID1UWPcoI 3i92V4YYE536MHV3k/G5KPhr1/neIXDThTPtzFXda1X7Qu4rJtk2X1K0TPPksGlTi6H3 NLzkO/e2edLk8vYXv5cvkO8OKuBeTOaPjB1hqJZ7pBIgyPkPiMgoHcx142soClbZ0HqG aMF9ljfjVJbrOtTDyE5FLdOkUwdikbk3J8HBQfZ8y3FhMPzRkj5KG+NZfoGtXFRu6yhc tLnfSWgBElAiWGTe4rqjU+nf2Qdzet3gzvbBDia8eM8+Zx31uYlamgM67O4Jf/C69pP3 Sg6A== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=EBvfgXw+; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id ge19-20020a05622a5c9300b003a68a9e9194si1566843qtb.410.2022.12.16.14.03.16 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Fri, 16 Dec 2022 14:03:16 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=EBvfgXw+; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1p6IUf-0006NX-3r; Fri, 16 Dec 2022 16:43:49 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1p6IU2-00060j-Hj for qemu-devel@nongnu.org; Fri, 16 Dec 2022 16:43:10 -0500 Received: from mail-wm1-x330.google.com ([2a00:1450:4864:20::330]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1p6IU0-0000ag-O7 for qemu-devel@nongnu.org; Fri, 16 Dec 2022 16:43:10 -0500 Received: by mail-wm1-x330.google.com with SMTP id ay14-20020a05600c1e0e00b003cf6ab34b61so5001527wmb.2 for ; Fri, 16 Dec 2022 13:43:07 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=3wlQ3hEbEsOsTOS6YZN+KsSVSdVU6IjrEOLfitW6DbU=; b=EBvfgXw+k7fK2/Qh3SZ7CHXukOUVHaSeJkMCnAC+ZtGZ2NGfXjkZmobBkbVGSn4SaV 0yoKizvY1grSU8RZNEEw+1GdF3VYBuqxdBh51Vq3tGjFhyUI9zWUgx/+cg/54x/oA/qN TtjgInf77ts1d4GAiPWfWa7DCyu80z7hjk0R+wDVNZm5j4AsGsxAEeu3kYW9oMlSQt1e sN7AZ7rN3VwiXgD9dTdzZnY3tzKbVKaMmkNZsji72uTRmVxMQ6vObcPDQyFFnAOzkxSP CIfQ70QLVGd7nakfE6xAeSi5I3oTB2mF+6pP3wcGIbbO44UoeH1yYGAKL1FYelMd+ku9 f3wQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=3wlQ3hEbEsOsTOS6YZN+KsSVSdVU6IjrEOLfitW6DbU=; b=hztNnzgNGLMbqRQqfmOXzd7udkmQ/OLG4wL5z6bUjIHXuS+I3EhUM2fmdyf2d6ocHX +iCkKR1K9PYt0bj8kZ4sRmxFU1Cwvhd4OMPv206+lUgfTMNgWjE6dFQvFuLHgzwsLYX9 Bo0i23jlpSod9DJlfSyPfunuRk3/FkkWBKcI+PxsAMnVDb2kzyuqKl4Cy1P3+sR4DM4d hppAAblWJbgIeUoeL7oN2mC3HrlHLJ/xIQkNGjdXyfGEnmE51+NpfZyZw2Yf5fZd/msg tkW2KyALxzFzpF6ef4OX41n4ilSKLvFcYUk20M+4cjLTMqlS2J4ebvipQg7WAmjkt6ee QqoA== X-Gm-Message-State: AFqh2koVU7UvF0SapiWtkwdT7ABAqAn7ZHM++tqCrEmU5muEd2AgYWfA H72wW4sFyDS9kKsaSZLASe4DYSzPQU7eb3Er X-Received: by 2002:a1c:4b18:0:b0:3d3:39a9:e659 with SMTP id y24-20020a1c4b18000000b003d339a9e659mr6223903wma.21.1671226987034; Fri, 16 Dec 2022 13:43:07 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id y7-20020a05600c364700b003d33ab317dasm4135263wmq.14.2022.12.16.13.43.06 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 16 Dec 2022 13:43:06 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 22/36] target/openrisc: Convert to 3-phase reset Date: Fri, 16 Dec 2022 21:42:30 +0000 Message-Id: <20221216214244.1391647-23-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221216214244.1391647-1-peter.maydell@linaro.org> References: <20221216214244.1391647-1-peter.maydell@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::330; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x330.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Convert the openrisc CPU class to use 3-phase reset, so it doesn't need to use device_class_set_parent_reset() any more. Signed-off-by: Peter Maydell Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Reviewed-by: Alistair Francis Reviewed-by: Cédric Le Goater Reviewed-by: Edgar E. Iglesias Reviewed-by: Taylor Simpson Message-id: 20221124115023.2437291-13-peter.maydell@linaro.org --- target/openrisc/cpu.h | 4 ++-- target/openrisc/cpu.c | 12 ++++++++---- 2 files changed, 10 insertions(+), 6 deletions(-) diff --git a/target/openrisc/cpu.h b/target/openrisc/cpu.h index 1d5efa5ca2f..5f607497052 100644 --- a/target/openrisc/cpu.h +++ b/target/openrisc/cpu.h @@ -34,7 +34,7 @@ OBJECT_DECLARE_CPU_TYPE(OpenRISCCPU, OpenRISCCPUClass, OPENRISC_CPU) /** * OpenRISCCPUClass: * @parent_realize: The parent class' realize handler. - * @parent_reset: The parent class' reset handler. + * @parent_phases: The parent class' reset phase handlers. * * A OpenRISC CPU model. */ @@ -44,7 +44,7 @@ struct OpenRISCCPUClass { /*< public >*/ DeviceRealize parent_realize; - DeviceReset parent_reset; + ResettablePhases parent_phases; }; #define TARGET_INSN_START_EXTRA_WORDS 1 diff --git a/target/openrisc/cpu.c b/target/openrisc/cpu.c index de0176cd20c..4c11a1f7ada 100644 --- a/target/openrisc/cpu.c +++ b/target/openrisc/cpu.c @@ -70,13 +70,15 @@ static void openrisc_disas_set_info(CPUState *cpu, disassemble_info *info) info->print_insn = print_insn_or1k; } -static void openrisc_cpu_reset(DeviceState *dev) +static void openrisc_cpu_reset_hold(Object *obj) { - CPUState *s = CPU(dev); + CPUState *s = CPU(obj); OpenRISCCPU *cpu = OPENRISC_CPU(s); OpenRISCCPUClass *occ = OPENRISC_CPU_GET_CLASS(cpu); - occ->parent_reset(dev); + if (occ->parent_phases.hold) { + occ->parent_phases.hold(obj); + } memset(&cpu->env, 0, offsetof(CPUOpenRISCState, end_reset_fields)); @@ -229,10 +231,12 @@ static void openrisc_cpu_class_init(ObjectClass *oc, void *data) OpenRISCCPUClass *occ = OPENRISC_CPU_CLASS(oc); CPUClass *cc = CPU_CLASS(occ); DeviceClass *dc = DEVICE_CLASS(oc); + ResettableClass *rc = RESETTABLE_CLASS(oc); device_class_set_parent_realize(dc, openrisc_cpu_realizefn, &occ->parent_realize); - device_class_set_parent_reset(dc, openrisc_cpu_reset, &occ->parent_reset); + resettable_class_set_parent_phases(rc, NULL, openrisc_cpu_reset_hold, NULL, + &occ->parent_phases); cc->class_by_name = openrisc_cpu_class_by_name; cc->has_work = openrisc_cpu_has_work; From patchwork Fri Dec 16 21:42:31 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 634451 Delivered-To: patch@linaro.org Received: by 2002:a17:522:c983:b0:460:3032:e3c4 with SMTP id kr3csp1079312pvb; Fri, 16 Dec 2022 14:09:30 -0800 (PST) X-Google-Smtp-Source: AA0mqf5GQOFrvgtxOZCp1qFKQY+ohyfJH4awPTGktikIZYtYHD7Gs42xmmLCUuB1HyLfacGVpwrx X-Received: by 2002:a05:6214:2b92:b0:4c7:884a:9691 with SMTP id kr18-20020a0562142b9200b004c7884a9691mr46902945qvb.0.1671228570364; Fri, 16 Dec 2022 14:09:30 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1671228570; cv=none; d=google.com; s=arc-20160816; b=HCUL1625gqIyIdm5eYx+Jq5tttaQ7kABWQRB8bHzwxZqG7Io5brh2ZquLp9vCdyp7s Lr1gksTaEd4iQ530VfQX4dMxfDXq7YsKsjVCkf37hLvn69nsRuWGmwHbDxL/xCLhLyVI RccXM5Sa2UK/O3Zb+6HIb2YzsQzuUYgkMIWkcXvFhRShjFIa88LfjuxnKktq3ZdgSSlE kz8q4fZ/ANXwpUVAez2rxqBejjdxstvPCfFuzCT2IWrqYBAoCycMVptighW32UYl5cZZ QT1tzPGxdwxrDel3zLw0sLpaY3BJBF+nwjxVVjFONSbzn9JMLSdyMiBWY1kSfShF61gx CCfg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=ngOEeBVak8Pn0v7S29nlnFYFEpUJqHxOa2AWGjEaHE4=; b=UZRc4LtdJrKLKU2qBMp0ZPEW3is3K+RLt5jHxtWyrVQQ7t5Vj1M0hxDg9J7pyPmgVW mNj5t26h5xwMvXR2nqECOboqY2vCpjWgyfdqC8Tj9zA17UEV1vutDiHTmSHYlBOO00zh JsonadzCRTCLi2sASJb67g+TcD3Kgi4gFUYe/xXTUMO0c70fqAr4sQ6JUw5DG4H2my+n s2uGj7UivIGRjK9GRlR3IkRhQ06lNARQm0w6xBlH6D2yXOxieEMc3+bdahKL39ooOVCB FjcIWDWwRBSD8Pu+zFqx512UzwScffsi2I/pOurNZfJvlXv2BQXmrYT0drgDY733QIQC fl3g== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="sQga9+/P"; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id m2-20020ad45dc2000000b004c7369b76f4si1544237qvh.50.2022.12.16.14.09.30 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Fri, 16 Dec 2022 14:09:30 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="sQga9+/P"; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1p6IV4-0006l3-88; Fri, 16 Dec 2022 16:44:14 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1p6IU3-00061K-U6 for qemu-devel@nongnu.org; Fri, 16 Dec 2022 16:43:11 -0500 Received: from mail-wm1-x330.google.com ([2a00:1450:4864:20::330]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1p6IU1-0000gQ-B2 for qemu-devel@nongnu.org; Fri, 16 Dec 2022 16:43:11 -0500 Received: by mail-wm1-x330.google.com with SMTP id ay2-20020a05600c1e0200b003d22e3e796dso2732387wmb.0 for ; Fri, 16 Dec 2022 13:43:08 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=ngOEeBVak8Pn0v7S29nlnFYFEpUJqHxOa2AWGjEaHE4=; b=sQga9+/PYBLjqzkXyNlsZik5K0L3OZHKEDmKpv8bfwPeUMB8hqr7KhxR8mLTBTMrIl TqEbfafhcV+zHoOFwov/OwCIiU+cl2c5u5w70tzHjLkq0KXz3JkAaxA+7Gf4O3n8PcZv KWa+O41TJTEdFbfZcdHZrrkWDJ9Vc3J/Nc3NqWjFnF2Et+Ovzm7t0fXufUtsr4s+16qc ceu69CUOp6S9YF5X41FFGz8zici6iaLf/sev43RWmOMkTjLTivk1UCqfBJ6+cwpR3Boc EQxsZdLpWQ6ZY1MPhp+3OjrhK4xLFS+nEveQuB+V+I/NF4CiCD2op9dh6IU+WSaWxIet oVkQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=ngOEeBVak8Pn0v7S29nlnFYFEpUJqHxOa2AWGjEaHE4=; b=MACpGaCeo3ghfF6WfZ8Mzl1xKlYhHj/aDyC+2ncbRcboIX/DHkqmf6vlV3Es1qUxD2 A8BqRmO+6ztaRNkURMrnyXnP8imuJBFa265JiDwyxFgRPtK99RBDQjCoOqJaw92/mnW3 lSFBhDM7CMK3ycZhjywNPxW15qTwosMGcGypX2LlZgWKYSMcuJRA05JaImPkbJYJEHpP bWiOWyNECs0b50k1XUY2ljqVZ0+0rQEozQcCOxhQ3HI14jieeUJwDXMSiROpf+W3x9P0 +OYob2w9iGZx4/nEf3SyR4qr66Mjcw6PUX4k5P94RVpflnvGlM0KZk8BzeQInzzb6CNq mQEA== X-Gm-Message-State: ANoB5pkSVtx5CHAoWYpoVTzfL/BAat35TMytnY6hxs4ktlIlZuxhYz2Q zIX8KLBw6xdUho/uk9C7XN9Q22gdeXCx2xLW X-Received: by 2002:a05:600c:3b15:b0:3d0:d177:cac1 with SMTP id m21-20020a05600c3b1500b003d0d177cac1mr26364240wms.36.1671226987974; Fri, 16 Dec 2022 13:43:07 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id y7-20020a05600c364700b003d33ab317dasm4135263wmq.14.2022.12.16.13.43.07 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 16 Dec 2022 13:43:07 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 23/36] target/ppc: Convert to 3-phase reset Date: Fri, 16 Dec 2022 21:42:31 +0000 Message-Id: <20221216214244.1391647-24-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221216214244.1391647-1-peter.maydell@linaro.org> References: <20221216214244.1391647-1-peter.maydell@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::330; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x330.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Convert the ppc CPU class to use 3-phase reset, so it doesn't need to use device_class_set_parent_reset() any more. Signed-off-by: Peter Maydell Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Reviewed-by: Alistair Francis Reviewed-by: Cédric Le Goater Reviewed-by: Edgar E. Iglesias Reviewed-by: Taylor Simpson Reviewed-by: Greg Kurz Message-id: 20221124115023.2437291-14-peter.maydell@linaro.org --- target/ppc/cpu-qom.h | 4 ++-- target/ppc/cpu_init.c | 12 ++++++++---- 2 files changed, 10 insertions(+), 6 deletions(-) diff --git a/target/ppc/cpu-qom.h b/target/ppc/cpu-qom.h index 89ff88f28c9..0fbd8b72468 100644 --- a/target/ppc/cpu-qom.h +++ b/target/ppc/cpu-qom.h @@ -143,7 +143,7 @@ typedef struct PPCHash64Options PPCHash64Options; /** * PowerPCCPUClass: * @parent_realize: The parent class' realize handler. - * @parent_reset: The parent class' reset handler. + * @parent_phases: The parent class' reset phase handlers. * * A PowerPC CPU model. */ @@ -154,7 +154,7 @@ struct PowerPCCPUClass { DeviceRealize parent_realize; DeviceUnrealize parent_unrealize; - DeviceReset parent_reset; + ResettablePhases parent_phases; void (*parent_parse_features)(const char *type, char *str, Error **errp); uint32_t pvr; diff --git a/target/ppc/cpu_init.c b/target/ppc/cpu_init.c index cbf00813743..95d25856a0e 100644 --- a/target/ppc/cpu_init.c +++ b/target/ppc/cpu_init.c @@ -7031,16 +7031,18 @@ static bool ppc_cpu_has_work(CPUState *cs) return cs->interrupt_request & CPU_INTERRUPT_HARD; } -static void ppc_cpu_reset(DeviceState *dev) +static void ppc_cpu_reset_hold(Object *obj) { - CPUState *s = CPU(dev); + CPUState *s = CPU(obj); PowerPCCPU *cpu = POWERPC_CPU(s); PowerPCCPUClass *pcc = POWERPC_CPU_GET_CLASS(cpu); CPUPPCState *env = &cpu->env; target_ulong msr; int i; - pcc->parent_reset(dev); + if (pcc->parent_phases.hold) { + pcc->parent_phases.hold(obj); + } msr = (target_ulong)0; msr |= (target_ulong)MSR_HVB; @@ -7267,6 +7269,7 @@ static void ppc_cpu_class_init(ObjectClass *oc, void *data) PowerPCCPUClass *pcc = POWERPC_CPU_CLASS(oc); CPUClass *cc = CPU_CLASS(oc); DeviceClass *dc = DEVICE_CLASS(oc); + ResettableClass *rc = RESETTABLE_CLASS(oc); device_class_set_parent_realize(dc, ppc_cpu_realize, &pcc->parent_realize); @@ -7275,7 +7278,8 @@ static void ppc_cpu_class_init(ObjectClass *oc, void *data) pcc->pvr_match = ppc_pvr_match_default; device_class_set_props(dc, ppc_cpu_properties); - device_class_set_parent_reset(dc, ppc_cpu_reset, &pcc->parent_reset); + resettable_class_set_parent_phases(rc, NULL, ppc_cpu_reset_hold, NULL, + &pcc->parent_phases); cc->class_by_name = ppc_cpu_class_by_name; cc->has_work = ppc_cpu_has_work; From patchwork Fri Dec 16 21:42:32 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 634447 Delivered-To: patch@linaro.org Received: by 2002:a17:522:c983:b0:460:3032:e3c4 with SMTP id kr3csp1077615pvb; Fri, 16 Dec 2022 14:06:05 -0800 (PST) X-Google-Smtp-Source: AMrXdXsXNJvTYKKmo1lQCmnNXTurng8y8GZrc2mb4ETTRhMTK108P2SUIXraWY7B0LH4enFHYjjJ X-Received: by 2002:a05:6102:a09:b0:3b5:4148:8b43 with SMTP id t9-20020a0561020a0900b003b541488b43mr4619553vsa.16.1671228364835; Fri, 16 Dec 2022 14:06:04 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1671228364; cv=none; d=google.com; s=arc-20160816; b=AbxOMWewdPN6f7tMxlPuqsfgWtU8Mm+2ZpSZH5787odnHOMjOiLojyM6jeFpyi7uQK hR+8ZM+7bJE1Euybw+XlAAgZz5tDacuIvbotde2iNw3ldR0bbJ7KbOkVvtaNRfPU80qu KS6H+gCfrPvgh3pdfAdcjLIFQBoouIDrgH/epBHqb5Zzu1GBDCJP+hahRJXjOz9WD/Ci 1O3fHE2I9WJ1gnDrFE+NetRvBRKp1bluVTPXMV1TmKnoCOxxTX54rklVxYAveWE+XAw/ XxAEDGJOgX4/gsuABzpO6S7qrAYJB01/FCC+Y8XCf32SOBJthQwZE8+oPz79z072yUxH MmHw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=lqJ1U1BjhvvbnXKxuMnVz/cLZMrP5TJ4J5T0otuK7Ws=; b=Pbqh5xuVvRTGibJ2Nvdjvt24Y2ovW/fXVJX3qDvCPplYxv9m4bU7JSOl7gIx+QqMX0 lB5Mc91IqO8IiOzp+GdiDGRMJQ31lztNDfv5607xinVr1+kLEsu+hIRcUt22+0qDEO0a KjxHJUtcR2A9jV0iNksc/2qKPAcCH20VpU2V2FL/G8G1Y33EtJIngy1WzcFbZctHbDgJ hoSV+zmMVWD+KRFPgnHkoJUP6Fc38LO8gbW6jNSglUMuMz1e6b24bP19TA8Yd9xe8BLV llDV55DnGhB91UMB1IVS5bVgYAsCyLk1xgUo/UeogX/iXVd4Z2S0ONAy57+n2gnpEK21 q9cg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=BOtriwxs; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id f20-20020a05620a409400b006fabf9ca754si1650709qko.657.2022.12.16.14.06.04 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Fri, 16 Dec 2022 14:06:04 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=BOtriwxs; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1p6IUy-0006eJ-Fc; Fri, 16 Dec 2022 16:44:08 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1p6IU4-00061M-09 for qemu-devel@nongnu.org; Fri, 16 Dec 2022 16:43:12 -0500 Received: from mail-wm1-x333.google.com ([2a00:1450:4864:20::333]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1p6IU1-0000ar-LP for qemu-devel@nongnu.org; Fri, 16 Dec 2022 16:43:11 -0500 Received: by mail-wm1-x333.google.com with SMTP id v124-20020a1cac82000000b003cf7a4ea2caso4974705wme.5 for ; Fri, 16 Dec 2022 13:43:09 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=lqJ1U1BjhvvbnXKxuMnVz/cLZMrP5TJ4J5T0otuK7Ws=; b=BOtriwxshH0YTkpjm7w0rqIqQ/wupWBqkRMWLDlindEIBnwtEj4MNMgJtS4MwjmN8y DTjK5oRY8soSk4U3IZjwSnBWF8Np5SY5Fn0CiO2F+/InGPMQTT3TGdJoDhY3erwGA4HO TemOGd4mMLETXvq9j4FAJxnYIe7oNe5YGsSNOTe3PMzLvk31EPL5TB041UGyOX0ZbCJe zzwATcVmGfBvmrpq5Kt9m6AVWhY6ayUBLzkUgJIHWcYgJ32bEdsmgBduN0J60vQTrlNx 4dXBK0BYn9OUl086o4ytYnsQ815mCXcFgdVwhXPIlZlVg3MLvlnANTZjEpBJNn0liCLY a32Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=lqJ1U1BjhvvbnXKxuMnVz/cLZMrP5TJ4J5T0otuK7Ws=; b=ivL8iT6G9C/0exb94tomlFW+MsnEuWczUhpAvIqAA+G5thXQhIRuS/+Xu7f/FA9AbH If6qjI4LhPNHAt1N8oTc2cCH69a2mBqf2d0fIzV0hrdztZXRrbzaGcqXB/jG96dsXkXQ AmLgk2nMZXPuepzqXEOe8IeyAHGmRbQ9Fhw1t2bSa3fAs142uBMsBxriPKA5P/8UlKHJ a/ScPLtvJ52FGCYKKObityBD3YUyWhpILjldKiLqNL8RbdR1+hO0az48GRSFKFuO3REX zWQrzcTotN5bimmGCdttgwYHDyYiLAkHN4o4U5q6gCB7B/VWXPK1u62fxXhRia5WVue3 ASUA== X-Gm-Message-State: ANoB5pnCIhNyX2zmYjOQqBErZRSYCy6rt37m+G5p/tqDt2dB9uiQhXJ5 u7prJyphnd65Ito3QBi0VygeFX+nJrI046qY X-Received: by 2002:a05:600c:539a:b0:3cf:8957:806e with SMTP id hg26-20020a05600c539a00b003cf8957806emr27147023wmb.5.1671226988885; Fri, 16 Dec 2022 13:43:08 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id y7-20020a05600c364700b003d33ab317dasm4135263wmq.14.2022.12.16.13.43.08 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 16 Dec 2022 13:43:08 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 24/36] target/riscv: Convert to 3-phase reset Date: Fri, 16 Dec 2022 21:42:32 +0000 Message-Id: <20221216214244.1391647-25-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221216214244.1391647-1-peter.maydell@linaro.org> References: <20221216214244.1391647-1-peter.maydell@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::333; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x333.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Convert the riscv CPU class to use 3-phase reset, so it doesn't need to use device_class_set_parent_reset() any more. Signed-off-by: Peter Maydell Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Reviewed-by: Alistair Francis Reviewed-by: Cédric Le Goater Reviewed-by: Edgar E. Iglesias Reviewed-by: Taylor Simpson Reviewed-by: Greg Kurz Message-id: 20221124115023.2437291-15-peter.maydell@linaro.org --- target/riscv/cpu.h | 4 ++-- target/riscv/cpu.c | 12 ++++++++---- 2 files changed, 10 insertions(+), 6 deletions(-) diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h index 3a9e25053f8..443d15a47c0 100644 --- a/target/riscv/cpu.h +++ b/target/riscv/cpu.h @@ -395,7 +395,7 @@ OBJECT_DECLARE_CPU_TYPE(RISCVCPU, RISCVCPUClass, RISCV_CPU) /** * RISCVCPUClass: * @parent_realize: The parent class' realize handler. - * @parent_reset: The parent class' reset handler. + * @parent_phases: The parent class' reset phase handlers. * * A RISCV CPU model. */ @@ -404,7 +404,7 @@ struct RISCVCPUClass { CPUClass parent_class; /*< public >*/ DeviceRealize parent_realize; - DeviceReset parent_reset; + ResettablePhases parent_phases; }; struct RISCVCPUConfig { diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index d14e95c9dc1..6fe176e4833 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -519,18 +519,20 @@ static void riscv_restore_state_to_opc(CPUState *cs, env->bins = data[1]; } -static void riscv_cpu_reset(DeviceState *dev) +static void riscv_cpu_reset_hold(Object *obj) { #ifndef CONFIG_USER_ONLY uint8_t iprio; int i, irq, rdzero; #endif - CPUState *cs = CPU(dev); + CPUState *cs = CPU(obj); RISCVCPU *cpu = RISCV_CPU(cs); RISCVCPUClass *mcc = RISCV_CPU_GET_CLASS(cpu); CPURISCVState *env = &cpu->env; - mcc->parent_reset(dev); + if (mcc->parent_phases.hold) { + mcc->parent_phases.hold(obj); + } #ifndef CONFIG_USER_ONLY env->misa_mxl = env->misa_mxl_max; env->priv = PRV_M; @@ -1161,11 +1163,13 @@ static void riscv_cpu_class_init(ObjectClass *c, void *data) RISCVCPUClass *mcc = RISCV_CPU_CLASS(c); CPUClass *cc = CPU_CLASS(c); DeviceClass *dc = DEVICE_CLASS(c); + ResettableClass *rc = RESETTABLE_CLASS(c); device_class_set_parent_realize(dc, riscv_cpu_realize, &mcc->parent_realize); - device_class_set_parent_reset(dc, riscv_cpu_reset, &mcc->parent_reset); + resettable_class_set_parent_phases(rc, NULL, riscv_cpu_reset_hold, NULL, + &mcc->parent_phases); cc->class_by_name = riscv_cpu_class_by_name; cc->has_work = riscv_cpu_has_work; From patchwork Fri Dec 16 21:42:33 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 634497 Delivered-To: patch@linaro.org Received: by 2002:a17:522:c983:b0:460:3032:e3c4 with SMTP id kr3csp1088091pvb; Fri, 16 Dec 2022 14:32:02 -0800 (PST) X-Google-Smtp-Source: AA0mqf6L1Lr6OYEyt/N/sxY4uCer+4+5AMlLA0O98xzEwTxvX3YWCulC/dKP3kf6jO8SV2XKQIcu X-Received: by 2002:a05:622a:91:b0:3a8:133a:9686 with SMTP id o17-20020a05622a009100b003a8133a9686mr45056129qtw.12.1671229922111; Fri, 16 Dec 2022 14:32:02 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1671229922; cv=none; d=google.com; s=arc-20160816; b=gDEdp0p7wIUXkZpkia+DSisf25MJLs7pv5xhqlMiBlxWMKUTYN4gPIiPHXSX7iQ3oI /T4Gd95r85/63cWxlN0iBhI1L6x60WOkG4eqRLtZKzw8cXHL5mVjcj7589GabNPBbGD8 ou8z4e9UKr2n9wUvlIzBKm38V4tSm6T/ONMKYQBI+8fU1MrLU2AuqP8i/+OJCr+yUlKp L58Gvj9B6DTkN6+gbK4ySxsS9uDQhuYWpL/38ONNnS7QsRkZp5sgh9ZxkqYo2embCM2P 6s3I5TJxXFJFtd7bUR8eYBr5Mr47hohzWZL2Vf5juZ3rTmaYIVKOw9YwMFCEHdpmssWx TC5w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=OaolEeI/VBAVtDjg7jIzycyq6Q1jqs6WjWVYeKLQJ68=; b=vlrik3G983/odPD2OeV7d1YaZ/S68vuA3jfG6BSfoL6/Pcwqz6qITM70HNL+aatT6b z9ZB9+9eRyf/mrlBk1b94/ZRbDCoRomRw7j7acs9snw71a3dV7x4PcgYpm0VJ3tapkUQ cqsLDiR3hpTlE3L53qdfzqfuIgaUOcuI8uqxynYJUv4pF4yM/Gvgkl2Sp1DeBUHcuU+N 8Tl/fOwC6IpnzhEAptrLhV9RLJZADuPDaV9+ywrDWx1mYqSO4JYdn3D9abjMmS5ZKRJv yn3xoJoHOZAA6en4tF4/93iIL3UfLBZcHGFB4y7XbBIkSu3JEzuoVC5sfWPA9YUx+WAW v+TA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=OhHIdHLw; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id j12-20020ac8550c000000b0039461d2ca93si1443907qtq.523.2022.12.16.14.32.01 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Fri, 16 Dec 2022 14:32:02 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=OhHIdHLw; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1p6IUq-0006Zb-MD; Fri, 16 Dec 2022 16:44:04 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1p6IU4-00061g-Fg for qemu-devel@nongnu.org; Fri, 16 Dec 2022 16:43:12 -0500 Received: from mail-wm1-x330.google.com ([2a00:1450:4864:20::330]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1p6IU2-0000cM-MX for qemu-devel@nongnu.org; Fri, 16 Dec 2022 16:43:12 -0500 Received: by mail-wm1-x330.google.com with SMTP id o5-20020a05600c510500b003d21f02fbaaso4980895wms.4 for ; Fri, 16 Dec 2022 13:43:10 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=OaolEeI/VBAVtDjg7jIzycyq6Q1jqs6WjWVYeKLQJ68=; b=OhHIdHLwNyH0CsC6iNDJuXMoEAHDtz8QuHhzMKd0GLMIzpW7N0XrnSGPzC5gBaNcxL 6kAFZ7lBVN0vybG85Puxq++alFqsfLDBo6XZlbA1ocn23gIsIe2ETGdXcewAu1ZiDlfu bPW9KDprDuVeraTIVVpPSHHXNcTfWw03MZixxy6QmcrC5ye3LPA8KmlZPiv/5r8F/gDo wqK5NwhQ7oBTqkV2XksEqQclud70Ax9XRKK2mUrZUlOuwwXrhk4AYaagnNXTt17p/PBE qwuOGDw/ayaCB/zFKMU84FcKAUF9J4IA5eb9Vdq2QE2CGhP5uyd70aLCuABbNk8mPZIS rO1A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=OaolEeI/VBAVtDjg7jIzycyq6Q1jqs6WjWVYeKLQJ68=; b=HEXRSyT0XnZfHaGf6QQy+b3NP6cykZHlO+Yv2j5Ga8UwW2rGVZP4eRhyunTLdbVIVq nhGRfNP86VJXFdloBcCsb3IHxAFozG4CRGumxLL+eVlgxU72J4pbGq/E3qw0kLHfxf6B vz3G2akb00uEXYPexyRRj6vyiCgDfSHEaAOjWcbnttsU0Zmxt8NaegxrQUFry/1j412D vLiSSoj8n+BvN7pB85ui14RJVokYp53zvZNA3XbpQdlXB5w5fDKUbOc1XU5B1lVhlicf myaIbAaWtJZtburYOXmFWThkI/MehgjHMH0vWcd87UAK4lgeLoNBRE7dVBevdO5QK56O 2mHg== X-Gm-Message-State: ANoB5pkxG1NCaX4lYXrNNk9v8KGLTi4VvqklJZpr6z/4SPsCK+MqPFsi 5wpPczonyy1mMkCjtAk+E2PTRr/aezofcN7G X-Received: by 2002:a1c:cc1a:0:b0:3cf:5583:8b3f with SMTP id h26-20020a1ccc1a000000b003cf55838b3fmr27369970wmb.20.1671226989952; Fri, 16 Dec 2022 13:43:09 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id y7-20020a05600c364700b003d33ab317dasm4135263wmq.14.2022.12.16.13.43.08 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 16 Dec 2022 13:43:09 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 25/36] target/rx: Convert to 3-phase reset Date: Fri, 16 Dec 2022 21:42:33 +0000 Message-Id: <20221216214244.1391647-26-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221216214244.1391647-1-peter.maydell@linaro.org> References: <20221216214244.1391647-1-peter.maydell@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::330; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x330.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Convert the rx CPU class to use 3-phase reset, so it doesn't need to use device_class_set_parent_reset() any more. Signed-off-by: Peter Maydell Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Reviewed-by: Alistair Francis Reviewed-by: Cédric Le Goater Reviewed-by: Edgar E. Iglesias Reviewed-by: Taylor Simpson Reviewed-by: Greg Kurz Message-id: 20221124115023.2437291-16-peter.maydell@linaro.org --- target/rx/cpu-qom.h | 4 ++-- target/rx/cpu.c | 13 ++++++++----- 2 files changed, 10 insertions(+), 7 deletions(-) diff --git a/target/rx/cpu-qom.h b/target/rx/cpu-qom.h index 4533759d966..1c8466a1870 100644 --- a/target/rx/cpu-qom.h +++ b/target/rx/cpu-qom.h @@ -31,7 +31,7 @@ OBJECT_DECLARE_CPU_TYPE(RXCPU, RXCPUClass, RX_CPU) /* * RXCPUClass: * @parent_realize: The parent class' realize handler. - * @parent_reset: The parent class' reset handler. + * @parent_phases: The parent class' reset phase handlers. * * A RX CPU model. */ @@ -41,7 +41,7 @@ struct RXCPUClass { /*< public >*/ DeviceRealize parent_realize; - DeviceReset parent_reset; + ResettablePhases parent_phases; }; #endif diff --git a/target/rx/cpu.c b/target/rx/cpu.c index 9003c6e9fed..219ef28e463 100644 --- a/target/rx/cpu.c +++ b/target/rx/cpu.c @@ -62,14 +62,16 @@ static bool rx_cpu_has_work(CPUState *cs) (CPU_INTERRUPT_HARD | CPU_INTERRUPT_FIR); } -static void rx_cpu_reset(DeviceState *dev) +static void rx_cpu_reset_hold(Object *obj) { - RXCPU *cpu = RX_CPU(dev); + RXCPU *cpu = RX_CPU(obj); RXCPUClass *rcc = RX_CPU_GET_CLASS(cpu); CPURXState *env = &cpu->env; uint32_t *resetvec; - rcc->parent_reset(dev); + if (rcc->parent_phases.hold) { + rcc->parent_phases.hold(obj); + } memset(env, 0, offsetof(CPURXState, end_reset_fields)); @@ -215,11 +217,12 @@ static void rx_cpu_class_init(ObjectClass *klass, void *data) DeviceClass *dc = DEVICE_CLASS(klass); CPUClass *cc = CPU_CLASS(klass); RXCPUClass *rcc = RX_CPU_CLASS(klass); + ResettableClass *rc = RESETTABLE_CLASS(klass); device_class_set_parent_realize(dc, rx_cpu_realize, &rcc->parent_realize); - device_class_set_parent_reset(dc, rx_cpu_reset, - &rcc->parent_reset); + resettable_class_set_parent_phases(rc, NULL, rx_cpu_reset_hold, NULL, + &rcc->parent_phases); cc->class_by_name = rx_cpu_class_by_name; cc->has_work = rx_cpu_has_work; From patchwork Fri Dec 16 21:42:34 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 634436 Delivered-To: patch@linaro.org Received: by 2002:a17:522:c983:b0:460:3032:e3c4 with SMTP id kr3csp1068542pvb; Fri, 16 Dec 2022 13:43:50 -0800 (PST) X-Google-Smtp-Source: AA0mqf6jOetU/QDbBUuGpN/u+GcvzbPVcrObGdh1Lu8hhxUHTk+S/EK8ByEaRhgaudYRXxZzbi5B X-Received: by 2002:a05:6214:451f:b0:4db:920a:fe51 with SMTP id oo31-20020a056214451f00b004db920afe51mr40520733qvb.23.1671227029799; Fri, 16 Dec 2022 13:43:49 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1671227029; cv=none; d=google.com; s=arc-20160816; b=IQeKaxNckbpnWqSZ9dYqrAtzVQtoQzsI0T98qCTPUyglzvvpJP2TAw0kmTcdxwiptS +hOmBed6vbMbO2xpBhe9jW2KYZemC9xK7iJY4zJKdgfiMykYV0fMIkKBgSgu0EuTPdUg pydty/Kmy/9Cezhcv9wFe86/UQ1CfLy/TrXJHB+xLRiuqom3A5df3/bF88WiKqujcUJy D83DVMKkGNMZ6LdwuOY8z1LZ848X3/JNINe/UNOpTZbPjxa6HXbGGkB/w331AfX6aunp /kTxJWA42fZsdakaAH2/IbM5Cn7sQRjzoimr0R4iPq9g3m2rzIaIElIxlqGWHpYjeDH/ 9kMQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=edRWCBqsjA6zIj3Q58VGwuvfkVmFaYmBYW1gADSiXrE=; b=CRqqr/rlxn804/yhuW7DYlglPbXSwcHO4EcAu0fS09l2NSfMacDr4JrCr0gRpk1n2M pEFHUbr2isLL1QWYwhUhFrWGzKfqA1579pT8txd2z+Hf50HpjN2ibNp6dyOWWEOkDbbF Hjpjzsah4fhzaveH51knsHJxcNVD4vJ51FnJjaFK9G+/SsgTf7ZnRJk5GcZvakoFf2ey /Mm+PkKZ95xDm3g0rHV/srPNRD6IBFqq64xdH0PiNklIKgcz3bojifvJpIoqFYsUZDk7 j81muLpS4vNeYIBb0frCHPWSJh3rjakSeg1iWGWXZvDcjds8Kltzp8K610ITlCyvqfB6 W6Ug== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=kwjR68fR; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id 2-20020a370602000000b006eed097a524si1369052qkg.374.2022.12.16.13.43.49 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Fri, 16 Dec 2022 13:43:49 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=kwjR68fR; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1p6IUI-000666-3u; Fri, 16 Dec 2022 16:43:26 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1p6IU5-00061s-DR for qemu-devel@nongnu.org; Fri, 16 Dec 2022 16:43:13 -0500 Received: from mail-wm1-x330.google.com ([2a00:1450:4864:20::330]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1p6IU3-0000bj-Ny for qemu-devel@nongnu.org; Fri, 16 Dec 2022 16:43:13 -0500 Received: by mail-wm1-x330.google.com with SMTP id i187-20020a1c3bc4000000b003d1e906ca23so2079825wma.3 for ; Fri, 16 Dec 2022 13:43:11 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=edRWCBqsjA6zIj3Q58VGwuvfkVmFaYmBYW1gADSiXrE=; b=kwjR68fRgDg3ScAf8dq4gZgKwPjMaaY2antm5h066SlcLhvCtyDuuF1Nq7JUfapXZ/ pVaC0f2qhB5cRzBi1w5PrhwnJb+EjhKXInf5dkKchQrq9w5Nk/9rfQRiHJACSmfW9VQg Isf/bYpn8O+saeK426Azj7yP9j4J/yIzwWKWcv8zYUWmHIwntE522mSdrvrIWVj6Eaww tyvqpskbAJQF4YwgWdLzE8nXI23IlKFkPdw7NDNT5WcMpf1+KXBULkqShvc7vJ/xBnr0 kkeGLvavWHe20Xeq0ibqsv5sbrEdzTpE8t5WPiGBiJ7ZdQ37RQLUy1B4JRQXnftgDiHv CHEw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=edRWCBqsjA6zIj3Q58VGwuvfkVmFaYmBYW1gADSiXrE=; b=Q8EQqtqX2GhUp8g/J/Faf3geKA2ut5zOXjOHqbea7nPj7+2zdXq1rLYHtIyv994K7E iojpLlOBk6fH7GV/ijbxpQ4umon1ZMnyO+F3AHxpMYY3Zh8qDsvXZ8PIladZG5UKQaqw TEoknDiQ5iAi6DG0ujyPVrNMv7eFSeYJBlgbkZggTGEdn+alXcQ/cSzD+sMs4eJVrmVW 6+VWTxVHabJMBpN4Gh2MVdniUH8mZzVErUYUEt+wr0s7C4kAMfrUFEVRKE/fl47noD0R C8OhrXsTaAaPauXVdHs6Qk14kDb6qVno6UGcOeKf2QPIed4HD+bfx8iC3q3pddS7X+Af H9eg== X-Gm-Message-State: ANoB5pk4IGiHALlTVrkNm42+pT8JUNlx93NO9knNw31BKDehDjPyW9lO dE8m5J7q0gudpkGHv+2vaX27+O+aXB0LLiep X-Received: by 2002:a05:600c:4e92:b0:3d0:89f5:9296 with SMTP id f18-20020a05600c4e9200b003d089f59296mr27221992wmq.17.1671226990863; Fri, 16 Dec 2022 13:43:10 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id y7-20020a05600c364700b003d33ab317dasm4135263wmq.14.2022.12.16.13.43.10 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 16 Dec 2022 13:43:10 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 26/36] target/sh4: Convert to 3-phase reset Date: Fri, 16 Dec 2022 21:42:34 +0000 Message-Id: <20221216214244.1391647-27-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221216214244.1391647-1-peter.maydell@linaro.org> References: <20221216214244.1391647-1-peter.maydell@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::330; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x330.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Convert the sh4 CPU class to use 3-phase reset, so it doesn't need to use device_class_set_parent_reset() any more. Signed-off-by: Peter Maydell Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Reviewed-by: Alistair Francis Reviewed-by: Cédric Le Goater Reviewed-by: Edgar E. Iglesias Reviewed-by: Taylor Simpson Reviewed-by: Greg Kurz Message-id: 20221124115023.2437291-17-peter.maydell@linaro.org --- target/sh4/cpu-qom.h | 4 ++-- target/sh4/cpu.c | 12 ++++++++---- 2 files changed, 10 insertions(+), 6 deletions(-) diff --git a/target/sh4/cpu-qom.h b/target/sh4/cpu-qom.h index d4192d10908..89785a90f02 100644 --- a/target/sh4/cpu-qom.h +++ b/target/sh4/cpu-qom.h @@ -34,7 +34,7 @@ OBJECT_DECLARE_CPU_TYPE(SuperHCPU, SuperHCPUClass, SUPERH_CPU) /** * SuperHCPUClass: * @parent_realize: The parent class' realize handler. - * @parent_reset: The parent class' reset handler. + * @parent_phases: The parent class' reset phase handlers. * @pvr: Processor Version Register * @prr: Processor Revision Register * @cvr: Cache Version Register @@ -47,7 +47,7 @@ struct SuperHCPUClass { /*< public >*/ DeviceRealize parent_realize; - DeviceReset parent_reset; + ResettablePhases parent_phases; uint32_t pvr; uint32_t prr; diff --git a/target/sh4/cpu.c b/target/sh4/cpu.c index 453268392bf..951eb6b9c8d 100644 --- a/target/sh4/cpu.c +++ b/target/sh4/cpu.c @@ -87,14 +87,16 @@ static bool superh_cpu_has_work(CPUState *cs) return cs->interrupt_request & CPU_INTERRUPT_HARD; } -static void superh_cpu_reset(DeviceState *dev) +static void superh_cpu_reset_hold(Object *obj) { - CPUState *s = CPU(dev); + CPUState *s = CPU(obj); SuperHCPU *cpu = SUPERH_CPU(s); SuperHCPUClass *scc = SUPERH_CPU_GET_CLASS(cpu); CPUSH4State *env = &cpu->env; - scc->parent_reset(dev); + if (scc->parent_phases.hold) { + scc->parent_phases.hold(obj); + } memset(env, 0, offsetof(CPUSH4State, end_reset_fields)); @@ -274,11 +276,13 @@ static void superh_cpu_class_init(ObjectClass *oc, void *data) DeviceClass *dc = DEVICE_CLASS(oc); CPUClass *cc = CPU_CLASS(oc); SuperHCPUClass *scc = SUPERH_CPU_CLASS(oc); + ResettableClass *rc = RESETTABLE_CLASS(oc); device_class_set_parent_realize(dc, superh_cpu_realizefn, &scc->parent_realize); - device_class_set_parent_reset(dc, superh_cpu_reset, &scc->parent_reset); + resettable_class_set_parent_phases(rc, NULL, superh_cpu_reset_hold, NULL, + &scc->parent_phases); cc->class_by_name = superh_cpu_class_by_name; cc->has_work = superh_cpu_has_work; From patchwork Fri Dec 16 21:42:35 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 634496 Delivered-To: patch@linaro.org Received: by 2002:a17:522:c983:b0:460:3032:e3c4 with SMTP id kr3csp1088007pvb; Fri, 16 Dec 2022 14:31:44 -0800 (PST) X-Google-Smtp-Source: AMrXdXsk5V/YlPjYmqZzNY/rHmICXy4VUUUMPnI2fSWWSiaLZkjZxm0cpTX47+LCiZUzeezXVRRN X-Received: by 2002:a05:622a:5808:b0:3a9:7332:3f72 with SMTP id fg8-20020a05622a580800b003a973323f72mr6968830qtb.25.1671229904720; Fri, 16 Dec 2022 14:31:44 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1671229904; cv=none; d=google.com; s=arc-20160816; b=qlIyE3s/Lt+zsvgQSvHhX2tejxf7f94SzHoA2zFSh/9VdTfM4c1pKlKiaxnRkShsQR 9ZOCSrSFMI+r9NfecmOl9veq25534pvXu/WWOFRR+1zVk4RGchKlfbUgqQMK6bRU/DeE Zo097Di2iuLMuOfSJ0WPmDmL+8XliS7FuX0SXyZBMKxgR6PK4QA5RH4MZqwHX9r6Smce 1LqYSFxTeWVZLLc1x/I95TjpDXIrAQitRzEz3Yof3lK0flqjjpHeKc8Q1JjIEfWq4K2/ EKtVSIiZA1qe4MgKRwBkcoYgejXWvLMIpB7tKM8k+wwmnLdSKQALilanw0CSUziARfhp D6hw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=bDUcrxHwLGbcB7ISY+JnEmJS7iSG+RW4z/scHWZ7amo=; b=wrjTpUBTi1UDmKt3wKpy40BiAuWT+suhi+j2I0JofGip/r80Bu7j5PZg55fwubDOPQ 5RGLzssvbiK1m4pECVvSokIKtQR6QYjfBLJ2ZSXNni0chZz+9Nn8JYFhMUhTnlEIVYlU 5Nqs3gnDhtDNQ58ETSwKzXDt3ULxNJay2dqfHyD2kkPm2t8lFiwprsmRQ3nNjn7YWT7m n2wxyHFhg7IvW3lU44i/ooLGsPf2zqCihrngX1Nv8XJuC6k3olWALyC1JaIstEcVz+Iy 8/2khBvEUA/fuYqlQ4k1VMTX+/foyuQZyneEsEWQTNQRxh/hDLht0bTaAIMIWIgDaurP /5kg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=fHgppYct; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id v23-20020ac87497000000b003a7ee3cdaf6si1493142qtq.778.2022.12.16.14.31.44 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Fri, 16 Dec 2022 14:31:44 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=fHgppYct; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1p6IV5-0006l9-1K; Fri, 16 Dec 2022 16:44:15 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1p6IU6-00062W-98 for qemu-devel@nongnu.org; Fri, 16 Dec 2022 16:43:14 -0500 Received: from mail-wm1-x333.google.com ([2a00:1450:4864:20::333]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1p6IU4-0000ar-Hk for qemu-devel@nongnu.org; Fri, 16 Dec 2022 16:43:14 -0500 Received: by mail-wm1-x333.google.com with SMTP id v124-20020a1cac82000000b003cf7a4ea2caso4974785wme.5 for ; Fri, 16 Dec 2022 13:43:12 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=bDUcrxHwLGbcB7ISY+JnEmJS7iSG+RW4z/scHWZ7amo=; b=fHgppYctibrgC9kBXxpWHycUGJgik4bz1uqWS1gG/kMhtP8dIU/D/FGIoVhHNAOz8u QAaR2CwOGQWrhxXgoY4gWY9DGdm3OiCzvEdqkeDFa+qIgML3fbcKpDz/ZBoFNQV26aRK ooRy2xtq46Z6DhefNxOln2LdlJ7RN3Ttm0pWn51vckBHg68TmlyVPT3f9E2OVGo6Kk8+ pT+HC2Ars7/y6lRmlKRXyuxRSlskALLAm6j4XJ67KavNip6j3rsd33HC78oVk1j8IojC 49/JvW+4Zg/JJwi9SgMNaG7cIrJBCfCTgWUqYhWVwrPFwm0qWUr2u6dYCQNjXIW63y8J wsTw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=bDUcrxHwLGbcB7ISY+JnEmJS7iSG+RW4z/scHWZ7amo=; b=Y9sphAUjzw3LM7rFLkbWRUuxJYtj7bnajG7ASjRVPSutly9iFn15Yhg067exRR+GTi xQUo+Ug2cYV9ttp2TKOcCQnF+7ewLeO6yBT1k14mcuTcCTVsv5bYs2LhJlF1uHf37Ub7 XLBI4ry4CXVC2GUEQPKIzQGOW84HmF2fmgGVTPdcFzWebjorU4w5kObw2Iz68czqg+YA vZrpIbtJCv9qMUoXDhdNKCwGlvfBTwoTO2ECfSdZ2ozPaWNVR5NFM6G99GlFZhLEWZa2 rl7/M3g06u3IC/v0XQy6uYZMGLN2YmNf1hfe9WrVXRjII8UEgVQ16C8quGA5yZrVjItR 6mmw== X-Gm-Message-State: ANoB5pnU5f9JgZh1t1CS2lJkNGVTx6NfgMMfnNHFHwml/x/w5GtbA0gr UbqBv3tgrxrjwXWRIM0V2P24yAunzZSGqdMz X-Received: by 2002:a05:600c:5120:b0:3d2:5e4e:6fa with SMTP id o32-20020a05600c512000b003d25e4e06famr6898775wms.34.1671226991745; Fri, 16 Dec 2022 13:43:11 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id y7-20020a05600c364700b003d33ab317dasm4135263wmq.14.2022.12.16.13.43.10 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 16 Dec 2022 13:43:11 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 27/36] target/sparc: Convert to 3-phase reset Date: Fri, 16 Dec 2022 21:42:35 +0000 Message-Id: <20221216214244.1391647-28-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221216214244.1391647-1-peter.maydell@linaro.org> References: <20221216214244.1391647-1-peter.maydell@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::333; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x333.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Convert the sparc CPU class to use 3-phase reset, so it doesn't need to use device_class_set_parent_reset() any more. Signed-off-by: Peter Maydell Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Reviewed-by: Alistair Francis Reviewed-by: Cédric Le Goater Reviewed-by: Edgar E. Iglesias Reviewed-by: Taylor Simpson Reviewed-by: Greg Kurz Reviewed-by: Mark Cave-Ayland Message-id: 20221124115023.2437291-18-peter.maydell@linaro.org --- target/sparc/cpu-qom.h | 4 ++-- target/sparc/cpu.c | 12 ++++++++---- 2 files changed, 10 insertions(+), 6 deletions(-) diff --git a/target/sparc/cpu-qom.h b/target/sparc/cpu-qom.h index 86ed37d9333..78bf00b9a23 100644 --- a/target/sparc/cpu-qom.h +++ b/target/sparc/cpu-qom.h @@ -35,7 +35,7 @@ typedef struct sparc_def_t sparc_def_t; /** * SPARCCPUClass: * @parent_realize: The parent class' realize handler. - * @parent_reset: The parent class' reset handler. + * @parent_phases: The parent class' reset phase handlers. * * A SPARC CPU model. */ @@ -45,7 +45,7 @@ struct SPARCCPUClass { /*< public >*/ DeviceRealize parent_realize; - DeviceReset parent_reset; + ResettablePhases parent_phases; sparc_def_t *cpu_def; }; diff --git a/target/sparc/cpu.c b/target/sparc/cpu.c index 4c3d08a8751..1734ef8dc6b 100644 --- a/target/sparc/cpu.c +++ b/target/sparc/cpu.c @@ -28,14 +28,16 @@ //#define DEBUG_FEATURES -static void sparc_cpu_reset(DeviceState *dev) +static void sparc_cpu_reset_hold(Object *obj) { - CPUState *s = CPU(dev); + CPUState *s = CPU(obj); SPARCCPU *cpu = SPARC_CPU(s); SPARCCPUClass *scc = SPARC_CPU_GET_CLASS(cpu); CPUSPARCState *env = &cpu->env; - scc->parent_reset(dev); + if (scc->parent_phases.hold) { + scc->parent_phases.hold(obj); + } memset(env, 0, offsetof(CPUSPARCState, end_reset_fields)); env->cwp = 0; @@ -889,12 +891,14 @@ static void sparc_cpu_class_init(ObjectClass *oc, void *data) SPARCCPUClass *scc = SPARC_CPU_CLASS(oc); CPUClass *cc = CPU_CLASS(oc); DeviceClass *dc = DEVICE_CLASS(oc); + ResettableClass *rc = RESETTABLE_CLASS(oc); device_class_set_parent_realize(dc, sparc_cpu_realizefn, &scc->parent_realize); device_class_set_props(dc, sparc_cpu_properties); - device_class_set_parent_reset(dc, sparc_cpu_reset, &scc->parent_reset); + resettable_class_set_parent_phases(rc, NULL, sparc_cpu_reset_hold, NULL, + &scc->parent_phases); cc->class_by_name = sparc_cpu_class_by_name; cc->parse_features = sparc_cpu_parse_features; From patchwork Fri Dec 16 21:42:36 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 634502 Delivered-To: patch@linaro.org Received: by 2002:a17:522:c983:b0:460:3032:e3c4 with SMTP id kr3csp1088731pvb; Fri, 16 Dec 2022 14:33:36 -0800 (PST) X-Google-Smtp-Source: AA0mqf4WZ8uBoZ25nQftYOnkA6EVJh7nsG7IsPRIIkXdMgeYqTYywCfR6jaomdeVRYMR/ea9YPgH X-Received: by 2002:a05:6214:449c:b0:4da:ef71:14b0 with SMTP id on28-20020a056214449c00b004daef7114b0mr41915582qvb.50.1671230015869; Fri, 16 Dec 2022 14:33:35 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1671230015; cv=none; d=google.com; s=arc-20160816; b=srP8IebV5c4p6/KnnZMoRRiZkpdcchDYQFSUoHVJW0qN8BxmWgSrBbdhijqduDK5gf 2Q8XleZ7ez8fqVybRUbwF8j1iMpExqAILZFWr9DfyyhCC2f9Yq+JNZt6uert5T110xsa 3nC9mbjFnHX4uZLDHKxfkbctO4Q8I6B4wRhcqBFR0d5mJSwm/vkhB17ZKao38ilsPx3w Ou7CDTIlvNCmjWSF64LqSwn2Uqwy137WeE7Fog4K7R66MkC4yyC4R6zHWwxdsGTTJ+Jg ZoXTipb1Nw2AN0ypJmhbSd1EGi7C3fALHRjqfELLbqGTzX+1PI8gYAJ/PcVdsxsysc5P AV6w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=NmHc1iW2xf801WdjGgkjhtPtQcaDJVi1vDsYl4gELPE=; b=k++yCqS7VCpmyLJt4BMPR1C5GhoXaDeQN/fuRchNLuERPmXFGETASl5+mq40p7goXV eOxLBYx9q+QAj6KaK0ZnGLLrsUsjeDcjXnXyJYdzB/Y/tH64gnaF0wC473NxN173WBGv c0XbFHW7Fjwq7sOSTKHtlu6Z2FuMtohquWdQv8SSc0FjAQJlLog0ebRtjfYafA85U4ZY yN0faxiEg8eOXrArbDBiGMLJKVmbQbIqguBssNL0YP57Ua86JohOopbT81CZLn4PPXzx F5wED920B6IAkboNuTliWcHWbhwq3deWyPJ3PF9XbkTQv5woTpsjzMu+Gyo1CNwvP7jD RodA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=sJs61Y9r; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id mr13-20020a056214348d00b004c684733a3bsi1423150qvb.514.2022.12.16.14.33.35 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Fri, 16 Dec 2022 14:33:35 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=sJs61Y9r; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1p6IV5-0006lp-Mq; Fri, 16 Dec 2022 16:44:15 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1p6IU7-00063T-8k for qemu-devel@nongnu.org; Fri, 16 Dec 2022 16:43:15 -0500 Received: from mail-wm1-x32d.google.com ([2a00:1450:4864:20::32d]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1p6IU5-0000ck-Gg for qemu-devel@nongnu.org; Fri, 16 Dec 2022 16:43:14 -0500 Received: by mail-wm1-x32d.google.com with SMTP id f13-20020a1cc90d000000b003d08c4cf679so2678562wmb.5 for ; Fri, 16 Dec 2022 13:43:13 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=NmHc1iW2xf801WdjGgkjhtPtQcaDJVi1vDsYl4gELPE=; b=sJs61Y9rk7oSJyORF5J4o54KW7CWbVbFYwkwP2Lm4ShEBQdC6ZIiHxUVFDw3pV6Zgu aAEXxF2yCCwEx2BCaSwrIwcIVqUD59tVYKpFp9koov0cuMMgP/nSI29dGeZ85It3vdaN 3cvHzuTKTua4kRSJfKLAxE/xLonAPOqFTtXXU/1y+Rk9ZufMF8Cz90gH2jaTTe9WDytv isdEd8OyBzo7dcBQvFGfCoGtacLi7YGnNtmEscwr7LbfivRIaL3AnFTnUmPh9BlZ1Sde QOkNW5460W2rL+7VHa9Hby1VGL4+/5xw1WpguifNiCmz2qgLVjmRQSibeRqbI3L8PIC4 Gkcg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=NmHc1iW2xf801WdjGgkjhtPtQcaDJVi1vDsYl4gELPE=; b=LOl/QhzYGt5DHlNaiQlhKDpUFbfqLIWmIMIcalk70Ek23ad5uODzyASUlo9KdpQGWP Lf8WYsYl8Z+q6/7Gg+tNmm3qY+KFtjmuRRSHmS9u0bJeoQYvxGPJ3jxIG//wYYDY4pvj dO0Zy0zMvGaOMCstzSqXU7y6gpn6t6eRQ0HPY0ShNe4vDGcWYJ1YEGu1wPdaOmLMGQR1 f7OTTqqStt+NeOBZoHbqNHLXX2AsnnbD5MNkGInmxsz+PMMQWOzN8Lru5bwpyRdHAVqn YsTR2BxsT4Qz0/hcTsZv+EaHyt/LhNqPcJF2P8PfxSCs9/WL+nlSWpgb/8MITLBDWNNY kLPQ== X-Gm-Message-State: ANoB5pk2+YYDbunkdkcsNo+mUHzGRusR6dbqCBXBFzvx+i69BSO3SJ8j d3SRvA/eL/mhYEo7aPbCx9xllhFm5yiGucGk X-Received: by 2002:a05:600c:3555:b0:3d0:8643:caf1 with SMTP id i21-20020a05600c355500b003d08643caf1mr18952734wmq.16.1671226992735; Fri, 16 Dec 2022 13:43:12 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id y7-20020a05600c364700b003d33ab317dasm4135263wmq.14.2022.12.16.13.43.11 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 16 Dec 2022 13:43:12 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 28/36] target/tricore: Convert to 3-phase reset Date: Fri, 16 Dec 2022 21:42:36 +0000 Message-Id: <20221216214244.1391647-29-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221216214244.1391647-1-peter.maydell@linaro.org> References: <20221216214244.1391647-1-peter.maydell@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32d; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x32d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Convert the tricore CPU class to use 3-phase reset, so it doesn't need to use device_class_set_parent_reset() any more. Signed-off-by: Peter Maydell Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Reviewed-by: Alistair Francis Reviewed-by: Cédric Le Goater Reviewed-by: Edgar E. Iglesias Reviewed-by: Taylor Simpson Reviewed-by: Greg Kurz Reviewed-by: Mark Cave-Ayland Message-id: 20221124115023.2437291-19-peter.maydell@linaro.org --- target/tricore/cpu-qom.h | 2 +- target/tricore/cpu.c | 12 ++++++++---- 2 files changed, 9 insertions(+), 5 deletions(-) diff --git a/target/tricore/cpu-qom.h b/target/tricore/cpu-qom.h index ee24e9fa76a..612731daa09 100644 --- a/target/tricore/cpu-qom.h +++ b/target/tricore/cpu-qom.h @@ -32,7 +32,7 @@ struct TriCoreCPUClass { /*< public >*/ DeviceRealize parent_realize; - DeviceReset parent_reset; + ResettablePhases parent_phases; }; diff --git a/target/tricore/cpu.c b/target/tricore/cpu.c index 2c54a2825f8..594cd1efd5e 100644 --- a/target/tricore/cpu.c +++ b/target/tricore/cpu.c @@ -68,14 +68,16 @@ static void tricore_restore_state_to_opc(CPUState *cs, env->PC = data[0]; } -static void tricore_cpu_reset(DeviceState *dev) +static void tricore_cpu_reset_hold(Object *obj) { - CPUState *s = CPU(dev); + CPUState *s = CPU(obj); TriCoreCPU *cpu = TRICORE_CPU(s); TriCoreCPUClass *tcc = TRICORE_CPU_GET_CLASS(cpu); CPUTriCoreState *env = &cpu->env; - tcc->parent_reset(dev); + if (tcc->parent_phases.hold) { + tcc->parent_phases.hold(obj); + } cpu_state_reset(env); } @@ -180,11 +182,13 @@ static void tricore_cpu_class_init(ObjectClass *c, void *data) TriCoreCPUClass *mcc = TRICORE_CPU_CLASS(c); CPUClass *cc = CPU_CLASS(c); DeviceClass *dc = DEVICE_CLASS(c); + ResettableClass *rc = RESETTABLE_CLASS(c); device_class_set_parent_realize(dc, tricore_cpu_realizefn, &mcc->parent_realize); - device_class_set_parent_reset(dc, tricore_cpu_reset, &mcc->parent_reset); + resettable_class_set_parent_phases(rc, NULL, tricore_cpu_reset_hold, NULL, + &mcc->parent_phases); cc->class_by_name = tricore_cpu_class_by_name; cc->has_work = tricore_cpu_has_work; From patchwork Fri Dec 16 21:42:37 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 634477 Delivered-To: patch@linaro.org Received: by 2002:a17:522:c983:b0:460:3032:e3c4 with SMTP id kr3csp1084872pvb; Fri, 16 Dec 2022 14:22:58 -0800 (PST) X-Google-Smtp-Source: AA0mqf7BQ7+rlYZVzxEZFehTLUh3jnGJkWG/krcMMJJizb6XGadpxaVmpvQa98XJFRP8TcjpJKUV X-Received: by 2002:a0c:e3cf:0:b0:4c7:4792:46b4 with SMTP id e15-20020a0ce3cf000000b004c7479246b4mr43806965qvl.52.1671229377955; Fri, 16 Dec 2022 14:22:57 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1671229377; cv=none; d=google.com; s=arc-20160816; b=p4D4Ol986eFb4/eNNsRoIAWNb6cpfn4jC1bcXVWikj+gbw9q/Q6C2WJ/uxkXqC5t7m Fuy/Y6AMHcHpF7OEexeV0baMi5mjfI2kVvyXy2JR2YykXDotpWbvPTxtJzx857dnJaxc Pebk7mS/qiDsCo6lp07YD4tW+KFT/U2N+jZJ6ECBxc4cAhwWHWgh0G+Pg2j5kVZKWH8K EZQmzXuk8G4oYeZYq24jzPLGZM5yUuZX5O4DqScc8zi7ip5mD59G6xcDFGcbRe/5TNaV c/KpWOLPiAYdLGRneDJ1n68C0TLLW9UaBIImT4AzlyQMUNX5AsgCcvH8918t5O+WVN7O 3mvg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=tmWSOkAlgQ3XeV0sLQSMRS/hn+5qBNnCvxTz3LkMcQc=; b=c3eGbYjKVmV1ogN4bdCFY8+0dgxVxt3rlIwDSPXQm7HsmYfs81mdv7rf/Q7PZ0aVBj wPr4+gGlwU1VE5/4f/Om2gljTa3xoB0E9oRaCFAS+9tecZOFrRKpU34OfKyBpSLMsCst xgbgpw1NylwdSbue9nR5jO0BEC3eZGCmi8tvfc4BFnHhSxh0bdWumegLUWSH0GJ25Q3c P3iv43Kc1p4H3C15EeE/dPR5mOUKO5Z1YDpFD1QJWJEW7nZCOrp07yK3av+Z6WpMgrO0 GSW95Ud+11sOAAAvSWE4sASXL1+m+Z/iTBEqHnmmSCxhMwW+ukylJ0KqKCD4ve1/+cFU aRNA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=lyPa3JVl; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id jn12-20020ad45dec000000b004b969a852f7si1661491qvb.10.2022.12.16.14.22.57 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Fri, 16 Dec 2022 14:22:57 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=lyPa3JVl; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1p6IV0-0006ft-6s; Fri, 16 Dec 2022 16:44:10 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1p6IU8-00064V-6M for qemu-devel@nongnu.org; Fri, 16 Dec 2022 16:43:16 -0500 Received: from mail-wm1-x32f.google.com ([2a00:1450:4864:20::32f]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1p6IU6-0000fE-GH for qemu-devel@nongnu.org; Fri, 16 Dec 2022 16:43:15 -0500 Received: by mail-wm1-x32f.google.com with SMTP id v7so2786738wmn.0 for ; Fri, 16 Dec 2022 13:43:14 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=tmWSOkAlgQ3XeV0sLQSMRS/hn+5qBNnCvxTz3LkMcQc=; b=lyPa3JVlWjHsLi18a+PEbeqodaoH0/bqyckN9gU7xFTDgDFIkpAPCdLWJIxFY89UsZ Rf2sRBuaL4Ctnwu4/FPHjQCeKMIm+x4XG812x0RsNsIzEzmEzSsGIaSOcvuJkJmb4c2u 7tcpJH617MolIkKUfN69a4bJyJh9/TUIqdoWmkSi5SEXexeXfab6hCXTjwrfk6G6mOS7 FYFuWub4Oi/vtHoPrLBX+Vgofi63Qt6qK9zVGoe4kVqMvY/RIREmA0b2v1gJy4g/tCFR wLAspnBnGGnikOz9i/frG4XfrjrINmNSx8qs0pbe05HvADI0+HuIqy0bauXR1mrYGp7X 5X0Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=tmWSOkAlgQ3XeV0sLQSMRS/hn+5qBNnCvxTz3LkMcQc=; b=o2oQfHvh8dVe39snbZHyfVCLb75EKMzXBeQbP4SN7YvjkLa+rps9s75i9YJ41WHkha PJp4ZTIWwqJ0yGEeYR+lO4bn7+LgQpKKiyWNEst/OXtNNsxPofnUASJQsRaa1+kcRXSR Tf8PivG2Qx1iervD3Ob9jtuRTUgWVExqERgsOax+KgLgdT/IJ5mvI24bdPiq0dIa4oJa TsLdZJANS3now8srWN99Y38ouVTYcqURTaYns+1fxC3vdedmW4+5T/Fvhw0awQJcNby1 GqRUhajpN2NCNP6267WbvdK7/ofVKaXJYTIzo7vR2pAH7Aib7vTBlFL/QyW3ewueU7QX H2Jw== X-Gm-Message-State: AFqh2kqUKiLwS9CvYCDnbd5zDTDuI/VHqGpn77ROdyO8m3KFdgKAOswQ ZlAA5FJmzlP35P7wZJSEa9dwOQWNjptkwxpV X-Received: by 2002:a05:600c:ad6:b0:3d3:3fb1:901d with SMTP id c22-20020a05600c0ad600b003d33fb1901dmr4494380wmr.37.1671226993776; Fri, 16 Dec 2022 13:43:13 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id y7-20020a05600c364700b003d33ab317dasm4135263wmq.14.2022.12.16.13.43.12 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 16 Dec 2022 13:43:13 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 29/36] target/xtensa: Convert to 3-phase reset Date: Fri, 16 Dec 2022 21:42:37 +0000 Message-Id: <20221216214244.1391647-30-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221216214244.1391647-1-peter.maydell@linaro.org> References: <20221216214244.1391647-1-peter.maydell@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32f; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x32f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Convert the xtensa CPU class to use 3-phase reset, so it doesn't need to use device_class_set_parent_reset() any more. Signed-off-by: Peter Maydell Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Reviewed-by: Alistair Francis Reviewed-by: Cédric Le Goater Reviewed-by: Edgar E. Iglesias Reviewed-by: Taylor Simpson Reviewed-by: Greg Kurz Reviewed-by: Mark Cave-Ayland Message-id: 20221124115023.2437291-20-peter.maydell@linaro.org --- target/xtensa/cpu-qom.h | 4 ++-- target/xtensa/cpu.c | 12 ++++++++---- 2 files changed, 10 insertions(+), 6 deletions(-) diff --git a/target/xtensa/cpu-qom.h b/target/xtensa/cpu-qom.h index 4fc35ee49b8..419c7d8e4a3 100644 --- a/target/xtensa/cpu-qom.h +++ b/target/xtensa/cpu-qom.h @@ -41,7 +41,7 @@ typedef struct XtensaConfig XtensaConfig; /** * XtensaCPUClass: * @parent_realize: The parent class' realize handler. - * @parent_reset: The parent class' reset handler. + * @parent_phases: The parent class' reset phase handlers. * @config: The CPU core configuration. * * An Xtensa CPU model. @@ -52,7 +52,7 @@ struct XtensaCPUClass { /*< public >*/ DeviceRealize parent_realize; - DeviceReset parent_reset; + ResettablePhases parent_phases; const XtensaConfig *config; }; diff --git a/target/xtensa/cpu.c b/target/xtensa/cpu.c index 09923301c40..2dc8f2d232f 100644 --- a/target/xtensa/cpu.c +++ b/target/xtensa/cpu.c @@ -85,16 +85,18 @@ bool xtensa_abi_call0(void) } #endif -static void xtensa_cpu_reset(DeviceState *dev) +static void xtensa_cpu_reset_hold(Object *obj) { - CPUState *s = CPU(dev); + CPUState *s = CPU(obj); XtensaCPU *cpu = XTENSA_CPU(s); XtensaCPUClass *xcc = XTENSA_CPU_GET_CLASS(cpu); CPUXtensaState *env = &cpu->env; bool dfpu = xtensa_option_enabled(env->config, XTENSA_OPTION_DFP_COPROCESSOR); - xcc->parent_reset(dev); + if (xcc->parent_phases.hold) { + xcc->parent_phases.hold(obj); + } env->pc = env->config->exception_vector[EXC_RESET0 + env->static_vectors]; env->sregs[LITBASE] &= ~1; @@ -240,11 +242,13 @@ static void xtensa_cpu_class_init(ObjectClass *oc, void *data) DeviceClass *dc = DEVICE_CLASS(oc); CPUClass *cc = CPU_CLASS(oc); XtensaCPUClass *xcc = XTENSA_CPU_CLASS(cc); + ResettableClass *rc = RESETTABLE_CLASS(oc); device_class_set_parent_realize(dc, xtensa_cpu_realizefn, &xcc->parent_realize); - device_class_set_parent_reset(dc, xtensa_cpu_reset, &xcc->parent_reset); + resettable_class_set_parent_phases(rc, NULL, xtensa_cpu_reset_hold, NULL, + &xcc->parent_phases); cc->class_by_name = xtensa_cpu_class_by_name; cc->has_work = xtensa_cpu_has_work; From patchwork Fri Dec 16 21:42:38 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 634490 Delivered-To: patch@linaro.org Received: by 2002:a17:522:c983:b0:460:3032:e3c4 with SMTP id kr3csp1087749pvb; Fri, 16 Dec 2022 14:31:09 -0800 (PST) X-Google-Smtp-Source: AA0mqf4UFZcuAySAfV2lM/8xSGp3AuvpQKEbAED/oDIc57khGhrc4rcr6O1akX6eh9TdOiJqOgks X-Received: by 2002:a0c:c58e:0:b0:4b4:a3d5:fe4f with SMTP id a14-20020a0cc58e000000b004b4a3d5fe4fmr41317471qvj.6.1671229869435; Fri, 16 Dec 2022 14:31:09 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1671229869; cv=none; d=google.com; s=arc-20160816; b=y8dxTZxBuWf1pgOkUvqyr0t1obsTDEWXW6r9cR2LE3YwP6YuWTvVxw+2WG6d2fkvuK 6y9TZBQF88DkEanaThZCWsfH8fnXKxYPL9x4wIJ+ovF3RXXt9VBL0rfuoa5dtJJXg2Dp 6LpMGsWPX4Wr0VuViK7CJCsynRuW0nCy+B6+xcNwnxUeR0pT2qQmSGiRAou0BCAXEF6L BPj/thereMxQBPZ4uD14YhQp6Sj5gozrm4LueooIqlo1MEHuC5vPQA5E93lHWH7gjQGy Tk/b+z60/6FjPNOAg4821fddt4PU0Vp95x7rCO0/Evc2AvWbo7GeJFJY/5TQbZNiGuKC vlxg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=p23dzeVMJeBlC5T/z5p/oWaIFlDAiyWvA9icRXV99Mg=; b=VBqd1mh2D9Emrb3EoCh6c60fn12/CyX1i+WXC1ulygL5Lidx99AShWR95BaRbXAXBZ T85XyMjkxAxv8prQrMCxG5MCytPjlRqJwvDk9a7fZbmA9/zWTp6sjy68MBSFg5gB/RDV 38ZXTRabEsqrBWZ7RO35sDBMFDWQqLMBfbwLYr3Kxbp+woKF+DWJV07+rDvmbWsc20Ay U+rVcPOGxn3md1Q1byEC4xfiK655mz+BpmZ9l5g0SiSzpuqU4dRgCBXhNssiLGleWorU /xyRb3D/3ad/QskPjRM5HrRw4HSpi9Rx8b+369SSQWKZP/gpXQp5/LM6xW1tyIDa6SlC UhPQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=LbRwThVG; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id a13-20020a056214062d00b004c77e7bcaa4si1527477qvx.198.2022.12.16.14.31.09 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Fri, 16 Dec 2022 14:31:09 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=LbRwThVG; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1p6IV2-0006gc-46; Fri, 16 Dec 2022 16:44:12 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1p6IUC-00064x-Ny for qemu-devel@nongnu.org; Fri, 16 Dec 2022 16:43:21 -0500 Received: from mail-wm1-x336.google.com ([2a00:1450:4864:20::336]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1p6IU7-0000ad-Be for qemu-devel@nongnu.org; Fri, 16 Dec 2022 16:43:16 -0500 Received: by mail-wm1-x336.google.com with SMTP id h8-20020a1c2108000000b003d1efd60b65so5041363wmh.0 for ; Fri, 16 Dec 2022 13:43:14 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=p23dzeVMJeBlC5T/z5p/oWaIFlDAiyWvA9icRXV99Mg=; b=LbRwThVG+rrs3bGsVEeAMZdTm26SW0XjMQ6oSFSTIyNRk72QfVXmXle6GKRMzJcnIq ca4tJ038GP6dMTJxnJCQ/uphF356+f9inOyWYAONtwF6bmBfWQ9lNtONx/z6qABn9Gwa fjbwBAgJjp0dPWuESz8ZZ3xa8W23uLTFSBvyifLTT6gyF600qdmpASkvCbD4chph5dU6 j62dKru+RHHxl3RF2XpY+FIrLiw0BkH5Z5KjJGSBP5mrRMsLU0dh4rmn4obPx0XnOfEw ptJc4wO0pZOtxX5l76m/rXX3oNZY7+cXsj9idWC05H1ruwXriEQrz9AEOQMmgPWBuPF5 RXMw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=p23dzeVMJeBlC5T/z5p/oWaIFlDAiyWvA9icRXV99Mg=; b=X4zj0KuppFdJP0poUyj/r/CJLIn83T1P/pPh//mDIoBHI3udbYusVWHSnB1poOeZbp 9n7rQYqcwdKYE0EaYHUPzmFF/5urFXWRiXtEWjPcLzd0RUw0uOGEgugU87t4u35RLVLK LHhwfqh59c2rqBO9wSMbg/QBrkakItLUre0Y0KfLW8s5dEawbseh0r7GJUis8Rrot95Y ysFGgCvVZFP4TBTRS4TvmszLews7T7Jpmv9bOLmWmzreiUGx7shOWPHWVsnrs/UOlBS+ D0mXdxyE4PQTeQpQIo+SUncWP5pSHXpcFGuudcfE/1/NpjWFe5EI3/xxCqb9wj1lvAyb WSkg== X-Gm-Message-State: ANoB5pkjFQqV2rARkGyqZHQBMhdWYkxM96EDNhM3aWKDATnVPDjVJ3jG pCWFlfo+xCKm13In+Ez7NnUm+fiUJPTAhm8a X-Received: by 2002:a05:600c:1c9e:b0:3d2:7a7:5cc6 with SMTP id k30-20020a05600c1c9e00b003d207a75cc6mr24389061wms.18.1671226994680; Fri, 16 Dec 2022 13:43:14 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id y7-20020a05600c364700b003d33ab317dasm4135263wmq.14.2022.12.16.13.43.13 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 16 Dec 2022 13:43:14 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 30/36] hw/virtio: Convert TYPE_VIRTIO_PCI to 3-phase reset Date: Fri, 16 Dec 2022 21:42:38 +0000 Message-Id: <20221216214244.1391647-31-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221216214244.1391647-1-peter.maydell@linaro.org> References: <20221216214244.1391647-1-peter.maydell@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::336; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x336.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Convert the TYPE_VIRTIO_PCI class to 3-phase reset. This is necessary so that we can convert the subclass TYPE_VIRTIO_VGA_BASE also to 3-phase reset. Signed-off-by: Peter Maydell Tested-by: Daniel Henrique Barboza Reviewed-by: Philippe Mathieu-Daudé Message-id: 20221125115240.3005559-2-peter.maydell@linaro.org --- hw/virtio/virtio-pci.c | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/hw/virtio/virtio-pci.c b/hw/virtio/virtio-pci.c index a1c9dfa7bb5..7873083b860 100644 --- a/hw/virtio/virtio-pci.c +++ b/hw/virtio/virtio-pci.c @@ -2008,9 +2008,10 @@ static void virtio_pci_reset(DeviceState *qdev) } } -static void virtio_pci_bus_reset(DeviceState *qdev) +static void virtio_pci_bus_reset_hold(Object *obj) { - PCIDevice *dev = PCI_DEVICE(qdev); + PCIDevice *dev = PCI_DEVICE(obj); + DeviceState *qdev = DEVICE(obj); virtio_pci_reset(qdev); @@ -2071,6 +2072,7 @@ static void virtio_pci_class_init(ObjectClass *klass, void *data) DeviceClass *dc = DEVICE_CLASS(klass); PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); VirtioPCIClass *vpciklass = VIRTIO_PCI_CLASS(klass); + ResettableClass *rc = RESETTABLE_CLASS(klass); device_class_set_props(dc, virtio_pci_properties); k->realize = virtio_pci_realize; @@ -2080,7 +2082,7 @@ static void virtio_pci_class_init(ObjectClass *klass, void *data) k->class_id = PCI_CLASS_OTHERS; device_class_set_parent_realize(dc, virtio_pci_dc_realize, &vpciklass->parent_dc_realize); - dc->reset = virtio_pci_bus_reset; + rc->phases.hold = virtio_pci_bus_reset_hold; } static const TypeInfo virtio_pci_info = { From patchwork Fri Dec 16 21:42:39 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 634471 Delivered-To: patch@linaro.org Received: by 2002:a17:522:c983:b0:460:3032:e3c4 with SMTP id kr3csp1083356pvb; Fri, 16 Dec 2022 14:19:06 -0800 (PST) X-Google-Smtp-Source: AA0mqf76CE+2zNYJvKFjxdYdag/OYPpWZlM4q/B3l8zuNrkp7fciquEbXhXEGyk3keUjAR2w74iZ X-Received: by 2002:ac8:1099:0:b0:3a5:9267:ee07 with SMTP id a25-20020ac81099000000b003a59267ee07mr39102328qtj.63.1671229146286; Fri, 16 Dec 2022 14:19:06 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1671229146; cv=none; d=google.com; s=arc-20160816; b=emsEJjw/6hPj7GQDwZoo+8kORSiDreRpHvu7AaKnfBmP4yZxhUzlgI+ijWep0LUmzi 4Oy08nVxvV5BKshStX8SJDFqmAL+vFwsjPsqH9p/2/4Bhjj27w0yIygWqZvHg3QxwIZ9 WBUSrr0pHueRHn59dElu5e48Cx22DKh1MG3FawUi2sZO7r5uE49KwG4M+3+PidbmnN9M Id1xpC+ZUZL0MotarfE7IcGHZJyvjRWv4hbHT2mE7+YbVAtoG8O3gRzvTukMbZZCxIk5 PbZ6nYdK8Z+13OH717SC3YkDfTxV8sFLnq78tb32msc3xlqTj71mERZ9rS9fnNggIxi0 uxyQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=DtGHfxlSIosEKRzthGSrmphkcLPWydnWnesqa9WQ6L0=; b=U15Q/xJo4Mn1yNt113u3WCEx1amdbDJI9a4BfIeEG5CIv/pG+YpdrwqYrwXbUKalem GDsFchvG1nqywHWTx6aSBL8oeMGERMkR9ee8Ua6NDGaofRztQJFv6f+f7yg9OcsfDCHG r59tgA+WqN4mrqbmcFmcpXJNtCuP6xnj7r3/MIhO7k+PGIRpy0jKUVPFlzNMJZ4d4DuD VRutdHo6i3f8thSKg7bWwZRuKp+5a8NFqffEYujPfU8a317Ev/3tOwXlJUNDHP69kF1n icWpMW+BRSALVMQ4hW8m+Q5YD+iWLqEvsM8hrsRLJaLS+Olcpxo4WdkYhKvkBbNq8eM5 4Xjg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=NStxHI19; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id pc15-20020a05620a840f00b006fc2210cf12si1413812qkn.465.2022.12.16.14.19.06 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Fri, 16 Dec 2022 14:19:06 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=NStxHI19; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1p6IV6-0006lv-3c; Fri, 16 Dec 2022 16:44:16 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1p6IUC-00064y-Ok for qemu-devel@nongnu.org; Fri, 16 Dec 2022 16:43:21 -0500 Received: from mail-wm1-x331.google.com ([2a00:1450:4864:20::331]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1p6IU8-0000fW-B2 for qemu-devel@nongnu.org; Fri, 16 Dec 2022 16:43:17 -0500 Received: by mail-wm1-x331.google.com with SMTP id k22-20020a05600c1c9600b003d1ee3a6289so2697903wms.2 for ; Fri, 16 Dec 2022 13:43:15 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=DtGHfxlSIosEKRzthGSrmphkcLPWydnWnesqa9WQ6L0=; b=NStxHI19wq88jy4P5MkMiy7uPWtWuqLOhlqKxggvvifXB7wRKhwc4D3+5F5JY69PrU HbscvupdRpiJhqdwrLu9wBNDyu02WOS3Z/8oS2Jjr/piKRe3CBt/tpMs3XoVZsj0QzQN GZPTi3uQ9V1J5qVHZdSSmK5v71KSY/eDvBg0Wyozm7xoGdBFgEWWNTpKrOHejofGajFh NHbxtb1eHTVDbfRo/ankmn7w/Jdq5DLuyoyZABFBv9pGjm2HqXEhoAebf5Az+ccqGMyE Lei/h4rjGE3PQwZiHum6jY+rqzw9BTQxKjynyAwN2BL4puZEyo3FYvZYEEVEhN+mI+nO AANw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=DtGHfxlSIosEKRzthGSrmphkcLPWydnWnesqa9WQ6L0=; b=ooqORtmmmu5hkbXXD0+NbMsmHOVvcaUN+0tLljncQh+OnqJRyo2KERGTtLNxRwq3JR k15f7Q+R+Vvu5tVXK8NEAu46iEWkiAYYiXqhCsSvPI9YEER/NRja3btmZQ2jm/RPlUed CcAO3GmyFo7rUfRym8b0pof+Ff9KspusXMMSXwlDuwwNlShJ5oJXVHIWJ7d2LLhvKvm1 Ar7UxggexWLivIjFvH0moCcK20TA4tN2DsER1lleX2Lmb1Y8J4K4lRVuYBcAp408Y5ug iJD/TY4lUksvIUA7CEP/wVBbcy7Ew7p25IvVOlPATE5OwHbApyoAeuuYyeF0g7BZkIbR RssQ== X-Gm-Message-State: ANoB5pkX8fFpcjloRRIPIpFcfSzyh7/EqkcFB0k4/AUleuT+R4ZYtD+r FFPXkAMmJ9m9ReQUhkyOQ6KbdTzZgW7rxqN8 X-Received: by 2002:a05:600c:1e8c:b0:3d2:381f:2db5 with SMTP id be12-20020a05600c1e8c00b003d2381f2db5mr11139069wmb.22.1671226995607; Fri, 16 Dec 2022 13:43:15 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id y7-20020a05600c364700b003d33ab317dasm4135263wmq.14.2022.12.16.13.43.14 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 16 Dec 2022 13:43:15 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 31/36] hw/display/virtio-vga: Convert TYPE_VIRTIO_VGA_BASE to 3-phase reset Date: Fri, 16 Dec 2022 21:42:39 +0000 Message-Id: <20221216214244.1391647-32-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221216214244.1391647-1-peter.maydell@linaro.org> References: <20221216214244.1391647-1-peter.maydell@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::331; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x331.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Convert the TYPE_VIRTIO_VGA_BASE class to 3-phase reset, so we don't need to use device_class_set_parent_reset() any more. Note that this is an abstract class itself; none of the subclasses override its reset method. Signed-off-by: Peter Maydell Tested-by: Daniel Henrique Barboza Reviewed-by: Philippe Mathieu-Daudé Message-id: 20221125115240.3005559-3-peter.maydell@linaro.org --- hw/display/virtio-vga.h | 2 +- hw/display/virtio-vga.c | 15 +++++++++------ 2 files changed, 10 insertions(+), 7 deletions(-) diff --git a/hw/display/virtio-vga.h b/hw/display/virtio-vga.h index 977ad5edc29..0bd9db1ceea 100644 --- a/hw/display/virtio-vga.h +++ b/hw/display/virtio-vga.h @@ -23,7 +23,7 @@ struct VirtIOVGABase { struct VirtIOVGABaseClass { VirtioPCIClass parent_class; - DeviceReset parent_reset; + ResettablePhases parent_phases; }; #endif /* VIRTIO_VGA_H */ diff --git a/hw/display/virtio-vga.c b/hw/display/virtio-vga.c index 4dcb34c4a74..e6fb0aa876c 100644 --- a/hw/display/virtio-vga.c +++ b/hw/display/virtio-vga.c @@ -165,13 +165,15 @@ static void virtio_vga_base_realize(VirtIOPCIProxy *vpci_dev, Error **errp) } } -static void virtio_vga_base_reset(DeviceState *dev) +static void virtio_vga_base_reset_hold(Object *obj) { - VirtIOVGABaseClass *klass = VIRTIO_VGA_BASE_GET_CLASS(dev); - VirtIOVGABase *vvga = VIRTIO_VGA_BASE(dev); + VirtIOVGABaseClass *klass = VIRTIO_VGA_BASE_GET_CLASS(obj); + VirtIOVGABase *vvga = VIRTIO_VGA_BASE(obj); /* reset virtio-gpu */ - klass->parent_reset(dev); + if (klass->parent_phases.hold) { + klass->parent_phases.hold(obj); + } /* reset vga */ vga_common_reset(&vvga->vga); @@ -203,13 +205,14 @@ static void virtio_vga_base_class_init(ObjectClass *klass, void *data) VirtioPCIClass *k = VIRTIO_PCI_CLASS(klass); VirtIOVGABaseClass *v = VIRTIO_VGA_BASE_CLASS(klass); PCIDeviceClass *pcidev_k = PCI_DEVICE_CLASS(klass); + ResettableClass *rc = RESETTABLE_CLASS(klass); set_bit(DEVICE_CATEGORY_DISPLAY, dc->categories); device_class_set_props(dc, virtio_vga_base_properties); dc->vmsd = &vmstate_virtio_vga_base; dc->hotpluggable = false; - device_class_set_parent_reset(dc, virtio_vga_base_reset, - &v->parent_reset); + resettable_class_set_parent_phases(rc, NULL, virtio_vga_base_reset_hold, + NULL, &v->parent_phases); k->realize = virtio_vga_base_realize; pcidev_k->romfile = "vgabios-virtio.bin"; From patchwork Fri Dec 16 21:42:40 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 634463 Delivered-To: patch@linaro.org Received: by 2002:a17:522:c983:b0:460:3032:e3c4 with SMTP id kr3csp1081254pvb; Fri, 16 Dec 2022 14:14:01 -0800 (PST) X-Google-Smtp-Source: AA0mqf4PNUirgchcG88wYuBzTv0ee/TaRWISPmdZ4amc6pFViZdX0bLlmSnKljgM82OgangP6xiE X-Received: by 2002:ac8:7d0e:0:b0:3a8:12b3:8bf2 with SMTP id g14-20020ac87d0e000000b003a812b38bf2mr42795451qtb.49.1671228841434; Fri, 16 Dec 2022 14:14:01 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1671228841; cv=none; d=google.com; s=arc-20160816; b=x2jwYizwWhHsOZWtxkD6mAoFPbqbI7f1DGKcQw7iFYPRMbQnJ6IR/lpXz9OVM3DlKw zAVqqSMVmLjIKokQpUV1xAscQRxSnBwHjiNw61sLJZIEOBeBg7aeMU9bmdiVIfpnsR+R 9XHFYMQ4Q8FqCD5QuOSDizhEK3gk4ac1VXdzDMU84HacespSPef8YxXMskxhGMFtdAeF BcMTE3eSLSUqyt3wWSl7ufcKvTo8d720NHU8RfdpFRQwC+2mC3VXgL/BqMq1JZU5bOst ySRM2fNbD82bLtfU5wQorWVyxcqNavlAQgPtg6NFKUIp0XvftjbA2AGEO6aeTc9kBifM bDWw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=wVHkl0SJwne+XihoGUblfNQhtc6oZLY6VgJtTl+eHTg=; b=GWsdblUhS2C50mtyHnl1ySazucy2ez1kudg+u+LZ6XBKthtdqtanqkIvAlBfM126kf GQWH/A2hvZ/hZC5GMrnuHb6QuueI4Bid1/r8WNClBf+lsxIbMdbDhnmS/DrntV273ZDg 4f5G4fqtyMpHpOoFrQBFUnJisn5Y4b1DfjCC+dPyWUYpieVElRINblizMdIYEgFuDtho YTh80leyT2LT0/E4EJ9pMiCzRwYemacIYb4PId3jU1q84wn7NnQU0MrNE3k0QGZ/RlZj Mv2qKPNbaWPiBdnYS16//zMRC9VI1g4OlbphimJmbJdXkLu3xqxJKV2j9DEzqtBuR/z7 jNRQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=FCmpYAw6; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id 189-20020a3706c6000000b006e07228ed51si1392127qkg.99.2022.12.16.14.14.01 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Fri, 16 Dec 2022 14:14:01 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=FCmpYAw6; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1p6IV0-0006gO-Nn; Fri, 16 Dec 2022 16:44:10 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1p6IUE-00065d-0i for qemu-devel@nongnu.org; Fri, 16 Dec 2022 16:43:24 -0500 Received: from mail-wm1-x32f.google.com ([2a00:1450:4864:20::32f]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1p6IUC-0000fE-Ed for qemu-devel@nongnu.org; Fri, 16 Dec 2022 16:43:21 -0500 Received: by mail-wm1-x32f.google.com with SMTP id v7so2786795wmn.0 for ; Fri, 16 Dec 2022 13:43:16 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=wVHkl0SJwne+XihoGUblfNQhtc6oZLY6VgJtTl+eHTg=; b=FCmpYAw630CIzGTFQnm5e10seeZg27awC1jHuFTZSivU22SE2uA7V5DZ/BlZJ3rXtm oaeNvA+hGsg4vl/tLEMZ83+h7Jg+C72nKgG6nRcAb2KlZf4vgXExRBmfH+k+TMC5NUVB TjmwrxDSDucGzUo8gNUc95jDzKjWjjwCjo3ihJrtDJFuC87eWwv/G9lvAB9rxuf42NKp aJjIRGSEInjBKIWfo/uaLRGWtTcbeX1Cpwy5iJ2OQQjzAAh/wz4wpVpmskY54jXFmr4N Z9i7jUfsSmO7icpIIHIkW/SD5FztKAu8VqhFJuTuNVKW5Lr+FasFupR7oARcoooWuye8 n6HA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=wVHkl0SJwne+XihoGUblfNQhtc6oZLY6VgJtTl+eHTg=; b=BxwRZYjvofDG2LMMD2KMUFWmO1b+rau2HLDqeDb7d5oXrX0ZxbUrefz9WM3PoSWYVV fZm4RoMdA6jQwu9brW5n+JPwa20LHL6iUMAZbZja3JhjHHevnZ8a0snpkpm1/OJ+gx7s 5DzbT0hXjiSD5zE0yG4GPOu4KzOG4cmSxee90959kIHUXTLYJ7Mfu3tssq1F3jCtEw4t AYD1jiruKzfT5YBJK1kyQUnO7y2bz8Hd12Qix5T8b2uUDgUKOWbbGb6f6Jf40eTLY7LQ +S2shOPw/1D6Ib8NoqvCw4bFP+/DmbpIMcjVMOFhQncbvlqHt3E1jYw9oN9pgknUzWXu tlHg== X-Gm-Message-State: ANoB5pmVp8zoi898CEoADYNa7+YGHAzoG1nauDuQJQJ9gfx9GSjC9ZZL zH28H5IwIbwtDIqkh9bjUtO8FC4uI/H6ldHI X-Received: by 2002:a05:600c:1e8f:b0:3cf:728e:c224 with SMTP id be15-20020a05600c1e8f00b003cf728ec224mr26222895wmb.6.1671226996409; Fri, 16 Dec 2022 13:43:16 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id y7-20020a05600c364700b003d33ab317dasm4135263wmq.14.2022.12.16.13.43.15 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 16 Dec 2022 13:43:15 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 32/36] pci: Convert TYPE_PCIE_ROOT_PORT to 3-phase reset Date: Fri, 16 Dec 2022 21:42:40 +0000 Message-Id: <20221216214244.1391647-33-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221216214244.1391647-1-peter.maydell@linaro.org> References: <20221216214244.1391647-1-peter.maydell@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32f; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x32f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Convert the TYPE_PCIE_ROOT_PORT device to 3-phase reset; this is a necessary precursor to converting any of its child classes. Signed-off-by: Peter Maydell Tested-by: Daniel Henrique Barboza Reviewed-by: Philippe Mathieu-Daudé Message-id: 20221125115240.3005559-4-peter.maydell@linaro.org --- hw/pci-bridge/pcie_root_port.c | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/hw/pci-bridge/pcie_root_port.c b/hw/pci-bridge/pcie_root_port.c index 460e48269d4..36bc0bafa7e 100644 --- a/hw/pci-bridge/pcie_root_port.c +++ b/hw/pci-bridge/pcie_root_port.c @@ -43,9 +43,10 @@ static void rp_write_config(PCIDevice *d, uint32_t address, pcie_aer_root_write_config(d, address, val, len, root_cmd); } -static void rp_reset(DeviceState *qdev) +static void rp_reset_hold(Object *obj) { - PCIDevice *d = PCI_DEVICE(qdev); + PCIDevice *d = PCI_DEVICE(obj); + DeviceState *qdev = DEVICE(obj); rp_aer_vector_update(d); pcie_cap_root_reset(d); @@ -171,13 +172,14 @@ static void rp_class_init(ObjectClass *klass, void *data) { DeviceClass *dc = DEVICE_CLASS(klass); PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); + ResettableClass *rc = RESETTABLE_CLASS(klass); k->is_bridge = true; k->config_write = rp_write_config; k->realize = rp_realize; k->exit = rp_exit; set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories); - dc->reset = rp_reset; + rc->phases.hold = rp_reset_hold; device_class_set_props(dc, rp_props); } From patchwork Fri Dec 16 21:42:41 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 634473 Delivered-To: patch@linaro.org Received: by 2002:a17:522:c983:b0:460:3032:e3c4 with SMTP id kr3csp1083893pvb; Fri, 16 Dec 2022 14:20:30 -0800 (PST) X-Google-Smtp-Source: AA0mqf4tNaQknSnSYaq7Yr2wPJA0t7FA3Zf0NA30YtcKmif5OQHAgaxO3y7WNivCsrXBtYvvqeB+ X-Received: by 2002:a05:622a:4811:b0:3a4:fec7:d26 with SMTP id fb17-20020a05622a481100b003a4fec70d26mr41666567qtb.45.1671229230195; Fri, 16 Dec 2022 14:20:30 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1671229230; cv=none; d=google.com; s=arc-20160816; b=PPpY6BHWiNenSHhHjt6++Ipn7udLmkjlhfLJ0A6bai7vzMnjyYT9pUhsygs8Y+wrHo HS7mxwMHaYDpfbZUvlkc7KJjkEcJdlOnY9/84eqyFV89G2/z7+QZB0gWxgO0w2Lp/qo2 5EmtGzpv8/DOfZP21QUB7UjK6ohEPgZFEmWTkgHI6kjQX0W1+3a4K5PCMMrVhMUHUZr4 2aAm31aGQhwc5JEQ4yhsBailkZ1cU1CBq0/xwhenXOfnTzXGhPgZmV25vvF+Yc9fzluZ DVwlC33VRcoKanHEIPlGInEFc4DQSClgn3+0krin90jqn4YdGvzEw/oCVVSIXl2rbjrB rzeQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=0ZxK5GRCvx4dV7xPRhk8xfl4yfvHfLR/XlrA+S/2fsw=; b=IdUsAfe0YZu0QSmftQlhnUQ+McXk+TTDIWf4o/7UITal4hElBR3V6cC73l1JDEaurM b/DFVfQ4vJD2HyU52Eriv4ml1DctHS3Sx1yJ1Jd0pvvEOPUULmJUuWOXdBtu0Nw9k/bc 7b+9p59Ge3zl1QYPSdafCaeO5ohoBZcN8DPlMAco6gRABMuIgshHQOOELCEnARpJrFTC +9LB/Q/E7sUzE2BB+Q7UFq2iUkuus+bGYWze8SL4mooqyos3CzkzT5yvHKDfX9lDnG1t foiKgh7IJX5QP2MzUoygPUUB5itxsLKEWCEuzpY88Jlkv4I5bUqSQ/O6VULGSNtHoOiV GhYA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=WlnkFwpR; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id k8-20020a05620a414800b006ff0b187ba3si1682553qko.199.2022.12.16.14.20.30 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Fri, 16 Dec 2022 14:20:30 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=WlnkFwpR; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1p6IV0-0006gI-KT; Fri, 16 Dec 2022 16:44:10 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1p6IUE-000662-AA for qemu-devel@nongnu.org; Fri, 16 Dec 2022 16:43:25 -0500 Received: from mail-wm1-x32d.google.com ([2a00:1450:4864:20::32d]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1p6IUC-0000iq-Fk for qemu-devel@nongnu.org; Fri, 16 Dec 2022 16:43:22 -0500 Received: by mail-wm1-x32d.google.com with SMTP id m5-20020a7bca45000000b003d2fbab35c6so2684042wml.4 for ; Fri, 16 Dec 2022 13:43:18 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=0ZxK5GRCvx4dV7xPRhk8xfl4yfvHfLR/XlrA+S/2fsw=; b=WlnkFwpRrWN+WAV7yxLK4eophbBeed2oaDIUuN0ZPxyNxf6vWa8eXyJsCrzDt1RGgr Fv8KDt4tkv1eBSGmmvKznFjJ55pD6g2RGNCt/4Pwd67pmaeFaJOqcxlqeZRYSqFNt8W2 sN3LOyew36Oe6bwMsf6uUZfq5EF+jLN0RaDG26Ii6zffr6pHlnlEiHbAPrbQkeLS9d1E Krn//nqDXDW337QQFFO+CpE9ZhhFUMkTqK+W5DzGlZ67MJhfEpT0n5t/HkrGb+bmyYP2 0+ZXatGixzLjJKQ9hj7PhzQIazFoigUhZmybCaloSzIauA0wMotcl2U5Jpr/nR8u3e0h W4eA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=0ZxK5GRCvx4dV7xPRhk8xfl4yfvHfLR/XlrA+S/2fsw=; b=EKp+mmvGTrSW4Lykz5B89REsfW+qtZdowPmgstfWM+3rJK1KvfPiWiDrHJYMPvjtMG VypN+9ry2Wg6rsCL38HSccJYlbZNUCDDhDHk2hdGo6M7vJg3yC74XV7kDo9965wTUEtk IuPMctypGnLmQL1Mhbs1XmflpGqvFAeATS+oJtBy4C6gJYIaBkoFopRS7qioxASowEPC vk27OcCWR2hj6YaNnwuazJYoWBdeLiyMa+n0KTzF7oPyrpR7voUZEq9WXQWQws6mHlSJ LZ30DlYu5zpY5F/h/fbwG4jhtrt38Lkf+/JWzdL3+1R4rAGjVYpjCsCWN4MaLnQ96iE/ ynvg== X-Gm-Message-State: ANoB5pl48sDeIpAnpJzya71cKcl9PAB2WJ+3eKssrHCywjiY1w9KN4rc ertEMDA+KD5SqCPR48vSA027F35MKb6YeCEK X-Received: by 2002:a1c:7303:0:b0:3cf:a258:971 with SMTP id d3-20020a1c7303000000b003cfa2580971mr36356306wmb.41.1671226997301; Fri, 16 Dec 2022 13:43:17 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id y7-20020a05600c364700b003d33ab317dasm4135263wmq.14.2022.12.16.13.43.16 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 16 Dec 2022 13:43:16 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 33/36] pci: Convert child classes of TYPE_PCIE_ROOT_PORT to 3-phase reset Date: Fri, 16 Dec 2022 21:42:41 +0000 Message-Id: <20221216214244.1391647-34-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221216214244.1391647-1-peter.maydell@linaro.org> References: <20221216214244.1391647-1-peter.maydell@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32d; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x32d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Convert the TYPE_CXL_ROOT_PORT and TYPE_PNV_PHB_ROOT_PORT classes to 3-phase reset, so they don't need to use the deprecated device_class_set_parent_reset() function any more. We have to do both in the same commit, because they keep the parent_reset field in their common parent class's class struct. Note that pnv_phb_root_port_class_init() was pointlessly setting dc->reset twice, once by calling device_class_set_parent_reset() and once directly. Signed-off-by: Peter Maydell Tested-by: Daniel Henrique Barboza Reviewed-by: Philippe Mathieu-Daudé Message-id: 20221125115240.3005559-5-peter.maydell@linaro.org --- include/hw/pci/pcie_port.h | 2 +- hw/pci-bridge/cxl_root_port.c | 14 +++++++++----- hw/pci-host/pnv_phb.c | 18 ++++++++++-------- 3 files changed, 20 insertions(+), 14 deletions(-) diff --git a/include/hw/pci/pcie_port.h b/include/hw/pci/pcie_port.h index 7b8193061ac..d9b5d075049 100644 --- a/include/hw/pci/pcie_port.h +++ b/include/hw/pci/pcie_port.h @@ -80,7 +80,7 @@ DECLARE_CLASS_CHECKERS(PCIERootPortClass, PCIE_ROOT_PORT, struct PCIERootPortClass { PCIDeviceClass parent_class; DeviceRealize parent_realize; - DeviceReset parent_reset; + ResettablePhases parent_phases; uint8_t (*aer_vector)(const PCIDevice *dev); int (*interrupts_init)(PCIDevice *dev, Error **errp); diff --git a/hw/pci-bridge/cxl_root_port.c b/hw/pci-bridge/cxl_root_port.c index fb213fa06ef..6664783974c 100644 --- a/hw/pci-bridge/cxl_root_port.c +++ b/hw/pci-bridge/cxl_root_port.c @@ -138,12 +138,14 @@ static void cxl_rp_realize(DeviceState *dev, Error **errp) component_bar); } -static void cxl_rp_reset(DeviceState *dev) +static void cxl_rp_reset_hold(Object *obj) { - PCIERootPortClass *rpc = PCIE_ROOT_PORT_GET_CLASS(dev); - CXLRootPort *crp = CXL_ROOT_PORT(dev); + PCIERootPortClass *rpc = PCIE_ROOT_PORT_GET_CLASS(obj); + CXLRootPort *crp = CXL_ROOT_PORT(obj); - rpc->parent_reset(dev); + if (rpc->parent_phases.hold) { + rpc->parent_phases.hold(obj); + } latch_registers(crp); } @@ -199,6 +201,7 @@ static void cxl_root_port_class_init(ObjectClass *oc, void *data) { DeviceClass *dc = DEVICE_CLASS(oc); PCIDeviceClass *k = PCI_DEVICE_CLASS(oc); + ResettableClass *rc = RESETTABLE_CLASS(oc); PCIERootPortClass *rpc = PCIE_ROOT_PORT_CLASS(oc); k->vendor_id = PCI_VENDOR_ID_INTEL; @@ -209,7 +212,8 @@ static void cxl_root_port_class_init(ObjectClass *oc, void *data) k->config_write = cxl_rp_write_config; device_class_set_parent_realize(dc, cxl_rp_realize, &rpc->parent_realize); - device_class_set_parent_reset(dc, cxl_rp_reset, &rpc->parent_reset); + resettable_class_set_parent_phases(rc, NULL, cxl_rp_reset_hold, NULL, + &rpc->parent_phases); rpc->aer_offset = GEN_PCIE_ROOT_PORT_AER_OFFSET; rpc->acs_offset = GEN_PCIE_ROOT_PORT_ACS_OFFSET; diff --git a/hw/pci-host/pnv_phb.c b/hw/pci-host/pnv_phb.c index 0b26b43736f..c62b08538ac 100644 --- a/hw/pci-host/pnv_phb.c +++ b/hw/pci-host/pnv_phb.c @@ -199,14 +199,16 @@ static void pnv_phb_class_init(ObjectClass *klass, void *data) dc->user_creatable = true; } -static void pnv_phb_root_port_reset(DeviceState *dev) +static void pnv_phb_root_port_reset_hold(Object *obj) { - PCIERootPortClass *rpc = PCIE_ROOT_PORT_GET_CLASS(dev); - PnvPHBRootPort *phb_rp = PNV_PHB_ROOT_PORT(dev); - PCIDevice *d = PCI_DEVICE(dev); + PCIERootPortClass *rpc = PCIE_ROOT_PORT_GET_CLASS(obj); + PnvPHBRootPort *phb_rp = PNV_PHB_ROOT_PORT(obj); + PCIDevice *d = PCI_DEVICE(obj); uint8_t *conf = d->config; - rpc->parent_reset(dev); + if (rpc->parent_phases.hold) { + rpc->parent_phases.hold(obj); + } if (phb_rp->version == 3) { return; @@ -300,6 +302,7 @@ static Property pnv_phb_root_port_properties[] = { static void pnv_phb_root_port_class_init(ObjectClass *klass, void *data) { DeviceClass *dc = DEVICE_CLASS(klass); + ResettableClass *rc = RESETTABLE_CLASS(klass); PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); PCIERootPortClass *rpc = PCIE_ROOT_PORT_CLASS(klass); @@ -308,9 +311,8 @@ static void pnv_phb_root_port_class_init(ObjectClass *klass, void *data) device_class_set_props(dc, pnv_phb_root_port_properties); device_class_set_parent_realize(dc, pnv_phb_root_port_realize, &rpc->parent_realize); - device_class_set_parent_reset(dc, pnv_phb_root_port_reset, - &rpc->parent_reset); - dc->reset = &pnv_phb_root_port_reset; + resettable_class_set_parent_phases(rc, NULL, pnv_phb_root_port_reset_hold, + NULL, &rpc->parent_phases); dc->user_creatable = true; k->vendor_id = PCI_VENDOR_ID_IBM; From patchwork Fri Dec 16 21:42:42 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 634498 Delivered-To: patch@linaro.org Received: by 2002:a17:522:c983:b0:460:3032:e3c4 with SMTP id kr3csp1088240pvb; Fri, 16 Dec 2022 14:32:21 -0800 (PST) X-Google-Smtp-Source: AA0mqf4SZRnKkRDFcphtjFkMPpNZ/6olknkuW7yF+iEQWjo/d9sU3bLxzOm/CubyzDxa7KBE66ah X-Received: by 2002:ac8:7148:0:b0:3a8:faf:296a with SMTP id h8-20020ac87148000000b003a80faf296amr31978997qtp.54.1671229941054; Fri, 16 Dec 2022 14:32:21 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1671229941; cv=none; d=google.com; s=arc-20160816; b=UMW94qPyVW20hGl8WJNVgYCqs3ybLAb8FXF33MxladEeo4//RQMcXsDYb5r5nqUKAK QWZB3RIBw3A9T4zr2vpIFURgBXpzvhsfmEEwLlzJQam/gXToh86daVvfoJYl+43mtAYa WA8OKdvqPkavf3XzjMfDS1REb0MPiY7XDPbawLwySOGp9W60e5SDcXIuVIIMWULKryNc wG+1iEQvN4c/0g3sjRQKwJTEh6SQFKcjZ+orHXaIOBUBXpqfrEa/7mEzavc7qRJVrwwI QOl1ASthwiZV9mKuqzxw4I3HZMc9+LNvGfFcRq459SkMWF7SyXgqh+mYtE/Rm5a8j/w2 7ziQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=W1JmqKacM9m8zOcJKdX5kBax+NSgUM13DsFDzRHKMZY=; b=0hNEJlPoSCAlY5oyuweuP2VYsKOakhyuKkRIVyQMNzYfv8XlzfeFUIJ5L9jACWSxs+ a4m63t8obOaNuaq1/+Yq0USzrbyDG9QBO8O1fQ4uEwoi+7ymxHpLSvKDGbcGgNIghmU9 UqX6xYjzdkag1Cl6kFws22kasVDZJyEJ6V9y1IwjJuDfqpIDue3CLMvhoTg9oENn3gBP f8AkVAC67fTnhFkoPXFqIpQST4pwJSuYqTr6i4PAPLFr2Gp7IZHIMcIlRDfz47YWm+Km +vgVyT9A6UT49416v+huAoXeL64Jh1R4amOHnLcFS/IZFjXrutAQOeDsM0JwjB3RMCNc XIZw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=IpRsAea5; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id fc20-20020a05622a489400b003a7f597c01asi1591678qtb.787.2022.12.16.14.32.20 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Fri, 16 Dec 2022 14:32:21 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=IpRsAea5; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1p6IV5-0006lL-0h; Fri, 16 Dec 2022 16:44:15 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1p6IUF-00066A-Dv for qemu-devel@nongnu.org; Fri, 16 Dec 2022 16:43:25 -0500 Received: from mail-wm1-x335.google.com ([2a00:1450:4864:20::335]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1p6IUC-0000iy-GJ for qemu-devel@nongnu.org; Fri, 16 Dec 2022 16:43:23 -0500 Received: by mail-wm1-x335.google.com with SMTP id h8-20020a1c2108000000b003d1efd60b65so5041472wmh.0 for ; Fri, 16 Dec 2022 13:43:18 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=W1JmqKacM9m8zOcJKdX5kBax+NSgUM13DsFDzRHKMZY=; b=IpRsAea5we80r3KV7DT0PYJpVWBWz2DVg6RZjWbKAf1bVt3Qf0rOKuj13chZAgWnwX wdh2lNgpkduWKHJAJIDfzRjT6SMCFxQVCSrbLNvXAWwiUQBXKPJqlstI5m07q4c4Iqu5 a7vqxFdUthhoGXbkoQ3EXko9XFm/v6mAveRkMZTWNEHkgI7fcpkJnPBjrkMjNmXD80HJ 7IdVkM4YnEYkkvAdoDpMFggNEqLyn3rz2KkeO78BEH/Gcx+oegbGOg6EkyxVk+BTxWOG TNzOiv/dfvhCGYKK7cf0ohzM9VuBkZ6IagxeH+78/swV/r/5FaDNQIcFt3ATOnI5dQLe W4Ew== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=W1JmqKacM9m8zOcJKdX5kBax+NSgUM13DsFDzRHKMZY=; b=ca0m+8S4d2Rm/3LbCJZ8O3jxQePnDQI3zMLnYTWkzHGPC315a8TgPJ0yRHyR6/OkvG GiEkqItnhO6egUK7MsdXeFNHOAmUxN/TXGBoDELpG2wsLtE61WElVSlfNkQRudexRWKs eUqzyg/B5WlIhLBE0sptYW+hLnwaon0T2J0Bay9M0gVPqtj3XZEwIq1YGVRmoGrkoLg2 TbjdpNH6GygS4lKhqrmYjG1Qqp6fQed3otFc5nwcNvl4ELQNL+TS92sbtmqRy0RXawzg fLiXt5EfrVNI7shbSyJqatlrmKyDPskVKb+7gXeLXnuJcXSO7iWPcKhm41Wn8AapWDA6 9j/g== X-Gm-Message-State: AFqh2kooo3TXhrW5twRwaDszRjWvBgxbymYsvkdjV+m/x9OMJAodN27N 5p31jupEDytx/F6Yh1B0YAE6Kb9+k4v1qd8C X-Received: by 2002:a7b:c856:0:b0:3d3:4406:8a2e with SMTP id c22-20020a7bc856000000b003d344068a2emr3159801wml.15.1671226998129; Fri, 16 Dec 2022 13:43:18 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id y7-20020a05600c364700b003d33ab317dasm4135263wmq.14.2022.12.16.13.43.17 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 16 Dec 2022 13:43:17 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 34/36] hw/intc/xics: Reset TYPE_ICS objects with device_cold_reset() Date: Fri, 16 Dec 2022 21:42:42 +0000 Message-Id: <20221216214244.1391647-35-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221216214244.1391647-1-peter.maydell@linaro.org> References: <20221216214244.1391647-1-peter.maydell@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::335; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x335.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org The realize method for the TYPE_ICS class uses qemu_register_reset() to register a reset handler, as a workaround for the fact that currently objects which directly inherit from TYPE_DEVICE don't get automatically reset. However, the reset function directly calls ics_reset(), which is the function that implements the legacy reset method. This means that only the parent class's data gets reset, and a subclass which also needs to handle reset, like TYPE_PHB3_MSI, has to register its own reset function. Make the TYPE_ICS reset function call device_cold_reset() instead: this will handle reset for both the parent class and the subclass, and will work whether the classes are using legacy reset or 3-phase reset. This allows us to remove the reset function that the subclass currently has to set up. Signed-off-by: Peter Maydell Tested-by: Daniel Henrique Barboza Reviewed-by: Cédric Le Goater Reviewed-by: Greg Kurz Reviewed-by: Philippe Mathieu-Daudé Message-id: 20221125115240.3005559-6-peter.maydell@linaro.org --- hw/intc/xics.c | 2 +- hw/pci-host/pnv_phb3_msi.c | 7 ------- 2 files changed, 1 insertion(+), 8 deletions(-) diff --git a/hw/intc/xics.c b/hw/intc/xics.c index dcd021af668..dd130467ccc 100644 --- a/hw/intc/xics.c +++ b/hw/intc/xics.c @@ -593,7 +593,7 @@ static void ics_reset(DeviceState *dev) static void ics_reset_handler(void *dev) { - ics_reset(dev); + device_cold_reset(dev); } static void ics_realize(DeviceState *dev, Error **errp) diff --git a/hw/pci-host/pnv_phb3_msi.c b/hw/pci-host/pnv_phb3_msi.c index 2f4112907b8..ae908fd9e41 100644 --- a/hw/pci-host/pnv_phb3_msi.c +++ b/hw/pci-host/pnv_phb3_msi.c @@ -239,11 +239,6 @@ static void phb3_msi_reset(DeviceState *dev) msi->rba_sum = 0; } -static void phb3_msi_reset_handler(void *dev) -{ - phb3_msi_reset(dev); -} - void pnv_phb3_msi_update_config(Phb3MsiState *msi, uint32_t base, uint32_t count) { @@ -272,8 +267,6 @@ static void phb3_msi_realize(DeviceState *dev, Error **errp) } msi->qirqs = qemu_allocate_irqs(phb3_msi_set_irq, msi, ics->nr_irqs); - - qemu_register_reset(phb3_msi_reset_handler, dev); } static void phb3_msi_instance_init(Object *obj) From patchwork Fri Dec 16 21:42:43 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 634440 Delivered-To: patch@linaro.org Received: by 2002:a17:522:c983:b0:460:3032:e3c4 with SMTP id kr3csp1069559pvb; Fri, 16 Dec 2022 13:46:06 -0800 (PST) X-Google-Smtp-Source: AA0mqf6wO/B0jewL6fwkt6azoRVC62JhVQ7Sxz7IJCwjZxkBiRV7Wq+x/7LpkuMYBKsiTheXf9Wa X-Received: by 2002:ad4:50cd:0:b0:4c7:1c72:58f3 with SMTP id e13-20020ad450cd000000b004c71c7258f3mr41568859qvq.43.1671227166450; Fri, 16 Dec 2022 13:46:06 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1671227166; cv=none; d=google.com; s=arc-20160816; b=qdlHywCePSkYNdUITM/NIS4Alr8M6MSYljS0eUHq2HvmdX2TWjqEePYA0o/Y6R9jnR xwbTtdzg5UHgdLPybwwTpXh2Xwj1cNCvM3DsvQNcQrkfdXpMqak7W8nnwohvus2NXm3G 2AtiV3+E2UgJz53+UsldZLwqxmboavykOJ2pGp6aP0lOOh6WRHOcnlkO0f3DumvtatAb zNb69Dxj/kWAFOCfd4bzIA7fv82vL3wlilpZEHtxDKXhxCe8eSA2FLNEWHn9lbq9NZmG 4tkfhf/cVZCiQXVgzRit6wKs7iRX5j52C/Z088de5nLYURaDjjBG96Ycgw+G5JCnN4Jg LdpA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=SHJyhm2AvF1J3KhcjjNeB31fuKNh0dgEGUX5Ov6mrnA=; b=cDtJ01PinyMuRrlYhGXMeI+OBJvSmZwFoL7eOlOm6xgjHKGyRaJByNXlZkHCuoxABm ktJccysIFXdoMJsjjCh4GlyuJn/ylFnqSwqmqsPQiXuPDrLANuaYGyy5ZpeC/obl+/WW 7DFDhJafo590qnSPxTYHFaGobpnTA6oqkQ984r4xZM90NKiftdDy0sUf7QnEPuJgwS9f xpfFYi2+VaanvpIeY6VnSXlxCb0hLOrN6QJu+6a6VquiXRyeu0kAEeC7KFwxKmAFEir2 cDfAXnV2ukNB1HxEGAebjIH3HdlS/pftqTslHR2Lga407TzUJUfA2V8rmpfH5NxM9mID yYnA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=GWVEhcJG; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id 85-20020a370558000000b006b5f48a986esi1463076qkf.84.2022.12.16.13.46.06 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Fri, 16 Dec 2022 13:46:06 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=GWVEhcJG; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1p6IV8-0006pB-9C; Fri, 16 Dec 2022 16:44:18 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1p6IUJ-00067L-8D for qemu-devel@nongnu.org; Fri, 16 Dec 2022 16:43:33 -0500 Received: from mail-wm1-x32d.google.com ([2a00:1450:4864:20::32d]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1p6IUC-0000ck-Gz for qemu-devel@nongnu.org; Fri, 16 Dec 2022 16:43:26 -0500 Received: by mail-wm1-x32d.google.com with SMTP id f13-20020a1cc90d000000b003d08c4cf679so2678704wmb.5 for ; Fri, 16 Dec 2022 13:43:19 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=SHJyhm2AvF1J3KhcjjNeB31fuKNh0dgEGUX5Ov6mrnA=; b=GWVEhcJGJIJs6JULa7rzsirYlBUI9BPAylC7RjAWoFzMIbUWFDi7ewMJrx28QFX0ZV Lk9G8ZruKXD5eLY+yTwfUqSehPR8cXrDsSf1DByo0+s4LcQLTrvwtwzcixyJCvvFgKVm 0WD8/cyLzJJaEh6FmpiDX0PJyz2KJv9yPIM7kmO4R0znP6fHoix7btLfUq8VT78m5806 bc1Mu+AYKSBhI9dGxFPHfXZYaf5tVwiUH1QqWWMAkHg1iavIFw1oVZZ5lyiI+/ZJgxn4 Ba1Yznx7kQLB3fFVe8nIS/WNlOEf7DPqDH5R8MEWNCatjC33oIwoGOvJobCAgL31700m JzqQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=SHJyhm2AvF1J3KhcjjNeB31fuKNh0dgEGUX5Ov6mrnA=; b=ybiaEpKSyjo8rAFfG3RCPvdeBfzXW8jmRcMZ1CJT2i+fgGt3dmuj0BC0/sqdX2ttVf TJqTjDKErHxhKZt9K4VSTPgkB9CU4s8hwtx/NnS2wxUqIEWH5V8KyWHx6rvC/E5OnXy1 usF86xjbO9nEGAkwInJTq4ikgWTMoBjQ3BNtMpMcsZ7a9nCP8kGPpGRdm0T8Cq2npvhf q/17ss83HI8PZ6rBpDEN5Ko4pH7snJIpgS1YdudEiJ1961T0iWyIXhceSHZXGGdfakCk VaDX9rRjWD1CJODPKDDeZUPIjjA34L0jKjZX1KGr126m0XLvu3E6MF/+MJknUsWidjwJ ynOg== X-Gm-Message-State: ANoB5pnwoaTYN8w4kn1LWAoeiMHHerL0WXENMYA758EIj3UXVDdv61ie sg0qzZof9coSKTY13bbCIK3VCGvZHvqBBPu/ X-Received: by 2002:a05:600c:354d:b0:3d0:85b5:33d3 with SMTP id i13-20020a05600c354d00b003d085b533d3mr26138175wmq.16.1671226998925; Fri, 16 Dec 2022 13:43:18 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id y7-20020a05600c364700b003d33ab317dasm4135263wmq.14.2022.12.16.13.43.18 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 16 Dec 2022 13:43:18 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 35/36] hw/intc/xics: Convert TYPE_ICS to 3-phase reset Date: Fri, 16 Dec 2022 21:42:43 +0000 Message-Id: <20221216214244.1391647-36-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221216214244.1391647-1-peter.maydell@linaro.org> References: <20221216214244.1391647-1-peter.maydell@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32d; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x32d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Convert the TYPE_ICS class to 3-phase reset; this will allow us to convert the TYPE_PHB3_MSI class which inherits from it. Signed-off-by: Peter Maydell Tested-by: Daniel Henrique Barboza Reviewed-by: Cédric Le Goater Reviewed-by: Greg Kurz Reviewed-by: Philippe Mathieu-Daudé Message-id: 20221125115240.3005559-7-peter.maydell@linaro.org --- hw/intc/xics.c | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/hw/intc/xics.c b/hw/intc/xics.c index dd130467ccc..c7f8abd71e4 100644 --- a/hw/intc/xics.c +++ b/hw/intc/xics.c @@ -564,9 +564,9 @@ static void ics_reset_irq(ICSIRQState *irq) irq->saved_priority = 0xff; } -static void ics_reset(DeviceState *dev) +static void ics_reset_hold(Object *obj) { - ICSState *ics = ICS(dev); + ICSState *ics = ICS(obj); g_autofree uint8_t *flags = g_malloc(ics->nr_irqs); int i; @@ -584,7 +584,7 @@ static void ics_reset(DeviceState *dev) if (kvm_irqchip_in_kernel()) { Error *local_err = NULL; - ics_set_kvm_state(ICS(dev), &local_err); + ics_set_kvm_state(ics, &local_err); if (local_err) { error_report_err(local_err); } @@ -688,16 +688,17 @@ static Property ics_properties[] = { static void ics_class_init(ObjectClass *klass, void *data) { DeviceClass *dc = DEVICE_CLASS(klass); + ResettableClass *rc = RESETTABLE_CLASS(klass); dc->realize = ics_realize; device_class_set_props(dc, ics_properties); - dc->reset = ics_reset; dc->vmsd = &vmstate_ics; /* * Reason: part of XICS interrupt controller, needs to be wired up, * e.g. by spapr_irq_init(). */ dc->user_creatable = false; + rc->phases.hold = ics_reset_hold; } static const TypeInfo ics_info = { From patchwork Fri Dec 16 21:42:44 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 634487 Delivered-To: patch@linaro.org Received: by 2002:a17:522:c983:b0:460:3032:e3c4 with SMTP id kr3csp1086969pvb; Fri, 16 Dec 2022 14:29:00 -0800 (PST) X-Google-Smtp-Source: AMrXdXtjgEOssmryvZEPJiQGE4i4fON6hK8G3cuFDrfuxi6NCApB2+45dkBRSikk2kV2gt/b2WxY X-Received: by 2002:a05:622a:254:b0:3a7:f93a:df8 with SMTP id c20-20020a05622a025400b003a7f93a0df8mr2138526qtx.61.1671229740666; Fri, 16 Dec 2022 14:29:00 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1671229740; cv=none; d=google.com; s=arc-20160816; b=hLvrcYjFN96B+F68ziF34jpTDx6v4eaS9u6FaeBpWmB0ZuOXFzxcRLU9p7D53NGmD5 WcWYlvDP2Nq4dNPxe+YOLPCEY4t4aOOyYvc9W2JaOCW/Mw+1kxBRojEm7VYRlNjAimNu 7cYN0W+yEyr342NA1gUtSEWLwsETTgLAV1PqNhXORotVPBMITGG2wuJZVuVOEPAftbES lzsYVqS0ET7LeRonWNtuBuZnEOE0/ccW04I9e0Z0Qe03BF9iyy+Dspq2q/66Rgigba5F jxzSkX15OWorKYVeGm3faCnEYo+yFbed75xVDqRl+v504MFK8A6X9OHXrl1cavXnhTvz eZOQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=bRq697OJRpkwMKWFeobURUSNyr0IVAGEj4jxSGYd0BA=; b=qPK9coeGhnpqlBSn7biwvR2Gz3ChWP7Vp2yzVXe0lu4f63LtBWsBUe30gK3E+3JzdE vjwR6SX/plVTqSpGVh8VweTx9f/d2dXHWhGY1rizxkQKvPoP5kgzISVZuzqQFbgycTBl RmK3gcKiwuaLQe46IblEZF8yrwJLU/++eFG3lbD9ZGWKBGT1p0C7kcP0l1X2h3O/HmQr TxdnU1+tarFucXbtKialhm+2unf5A5fJxRkyv3VbDxjRv1IHXSG5xi5a9viYcYt3bf6J Ft4ubJ8w97YKZXzsIIV2U9kw9trJJtIi6kbRplz7pWJpBoF6plLGsQQcv72PbFEB4RC9 Q9hQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=hVWKA9fQ; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id q14-20020a05620a2a4e00b006fc5ded6d1esi1619437qkp.325.2022.12.16.14.29.00 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Fri, 16 Dec 2022 14:29:00 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=hVWKA9fQ; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1p6IV6-0006lu-3F; Fri, 16 Dec 2022 16:44:16 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1p6IUJ-00067K-68 for qemu-devel@nongnu.org; Fri, 16 Dec 2022 16:43:33 -0500 Received: from mail-wm1-x32a.google.com ([2a00:1450:4864:20::32a]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1p6IUC-0000b3-HH for qemu-devel@nongnu.org; Fri, 16 Dec 2022 16:43:26 -0500 Received: by mail-wm1-x32a.google.com with SMTP id ja17so2736807wmb.3 for ; Fri, 16 Dec 2022 13:43:20 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=bRq697OJRpkwMKWFeobURUSNyr0IVAGEj4jxSGYd0BA=; b=hVWKA9fQ2t/WFzhF/LlZVMHlVn0VG9JBFIsixsL2xWnlUkVBqFUCy34yn9c1BZEHgf /Hb886HyO0fuuez9TQhaARasogVrq90p3AGqDYmjWqxLrdnC1zVKE2ynvAU/2JdlFhXT Xq1Q+zrAk4T4RBUN2sMEBTYinlyDtVBeSbVGMuWCHBVLQbrf1KlKFLjk2wwc9f70I374 6ZG2z93ZAaBYg+iA6aIb0+43Rg7A22UQGe2pjBx/Y9zgro67W+mDYUs0a8HSQT9umZ9c uTqIiSMH9qeJEJV864cxVfeRJbH+60cB12e1rBAbWcTKKGexvYATHpQcTnx5J+dmgYFf 79ow== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=bRq697OJRpkwMKWFeobURUSNyr0IVAGEj4jxSGYd0BA=; b=jbCnVtRdo2HT9atZ9NV7caEX/5jtiH4/hmWAXMOmkUEgekC/mSl2/+TGVCTIGtPtky qIKIJbwHqkAij+/zqnxz26P17Xn+2jdWhB3/nDyYfs67y2AViL7JB7MVNBUbg+LvIPep jRZ0vjTmHntbwugEKyafXWz5jugdoa9GRHVMtfpATblipoVPy3jDld/m34zpQCCFofxS MES9Qll32V+R104ozAgx3ynuDyz0ri+KJmtWZhKNd9HO54PczPubKJPWFEC1CIE2aS/O saRGWHRdqOOGZCGnJStmOZYXGIZCtKPFBsZs3B4YSp0+2X+lSuaG/TH+6ap8o92nw/yY F7kQ== X-Gm-Message-State: AFqh2krbhogsUtQatvDYXwXFwc0xW7UBnGHKZOJGeSx6D9bMTmKLaoid d5OPEnDiAfEB0SiRWT8UxPT8BgukTQAikspf X-Received: by 2002:a05:600c:5126:b0:3d3:3c60:b2bb with SMTP id o38-20020a05600c512600b003d33c60b2bbmr5903150wms.23.1671226999786; Fri, 16 Dec 2022 13:43:19 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id y7-20020a05600c364700b003d33ab317dasm4135263wmq.14.2022.12.16.13.43.18 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 16 Dec 2022 13:43:19 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 36/36] hw/pci-host/pnv_phb3_msi: Convert TYPE_PHB3_MSI to 3-phase reset Date: Fri, 16 Dec 2022 21:42:44 +0000 Message-Id: <20221216214244.1391647-37-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221216214244.1391647-1-peter.maydell@linaro.org> References: <20221216214244.1391647-1-peter.maydell@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32a; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x32a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Convert the TYPE_PHB3_MSI class to 3-phase reset, so we can avoid using the device_class_set_parent_reset() function. Signed-off-by: Peter Maydell Tested-by: Daniel Henrique Barboza Reviewed-by: Cédric Le Goater Reviewed-by: Philippe Mathieu-Daudé Message-id: 20221125115240.3005559-8-peter.maydell@linaro.org --- include/hw/ppc/xics.h | 2 +- hw/pci-host/pnv_phb3_msi.c | 15 +++++++++------ 2 files changed, 10 insertions(+), 7 deletions(-) diff --git a/include/hw/ppc/xics.h b/include/hw/ppc/xics.h index 00b80b08c27..95ead0dd7c9 100644 --- a/include/hw/ppc/xics.h +++ b/include/hw/ppc/xics.h @@ -95,7 +95,7 @@ struct ICSStateClass { DeviceClass parent_class; DeviceRealize parent_realize; - DeviceReset parent_reset; + ResettablePhases parent_phases; void (*reject)(ICSState *s, uint32_t irq); void (*resend)(ICSState *s); diff --git a/hw/pci-host/pnv_phb3_msi.c b/hw/pci-host/pnv_phb3_msi.c index ae908fd9e41..41e63b066f9 100644 --- a/hw/pci-host/pnv_phb3_msi.c +++ b/hw/pci-host/pnv_phb3_msi.c @@ -228,12 +228,14 @@ static void phb3_msi_resend(ICSState *ics) } } -static void phb3_msi_reset(DeviceState *dev) +static void phb3_msi_reset_hold(Object *obj) { - Phb3MsiState *msi = PHB3_MSI(dev); - ICSStateClass *icsc = ICS_GET_CLASS(dev); + Phb3MsiState *msi = PHB3_MSI(obj); + ICSStateClass *icsc = ICS_GET_CLASS(obj); - icsc->parent_reset(dev); + if (icsc->parent_phases.hold) { + icsc->parent_phases.hold(obj); + } memset(msi->rba, 0, sizeof(msi->rba)); msi->rba_sum = 0; @@ -287,11 +289,12 @@ static void phb3_msi_class_init(ObjectClass *klass, void *data) { DeviceClass *dc = DEVICE_CLASS(klass); ICSStateClass *isc = ICS_CLASS(klass); + ResettableClass *rc = RESETTABLE_CLASS(klass); device_class_set_parent_realize(dc, phb3_msi_realize, &isc->parent_realize); - device_class_set_parent_reset(dc, phb3_msi_reset, - &isc->parent_reset); + resettable_class_set_parent_phases(rc, NULL, phb3_msi_reset_hold, NULL, + &isc->parent_phases); isc->reject = phb3_msi_reject; isc->resend = phb3_msi_resend;