From patchwork Thu Mar 28 14:25:12 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rui Miguel Silva X-Patchwork-Id: 161311 Delivered-To: patch@linaro.org Received: by 2002:a02:c6d8:0:0:0:0:0 with SMTP id r24csp781399jan; Thu, 28 Mar 2019 07:25:27 -0700 (PDT) X-Google-Smtp-Source: APXvYqyN2qwQ26UqVpRfOKcrBIRVylEfGmHfdvBQwwmi4IKXHeON9w0VJ6d3weRiOaqjOH5ogMRK X-Received: by 2002:a62:4ec8:: with SMTP id c191mr3411833pfb.138.1553783127607; Thu, 28 Mar 2019 07:25:27 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1553783127; cv=none; d=google.com; s=arc-20160816; b=RUQ7MXSpr4eQzGtBRneD4n4w5NxIyIoOQwoQgCk4R++Rhwy+jp2rjTXarQxOPua2Ta /hcrR0MpgjltYQ52jNAWzeZvskEaloroH5PiYVMS6OvOg6u6LYtFgIXUgOXmN5DunqbH q5XkNRJv5BwEtb7gCU5PBOh1/iZAqeJFUjOazd1BO0OfP7A/NOo0iUIIjcQtmL6LVJsB tFDeA306e405HY6n4lVrhzvoXtFGrwpW7a4CABzgDu39ecoPifEI/9MEzREXuJU4rWjk 3vshdueF4yzzyebHqkEH+JO1P3TCw1Mk2LEeB8LJgY1tZP3iGypCmlMXPS1cKqX91oBi 888Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=or2H0XX3fpoft+bcRNSVhU9ZpCFzIIJHGEXLzy1JLT8=; b=muXw2aSCK+qDqSb9J0kD5NH3sLSfWIIcHUfpZXfztBWdrtMiio3K+DcjxYCIivlNKs HrvAkWX4nJZGrY1AiIC6umA6GM3tKzs2pbRcloidSqPE8iZdtpynAuCWtIIbCr6bGPEH yXOVn0ndH2+2lHfNlZDWGxKJVTPGiqpfzwd+XhaKCW7mJDL/fJ4dvBMxbBugxaJVE7uC SAwwZ2G8XVgJmD8l5oRsppMad+Ntu+AHRDEZOsOnzH6oCN/dwtay3iTDgyrH2QJOWSoe eXbXgvsrG2BubOnyb3kMrWgmyzSdpa9UwoNRAtklMT0pZdH5AvMnDF7BepIScH3FWV83 FI5g== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=GWl8exbN; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id g6si20730742pgs.236.2019.03.28.07.25.27; Thu, 28 Mar 2019 07:25:27 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=GWl8exbN; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726117AbfC1OZ1 (ORCPT + 7 others); Thu, 28 Mar 2019 10:25:27 -0400 Received: from mail-wm1-f67.google.com ([209.85.128.67]:38033 "EHLO mail-wm1-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725875AbfC1OZ0 (ORCPT ); Thu, 28 Mar 2019 10:25:26 -0400 Received: by mail-wm1-f67.google.com with SMTP id w15so4271111wmc.3 for ; Thu, 28 Mar 2019 07:25:25 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=or2H0XX3fpoft+bcRNSVhU9ZpCFzIIJHGEXLzy1JLT8=; b=GWl8exbNQhQyVCc0S6pxWCne+aoql9tONUbQRRMmoLGd12XhUtkvU8UuWYMB+Ah2bN MX7o78j157ogw3pejzyBj41psfrqizfDgcZCTqfGIu4y5AKP351QtJwkSKWMY0b+TqYc MvxdHREurf/u9xj7S53UnDLqf7aXwI6+jf9j5GOQi/lAAiW+w8tlOIE72NRxeJys7/oG f7biyjXKQ94d4vuf/xmnj/WCnenwp7XUe8Bm21CGZ3NSeD5f9VAOuvLd82YyYkOPnMz3 Yb79SyFCR/Ot+N6uYyK7cZakYwUdNI+D4Xgvd67ECTLZtlIriSN4s/7S35pjTd+OT259 YEGA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=or2H0XX3fpoft+bcRNSVhU9ZpCFzIIJHGEXLzy1JLT8=; b=qhCrJjDqHsqD+mpB6dQTm/zC2vtLqjcle7Y+TaXzGGKJGOnDK0IQXj8L4p5z02Z5cr ug31bm7dyarUyXwKKE7IjzsSejq8oAb1UCLluYMUGuYoz43xGU0M1LiLBS5MdC1pdWx8 0j4NLAyPCSDKs0ZpAdejZ4AKF6NNtltk7QndS6fZyLiCPBlLw6ypy/OyH1Cfg1kJS/Jg Ow2Rd7YN3XbEiUI1XoIIyvLirIwbzL2G+ycyhYdjY3SVY2QGGqSFA7sPdamzrCVLqJmO ZpgsYf27L9unWYgCt8FnRelyRs3OstlZhbDQ2Mk8llJimSD/7nAB1xH5pjIxXjLe1kLl cOyw== X-Gm-Message-State: APjAAAUo9M2+jQUP5zofMoaH6DwLACbwd1/6ZpWVaJFUN/LXzuVyKn+J TleJhDF7aWuZjkUTfUE+tKpwI6CpXWc= X-Received: by 2002:a1c:e70b:: with SMTP id e11mr170446wmh.17.1553783125185; Thu, 28 Mar 2019 07:25:25 -0700 (PDT) Received: from arch-late.local (a109-49-46-234.cpe.netcabo.pt. [109.49.46.234]) by smtp.gmail.com with ESMTPSA id o10sm24021680wru.54.2019.03.28.07.25.24 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 28 Mar 2019 07:25:24 -0700 (PDT) From: Rui Miguel Silva To: Shawn Guo , Rob Herring , Fabio Estevam Cc: Laurent Pinchart , devicetree@vger.kernel.org, Rui Miguel Silva Subject: [PATCH v3 1/5] ARM: dts: imx7s: add mipi phy power domain Date: Thu, 28 Mar 2019 14:25:12 +0000 Message-Id: <20190328142516.30372-2-rui.silva@linaro.org> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190328142516.30372-1-rui.silva@linaro.org> References: <20190328142516.30372-1-rui.silva@linaro.org> MIME-Version: 1.0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add power domain index 0 related with mipi-phy to imx7s. While at it rename pcie power-domain node to remove pgc prefix. Signed-off-by: Rui Miguel Silva --- arch/arm/boot/dts/imx7s.dtsi | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) -- 2.21.0 diff --git a/arch/arm/boot/dts/imx7s.dtsi b/arch/arm/boot/dts/imx7s.dtsi index e88f53a4c7f4..9a680d3d6424 100644 --- a/arch/arm/boot/dts/imx7s.dtsi +++ b/arch/arm/boot/dts/imx7s.dtsi @@ -606,7 +606,13 @@ #address-cells = <1>; #size-cells = <0>; - pgc_pcie_phy: pgc-power-domain@1 { + pgc_mipi_phy: power-domain@0 { + #power-domain-cells = <0>; + reg = <0>; + power-supply = <®_1p0d>; + }; + + pgc_pcie_phy: power-domain@1 { #power-domain-cells = <0>; reg = <1>; power-supply = <®_1p0d>; From patchwork Thu Mar 28 14:25:13 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rui Miguel Silva X-Patchwork-Id: 161312 Delivered-To: patch@linaro.org Received: by 2002:a02:c6d8:0:0:0:0:0 with SMTP id r24csp781445jan; Thu, 28 Mar 2019 07:25:30 -0700 (PDT) X-Google-Smtp-Source: APXvYqw3RGgDwo4SaUglha1DAE4UjczFeUNvGNvZH4k/rjveiGrt8AE1fjknst1EU4J+ylwwD1oP X-Received: by 2002:a63:3d49:: with SMTP id k70mr23435257pga.447.1553783129986; Thu, 28 Mar 2019 07:25:29 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1553783129; cv=none; d=google.com; s=arc-20160816; b=w6SHtHHKbuSJBiYJH4b0o+O7bmIqtWNN8nuEzi5hdygwUtb0/gyt9imsYWR3QC86Xj SrdNKc2AGOR4WnI7Bms6ec4lt6+Gk3hLb2bUvg+t/7Ss8KSmAE8V2zmh31OkDQr0xoqL zmweaizfhnDzPhAHSdln5cRw79wAAu6PZL5czyeHabxLgyDmaRanfA1rDFrnKXe6Qbho YRWaO1OxwSLOd5QDXQnjofpYl9/xsgFeR9OuqpJeSGOmcFfTnuYvJZxHaO+3WhMTX6z6 AEpgGlXzUlACxYPxMr2rE2CBwO607RjbLIKf/vokUwYWw0N4ct7C8lWz+e/lyPhKze4K WZjg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=Km9F0+MNLg3bsKJa/pUludwKxgF0kSDjShLunfY0CCM=; b=FWW7VnKQ5yv/xNuYpx+dtJHWcR9CXDrsCiR7NF6GQsF9Dup7SLUqluVm1h4p0bv/N1 XmWmSdHPwJCDoIqouquh6aZ0eCdPY+6Af8d8EZTtoVxgDPQMEsqpNxwJ89YZYcCKFdFo eK0wIq9zQATCbFUnu3bY0haEks2v3xn6dvv89Lmm3I8u2e+V6hUDv0ZzY+sM3qV+6d3T EchiapB27wvruQkvjIIfemvNK+DpHMzhpzc1B0HNBxNJOpk3RFOMshHVsXnYTmOV9pZd Tsc/bItm/2NdZ+5Qc/PJQUcZClwEuWqn7clSB0ETVTU5rf+1n3f5s6AjrtK2wIv4FRdD amXA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Jtvc6iiF; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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[109.49.46.234]) by smtp.gmail.com with ESMTPSA id o10sm24021680wru.54.2019.03.28.07.25.26 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 28 Mar 2019 07:25:27 -0700 (PDT) From: Rui Miguel Silva To: Shawn Guo , Rob Herring , Fabio Estevam Cc: Laurent Pinchart , devicetree@vger.kernel.org, Rui Miguel Silva , Philipp Zabel Subject: [PATCH v3 2/5] ARM: dts: imx7s: add multiplexer controls Date: Thu, 28 Mar 2019 14:25:13 +0000 Message-Id: <20190328142516.30372-3-rui.silva@linaro.org> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190328142516.30372-1-rui.silva@linaro.org> References: <20190328142516.30372-1-rui.silva@linaro.org> MIME-Version: 1.0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The IOMUXC General Purpose Register has bitfield to control video bus multiplexer to control the CSI input between the MIPI-CSI2 and parallel interface. Add that register and mask. Signed-off-by: Rui Miguel Silva Reviewed-by: Philipp Zabel --- arch/arm/boot/dts/imx7s.dtsi | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) -- 2.21.0 diff --git a/arch/arm/boot/dts/imx7s.dtsi b/arch/arm/boot/dts/imx7s.dtsi index 9a680d3d6424..792efcd2caa1 100644 --- a/arch/arm/boot/dts/imx7s.dtsi +++ b/arch/arm/boot/dts/imx7s.dtsi @@ -497,8 +497,15 @@ gpr: iomuxc-gpr@30340000 { compatible = "fsl,imx7d-iomuxc-gpr", - "fsl,imx6q-iomuxc-gpr", "syscon"; + "fsl,imx6q-iomuxc-gpr", "syscon", + "simple-mfd"; reg = <0x30340000 0x10000>; + + mux: mux-controller { + compatible = "mmio-mux"; + #mux-control-cells = <0>; + mux-reg-masks = <0x14 0x00000010>; + }; }; ocotp: ocotp-ctrl@30350000 { From patchwork Thu Mar 28 14:25:14 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rui Miguel Silva X-Patchwork-Id: 161313 Delivered-To: patch@linaro.org Received: by 2002:a02:c6d8:0:0:0:0:0 with SMTP id r24csp781490jan; Thu, 28 Mar 2019 07:25:32 -0700 (PDT) X-Google-Smtp-Source: APXvYqz5A/+/YP0iMuwGxphfN+hzEB/e+IZq3ABs2D8zfHZUxCLDinaW2hXHD+ePWps63IHJmsnU X-Received: by 2002:a62:6444:: with SMTP id y65mr33402885pfb.56.1553783132631; Thu, 28 Mar 2019 07:25:32 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1553783132; cv=none; d=google.com; s=arc-20160816; b=uugEK9xE1GITuSR/GpDPVTfpkYe2krYcN2roCZpv6Yd8IGRxfZXGuepgVj2aZHoiob EAI6QllKaJtnVfE5b6kf3LOxqrNhbNAPU4XPl6OIunnjFDYwKyFTC89nOLNwUv+ETXsk 5PMEluwSN9Y79Z16zPnA6hFSkuHIuXfC3xPO/GVAOD0kmWXC5tS8+FckuSffCl+WWynm Q2x3RoCLiJLBp3quBuqSDBAAiUdTD2eiy4l9gXAc+kKlczFDieTdcPGlcPMouQUknLOn 7DuB6zQms9VO6Y2TKl85z2GkfDptmEt8xPFDkpjaUiJ6aynXK9sfOe3hjCpCuWgR9d+E iUeg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=XYqMtNPpDygEnLGuuczpX/lsgglaeL6Uf3DbIA3AsTU=; b=o9vrP3BiSoNc7n9bNpr99rlu16b+7lbaJlhBMmbmtyw2sga2aTLKxRtzDaARkY/k5s Fje1oV3Af3Ev63HDXPZsufSHJ6AKqyf62JsEdWS+4TwGN6B3HHh/dTwNEhdDFSYAUDav p+fFN71iYZSeiCzLQk9CRAiElhfuQ66kviH484RJ3G4r0k7PpsrHXqvD0aggyUxmsJ+P VmjT9wOwnTjeXYklz0552FpUmeTIq6zgyvWaGr5Gyi8jkJkTlVKmNa2I3Q9q3txHuTWm DerGS7uCYZKcpCUNHobcZy+hdTHUaw9hyhOgeiw3GHk3Ft3lFvE7O6Md1XH/HqAl5z3L fDkA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=fU1J7fva; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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[109.49.46.234]) by smtp.gmail.com with ESMTPSA id o10sm24021680wru.54.2019.03.28.07.25.29 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 28 Mar 2019 07:25:29 -0700 (PDT) From: Rui Miguel Silva To: Shawn Guo , Rob Herring , Fabio Estevam Cc: Laurent Pinchart , devicetree@vger.kernel.org, Rui Miguel Silva Subject: [PATCH v3 3/5] ARM: dts: imx7s: Add video mux, csi and mipi_csi Date: Thu, 28 Mar 2019 14:25:14 +0000 Message-Id: <20190328142516.30372-4-rui.silva@linaro.org> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190328142516.30372-1-rui.silva@linaro.org> References: <20190328142516.30372-1-rui.silva@linaro.org> MIME-Version: 1.0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add device tree nodes for csi, video multiplexer and mipi-csi. Signed-off-by: Rui Miguel Silva --- arch/arm/boot/dts/imx7s.dtsi | 75 ++++++++++++++++++++++++++++++++++++ 1 file changed, 75 insertions(+) -- 2.21.0 Reviewed-by: Laurent Pinchart diff --git a/arch/arm/boot/dts/imx7s.dtsi b/arch/arm/boot/dts/imx7s.dtsi index 792efcd2caa1..3286838105c6 100644 --- a/arch/arm/boot/dts/imx7s.dtsi +++ b/arch/arm/boot/dts/imx7s.dtsi @@ -8,6 +8,7 @@ #include #include #include +#include #include "imx7d-pinfunc.h" / { @@ -506,6 +507,34 @@ #mux-control-cells = <0>; mux-reg-masks = <0x14 0x00000010>; }; + + video_mux: csi-mux { + compatible = "video-mux"; + mux-controls = <&mux 0>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + + port@0 { + reg = <0>; + }; + + port@1 { + reg = <1>; + + csi_mux_from_mipi_vc0: endpoint { + remote-endpoint = <&mipi_vc0_to_csi_mux>; + }; + }; + + port@2 { + reg = <2>; + + csi_mux_to_csi: endpoint { + remote-endpoint = <&csi_from_csi_mux>; + }; + }; + }; }; ocotp: ocotp-ctrl@30350000 { @@ -709,6 +738,23 @@ status = "disabled"; }; + csi: csi@30710000 { + compatible = "fsl,imx7-csi"; + reg = <0x30710000 0x10000>; + interrupts = ; + clocks = <&clks IMX7D_CLK_DUMMY>, + <&clks IMX7D_CSI_MCLK_ROOT_CLK>, + <&clks IMX7D_CLK_DUMMY>; + clock-names = "axi", "mclk", "dcic"; + status = "disabled"; + + port { + csi_from_csi_mux: endpoint { + remote-endpoint = <&csi_mux_to_csi>; + }; + }; + }; + lcdif: lcdif@30730000 { compatible = "fsl,imx7d-lcdif", "fsl,imx28-lcdif"; reg = <0x30730000 0x10000>; @@ -718,6 +764,35 @@ clock-names = "pix", "axi"; status = "disabled"; }; + + mipi_csi: mipi-csi@30750000 { + compatible = "fsl,imx7-mipi-csi2"; + reg = <0x30750000 0x10000>; + #address-cells = <1>; + #size-cells = <0>; + interrupts = ; + clocks = <&clks IMX7D_IPG_ROOT_CLK>, + <&clks IMX7D_MIPI_CSI_ROOT_CLK>, + <&clks IMX7D_MIPI_DPHY_ROOT_CLK>; + clock-names = "pclk", "wrap", "phy"; + power-domains = <&pgc_mipi_phy>; + phy-supply = <®_1p0d>; + resets = <&src IMX7_RESET_MIPI_PHY_MRST>; + reset-names = "mrst"; + status = "disabled"; + + port@0 { + reg = <0>; + }; + + port@1 { + reg = <1>; + + mipi_vc0_to_csi_mux: endpoint { + remote-endpoint = <&csi_mux_from_mipi_vc0>; + }; + }; + }; }; aips3: aips-bus@30800000 { From patchwork Thu Mar 28 14:25:15 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rui Miguel Silva X-Patchwork-Id: 161314 Delivered-To: patch@linaro.org Received: by 2002:a02:c6d8:0:0:0:0:0 with SMTP id r24csp781523jan; Thu, 28 Mar 2019 07:25:34 -0700 (PDT) X-Google-Smtp-Source: APXvYqxYDJkWPyA23tc1pNhjTzzVFsZOaQKzH/YJUfY03ze+Va24wSfwb6rKqlg7lGFylcx9nZHn X-Received: by 2002:a65:620e:: with SMTP id d14mr40477113pgv.28.1553783134778; Thu, 28 Mar 2019 07:25:34 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1553783134; cv=none; d=google.com; s=arc-20160816; b=nTSWBLOtEiPQVBIMztymagchdmPOwzVNx3UerHs64501bcQmVFrBnedKnWSRp1HptT 0PjdckySio/1oQN0/pSQfouzjy84hRCW//xn2yO3EdLmZJANQIJFHuc1gRU5zoZhSjKQ NqQYH8OGZ8ZP1ic6pD8iNNAxnswwp12xBnDGp3qdLcrC+k8g0fD2ognJC9v03nUK3JW2 ezkVPVJemYYY2/N47pVrRmN3mPpgdZ5PwmRvAVLMnvmomLFQISvjVaME2e6X+2v5wyhM X+65dtWincMHvO9b48Nljzi/TUxZULxS1boS54dDqRQWegR9+2+5FCpja8SajxK/o15z SOWg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=epRHctaNI/usIJ9H87qhk6vt3H2KXJqPdsGN4wausWk=; b=nft7HjEuJfM/3iCycpWjFic6uBjGNR7bob3X2/Er/+CoWbtoQ7iExyOXJYTHDDDTo0 vzjDxv99JdKtx35Qt7EcgvQURy0jLDW6NMgMq3qIBfq74/J05eZfUdZgWCGZ17tVG1Dx pvG3vEGpbG6DDMQkj1LT4uBLQ8k/BoJ8yJgC+uDIAR1rmah6szdasq7ELtqGzJphErkz 2lfnV/NjCFGlyHn/4D1pXrXRidpL5P24oHes/a8wRhD9dg/0iovydvsCCzReiOa1B0/A 4DVT47kWCh0xzDw4R1cp5oiOoGgDQ3ff/BtN+6+UAtR8odK8dUYfgZJnKi7TYsXI/npA 6NTA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Ccr9k6ee; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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[109.49.46.234]) by smtp.gmail.com with ESMTPSA id o10sm24021680wru.54.2019.03.28.07.25.31 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 28 Mar 2019 07:25:31 -0700 (PDT) From: Rui Miguel Silva To: Shawn Guo , Rob Herring , Fabio Estevam Cc: Laurent Pinchart , devicetree@vger.kernel.org, Rui Miguel Silva Subject: [PATCH v3 4/5] ARM: dts: imx7s-warp: add csi and mipi_csi node Date: Thu, 28 Mar 2019 14:25:15 +0000 Message-Id: <20190328142516.30372-5-rui.silva@linaro.org> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190328142516.30372-1-rui.silva@linaro.org> References: <20190328142516.30372-1-rui.silva@linaro.org> MIME-Version: 1.0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add and enable csi and mipi_csi nodes. Signed-off-by: Rui Miguel Silva --- arch/arm/boot/dts/imx7s-warp.dts | 14 ++++++++++++++ 1 file changed, 14 insertions(+) -- 2.21.0 diff --git a/arch/arm/boot/dts/imx7s-warp.dts b/arch/arm/boot/dts/imx7s-warp.dts index b1e956205e9a..2d1a0105e6a6 100644 --- a/arch/arm/boot/dts/imx7s-warp.dts +++ b/arch/arm/boot/dts/imx7s-warp.dts @@ -77,6 +77,10 @@ assigned-clock-rates = <884736000>; }; +&csi { + status = "okay"; +}; + &i2c1 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c1>; @@ -213,6 +217,12 @@ }; }; +&mipi_csi { + clock-frequency = <166000000>; + fsl,csis-hs-settle = <3>; + status = "okay"; +}; + &sai1 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_sai1>; @@ -279,6 +289,10 @@ status = "okay"; }; +&video_mux { + status = "okay"; +}; + &wdog1 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_wdog>; From patchwork Thu Mar 28 14:25:16 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rui Miguel Silva X-Patchwork-Id: 161315 Delivered-To: patch@linaro.org Received: by 2002:a02:c6d8:0:0:0:0:0 with SMTP id r24csp781581jan; Thu, 28 Mar 2019 07:25:36 -0700 (PDT) X-Google-Smtp-Source: APXvYqzqCAx94QgVo8ErBOXIorjub5pMhKgcwfi7SdV6n6M613kR8688KqRfHFG2NxU6ogcB3k8R X-Received: by 2002:a17:902:8bc6:: with SMTP id r6mr44208299plo.235.1553783136929; Thu, 28 Mar 2019 07:25:36 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1553783136; cv=none; d=google.com; s=arc-20160816; b=wcm+1tnjbMlLu8JbH+xuzJ5LBMwEs1MC+cKvsQxSInPiq0RpSpGLAMNK6ZBp6Fw1tr d/ZTP6RUhnO4GYMgmv/8sapAl8rYQbaXISqnaoMcZLFNtxHe7RTkSugApZBjynGT+iIm 90NZtcqn13+EqhvqEf8k/tAiJSV70Rmkx+67ssZUAjk3bRs031XMvbBkgTVyaW+WOwMD 3XOtHZClg4RLut+XmyT04B/Fpo4JGJk338vdAST9lEoehIRBnaLw/CLmSUc+I3+eubAb PwUIgDjB9aycqm4UfNsj/xbEHD0HfXy01dB5jDY1VgNJVSfPEVTOzPvO3vVvj0MOXJmg Ge3Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=adWGaawJ/NWO/zZIGtpflKP2f/ZrXDXlxDAdob6OOXU=; b=dBLKDxLkfpcb7ZqTBC0pH9VyWJGzMR0o3PbdpDFTWxvl/Y1BkFmnPGs3xjI7A0GZSW WmgFWZvHVGLOg5YaEIl11fZ2virvuTO/gjo94FbO6lsMkueQG4GCTR23D0MzhogOLZEg pKGu4WDm1ovT/41hbklB8ItuRt1UF/P210pl+QMXQAvqPRHPLgEJ8N6xvv476JKYApo2 I93/noGBW8cPcTu60Wrgxx0Np7/wRU8Aqrwc8EAWjAgY9H3MKJLvZySr1skS7Qo2yEed 0ea3rZf9G1s/MKXmqSqbA9GG7zI8+lQvgi/ekV/nMSZXUu6O5jtgQDoDnG65qS7vILyo 5skg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=X9+2TA5X; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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[109.49.46.234]) by smtp.gmail.com with ESMTPSA id o10sm24021680wru.54.2019.03.28.07.25.33 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 28 Mar 2019 07:25:33 -0700 (PDT) From: Rui Miguel Silva To: Shawn Guo , Rob Herring , Fabio Estevam Cc: Laurent Pinchart , devicetree@vger.kernel.org, Rui Miguel Silva Subject: [PATCH v3 5/5] ARM: dts: imx7s-warp: add ov2680 sensor node Date: Thu, 28 Mar 2019 14:25:16 +0000 Message-Id: <20190328142516.30372-6-rui.silva@linaro.org> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190328142516.30372-1-rui.silva@linaro.org> References: <20190328142516.30372-1-rui.silva@linaro.org> MIME-Version: 1.0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Warp7 comes with a Omnivision OV2680 sensor, add the node here to make complete the camera data path for this system. Add the needed regulator to the analog voltage supply, the port and endpoints in mipi_csi node and the pinctrl for the reset gpio. Signed-off-by: Rui Miguel Silva --- arch/arm/boot/dts/imx7s-warp.dts | 45 ++++++++++++++++++++++++++++++++ 1 file changed, 45 insertions(+) -- 2.21.0 diff --git a/arch/arm/boot/dts/imx7s-warp.dts b/arch/arm/boot/dts/imx7s-warp.dts index 2d1a0105e6a6..d6b4888fa686 100644 --- a/arch/arm/boot/dts/imx7s-warp.dts +++ b/arch/arm/boot/dts/imx7s-warp.dts @@ -55,6 +55,14 @@ regulator-always-on; }; + reg_peri_3p15v: regulator-peri-3p15v { + compatible = "regulator-fixed"; + regulator-name = "peri_3p15v_reg"; + regulator-min-microvolt = <3150000>; + regulator-max-microvolt = <3150000>; + regulator-always-on; + }; + sound { compatible = "simple-audio-card"; simple-audio-card,name = "imx7-sgtl5000"; @@ -184,6 +192,27 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c2>; status = "okay"; + + ov2680: camera@36 { + compatible = "ovti,ov2680"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_ov2680>; + reg = <0x36>; + clocks = <&osc>; + clock-names = "xvclk"; + reset-gpios = <&gpio1 3 GPIO_ACTIVE_LOW>; + DOVDD-supply = <&sw2_reg>; + DVDD-supply = <&sw2_reg>; + AVDD-supply = <®_peri_3p15v>; + + port { + ov2680_to_mipi: endpoint { + remote-endpoint = <&mipi_from_sensor>; + clock-lanes = <0>; + data-lanes = <1>; + }; + }; + }; }; &i2c3 { @@ -221,6 +250,16 @@ clock-frequency = <166000000>; fsl,csis-hs-settle = <3>; status = "okay"; + + port@0 { + reg = <0>; + + mipi_from_sensor: endpoint { + remote-endpoint = <&ov2680_to_mipi>; + data-lanes = <1>; + }; + + }; }; &sai1 { @@ -347,6 +386,12 @@ >; }; + pinctrl_ov2680: ov2660grp { + fsl,pins = < + MX7D_PAD_LPSR_GPIO1_IO03__GPIO1_IO3 0x14 + >; + }; + pinctrl_sai1: sai1grp { fsl,pins = < MX7D_PAD_SAI1_RX_DATA__SAI1_RX_DATA0 0x1f