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Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson --- target/alpha/STATUS | 28 ---------------------------- 1 file changed, 28 deletions(-) delete mode 100644 target/alpha/STATUS diff --git a/target/alpha/STATUS b/target/alpha/STATUS deleted file mode 100644 index 6c9744569e..0000000000 --- a/target/alpha/STATUS +++ /dev/null @@ -1,28 +0,0 @@ -(to be completed) - -Alpha emulation structure: -cpu.h : CPU definitions globally exported -exec.h : CPU definitions used only for translated code execution -helper.c : helpers that can be called either by the translated code - or the QEMU core, including the exception handler. -op_helper.c : helpers that can be called only from TCG -helper.h : TCG helpers prototypes -translate.c : Alpha instructions to micro-operations translator - -Code translator status: -The Alpha CPU instruction emulation should be quite complete with the -limitation that the VAX floating-point load and stores are not tested. -The 4 MMU modes are implemented. - -Linux user mode emulation status: -a few programs start to run. Most crash at a certain point, dereferencing a -NULL pointer. It seems that the UNIQUE register is not initialized properly. -It may appear that old executables, not relying on TLS support, run but -this is to be proved... - -Full system emulation status: -* Alpha PALCode emulation is in a very early stage and is not sufficient - to run any real OS. The alpha-softmmu target is not enabled for now. -* no hardware platform description is implemented -* there might be problems in the Alpha PALCode dedicated instructions - that would prevent to use a native PALCode image. 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Sat, 17 Dec 2022 09:29:31 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Max Filippov , Richard Henderson , Bin Meng , kvm@vger.kernel.org, qemu-ppc@nongnu.org, Greg Kurz , Daniel Henrique Barboza , Bernhard Beschow , qemu-riscv@nongnu.org, Song Gao , Artyom Tarasenko , Paolo Bonzini , Palmer Dabbelt , Mark Cave-Ayland , Laurent Vivier , Alistair Francis , =?utf-8?q?C=C3=A9dric_Le_Goate?= =?utf-8?q?r?= , David Gibson , Xiaojuan Yang , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH v2 2/9] target/loongarch/cpu: Remove unused "sysbus.h" header Date: Sat, 17 Dec 2022 18:29:00 +0100 Message-Id: <20221217172907.8364-3-philmd@linaro.org> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221217172907.8364-1-philmd@linaro.org> References: <20221217172907.8364-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::62f; envelope-from=philmd@linaro.org; helo=mail-ej1-x62f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Bernhard Beschow The cpu is used in both user and system emulation context while sysbus.h is system-only. Remove it since it's not needed anyway. Signed-off-by: Bernhard Beschow Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Signed-off-by: Philippe Mathieu-Daudé --- target/loongarch/cpu.h | 1 - 1 file changed, 1 deletion(-) diff --git a/target/loongarch/cpu.h b/target/loongarch/cpu.h index e15c633b0b..c8612f5466 100644 --- a/target/loongarch/cpu.h +++ b/target/loongarch/cpu.h @@ -13,7 +13,6 @@ #include "hw/registerfields.h" #include "qemu/timer.h" #include "exec/memory.h" -#include "hw/sysbus.h" #include "cpu-csr.h" #define IOCSRF_TEMP 0 From patchwork Sat Dec 17 17:29:01 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 634853 Delivered-To: patch@linaro.org Received: by 2002:a17:522:c983:b0:460:3032:e3c4 with SMTP id kr3csp1464766pvb; Sat, 17 Dec 2022 09:30:22 -0800 (PST) X-Google-Smtp-Source: AA0mqf6opiA9QTiqiZtogGLNYb0Nzrhc9svveuRTxP8F0KTNeSSuRZNiySP1zNNDg+TcvhJZb4NR X-Received: by 2002:a05:622a:2283:b0:3a7:e783:7c4 with SMTP id ay3-20020a05622a228300b003a7e78307c4mr52411302qtb.29.1671298221968; Sat, 17 Dec 2022 09:30:21 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1671298221; cv=none; d=google.com; s=arc-20160816; b=bn01KKsMCN44DjNbcJfP+9HDoT5xMHba+pqij9GqWZgTxruHYC7t9N3d6C1AgAGonW B4lc6etAgAANj8htjMxAmDZOvi9NXOLpqsnbdk5lKRnKyP3BGL00WXDEeTXEDtBVYcbk OoJq3lnkNoyPVDtjQ6+3UKvga9CtkCkNTzkbztYFrqG1kmpdc8z6yFSt2r8fqXO7MO3A jA2fgnTqR1Ef39ZU4L8sr3ZaB/IkEsDyicE9+BUNqg9qRafYeRQN64Vl42ETD2xdyIKM pdq+3I/JaEK2QEbzH2BH12ty0NbI7abgTm4jUSaNJy+KshrBhc+F5Cd8N/idGK4K+11z ZySQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=6ZSUdi6MPqmLHvEe0ND7y8PBSQThNukontDiEvm1T8g=; b=Ke4xgPiVQT/BH05QMK+mjpzHvypoGOPbQOxgpmfkQzBc0CBBflj3XZ6FKkV/u1ucj6 ruYzGKLbaQLYmCYQZNQpBWg/wj7QOJwwR0LLNnb9Uht3pEG13QeCf/iyTtpeVt5eSsxl AFui4Yb0x0L8Q0+J2wg7gcN29387ueDa/PjItj6gR3dHpZrI0i5YaxI6T+wEZuT5n63D qGrlXK+JGD4yYYV+WZOk08JserVgPGHZeGOUj9igWmC6PjJtbp9B7ninXTQVL7E5wisN pGKrJBD0DXGt/qAYYMaXyzx/1+pD9HIK0dFPo4tNytV6LNU9epQ6AjU6MQhyTeYEdVkS oR4A== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=ynZZBnIu; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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Sat, 17 Dec 2022 09:29:39 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Max Filippov , Richard Henderson , Bin Meng , kvm@vger.kernel.org, qemu-ppc@nongnu.org, Greg Kurz , Daniel Henrique Barboza , Bernhard Beschow , qemu-riscv@nongnu.org, Song Gao , Artyom Tarasenko , Paolo Bonzini , Palmer Dabbelt , Mark Cave-Ayland , Laurent Vivier , Alistair Francis , =?utf-8?q?C=C3=A9dric_Le_Goate?= =?utf-8?q?r?= , David Gibson , Xiaojuan Yang , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= Subject: [PATCH v2 3/9] target/loongarch/cpu: Restrict "memory.h" header to sysemu Date: Sat, 17 Dec 2022 18:29:01 +0100 Message-Id: <20221217172907.8364-4-philmd@linaro.org> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221217172907.8364-1-philmd@linaro.org> References: <20221217172907.8364-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::632; envelope-from=philmd@linaro.org; helo=mail-ej1-x632.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Missed in 0093b9a5ee ("target/loongarch: Adjust functions and structure to support user-mode") while cleaning commit f84a2aacf5 ("target/loongarch: Add LoongArch IOCSR instruction"). Reviewed-by: Richard Henderson Signed-off-by: Philippe Mathieu-Daudé --- target/loongarch/cpu.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/target/loongarch/cpu.h b/target/loongarch/cpu.h index c8612f5466..2f17ac6b47 100644 --- a/target/loongarch/cpu.h +++ b/target/loongarch/cpu.h @@ -12,7 +12,9 @@ #include "fpu/softfloat-types.h" #include "hw/registerfields.h" #include "qemu/timer.h" +#ifndef CONFIG_USER_ONLY #include "exec/memory.h" +#endif #include "cpu-csr.h" #define IOCSRF_TEMP 0 From patchwork Sat Dec 17 17:29:02 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 634858 Delivered-To: patch@linaro.org Received: by 2002:a17:522:c983:b0:460:3032:e3c4 with SMTP id kr3csp1465511pvb; Sat, 17 Dec 2022 09:31:58 -0800 (PST) X-Google-Smtp-Source: AA0mqf4vfW+ya+sdCj6UjwcEHQouzcbq8LmJK9DyqDH9iDLFVKPum1FFTeyM6CWUGkKuGdpmH1FE X-Received: by 2002:a05:622a:59ca:b0:3a5:ff6e:d43e with SMTP id gc10-20020a05622a59ca00b003a5ff6ed43emr47804563qtb.2.1671298318798; Sat, 17 Dec 2022 09:31:58 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1671298318; cv=none; d=google.com; s=arc-20160816; b=akH4epuDds1eobzXZq/MccebnrSlrrFnft+ElGdI7iDnf+a+PoP4LW45Ql8eWGGyBJ 4wZG4w8WLC6iIeD6Af0KKmwJ9gW9dXjQsxsSJrLUfxjpLDCRJ4Tcon0bqvu2NSSwOLYg oWLAbTURbP4w9Mp53VRMrVSth/Cn43Z4BXZHP3jvikL5E0KEdJaAtNNJb3H6UOlsjGCk 792WlT7uJ7eTigmQj7yDOchyZXVwVGZwR/Igls8OIXPQJnLS7n/b8QjM+iSOb8cPO5mh 4dUP0tc55ntD5SDSltRS4GFtTg9+i/ENJ72JrAuroD21os0WFmH7eznQgDB+BrXjLvWV UZ9g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=ZJBMjUuWi5LDeqCkrRIBhFSAN2qMGyBc5fH/hW07Wew=; b=obaLQIWvo6A6WuQkfVPQBAJoVmVS4iVQ0vjjgiCntRo2XPONunOR4DHO4lGoqj84zx gVhKXAyo24GqtHMPFDSrSvYQU/nZ/1u+aJyGff4dnJ34iAygY7GhKlXiMaJXAaeY9yUv atiGHfY9UfbTfZhSDjN84N/urae5Ea1bT01Odhc4lj4hu+3TM7SNjtdWYsfHSOIzhasA 9AWTsLiGWnXVg2xYtpFtsTJOpH+mB57B1hroi2Ze0K7JV650rCePWPIvWB7vteIe7fuE vfTg+I5Oxofc+ktrOjGedVDJZCZXsZzB9tQemgXUwsB1AVIELjjG4SygCnE1yY3ThfYB Bh/w== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Ce3aVdiz; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id x24-20020ac87ed8000000b003a7eee6dc26si2282547qtj.671.2022.12.17.09.31.58 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Sat, 17 Dec 2022 09:31:58 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Ce3aVdiz; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1p6b0U-00029p-6W; Sat, 17 Dec 2022 12:29:54 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1p6b0S-00028s-BJ for qemu-devel@nongnu.org; Sat, 17 Dec 2022 12:29:52 -0500 Received: from mail-ej1-x632.google.com ([2a00:1450:4864:20::632]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1p6b0Q-0002R3-8A for qemu-devel@nongnu.org; Sat, 17 Dec 2022 12:29:52 -0500 Received: by mail-ej1-x632.google.com with SMTP id qk9so12970405ejc.3 for ; Sat, 17 Dec 2022 09:29:49 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=ZJBMjUuWi5LDeqCkrRIBhFSAN2qMGyBc5fH/hW07Wew=; b=Ce3aVdizpJjs3ywka/oZyIGX96iCyGdZ0PTh+5EV+KuosLgV+76u2Rj8tAWqH613JD Wy871aO87+6usyV36L9I5EO6nTmKOEv70NRgpMr2W53yqYgjK+bHsqe2AmNCki3JU3GQ h5bzXGd3AMRlIRwaKaPz/t0jPRVFqAvLdGKpPJll83EGbn2NWCtGFScFWlXFiWsN5x5b Yr3utM1/w9WTcWse2NFhi5Fn6ZHYSxO8W5tS65QBKWQw7ton4dKiPmF90D9LG9xCf9D5 lxvvXbtrm+9wjVZas9PwqvJ1ggX1iUfYayTHUkkNRMFutCMsTC/VrjJfr/fG0rM+FeS4 peqg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=ZJBMjUuWi5LDeqCkrRIBhFSAN2qMGyBc5fH/hW07Wew=; b=iEMGjFsbTxnGBv03uXgPQKriWx7UqAhsZN8dIaRJF86cds7EgDoEKA5ZtxT7aBdDH3 xsFPRYErn3+pLYgqGfEETPDJLsmVICU2NvAWHWy4a2AIe4SubY0Eq+kXyKBgUIwElYi6 aNNdetqj8lkXP9JCes1FSagdnPtgBZclcAWe3rm9jyZ8bGrSvyWM1zKnc/MMZK2xAFxm C7MNHLSCzVakCXVvfCTbC/biGCzn7Lt2UeYqCALWEWQEnuT3h4Ha2p4ik3MQtpHSuV0K pBjBcMyDaA9ijbs2hBuh24Dmp+FKqQ9rAL4al/h4HK8lObxMJUU9BsA/cr8fCLQ0bjNK LhGg== X-Gm-Message-State: AFqh2kpDd5Ju6SOrT/mfWxLcArweUCMRuxqfYCAOf+ze1orv1l5D2QhC NCG2gOOITjhe3I2Aq+EMa2e/jddzune9+PjnkbU= X-Received: by 2002:a17:906:c0d3:b0:7fc:4242:fa1d with SMTP id bn19-20020a170906c0d300b007fc4242fa1dmr2754845ejb.54.1671298188829; Sat, 17 Dec 2022 09:29:48 -0800 (PST) Received: from localhost.localdomain ([185.126.107.38]) by smtp.gmail.com with ESMTPSA id op1-20020a170906bce100b007bfacaea851sm2171205ejb.88.2022.12.17.09.29.45 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Sat, 17 Dec 2022 09:29:48 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Max Filippov , Richard Henderson , Bin Meng , kvm@vger.kernel.org, qemu-ppc@nongnu.org, Greg Kurz , Daniel Henrique Barboza , Bernhard Beschow , qemu-riscv@nongnu.org, Song Gao , Artyom Tarasenko , Paolo Bonzini , Palmer Dabbelt , Mark Cave-Ayland , Laurent Vivier , Alistair Francis , =?utf-8?q?C=C3=A9dric_Le_Goate?= =?utf-8?q?r?= , David Gibson , Xiaojuan Yang , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= Subject: [PATCH v2 4/9] target/ppc/internal: Restrict MMU declarations to sysemu Date: Sat, 17 Dec 2022 18:29:02 +0100 Message-Id: <20221217172907.8364-5-philmd@linaro.org> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221217172907.8364-1-philmd@linaro.org> References: <20221217172907.8364-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::632; envelope-from=philmd@linaro.org; helo=mail-ej1-x632.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org The 'hwaddr' type is only available / meaningful on system emulation. Reviewed-by: Richard Henderson Signed-off-by: Philippe Mathieu-Daudé --- target/ppc/internal.h | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/target/ppc/internal.h b/target/ppc/internal.h index 337a362205..901bae6d39 100644 --- a/target/ppc/internal.h +++ b/target/ppc/internal.h @@ -242,9 +242,12 @@ static inline int prot_for_access_type(MMUAccessType access_type) g_assert_not_reached(); } +#ifndef CONFIG_USER_ONLY + /* PowerPC MMU emulation */ typedef struct mmu_ctx_t mmu_ctx_t; + bool ppc_xlate(PowerPCCPU *cpu, vaddr eaddr, MMUAccessType access_type, hwaddr *raddrp, int *psizep, int *protp, int mmu_idx, bool guest_visible); @@ -266,6 +269,8 @@ struct mmu_ctx_t { int nx; /* Non-execute area */ }; +#endif /* !CONFIG_USER_ONLY */ + /* Common routines used by software and hardware TLBs emulation */ static inline int pte_is_valid(target_ulong pte0) { From patchwork Sat Dec 17 17:29:03 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 634860 Delivered-To: patch@linaro.org Received: by 2002:a17:522:c983:b0:460:3032:e3c4 with SMTP id kr3csp1465525pvb; Sat, 17 Dec 2022 09:32:01 -0800 (PST) X-Google-Smtp-Source: AA0mqf4I1XoWXcZN/K6RKyrT6kPEvTWNLQ0uAaCtNdF7QmdCzna0aRo/R4PCZXA+TNaTYeOvRRkS X-Received: by 2002:ac8:498f:0:b0:3a8:11ab:cacc with SMTP id f15-20020ac8498f000000b003a811abcaccmr39955305qtq.17.1671298321327; Sat, 17 Dec 2022 09:32:01 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1671298321; cv=none; d=google.com; s=arc-20160816; b=z2tOM4bkPfGbKLbnWUo3S4+wNofoaICCWflKGBtiV+Q6YqTe5y3L1VvGN4/IotldE4 OvKE8LPRIbq3XXbVBjxg5HzhgscSe6768wqGGEBBt5KbPDPQN5c0fl3MKSj1NEwhi66O vJKevu/WhfoDVSXikpfN4xV/mLYuAUaGok8KV98t99T4KwLhE2F95N0RaJkvg33pVa6Y 40zTJTkfMAh3Iis8K8fpHpYGKLxRdJfbcK0A+JXvxqc0Fft1XmQENM4XW4eKuiHsorFU dyqlKyKf27AaNxQCiEpi6iUb+/Na57MFCwg6u6rzNiLfzygbU+1aH4/dzVTQMKbLite8 mp2g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=Je6pglm7Ro/G6/Hw82+zaiN4Czg7YWpLl/0Q2PSll9w=; b=w7WPTzSQblbWJRjL0gJh1mFPVXbw6tMXl353JGQ0x4EpGbuHhwT1DIcddM2l2r3tkn xRsoGhaXZvaa+zCn6KJpZJZYnWoyRa9BnBNlKkKdd9IjP+2NQreD0hsczapO9gYnKhKs AB9JbqHhMDe8v3qdxPYoMwL9/nLiXgu8Iv3wyd1LAR/8ouh9Nh5LrZmPM76KSrP20AlW ffn5Tpuw5/zljRvh+xdH1Dw+6cOL85VlToUH1sauxWR7GQTipGArTAvP2sSoFpuzkvUB R9ahdKkuRImd9yfnr3Et0oFSLwEGS/5aKxWAfMT59DZJMPRjqjGodSwvlc682VIDujB8 amPA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=GtUaV+75; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson --- target/ppc/kvm.c | 1 - 1 file changed, 1 deletion(-) diff --git a/target/ppc/kvm.c b/target/ppc/kvm.c index 7c25348b7b..78f6fc50cd 100644 --- a/target/ppc/kvm.c +++ b/target/ppc/kvm.c @@ -32,7 +32,6 @@ #include "sysemu/device_tree.h" #include "mmu-hash64.h" -#include "hw/sysbus.h" #include "hw/ppc/spapr.h" #include "hw/ppc/spapr_cpu_core.h" #include "hw/hw.h" From patchwork Sat Dec 17 17:29:04 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 634855 Delivered-To: patch@linaro.org Received: by 2002:a17:522:c983:b0:460:3032:e3c4 with SMTP id kr3csp1464814pvb; Sat, 17 Dec 2022 09:30:27 -0800 (PST) X-Google-Smtp-Source: AMrXdXuNEYxausDUbzm760MF+Tr9G8mv1AJcjzS9sjTQUWLFsVTHWgN+hg6hx3LqMt7QMIOT7jgx X-Received: by 2002:a0c:8d0a:0:b0:4c7:6119:a7fc with SMTP id r10-20020a0c8d0a000000b004c76119a7fcmr2950964qvb.40.1671298227076; Sat, 17 Dec 2022 09:30:27 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1671298227; cv=none; d=google.com; s=arc-20160816; b=uonNkSbzgnKWCRLt1aNWYGoPNRTbAhVhqTswF84xUHuNw0rIBTW1MWWduIC5Qijexg dHWt799OG7OwrTHJr3slmucY/pEawCnF1Bsk9U4RWvtg3LGW2y3jdRbrKrZxfVzQt8vK xc1zh4snY5UrQfjKiNnyJvB0B9cx8pCWTjwqEyDbQ5rPHg2TFl4mlfKXOaZhcHS0scsh vDkGyZ0aKXI3EVySkF0k44PV/HNP2hDGaIFjlsOaKTebRrjJxoLIOr+44/9XXEDRQmE1 0o8u9kwCLx2BGZ8pfNrOZv9vwgyp9aJwVA7pdoShR8QNXO9dQvq1aY6ANioZu4V8oovU KHRQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=mwpytACtFTUC/RCCVxszHsHayCwwETpi4mznRsrQqmo=; b=XB44pExHYa2j2yfyXWXXaYy2JXDjH5upeWQW0E/Koo57hIwsQleaaxiXUEuor6rVrA 3YhcbSioWd+2ash9uo9bfrhqFKh9mLpN3cb0vI25v9WloeVBd2sJ44wrj84p9hYaCbVr UexfmBdYFzN4YtrojDDQFovFuv2qERzk5OG6ox6HdBS4xqw8Omsp/cDL9ZdeKGMp2PZ1 XYdWnOvIHB9RfoGPJx7jX1VtRbZf4ZqDBpuzAWfU27tzFec8KsOVFSiKghCPABqhh4ic FY0EKzMLob1rJK1cWQqx3PM6RiSBzqUQKtjUuK/n9AcWudbUmE1TTrrC5YmRo2QRb+Ou 8sHQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=q9rpfkmt; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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Sat, 17 Dec 2022 09:30:04 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Max Filippov , Richard Henderson , Bin Meng , kvm@vger.kernel.org, qemu-ppc@nongnu.org, Greg Kurz , Daniel Henrique Barboza , Bernhard Beschow , qemu-riscv@nongnu.org, Song Gao , Artyom Tarasenko , Paolo Bonzini , Palmer Dabbelt , Mark Cave-Ayland , Laurent Vivier , Alistair Francis , =?utf-8?q?C=C3=A9dric_Le_Goate?= =?utf-8?q?r?= , David Gibson , Xiaojuan Yang , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= Subject: [PATCH v2 6/9] target/riscv/cpu: Move Floating-Point fields closer Date: Sat, 17 Dec 2022 18:29:04 +0100 Message-Id: <20221217172907.8364-7-philmd@linaro.org> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221217172907.8364-1-philmd@linaro.org> References: <20221217172907.8364-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::530; envelope-from=philmd@linaro.org; helo=mail-ed1-x530.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson --- target/riscv/cpu.h | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h index fc1f72e5c3..05fafebff7 100644 --- a/target/riscv/cpu.h +++ b/target/riscv/cpu.h @@ -143,7 +143,6 @@ typedef struct PMUCTRState { struct CPUArchState { target_ulong gpr[32]; target_ulong gprh[32]; /* 64 top bits of the 128-bit registers */ - uint64_t fpr[32]; /* assume both F and D extensions */ /* vector coprocessor state. */ uint64_t vreg[32 * RV_VLEN_MAX / 64] QEMU_ALIGNED(16); @@ -158,7 +157,10 @@ struct CPUArchState { target_ulong load_res; target_ulong load_val; + /* Floating-Point state */ + uint64_t fpr[32]; /* assume both F and D extensions */ target_ulong frm; + float_status fp_status; target_ulong badaddr; target_ulong bins; @@ -372,8 +374,6 @@ struct CPUArchState { target_ulong cur_pmmask; target_ulong cur_pmbase; - float_status fp_status; - /* Fields from here on are preserved across CPU reset. */ QEMUTimer *stimer; /* Internal timer for S-mode interrupt */ QEMUTimer *vstimer; /* Internal timer for VS-mode interrupt */ From patchwork Sat Dec 17 17:29:05 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 634856 Delivered-To: patch@linaro.org Received: by 2002:a17:522:c983:b0:460:3032:e3c4 with SMTP id kr3csp1464938pvb; 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Signed-off-by: Philippe Mathieu-Daudé --- target/riscv/cpu.h | 17 ++++++++++------- 1 file changed, 10 insertions(+), 7 deletions(-) diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h index 05fafebff7..71ea1bb411 100644 --- a/target/riscv/cpu.h +++ b/target/riscv/cpu.h @@ -370,7 +370,7 @@ struct CPUArchState { uint64_t menvcfg; target_ulong senvcfg; uint64_t henvcfg; -#endif + target_ulong cur_pmmask; target_ulong cur_pmbase; @@ -388,6 +388,7 @@ struct CPUArchState { uint64_t kvm_timer_compare; uint64_t kvm_timer_state; uint64_t kvm_timer_frequency; +#endif }; OBJECT_DECLARE_CPU_TYPE(RISCVCPU, RISCVCPUClass, RISCV_CPU) @@ -553,12 +554,20 @@ bool riscv_cpu_virt_enabled(CPURISCVState *env); void riscv_cpu_set_virt_enabled(CPURISCVState *env, bool enable); bool riscv_cpu_two_stage_lookup(int mmu_idx); int riscv_cpu_mmu_index(CPURISCVState *env, bool ifetch); +#ifndef CONFIG_USER_ONLY +hwaddr riscv_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr); G_NORETURN void riscv_cpu_do_unaligned_access(CPUState *cs, vaddr addr, MMUAccessType access_type, int mmu_idx, uintptr_t retaddr); bool riscv_cpu_tlb_fill(CPUState *cs, vaddr address, int size, MMUAccessType access_type, int mmu_idx, bool probe, uintptr_t retaddr); +void riscv_cpu_do_transaction_failed(CPUState *cs, hwaddr physaddr, + vaddr addr, unsigned size, + MMUAccessType access_type, + int mmu_idx, MemTxAttrs attrs, + MemTxResult response, uintptr_t retaddr); +#endif char *riscv_isa_string(RISCVCPU *cpu); void riscv_cpu_list(void); @@ -566,12 +575,6 @@ void riscv_cpu_list(void); #define cpu_mmu_index riscv_cpu_mmu_index #ifndef CONFIG_USER_ONLY -void riscv_cpu_do_transaction_failed(CPUState *cs, hwaddr physaddr, - vaddr addr, unsigned size, - MMUAccessType access_type, - int mmu_idx, MemTxAttrs attrs, - MemTxResult response, uintptr_t retaddr); -hwaddr riscv_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr); bool riscv_cpu_exec_interrupt(CPUState *cs, int interrupt_request); void riscv_cpu_swap_hypervisor_regs(CPURISCVState *env); int riscv_cpu_claim_interrupts(RISCVCPU *cpu, uint64_t interrupts); From patchwork Sat Dec 17 17:29:06 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 634863 Delivered-To: patch@linaro.org Received: by 2002:a17:522:c983:b0:460:3032:e3c4 with SMTP id kr3csp1466663pvb; Sat, 17 Dec 2022 09:34:49 -0800 (PST) X-Google-Smtp-Source: AA0mqf6Ajji7lAioxhpu+RrNMB0qVlksCFQCeIUDydkC++jwLsH6ETy9sE+PGSKco4QugBTayVEb X-Received: by 2002:a05:622a:1b14:b0:3a7:e9dc:699d with SMTP id bb20-20020a05622a1b1400b003a7e9dc699dmr51793799qtb.20.1671298489294; Sat, 17 Dec 2022 09:34:49 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1671298489; cv=none; d=google.com; s=arc-20160816; b=g/G2F2XH3m3fNo3wQkYjzDb43Z0HRRiRSWp/PStgiRHpxGs3Bfu8f3X3m0dE78Kghg RlhWWUz7WpwYA3c626HSGBkmzZem3SQVdJmX4M49rbMaytbglRRsU2QrfLqIAmEkeYzr fwqfOxa5VuV7gPiEcXe8AVGmvJwhZqzCzmD8CJh39ibiX6JPmdXz2uUHDVr0HGxAp5Lc CrGnASZiTxDgPtozjXITwIZ1RtpD65iY+v8kz77phwFsISWl8YgkdGee2dwQgvTne7XT aXz58/BkFmcEuYdIedcLrifOkox81aUbJ2f7h9pZv2ADogIiImBNNQK6MFY6UDvbsBC+ 2xvw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=wk4kZcMMisFWgQ9gHzikpbBAxoBtm1ZzojbUpYahP3s=; b=DEb5hCQ+zQCFRazp3cEjbKXvVATUHvQowIUSpa5GAwJvIFamQjn8sE7u7gcAOzg/g4 Zio3adXYlHev67I1Gkj9CLlyyayZmTxphb8lstQdIpo4JQgVaPjytmTg4J/YKUKyQYa0 5BNqVsnWv5iO+FpoNYTA4XUS6O3w/QA7PlwfJJLk/+9gYrhYLXHiuk/WSPSxoLAEq8Kj scI+UKYRMaVLucniQO3aYQayqWre8sHceWL8Q8QmCSoE1jVhI9XIrOLEkY78arMNbI7w 2/8LWw2VkfdrypI24E0oDkL5jXrt3PAyf7G5td718yV0DCu0o4Bif/Y4/2ZkCVduT1mx leFQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=FImUCwLo; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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Checking whether CONFIG_USER_ONLY is defined is now pointless. Reviewed-by: Richard Henderson Signed-off-by: Philippe Mathieu-Daudé --- target/sparc/mmu_helper.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/target/sparc/mmu_helper.c b/target/sparc/mmu_helper.c index 919448a494..a7e51e4b7d 100644 --- a/target/sparc/mmu_helper.c +++ b/target/sparc/mmu_helper.c @@ -924,7 +924,6 @@ hwaddr sparc_cpu_get_phys_page_debug(CPUState *cs, vaddr addr) return phys_addr; } -#ifndef CONFIG_USER_ONLY G_NORETURN void sparc_cpu_do_unaligned_access(CPUState *cs, vaddr addr, MMUAccessType access_type, int mmu_idx, @@ -942,4 +941,3 @@ G_NORETURN void sparc_cpu_do_unaligned_access(CPUState *cs, vaddr addr, cpu_raise_exception_ra(env, TT_UNALIGNED, retaddr); } -#endif /* !CONFIG_USER_ONLY */ From patchwork Sat Dec 17 17:29:07 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 634859 Delivered-To: patch@linaro.org Received: by 2002:a17:522:c983:b0:460:3032:e3c4 with SMTP id kr3csp1465513pvb; Sat, 17 Dec 2022 09:31:59 -0800 (PST) X-Google-Smtp-Source: AMrXdXukKp9kxZxDMzXbnr4M7JNCAy+mSndn6A6Qmkh/Ew1D7NIctH/8LWvLhP6//dfBNK6FVKs3 X-Received: by 2002:ac8:44a1:0:b0:3a9:7782:fd69 with SMTP id a1-20020ac844a1000000b003a97782fd69mr7841169qto.14.1671298318905; Sat, 17 Dec 2022 09:31:58 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1671298318; cv=none; d=google.com; s=arc-20160816; b=Yn/vDCHu2eVqSV3/1EjHjBEKOf88A2T2dVl4tYOk4JlWdB9X1/VyHco94F3tHL5r9r sEx8QI/vk44ZJDj0N4Qv7OywpEzcSW2VuOMh1Of+CvPjplcJYuehxAF8usIam/PwnoHL sJwZFYr12mVxlOOV63CbvfKGXeZWLLOl1igQTUNGMlgC+Nq5WKSUA6FrTMOqJ7cXf/WI tbq14XYJUHG4TWYOZ1vRJj2do1h76vewi1XG8t33hM/FSwB2w00BwglTUIsPgX7PAkrz RJHidJvf/4wBXqqULG9WAKUXj9RC3ReJ+qUhu/+8C9exGF3E34VPiGZZbLLCzmNyYS6e sOCQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=8puYA5pXfRf+1sAx/YhGhz4X/7vHxWP4eF1HMLfQ/pg=; b=hHfMIINHnuvx4Re7R7nZ/jpooZgZtiOZm9A/bAEOjpBPium8+sV3x8o1JGZnFQXIrA 9S5yT3QYxdHFeEnw22Xp5cPOaifM2g/onl5vjH+WrTfvgHlwEgI8O6zDMu0mrgL28Hex rgo+k26FMsJtLQq+FO3xiyPLNd1kqwMriMukmo21gSp7emIPH8pkWgPV9Pm++45z0IIh koGOkSTIGJppBQAWxvMxSmO4MLWIGM2QyEvts+GEYFfpPTnm7gt4aJNDSEPDuSbKRnaR RXrqhQ61W8S+IugLzkM61AgEUapF39e2HSOyZow8/8X1dHCojcdMcq9D7quUFVeS1lp/ dgaQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=exXqxUsz; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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Reviewed-by: Richard Henderson Signed-off-by: Philippe Mathieu-Daudé --- target/xtensa/cpu.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/target/xtensa/cpu.c b/target/xtensa/cpu.c index 09923301c4..879710f8d1 100644 --- a/target/xtensa/cpu.c +++ b/target/xtensa/cpu.c @@ -35,6 +35,9 @@ #include "qemu/module.h" #include "migration/vmstate.h" #include "hw/qdev-clock.h" +#ifndef CONFIG_USER_ONLY +#include "exec/memory.h" +#endif static void xtensa_cpu_set_pc(CPUState *cs, vaddr value)