From patchwork Wed Dec 28 08:40:13 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 637326 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id BF584C54E76 for ; Wed, 28 Dec 2022 08:41:24 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232659AbiL1IlW (ORCPT ); Wed, 28 Dec 2022 03:41:22 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45528 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232542AbiL1IlB (ORCPT ); Wed, 28 Dec 2022 03:41:01 -0500 Received: from mail-pj1-x1032.google.com (mail-pj1-x1032.google.com [IPv6:2607:f8b0:4864:20::1032]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8E095FCD6 for ; Wed, 28 Dec 2022 00:40:58 -0800 (PST) Received: by mail-pj1-x1032.google.com with SMTP id h7-20020a17090aa88700b00225f3e4c992so6833622pjq.1 for ; Wed, 28 Dec 2022 00:40:58 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=vCj+eIEQcGnCqPz5ZSYr2aqyU+fsKL7bkSmfajhhbqw=; b=nh2vLpwyk3i88WoIGebvO24ZIfmBo4MbWEQ6zxuAbkNK1NrDjWdFI86Gl3KuTu8FhX Xjn+T0h/F2Lfn0tplbrQ8HWX7xQNWNVdLvpwiWiaXj35ObByDxpDboqqrsFziQ48gT3J 3U6eDfFSVG+YnqoW9rsNzkHJC+y4Qh2RAqzahA0tyxzuwsfLYL4Zp4O9ClzJ/11yeHyi QT2rao1/GsGNKxrhUlOZ5VBOwR3ZWL5o45/HllyRKOxd9UIwJMjC8opDVo1A9IX/7ZZI q+CIbj5C6ZgC+mYFKIS8t/3vHMGItPKkjknzYzAQhY7oD7LKpoBXCODrqDQshw64AoR1 QU3A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=vCj+eIEQcGnCqPz5ZSYr2aqyU+fsKL7bkSmfajhhbqw=; b=px1akHQIwZPI/k8U4ximo2UpeenIb27DCHiOMBfzd7gTO5fOgeJAJjH7uYD6t0UmUh swmYtHCzFLeG+JZK8XoY0ivZo1XhbuUiZ6z3cAeQAZE9YN3z4y3RpwnM46/fVZvE8jSb WHB5XV+F4qYToHNsMSNqO2tVqAdKTu8v+CFDPyQa7pfKVWFVMD+zVfN9cX39V5MaKSE+ mE2RlEVmZv2HfmGKGNyEjxBRO90wvQmJA2do9c+QD2sClNn2VJtcNzsss4BVRHAw6SaJ IW/37WoZgkxevt0zXHghOIlBLeS8baQFxBlJTtuY9FrFmWcW62naHWa+ZUeWipCvv0X1 U71w== X-Gm-Message-State: AFqh2kpY+tKWAeZ6ewWQ6LUc8oh5W1KLIK3qomXRye50PPZY3bu7ZbTC metRwJCGFvoiJmAqfJ5dMyIm X-Google-Smtp-Source: AMrXdXsnwu5WJi7+TnEJGtUOAUs6sawZwL2+5ZpDVe0Me44zOkwKOHWhKRKZnSS4aAi1PXOTzEhT4Q== X-Received: by 2002:a05:6a20:1455:b0:ae:661c:5553 with SMTP id a21-20020a056a20145500b000ae661c5553mr36999595pzi.4.1672216858060; Wed, 28 Dec 2022 00:40:58 -0800 (PST) Received: from localhost.localdomain ([117.217.178.73]) by smtp.gmail.com with ESMTPSA id d188-20020a6236c5000000b0057a9b146592sm9786286pfa.186.2022.12.28.00.40.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 28 Dec 2022 00:40:57 -0800 (PST) From: Manivannan Sadhasivam To: andersson@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, bp@alien8.de, tony.luck@intel.com Cc: quic_saipraka@quicinc.com, konrad.dybcio@linaro.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, james.morse@arm.com, mchehab@kernel.org, rric@kernel.org, linux-edac@vger.kernel.org, quic_ppareek@quicinc.com, luca.weiss@fairphone.com, ahalaney@redhat.com, steev@kali.org, Manivannan Sadhasivam Subject: [PATCH v5 02/17] EDAC/qcom: Add platform_device_id table for module autoloading Date: Wed, 28 Dec 2022 14:10:13 +0530 Message-Id: <20221228084028.46528-3-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221228084028.46528-1-manivannan.sadhasivam@linaro.org> References: <20221228084028.46528-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org platform_device_id table needs to be added so that the driver can be autoloaded when the associated platform device gets registered. Tested-by: Steev Klimaszewski # Thinkpad X13s Tested-by: Andrew Halaney # sa8540p-ride Reported-by: Andrew Halaney Signed-off-by: Manivannan Sadhasivam --- drivers/edac/qcom_edac.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/drivers/edac/qcom_edac.c b/drivers/edac/qcom_edac.c index 97a27e42dd61..9e77fa84e84f 100644 --- a/drivers/edac/qcom_edac.c +++ b/drivers/edac/qcom_edac.c @@ -397,12 +397,19 @@ static int qcom_llcc_edac_remove(struct platform_device *pdev) return 0; } +static const struct platform_device_id qcom_llcc_edac_id_table[] = { + { .name = "qcom_llcc_edac" }, + {} +}; +MODULE_DEVICE_TABLE(platform, qcom_llcc_edac_id_table); + static struct platform_driver qcom_llcc_edac_driver = { .probe = qcom_llcc_edac_probe, .remove = qcom_llcc_edac_remove, .driver = { .name = "qcom_llcc_edac", }, + .id_table = qcom_llcc_edac_id_table, }; module_platform_driver(qcom_llcc_edac_driver); From patchwork Wed Dec 28 08:40:15 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 637325 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 44C99C4332F for ; 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Wed, 28 Dec 2022 00:41:12 -0800 (PST) From: Manivannan Sadhasivam To: andersson@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, bp@alien8.de, tony.luck@intel.com Cc: quic_saipraka@quicinc.com, konrad.dybcio@linaro.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, james.morse@arm.com, mchehab@kernel.org, rric@kernel.org, linux-edac@vger.kernel.org, quic_ppareek@quicinc.com, luca.weiss@fairphone.com, ahalaney@redhat.com, steev@kali.org, Manivannan Sadhasivam , Krzysztof Kozlowski Subject: [PATCH v5 04/17] dt-bindings: arm: msm: Update the maintainers for LLCC Date: Wed, 28 Dec 2022 14:10:15 +0530 Message-Id: <20221228084028.46528-5-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221228084028.46528-1-manivannan.sadhasivam@linaro.org> References: <20221228084028.46528-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Rishabh Bhatnagar has left Qualcomm, and there is no evidence of him maintaining with a new identity. So his entry needs to be removed. Also, Sai Prakash Ranjan's email address should be updated to use quicinc domain. Cc: Sai Prakash Ranjan Acked-by: Sai Prakash Ranjan Acked-by: Krzysztof Kozlowski Signed-off-by: Manivannan Sadhasivam --- Documentation/devicetree/bindings/arm/msm/qcom,llcc.yaml | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/arm/msm/qcom,llcc.yaml b/Documentation/devicetree/bindings/arm/msm/qcom,llcc.yaml index 38efcad56dbd..d1df49ffcc1b 100644 --- a/Documentation/devicetree/bindings/arm/msm/qcom,llcc.yaml +++ b/Documentation/devicetree/bindings/arm/msm/qcom,llcc.yaml @@ -7,8 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# title: Last Level Cache Controller maintainers: - - Rishabh Bhatnagar - - Sai Prakash Ranjan + - Sai Prakash Ranjan description: | LLCC (Last Level Cache Controller) provides last level of cache memory in SoC, From patchwork Wed Dec 28 08:40:17 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 637324 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E6FC4C46467 for ; Wed, 28 Dec 2022 08:42:21 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232499AbiL1ImU (ORCPT ); Wed, 28 Dec 2022 03:42:20 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46472 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229912AbiL1Ilp (ORCPT ); Wed, 28 Dec 2022 03:41:45 -0500 Received: from mail-pf1-x42f.google.com (mail-pf1-x42f.google.com [IPv6:2607:f8b0:4864:20::42f]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id F2ADDFD14 for ; Wed, 28 Dec 2022 00:41:28 -0800 (PST) Received: by mail-pf1-x42f.google.com with SMTP id z7so4626466pfq.13 for ; Wed, 28 Dec 2022 00:41:28 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=e9QXXi64w5AkU0+SlZ8zyP2UpGIuUHr0Btt1KBRAP8A=; b=IvF0oXD98yyBIqJq+91laACS5kfVQK2q412wkuezxYCvLA0lRlwFwYxUfpurelPzpr xcHz5E9MOKe5LT4ggXttZ6W+FX0gMgXwGfz4TDWCHwDy7BGGlhn67taNPTvntvbk38t1 I8k2KnjjDamTOPL8uNTa2Jbxkrqv0Gti3JuhM+YvJTjm/U4kCZgfzZiz0eUSytiPx4uo PE0jeUZg0G25Dg8dQRgGQX7fT0+v69nM7x35iibVLlfaxLQtedX8JDseRMh7kN4Si/WZ Em3B54menA+Q92ONQkA9iJiloH/RbU5kjuj1ewOxyP5Lr+xFGibrFacCQUc5MYjn8iI8 eTKw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=e9QXXi64w5AkU0+SlZ8zyP2UpGIuUHr0Btt1KBRAP8A=; b=UZmjjairUmdDpjesSZs8xJA1FGmKgkb85hrm3swBlbU79HKW5zwmjMcHZ5YlJ0XWmL G8bhFCsGzuqDQB4nN6GzK00pAKyJyM/S5dzfoDMvSUOOklj3MKhfj0S8yKdtyAIyRleP 5kkzgRGAc6wiyUmPaWDwGY2C0xFEk1qXi39he4RdDMF85kgcfZVk2tF3ZbVSW/ApZSCh h/ArbJrL0eLfteRLS5LYyLwsubTVzy8GdLVRJT7nK1vqxCWRRDW7aTHooIrg51fTBfNU YeBW2LWYYivtojhpjEaPKRDTiBKJM51zFp/6o31PUylQ5ukmjv2npnvvP2QtlQ7m1M7H /n2g== X-Gm-Message-State: AFqh2kpx7RpQMnbJQbNywCeanhUweFBbgayw4+EUd8aQnhcJUwCTK6SK 5wHIp6UK4rTW2wxefwV6ciwr X-Google-Smtp-Source: AMrXdXtlsfFLE8Oyyf/2hwR+62V2eL//nmMUWLdt1iOWVVGNeRPnx2Wie08yHGNPwOCkqf08JFraOg== X-Received: by 2002:a62:f20f:0:b0:56b:b890:6ccd with SMTP id m15-20020a62f20f000000b0056bb8906ccdmr24974575pfh.4.1672216888505; Wed, 28 Dec 2022 00:41:28 -0800 (PST) Received: from localhost.localdomain ([117.217.178.73]) by smtp.gmail.com with ESMTPSA id d188-20020a6236c5000000b0057a9b146592sm9786286pfa.186.2022.12.28.00.41.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 28 Dec 2022 00:41:27 -0800 (PST) From: Manivannan Sadhasivam To: andersson@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, bp@alien8.de, tony.luck@intel.com Cc: quic_saipraka@quicinc.com, konrad.dybcio@linaro.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, james.morse@arm.com, mchehab@kernel.org, rric@kernel.org, linux-edac@vger.kernel.org, quic_ppareek@quicinc.com, luca.weiss@fairphone.com, ahalaney@redhat.com, steev@kali.org, Manivannan Sadhasivam Subject: [PATCH v5 06/17] arm64: dts: qcom: sdm845: Fix the base addresses of LLCC banks Date: Wed, 28 Dec 2022 14:10:17 +0530 Message-Id: <20221228084028.46528-7-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221228084028.46528-1-manivannan.sadhasivam@linaro.org> References: <20221228084028.46528-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org The LLCC block has several banks each with a different base address and holes in between. So it is not a correct approach to cover these banks with a single offset/size. Instead, the individual bank's base address needs to be specified in devicetree with the exact size. On SDM845, the size of the LLCC bank 0 needs to be reduced to 0x4500 as there are LLCC BWMON registers located after this range. Reported-by: Parikshit Pareek Signed-off-by: Manivannan Sadhasivam --- arch/arm64/boot/dts/qcom/sdm845.dtsi | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi index 65032b94b46d..4db68d4d78df 100644 --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi @@ -2132,8 +2132,11 @@ uart15: serial@a9c000 { llcc: system-cache-controller@1100000 { compatible = "qcom,sdm845-llcc"; - reg = <0 0x01100000 0 0x31000>, <0 0x01300000 0 0x50000>; - reg-names = "llcc_base", "llcc_broadcast_base"; + reg = <0 0x01100000 0 0x45000>, <0 0x01180000 0 0x50000>, + <0 0x01200000 0 0x50000>, <0 0x01280000 0 0x50000>, + <0 0x01300000 0 0x50000>; + reg-names = "llcc0_base", "llcc1_base", "llcc2_base", + "llcc3_base", "llcc_broadcast_base"; interrupts = ; }; From patchwork Wed Dec 28 08:40:19 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 637323 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id DAB4DC4332F for ; Wed, 28 Dec 2022 08:42:58 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229912AbiL1Im6 (ORCPT ); Wed, 28 Dec 2022 03:42:58 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46566 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232629AbiL1ImU (ORCPT ); Wed, 28 Dec 2022 03:42:20 -0500 Received: from mail-pf1-x435.google.com (mail-pf1-x435.google.com [IPv6:2607:f8b0:4864:20::435]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 41F7C101CC for ; Wed, 28 Dec 2022 00:41:44 -0800 (PST) Received: by mail-pf1-x435.google.com with SMTP id w26so10304700pfj.6 for ; Wed, 28 Dec 2022 00:41:44 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=u3b0H9FlwI0cHeu/QvvhJdFruV0iaHa3piiWtATy1Lw=; b=kBSZ1t+GTRC3OHYUNF4styvFpo4TJhUf7z0CDD6j4ujk5g/Q1WobBQMKCew6VXvXgz G5xfkeHZg6fNcOtQ1KlMJ4MNYlCqLZEMDh6v9C82kmMm+/mVieUTsa2mNKm7HwyunWd1 fuKyz2/kC/m3F90TkIKQT6YdZhLZhStrZMS/yu6fI5HlpLMf25y0LsYVQgEhhEc9FMqc N7nWQcFfoyBjfZ1VnltBlKWPYQm2JiySPE0iwyBX0vrldan/S5JtrM3KqhJksBJbWXqQ r5CmWllE3nKhCut7+hyjPUQEArO0Ux4YOWBf1gJCZgek2o+arIa6CqOWQotrkvySua4v FsCw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=u3b0H9FlwI0cHeu/QvvhJdFruV0iaHa3piiWtATy1Lw=; b=GSX/DGqEnaVUlBYl+J8zi3ZT5/jxTtAeR4dpnX8wyQOzX2eu6FP/Rc812VAYa7a/IA w01oC1VpiKQ9EzW1c9OC9XzAWmm/5Th3eJNPmf9I9V3dx6SASt2oYhgtzBz1JXqW1puK t9qHFrlslzENjCJV5Pwo0zOQQM9R4b5BFlc4MgoYPPeZuArPV42+s1ngkfBjiopG3ton vGd4pt13Ai0kxxLk70Erp1lLZUc1FkIOpn+m8VUUrRXaC+Itdhsd1AjklxEtZXy7Cz08 eDoNnHBrBlnHC1TjAYkGiZaMWyfhJLhm00bkcD9CWNRRgF8Eu1jmpoQRXStLoFFIH5Xf Zn6g== X-Gm-Message-State: AFqh2kphuKz0GC0ZEl6s6cSC75hAO5nYd9RbR/8lfs9kp2pl6M9dLHFU EBNLN+4xhOWj9h7C+RC0wsq9 X-Google-Smtp-Source: AMrXdXt3wEnaBxmKKc+THXJmZZQodrKRWEZGxG+TcvQ9deo7zYP1wV+ItZNcl0gY5TwuRP/6CiAjzA== X-Received: by 2002:aa7:9290:0:b0:580:c8a1:70c4 with SMTP id j16-20020aa79290000000b00580c8a170c4mr14887725pfa.29.1672216903726; Wed, 28 Dec 2022 00:41:43 -0800 (PST) Received: from localhost.localdomain ([117.217.178.73]) by smtp.gmail.com with ESMTPSA id d188-20020a6236c5000000b0057a9b146592sm9786286pfa.186.2022.12.28.00.41.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 28 Dec 2022 00:41:42 -0800 (PST) From: Manivannan Sadhasivam To: andersson@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, bp@alien8.de, tony.luck@intel.com Cc: quic_saipraka@quicinc.com, konrad.dybcio@linaro.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, james.morse@arm.com, mchehab@kernel.org, rric@kernel.org, linux-edac@vger.kernel.org, quic_ppareek@quicinc.com, luca.weiss@fairphone.com, ahalaney@redhat.com, steev@kali.org, Manivannan Sadhasivam Subject: [PATCH v5 08/17] arm64: dts: qcom: sc7280: Fix the base addresses of LLCC banks Date: Wed, 28 Dec 2022 14:10:19 +0530 Message-Id: <20221228084028.46528-9-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221228084028.46528-1-manivannan.sadhasivam@linaro.org> References: <20221228084028.46528-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org The LLCC block has several banks each with a different base address and holes in between. So it is not a correct approach to cover these banks with a single offset/size. Instead, the individual bank's base address needs to be specified in devicetree with the exact size. While at it, let's also fix the size of the llcc_broadcast_base to cover the whole region. Reported-by: Parikshit Pareek Signed-off-by: Manivannan Sadhasivam --- arch/arm64/boot/dts/qcom/sc7280.dtsi | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi index 0adf13399e64..6c6eb6f4f650 100644 --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi @@ -3579,8 +3579,9 @@ gem_noc: interconnect@9100000 { system-cache-controller@9200000 { compatible = "qcom,sc7280-llcc"; - reg = <0 0x09200000 0 0xd0000>, <0 0x09600000 0 0x50000>; - reg-names = "llcc_base", "llcc_broadcast_base"; + reg = <0 0x09200000 0 0x58000>, <0 0x09280000 0 0x58000>, + <0 0x09600000 0 0x58000>; + reg-names = "llcc0_base", "llcc1_base", "llcc_broadcast_base"; interrupts = ; }; From patchwork Wed Dec 28 08:40:21 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 637322 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B9882C46467 for ; Wed, 28 Dec 2022 08:43:19 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232874AbiL1InS (ORCPT ); Wed, 28 Dec 2022 03:43:18 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45540 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232822AbiL1Imv (ORCPT ); Wed, 28 Dec 2022 03:42:51 -0500 Received: from mail-pj1-x1032.google.com (mail-pj1-x1032.google.com [IPv6:2607:f8b0:4864:20::1032]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4C4AAB52 for ; Wed, 28 Dec 2022 00:41:59 -0800 (PST) Received: by mail-pj1-x1032.google.com with SMTP id m7-20020a17090a730700b00225ebb9cd01so7564534pjk.3 for ; Wed, 28 Dec 2022 00:41:59 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=7WUljA05hxjrMgWInu+aANTEuP2TXhzChwqlFzG2wks=; b=YbRaJdKTjanKozZ9jibrWhveX5ctEFNkLx+F0Oa42QvbwyxD6ZLBU8UUZA7DFhvKhY mBGdAIrXoriXn5vAyZdODH0VG4OpyPkvIDDw1nNnfmEKmx4ak9mEn1kd931+EnbkXrnk hMjt7Kos6E23YPkKrviHBbwQ4tqcQyA9Q6zc3IMkPL0Hexc26EAq7tn/kEj03cPe/pu6 Nrwy6KcprdjCHevGZ5/F8tpfywa846CpI4sFNSBPHY/XcxKSVQ8Cncqs43kbWYMxrq5d WjV9TUYi7ynmn0t8KGDKlAo+MTr1OlBrgUCwKVODXiYULSnFk/Eq1jPAe3rOrcFdPO7G wwmw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=7WUljA05hxjrMgWInu+aANTEuP2TXhzChwqlFzG2wks=; b=l8jTdwOc6OJoodt28QIsTY7eLaM/Zc5lDoKTzlP3auAk5w8g7Ko7ld8lmBSLj8hYwe 3LtJ/EqAS/Z0k7ebU58Mur8S0iwBju8DsIQXDKLzWGeeHuro/T7VYP7pWfaraWXD2K4P hz3srvGXBv7Jwi1rezNkiSIiliHaNrKEojoteHlzfenZcIr0w+UCBzKom2d1ML8wXMuh z9vnFFC+RUycyoReGm8+vmgBVZ8YCakFQxEqTz2DFnz/EULD3P50pVlPGw/Cr+U2uqYi Cfk7b3PwI8CCyiDpdvtpwpzdB4vPUUlPkQGKLyuVLs4o7mTtBAZigc0i8tCtK6TamMhZ BWFA== X-Gm-Message-State: AFqh2kqWt/ZxAFOLUZJ+0JN39uwLoMRabyeXl57ikeANIrZ5ScRsyKbN BlfNaHeXgA/lYl+A9n6pUfnI X-Google-Smtp-Source: AMrXdXtZk6AwBn/gE/Qd6zoDfLS2rMhntnEviK9TyJo7SxfSdFi0mJohahvst5pggXiK2hSVI7uQFw== X-Received: by 2002:a05:6a20:bf29:b0:a5:df86:f2b4 with SMTP id gc41-20020a056a20bf2900b000a5df86f2b4mr25040116pzb.58.1672216918839; Wed, 28 Dec 2022 00:41:58 -0800 (PST) Received: from localhost.localdomain ([117.217.178.73]) by smtp.gmail.com with ESMTPSA id d188-20020a6236c5000000b0057a9b146592sm9786286pfa.186.2022.12.28.00.41.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 28 Dec 2022 00:41:57 -0800 (PST) From: Manivannan Sadhasivam To: andersson@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, bp@alien8.de, tony.luck@intel.com Cc: quic_saipraka@quicinc.com, konrad.dybcio@linaro.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, james.morse@arm.com, mchehab@kernel.org, rric@kernel.org, linux-edac@vger.kernel.org, quic_ppareek@quicinc.com, luca.weiss@fairphone.com, ahalaney@redhat.com, steev@kali.org, Manivannan Sadhasivam Subject: [PATCH v5 10/17] arm64: dts: qcom: sm8150: Fix the base addresses of LLCC banks Date: Wed, 28 Dec 2022 14:10:21 +0530 Message-Id: <20221228084028.46528-11-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221228084028.46528-1-manivannan.sadhasivam@linaro.org> References: <20221228084028.46528-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org The LLCC block has several banks each with a different base address and holes in between. So it is not a correct approach to cover these banks with a single offset/size. Instead, the individual bank's base address needs to be specified in devicetree with the exact size. Reported-by: Parikshit Pareek Signed-off-by: Manivannan Sadhasivam --- arch/arm64/boot/dts/qcom/sm8150.dtsi | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi index a0c57fb798d3..7fd2291b2638 100644 --- a/arch/arm64/boot/dts/qcom/sm8150.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi @@ -1762,8 +1762,11 @@ mmss_noc: interconnect@1740000 { system-cache-controller@9200000 { compatible = "qcom,sm8150-llcc"; - reg = <0 0x09200000 0 0x200000>, <0 0x09600000 0 0x50000>; - reg-names = "llcc_base", "llcc_broadcast_base"; + reg = <0 0x09200000 0 0x50000>, <0 0x09280000 0 0x50000>, + <0 0x09300000 0 0x50000>, <0 0x09380000 0 0x50000>, + <0 0x09600000 0 0x50000>; + reg-names = "llcc0_base", "llcc1_base", "llcc2_base", + "llcc3_base", "llcc_broadcast_base"; interrupts = ; }; From patchwork Wed Dec 28 08:40:23 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 637321 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7BEA3C46467 for ; Wed, 28 Dec 2022 08:43:44 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232675AbiL1Inm (ORCPT ); Wed, 28 Dec 2022 03:43:42 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45612 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232495AbiL1InH (ORCPT ); Wed, 28 Dec 2022 03:43:07 -0500 Received: from mail-pg1-x52e.google.com (mail-pg1-x52e.google.com [IPv6:2607:f8b0:4864:20::52e]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0F3881004B for ; Wed, 28 Dec 2022 00:42:14 -0800 (PST) Received: by mail-pg1-x52e.google.com with SMTP id r18so10174608pgr.12 for ; Wed, 28 Dec 2022 00:42:14 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=sMev9I+ZdryrTBjzJ8tiTgJp1UwzDLK7UbgCFoQvzyA=; b=hy4nC4E4al+dabRomp+OPrVVRBkiPqSdQSNvbzvr0h9pg+JqKsvvABpx/N94VxyQKO 4Fc9F9yhAarvh4qVPjwL49Va/Ac8LACS+2UrPgzNKEoRKEyei1Ug5YubxpWyOCNIadU0 uNwihQdr3mimAIBAXbUNUpnJAQ3Y7Y3DNCDiyAGV3QW14AYYG8Uk4fFWlFj05fBMMT2j apC3V24LXwNTLaQgHg3JUOn0541oMPFbmXp44QRI3TXZ6t7oANDyGRU/cIhzgWytqQ6V qRBmMAyP9p4ZxshXyE9BgRIAbMua0AaTzPpsNoNvYI2J1hHHpkpHBbXfo/9019QWhk3C A90g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=sMev9I+ZdryrTBjzJ8tiTgJp1UwzDLK7UbgCFoQvzyA=; b=v3d3/L/IPW/sS80XXRujZs+v8gG6mBF3TCAuNOg09fZ60+AgkTUcO4F0qXrZvOQ1p3 P4s9xRwRDq3C6+46F/yjEiUU81vizUigfVGXDUdBzhwomRt32YhMykAhhDsLq9PoW2Z3 XjzZdU9q9ABV8L9SVNZyd6vSQdFarOFcIjiKf38sP8h2crB3gVFJXdTQj3iamOKdco8B l8GoWGJMhV7YQmHwN2LjuS1RdwnbRLDcnrkBoQUGc9PHvGrBQdNrHi3yt33mVvqfT08D xKsFvQIqGLJ33fDke90afkbZPPuB8jq08x9eRW9QWKZPnAlJNs62qKif+Gyo2cl+CAd+ Fo9g== X-Gm-Message-State: AFqh2kr6qu8dU6karqnI3qjaj1iH5HKgQCLq9IJ3gD2W4z0yvYtH3lzi FbVnQ7S3qMLbOk0Kfr5yY4K1 X-Google-Smtp-Source: AMrXdXsdA71Nl1ydxefCHwsDLE8v0TrPoU4ByklG2203hhg+wQHNjtGUxESyx7kelBtm4Aeie4h7LA== X-Received: by 2002:a62:1c84:0:b0:576:e4c7:97bf with SMTP id c126-20020a621c84000000b00576e4c797bfmr24944004pfc.15.1672216933591; Wed, 28 Dec 2022 00:42:13 -0800 (PST) Received: from localhost.localdomain ([117.217.178.73]) by smtp.gmail.com with ESMTPSA id d188-20020a6236c5000000b0057a9b146592sm9786286pfa.186.2022.12.28.00.42.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 28 Dec 2022 00:42:12 -0800 (PST) From: Manivannan Sadhasivam To: andersson@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, bp@alien8.de, tony.luck@intel.com Cc: quic_saipraka@quicinc.com, konrad.dybcio@linaro.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, james.morse@arm.com, mchehab@kernel.org, rric@kernel.org, linux-edac@vger.kernel.org, quic_ppareek@quicinc.com, luca.weiss@fairphone.com, ahalaney@redhat.com, steev@kali.org, Manivannan Sadhasivam Subject: [PATCH v5 12/17] arm64: dts: qcom: sm8350: Fix the base addresses of LLCC banks Date: Wed, 28 Dec 2022 14:10:23 +0530 Message-Id: <20221228084028.46528-13-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221228084028.46528-1-manivannan.sadhasivam@linaro.org> References: <20221228084028.46528-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org The LLCC block has several banks each with a different base address and holes in between. So it is not a correct approach to cover these banks with a single offset/size. Instead, the individual bank's base address needs to be specified in devicetree with the exact size. Reported-by: Parikshit Pareek Signed-off-by: Manivannan Sadhasivam --- arch/arm64/boot/dts/qcom/sm8350.dtsi | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sm8350.dtsi b/arch/arm64/boot/dts/qcom/sm8350.dtsi index 245dce24ec59..836732d16635 100644 --- a/arch/arm64/boot/dts/qcom/sm8350.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8350.dtsi @@ -2513,8 +2513,11 @@ gem_noc: interconnect@9100000 { system-cache-controller@9200000 { compatible = "qcom,sm8350-llcc"; - reg = <0 0x09200000 0 0x1d0000>, <0 0x09600000 0 0x50000>; - reg-names = "llcc_base", "llcc_broadcast_base"; + reg = <0 0x09200000 0 0x58000>, <0 0x09280000 0 0x58000>, + <0 0x09300000 0 0x58000>, <0 0x09380000 0 0x58000>, + <0 0x09600000 0 0x58000>; + reg-names = "llcc0_base", "llcc1_base", "llcc2_base", + "llcc3_base", "llcc_broadcast_base"; }; usb_1: usb@a6f8800 { From patchwork Wed Dec 28 08:40:25 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 637320 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 74BF9C4332F for ; Wed, 28 Dec 2022 08:43:51 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232761AbiL1Int (ORCPT ); Wed, 28 Dec 2022 03:43:49 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45916 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232721AbiL1InM (ORCPT ); Wed, 28 Dec 2022 03:43:12 -0500 Received: from mail-pj1-x102e.google.com (mail-pj1-x102e.google.com [IPv6:2607:f8b0:4864:20::102e]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4E896FCD9 for ; Wed, 28 Dec 2022 00:42:29 -0800 (PST) Received: by mail-pj1-x102e.google.com with SMTP id o31-20020a17090a0a2200b00223fedffb30so15438014pjo.3 for ; Wed, 28 Dec 2022 00:42:29 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=znASgBClq0rwhBOl4/Fw1c5T/s1foKbyxf4XPqRiKDI=; b=iIHueAUz0G9Q5Qor23ltImQgj8YpTUuI/PbDrcEdsTQqLprCC3c+/GhTb7Wa8hwNUx PTj4TdPafPSASxxhHacbBAnqwos9HjyGHVsNYQqclReq/BLKrfQgtBRzSghtWrSTmJgr 44WjAWGVmA4fA5y4iGXiTIQ/qPE/dS5M/cAD8O/dQBXvu3PjOlLNfa/vzJDGvw8dag/2 7UK57ETnT0B5AgeooJ4F67sjWayL28Auq/DQSzGPr6xsXLTDdL+urgDlAB0KI1IIOu4P YK0vbGYdX/80fFPCl9BWo543P/lHDM9gc5daGv3xZbhWbFMf8b/77TbkQTQ+08H5ZQDE o3nA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=znASgBClq0rwhBOl4/Fw1c5T/s1foKbyxf4XPqRiKDI=; b=BahXtkFsUn3+VOTCOirGHk9ezGykZe+63pEBEiHvI8yjBWORNTTC7jNdtMCBgsEHBm /Pu4BrkpJzYRKMplVoVBpkLLXsCsBXOkpXR5pHWS1LObp5vjRSeAoQZ7hbST2+uxVXh3 jd3FIfs1JNpE/qiuJWW4nJ3c28KnNLsYotw7QJ7IlW2stywiMVB4ZsLHqrgQkG5+wPQj kDWPnjY4s8PolbJbueD7suMEOnAeIWCsRtiky6AjtBNeVYW+Lm/fVOCkptHaKiBn7MFg 6X6Pxa8kZQ+rh0mfFOoKoiPLnmW+gxSqIUX9Pcsj18kgepVVtquAjHQQXuvHzophScSd 2Ggw== X-Gm-Message-State: AFqh2krb+AroFh2M4SMaH3JtVZwkwkB2mjCgicBKOWIFmkdBlvKNu6mt Be0ELMJzkQs9CyxYqDPg0uKS X-Google-Smtp-Source: AMrXdXubDuV4Ljz5PUmqbjDeuct0HvYN+u37AkAMnMvW2w/GVyk4a0aKPsRzW1uOqJG76o2FKQ4DcA== X-Received: by 2002:a05:6a21:9218:b0:9d:efbf:787d with SMTP id tl24-20020a056a21921800b0009defbf787dmr29695708pzb.50.1672216948793; Wed, 28 Dec 2022 00:42:28 -0800 (PST) Received: from localhost.localdomain ([117.217.178.73]) by smtp.gmail.com with ESMTPSA id d188-20020a6236c5000000b0057a9b146592sm9786286pfa.186.2022.12.28.00.42.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 28 Dec 2022 00:42:27 -0800 (PST) From: Manivannan Sadhasivam To: andersson@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, bp@alien8.de, tony.luck@intel.com Cc: quic_saipraka@quicinc.com, konrad.dybcio@linaro.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, james.morse@arm.com, mchehab@kernel.org, rric@kernel.org, linux-edac@vger.kernel.org, quic_ppareek@quicinc.com, luca.weiss@fairphone.com, ahalaney@redhat.com, steev@kali.org, Manivannan Sadhasivam Subject: [PATCH v5 14/17] arm64: dts: qcom: sm6350: Fix the base addresses of LLCC banks Date: Wed, 28 Dec 2022 14:10:25 +0530 Message-Id: <20221228084028.46528-15-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221228084028.46528-1-manivannan.sadhasivam@linaro.org> References: <20221228084028.46528-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org The LLCC block has several banks each with a different base address and holes in between. So it is not a correct approach to cover these banks with a single offset/size. Instead, the individual bank's base address needs to be specified in devicetree with the exact size. On SM6350, there is only one LLCC bank available. So let's just pass that as "llcc0_base". Reported-by: Parikshit Pareek Tested-by: Luca Weiss Signed-off-by: Manivannan Sadhasivam --- arch/arm64/boot/dts/qcom/sm6350.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/sm6350.dtsi b/arch/arm64/boot/dts/qcom/sm6350.dtsi index 43324bf291c3..c7701f5e4af6 100644 --- a/arch/arm64/boot/dts/qcom/sm6350.dtsi +++ b/arch/arm64/boot/dts/qcom/sm6350.dtsi @@ -1174,7 +1174,7 @@ dc_noc: interconnect@9160000 { system-cache-controller@9200000 { compatible = "qcom,sm6350-llcc"; reg = <0 0x09200000 0 0x50000>, <0 0x09600000 0 0x50000>; - reg-names = "llcc_base", "llcc_broadcast_base"; + reg-names = "llcc0_base", "llcc_broadcast_base"; }; gem_noc: interconnect@9680000 { From patchwork Wed Dec 28 08:40:27 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 637319 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D52CDC3DA7A for ; Wed, 28 Dec 2022 08:44:29 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232921AbiL1Io1 (ORCPT ); Wed, 28 Dec 2022 03:44:27 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46540 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232830AbiL1In2 (ORCPT ); Wed, 28 Dec 2022 03:43:28 -0500 Received: from mail-pg1-x52d.google.com (mail-pg1-x52d.google.com [IPv6:2607:f8b0:4864:20::52d]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C72D71004F for ; Wed, 28 Dec 2022 00:42:43 -0800 (PST) Received: by mail-pg1-x52d.google.com with SMTP id s67so870829pgs.3 for ; Wed, 28 Dec 2022 00:42:43 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=Dmgmy1WkNpy5rN0a0WaCg+UaF5eldkFegxv86WikVN4=; b=pVHwuZ2c7VrUE5Wd2ya4PpcVuLE6eNZ6ATLAbSIPuSaAUeIDwYtrZggSCCm2gmA8qH JTWC5T1yfXtnVTlvKQethFlb0qfZF8bYG6sKsZLFnxRFA5SUKm/En1vFVuX2j65a/OY3 IL/4uGH5m+ZfdPLzyDy9Z7ovx80C/GorxXYlXkXep0wCXiIeAxrOd/X+XbIPoFekW736 ydBVY0pcv1Wi9WmO8SmlHhLpa7ddE4XPFkR5dJ2GXFf8gGG2N7uI7cpsPGuMWnEhE3yU A1P2pdkm0woo+8+YjRKLZJJk+8U7Q1LmwE+DLx8d8VgHS/gZPlUrc3gHhs+iZEeymP6s gytw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=Dmgmy1WkNpy5rN0a0WaCg+UaF5eldkFegxv86WikVN4=; b=y6scuLnpI05qXKsThiT9EGymnicMD+YsiGWW0Q+jKj1lny1F20UvUsUkFQ9YjagadJ P+JIhW3gMiV3rv0Gizu4sHC/w5qgM7w+rV/VJh4M7wKqlyEkPFniiuWK8UPdFCOSp4o8 IO1FD3wJtrQzrd8MIFyfBzktczCoSvr9f032Mg2raHQW3xJAgNBeXfplRIziUnksjk+6 tg3imrtI28eW6IcDeCa+BWcHNWA4Lhz9F+jpA5lYkzGpCpoGQJLoeyOtg449+6MUyZda Owpr7fRUQnMHNmisnqRZ33WMM/YsiVMUINjQPmsWnDWGC1PzDpBfhScrdPmGHKXjruVe 1GzA== X-Gm-Message-State: AFqh2koT0htOnMpEA3gJAEzif8F9pU1zVEdDxdWam35TyNVWbj9CJNX1 zZiAXYSgGqJuue7ZFqo3fDsw X-Google-Smtp-Source: AMrXdXtJKvkLftrOG21ijD/t8yxigqDi4l4ZJej4ePx4o5qxlVks6rYjVxk7w2Wg5P1VmHt8j+zPYw== X-Received: by 2002:a05:6a00:414c:b0:581:7c46:debd with SMTP id bv12-20020a056a00414c00b005817c46debdmr3704718pfb.24.1672216963254; Wed, 28 Dec 2022 00:42:43 -0800 (PST) Received: from localhost.localdomain ([117.217.178.73]) by smtp.gmail.com with ESMTPSA id d188-20020a6236c5000000b0057a9b146592sm9786286pfa.186.2022.12.28.00.42.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 28 Dec 2022 00:42:42 -0800 (PST) From: Manivannan Sadhasivam To: andersson@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, bp@alien8.de, tony.luck@intel.com Cc: quic_saipraka@quicinc.com, konrad.dybcio@linaro.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, james.morse@arm.com, mchehab@kernel.org, rric@kernel.org, linux-edac@vger.kernel.org, quic_ppareek@quicinc.com, luca.weiss@fairphone.com, ahalaney@redhat.com, steev@kali.org, Manivannan Sadhasivam Subject: [PATCH v5 16/17] qcom: llcc/edac: Support polling mode for ECC handling Date: Wed, 28 Dec 2022 14:10:27 +0530 Message-Id: <20221228084028.46528-17-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221228084028.46528-1-manivannan.sadhasivam@linaro.org> References: <20221228084028.46528-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Not all Qcom platforms support IRQ mode for ECC handling. For those platforms, the current EDAC driver will not be probed due to missing ECC IRQ in devicetree. So add support for polling mode so that the EDAC driver can be used on all Qcom platforms supporting LLCC. The polling delay of 5000ms is chosen based on Qcom downstream/vendor driver. Reported-by: Luca Weiss Tested-by: Luca Weiss Tested-by: Steev Klimaszewski # Thinkpad X13s Tested-by: Andrew Halaney # sa8540p-ride Signed-off-by: Manivannan Sadhasivam --- drivers/edac/qcom_edac.c | 37 +++++++++++++++++++++++++----------- drivers/soc/qcom/llcc-qcom.c | 13 ++++++------- 2 files changed, 32 insertions(+), 18 deletions(-) diff --git a/drivers/edac/qcom_edac.c b/drivers/edac/qcom_edac.c index 1d3cc1930a74..cfcdc35b0373 100644 --- a/drivers/edac/qcom_edac.c +++ b/drivers/edac/qcom_edac.c @@ -76,6 +76,8 @@ #define DRP0_INTERRUPT_ENABLE BIT(6) #define SB_DB_DRP_INTERRUPT_ENABLE 0x3 +#define ECC_POLL_MSEC 5000 + enum { LLCC_DRAM_CE = 0, LLCC_DRAM_UE, @@ -283,8 +285,7 @@ dump_syn_reg(struct edac_device_ctl_info *edev_ctl, int err_type, u32 bank) return ret; } -static irqreturn_t -llcc_ecc_irq_handler(int irq, void *edev_ctl) +static irqreturn_t llcc_ecc_irq_handler(int irq, void *edev_ctl) { struct edac_device_ctl_info *edac_dev_ctl = edev_ctl; struct llcc_drv_data *drv = edac_dev_ctl->dev->platform_data; @@ -328,6 +329,11 @@ llcc_ecc_irq_handler(int irq, void *edev_ctl) return irq_rc; } +static void llcc_ecc_check(struct edac_device_ctl_info *edev_ctl) +{ + llcc_ecc_irq_handler(0, edev_ctl); +} + static int qcom_llcc_edac_probe(struct platform_device *pdev) { struct llcc_drv_data *llcc_driv_data = pdev->dev.platform_data; @@ -355,22 +361,31 @@ static int qcom_llcc_edac_probe(struct platform_device *pdev) edev_ctl->ctl_name = "llcc"; edev_ctl->panic_on_ue = LLCC_ERP_PANIC_ON_UE; + /* Check if LLCC driver has passed ECC IRQ */ + ecc_irq = llcc_driv_data->ecc_irq; + if (ecc_irq > 0) { + /* Use interrupt mode if IRQ is available */ + edac_op_state = EDAC_OPSTATE_INT; + } else { + /* Fall back to polling mode otherwise */ + edac_op_state = EDAC_OPSTATE_POLL; + edev_ctl->poll_msec = ECC_POLL_MSEC; + edev_ctl->edac_check = llcc_ecc_check; + } + rc = edac_device_add_device(edev_ctl); if (rc) goto out_mem; platform_set_drvdata(pdev, edev_ctl); - /* Request for ecc irq */ - ecc_irq = llcc_driv_data->ecc_irq; - if (ecc_irq < 0) { - rc = -ENODEV; - goto out_dev; - } - rc = devm_request_irq(dev, ecc_irq, llcc_ecc_irq_handler, + /* Request ECC IRQ if available */ + if (ecc_irq > 0) { + rc = devm_request_irq(dev, ecc_irq, llcc_ecc_irq_handler, IRQF_TRIGGER_HIGH, "llcc_ecc", edev_ctl); - if (rc) - goto out_dev; + if (rc) + goto out_dev; + } return rc; diff --git a/drivers/soc/qcom/llcc-qcom.c b/drivers/soc/qcom/llcc-qcom.c index 72f3f2a9aaa0..7b7c5a38bac6 100644 --- a/drivers/soc/qcom/llcc-qcom.c +++ b/drivers/soc/qcom/llcc-qcom.c @@ -1011,13 +1011,12 @@ static int qcom_llcc_probe(struct platform_device *pdev) goto err; drv_data->ecc_irq = platform_get_irq_optional(pdev, 0); - if (drv_data->ecc_irq >= 0) { - llcc_edac = platform_device_register_data(&pdev->dev, - "qcom_llcc_edac", -1, drv_data, - sizeof(*drv_data)); - if (IS_ERR(llcc_edac)) - dev_err(dev, "Failed to register llcc edac driver\n"); - } + + llcc_edac = platform_device_register_data(&pdev->dev, + "qcom_llcc_edac", -1, drv_data, + sizeof(*drv_data)); + if (IS_ERR(llcc_edac)) + dev_err(dev, "Failed to register llcc edac driver\n"); return 0; err: