From patchwork Thu Dec 29 14:50:19 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Frank Wunderlich X-Patchwork-Id: 637663 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id BD83CC3DA79 for ; Thu, 29 Dec 2022 14:50:38 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233560AbiL2Ouh (ORCPT ); Thu, 29 Dec 2022 09:50:37 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52666 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233343AbiL2Ouf (ORCPT ); Thu, 29 Dec 2022 09:50:35 -0500 Received: from mxout4.routing.net (mxout4.routing.net [IPv6:2a03:2900:1:a::9]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 93AFF12D3D; Thu, 29 Dec 2022 06:50:34 -0800 (PST) Received: from mxbulk.masterlogin.de (unknown [192.168.10.85]) by mxout4.routing.net (Postfix) with ESMTP id A3A061009A7; Thu, 29 Dec 2022 14:50:32 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=mailerdienst.de; s=20200217; t=1672325432; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=TXaEWxtn0uFZdcMKR1HVawy7OAcOEaMqyiThbbGx/JQ=; b=ghyZuLfGlQXpDY4STZ9VXry9Dik3TiluS94P6uiy2gaLDlbsjooHhEhy7RI/4QQvx1yg/O GkaXyGAzs+Kap/DwsP9vV5H0Ch9PYBGF0sxInUDDvOe1/PNQyGkrM4chiJ4tSuwK5FZ7Ij Nu2ua7NzH/iPjMuguaPSkeYmuWfzBMQ= Received: from frank-G5.. (fttx-pool-80.245.77.213.bambit.de [80.245.77.213]) by mxbulk.masterlogin.de (Postfix) with ESMTPSA id 6C26A122725; Thu, 29 Dec 2022 14:50:32 +0000 (UTC) From: Frank Wunderlich To: linux-mediatek@lists.infradead.org Cc: Frank Wunderlich , Chunfeng Yun , Vinod Koul , Kishon Vijay Abraham I , Rob Herring , Krzysztof Kozlowski , Matthias Brugger , linux-arm-kernel@lists.infradead.org, linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Krzysztof Kozlowski , AngeloGioacchino Del Regno Subject: [PATCH v8 1/5] dt-bindings: phy: mediatek,tphy: add support for mt7986 Date: Thu, 29 Dec 2022 15:50:19 +0100 Message-Id: <20221229145023.55713-2-linux@fw-web.de> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221229145023.55713-1-linux@fw-web.de> References: <20221229145023.55713-1-linux@fw-web.de> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Frank Wunderlich Add compatible string for mt7986. Signed-off-by: Frank Wunderlich Acked-by: Krzysztof Kozlowski Reviewed-by: Chunfeng Yun Reviewed-by: AngeloGioacchino Del Regno Reviewed-by: Matthias Brugger --- Documentation/devicetree/bindings/phy/mediatek,tphy.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/phy/mediatek,tphy.yaml b/Documentation/devicetree/bindings/phy/mediatek,tphy.yaml index 5613cc5106e3..230a17f24966 100644 --- a/Documentation/devicetree/bindings/phy/mediatek,tphy.yaml +++ b/Documentation/devicetree/bindings/phy/mediatek,tphy.yaml @@ -79,6 +79,7 @@ properties: - enum: - mediatek,mt2712-tphy - mediatek,mt7629-tphy + - mediatek,mt7986-tphy - mediatek,mt8183-tphy - mediatek,mt8186-tphy - mediatek,mt8192-tphy From patchwork Thu Dec 29 14:50:20 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Frank Wunderlich X-Patchwork-Id: 638066 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D914EC4332F for ; Thu, 29 Dec 2022 14:50:40 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233568AbiL2Ouj (ORCPT ); Thu, 29 Dec 2022 09:50:39 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52676 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233472AbiL2Ouf (ORCPT ); Thu, 29 Dec 2022 09:50:35 -0500 Received: from mxout1.routing.net (mxout1.routing.net [IPv6:2a03:2900:1:a::a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id BE6F613DCB; Thu, 29 Dec 2022 06:50:34 -0800 (PST) Received: from mxbulk.masterlogin.de (unknown [192.168.10.85]) by mxout1.routing.net (Postfix) with ESMTP id E021D40122; Thu, 29 Dec 2022 14:50:32 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=mailerdienst.de; s=20200217; t=1672325433; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=NdrLgZ7kHEHZCcXHBTGh4SDP3w9h0DuG6QN4UIa1As8=; b=O1trYHL+ocAAPXPyAq8oLw4wu1KDtEgMhref6YrJPHBwQW/xXSBmT4eqeoo6jo6LHKQ/n5 6SgwMTRYx01gegLg3CFuPKIEnhx3DteVN3Jb09fazf3nIVkfwe0qLe8TKn+zIZejU3dJ8z AHKDvOgW1lPt087kzOr0SrCc8gTOPM0= Received: from frank-G5.. (fttx-pool-80.245.77.213.bambit.de [80.245.77.213]) by mxbulk.masterlogin.de (Postfix) with ESMTPSA id A96631226AC; Thu, 29 Dec 2022 14:50:32 +0000 (UTC) From: Frank Wunderlich To: linux-mediatek@lists.infradead.org Cc: Frank Wunderlich , Chunfeng Yun , Vinod Koul , Kishon Vijay Abraham I , Rob Herring , Krzysztof Kozlowski , Matthias Brugger , linux-arm-kernel@lists.infradead.org, linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Sam Shih Subject: [PATCH v8 2/5] arm64: dts: mt7986: add usb related device nodes Date: Thu, 29 Dec 2022 15:50:20 +0100 Message-Id: <20221229145023.55713-3-linux@fw-web.de> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221229145023.55713-1-linux@fw-web.de> References: <20221229145023.55713-1-linux@fw-web.de> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Sam Shih This patch adds USB support for MT7986. Signed-off-by: Sam Shih Signed-off-by: Frank Wunderlich Reviewed-by: Chunfeng Yun --- changes compared to sams original version: - reorder xhci-clocks based on yaml binding v5: - update ranges/reg of usb-phy - not added RB from AngeloGioacchino for v4 because of these changes v6: - remove unused usb regulators - remove 3v3 regulator (will be added with emmc-patch) --- arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts | 8 +++ arch/arm64/boot/dts/mediatek/mt7986a.dtsi | 55 ++++++++++++++++++++ arch/arm64/boot/dts/mediatek/mt7986b-rfb.dts | 8 +++ 3 files changed, 71 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts b/arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts index 9b83925893b7..58089fcf4d16 100644 --- a/arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts +++ b/arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts @@ -140,6 +140,10 @@ &spi1 { status = "okay"; }; +&ssusb { + status = "okay"; +}; + &switch { ports { #address-cells = <1>; @@ -201,6 +205,10 @@ &uart2 { status = "okay"; }; +&usb_phy { + status = "okay"; +}; + &wifi { status = "okay"; pinctrl-names = "default", "dbdc"; diff --git a/arch/arm64/boot/dts/mediatek/mt7986a.dtsi b/arch/arm64/boot/dts/mediatek/mt7986a.dtsi index 0e9406fc63e2..9ff2968152ae 100644 --- a/arch/arm64/boot/dts/mediatek/mt7986a.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt7986a.dtsi @@ -323,6 +323,61 @@ spi1: spi@1100b000 { status = "disabled"; }; + ssusb: usb@11200000 { + compatible = "mediatek,mt7986-xhci", + "mediatek,mtk-xhci"; + reg = <0 0x11200000 0 0x2e00>, + <0 0x11203e00 0 0x0100>; + reg-names = "mac", "ippc"; + interrupts = ; + clocks = <&infracfg CLK_INFRA_IUSB_SYS_CK>, + <&infracfg CLK_INFRA_IUSB_CK>, + <&infracfg CLK_INFRA_IUSB_133_CK>, + <&infracfg CLK_INFRA_IUSB_66M_CK>, + <&topckgen CLK_TOP_U2U3_XHCI_SEL>; + clock-names = "sys_ck", + "ref_ck", + "mcu_ck", + "dma_ck", + "xhci_ck"; + phys = <&u2port0 PHY_TYPE_USB2>, + <&u3port0 PHY_TYPE_USB3>, + <&u2port1 PHY_TYPE_USB2>; + status = "disabled"; + }; + + usb_phy: t-phy@11e10000 { + compatible = "mediatek,mt7986-tphy", + "mediatek,generic-tphy-v2"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0 0x11e10000 0x1700>; + status = "disabled"; + + u2port0: usb-phy@0 { + reg = <0x0 0x700>; + clocks = <&topckgen CLK_TOP_DA_U2_REFSEL>, + <&topckgen CLK_TOP_DA_U2_CK_1P_SEL>; + clock-names = "ref", "da_ref"; + #phy-cells = <1>; + }; + + u3port0: usb-phy@700 { + reg = <0x700 0x900>; + clocks = <&topckgen CLK_TOP_USB3_PHY_SEL>; + clock-names = "ref"; + #phy-cells = <1>; + }; + + u2port1: usb-phy@1000 { + reg = <0x1000 0x700>; + clocks = <&topckgen CLK_TOP_DA_U2_REFSEL>, + <&topckgen CLK_TOP_DA_U2_CK_1P_SEL>; + clock-names = "ref", "da_ref"; + #phy-cells = <1>; + }; + }; + ethsys: syscon@15000000 { #address-cells = <1>; #size-cells = <1>; diff --git a/arch/arm64/boot/dts/mediatek/mt7986b-rfb.dts b/arch/arm64/boot/dts/mediatek/mt7986b-rfb.dts index 243760cd3011..188ce82ae56c 100644 --- a/arch/arm64/boot/dts/mediatek/mt7986b-rfb.dts +++ b/arch/arm64/boot/dts/mediatek/mt7986b-rfb.dts @@ -167,10 +167,18 @@ &spi1 { status = "okay"; }; +&ssusb { + status = "okay"; +}; + &uart0 { status = "okay"; }; +&usb_phy { + status = "okay"; +}; + &wifi { status = "okay"; pinctrl-names = "default", "dbdc"; From patchwork Thu Dec 29 14:50:21 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Frank Wunderlich X-Patchwork-Id: 638067 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0299FC4708E for ; Thu, 29 Dec 2022 14:50:39 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230441AbiL2Oui (ORCPT ); Thu, 29 Dec 2022 09:50:38 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52678 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233525AbiL2Oug (ORCPT ); Thu, 29 Dec 2022 09:50:36 -0500 Received: from mxout3.routing.net (mxout3.routing.net [IPv6:2a03:2900:1:a::8]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D0BC813DD3; Thu, 29 Dec 2022 06:50:34 -0800 (PST) Received: from mxbulk.masterlogin.de (unknown [192.168.10.85]) by mxout3.routing.net (Postfix) with ESMTP id 3255F60510; Thu, 29 Dec 2022 14:50:33 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=mailerdienst.de; s=20200217; t=1672325433; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=xI7XT67CqYlVW3+/XRkZxk2brg5+ceAOUtpu7n5qfPw=; b=jt+ZH0Km/I3eda2F3q+kXXIzOPty6DMH9W53DVdoSsxySZp8Wu9HUqYFb8ccMW2OQEVLBV 0p9EDViI3/msY5vOAQJQHPpku14TB/KbFUqYSiCZuZytTCy8l6SWXx0AEowNk2G2yX0LZl /hHc8LcsRuF8HXhWXAOTlVw8LFiu1dI= Received: from frank-G5.. (fttx-pool-80.245.77.213.bambit.de [80.245.77.213]) by mxbulk.masterlogin.de (Postfix) with ESMTPSA id E3D53122725; Thu, 29 Dec 2022 14:50:32 +0000 (UTC) From: Frank Wunderlich To: linux-mediatek@lists.infradead.org Cc: Frank Wunderlich , Chunfeng Yun , Vinod Koul , Kishon Vijay Abraham I , Rob Herring , Krzysztof Kozlowski , Matthias Brugger , linux-arm-kernel@lists.infradead.org, linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Sam Shih Subject: [PATCH v8 3/5] arm64: dts: mt7986: add mmc related device nodes Date: Thu, 29 Dec 2022 15:50:21 +0100 Message-Id: <20221229145023.55713-4-linux@fw-web.de> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221229145023.55713-1-linux@fw-web.de> References: <20221229145023.55713-1-linux@fw-web.de> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Sam Shih This patch adds mmc support for MT7986. Signed-off-by: Sam Shih Signed-off-by: Frank Wunderlich --- v2: - update mmc-node because clocks changed v3: - fix pullups/pulldowns for mt7986a-rfb to have generic bias-pull-* v6: - add 3v3 regulator in mt7986a-rfb (was in usb patch before) - dropped AngeloGioacchino RB because of this change --- arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts | 96 ++++++++++++++++++++ arch/arm64/boot/dts/mediatek/mt7986a.dtsi | 15 +++ 2 files changed, 111 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts b/arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts index 58089fcf4d16..c7a2ac764a30 100644 --- a/arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts +++ b/arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts @@ -5,6 +5,8 @@ */ /dts-v1/; +#include + #include "mt7986a.dtsi" / { @@ -23,6 +25,24 @@ memory@40000000 { device_type = "memory"; reg = <0 0x40000000 0 0x40000000>; }; + + reg_1p8v: regulator-1p8v { + compatible = "regulator-fixed"; + regulator-name = "fixed-1.8V"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-boot-on; + regulator-always-on; + }; + + reg_3p3v: regulator-3p3v { + compatible = "regulator-fixed"; + regulator-name = "fixed-3.3V"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + regulator-always-on; + }; }; &crypto { @@ -58,7 +78,83 @@ switch: switch@0 { }; }; +&mmc0 { + pinctrl-names = "default", "state_uhs"; + pinctrl-0 = <&mmc0_pins_default>; + pinctrl-1 = <&mmc0_pins_uhs>; + bus-width = <8>; + max-frequency = <200000000>; + cap-mmc-highspeed; + mmc-hs200-1_8v; + mmc-hs400-1_8v; + hs400-ds-delay = <0x14014>; + vmmc-supply = <®_3p3v>; + vqmmc-supply = <®_1p8v>; + non-removable; + no-sd; + no-sdio; + status = "okay"; +}; + &pio { + mmc0_pins_default: mmc0-pins { + mux { + function = "emmc"; + groups = "emmc_51"; + }; + conf-cmd-dat { + pins = "EMMC_DATA_0", "EMMC_DATA_1", "EMMC_DATA_2", + "EMMC_DATA_3", "EMMC_DATA_4", "EMMC_DATA_5", + "EMMC_DATA_6", "EMMC_DATA_7", "EMMC_CMD"; + input-enable; + drive-strength = <4>; + bias-pull-up = ; /* pull-up 10K */ + }; + conf-clk { + pins = "EMMC_CK"; + drive-strength = <6>; + bias-pull-down = ; /* pull-down 50K */ + }; + conf-ds { + pins = "EMMC_DSL"; + bias-pull-down = ; /* pull-down 50K */ + }; + conf-rst { + pins = "EMMC_RSTB"; + drive-strength = <4>; + bias-pull-up = ; /* pull-up 10K */ + }; + }; + + mmc0_pins_uhs: mmc0-uhs-pins { + mux { + function = "emmc"; + groups = "emmc_51"; + }; + conf-cmd-dat { + pins = "EMMC_DATA_0", "EMMC_DATA_1", "EMMC_DATA_2", + "EMMC_DATA_3", "EMMC_DATA_4", "EMMC_DATA_5", + "EMMC_DATA_6", "EMMC_DATA_7", "EMMC_CMD"; + input-enable; + drive-strength = <4>; + bias-pull-up = ; /* pull-up 10K */ + }; + conf-clk { + pins = "EMMC_CK"; + drive-strength = <6>; + bias-pull-down = ; /* pull-down 50K */ + }; + conf-ds { + pins = "EMMC_DSL"; + bias-pull-down = ; /* pull-down 50K */ + }; + conf-rst { + pins = "EMMC_RSTB"; + drive-strength = <4>; + bias-pull-up = ; /* pull-up 10K */ + }; + }; + spi_flash_pins: spi-flash-pins { mux { function = "spi"; diff --git a/arch/arm64/boot/dts/mediatek/mt7986a.dtsi b/arch/arm64/boot/dts/mediatek/mt7986a.dtsi index 9ff2968152ae..9c552442c02d 100644 --- a/arch/arm64/boot/dts/mediatek/mt7986a.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt7986a.dtsi @@ -346,6 +346,21 @@ ssusb: usb@11200000 { status = "disabled"; }; + mmc0: mmc@11230000 { + compatible = "mediatek,mt7986-mmc"; + reg = <0 0x11230000 0 0x1000>, + <0 0x11c20000 0 0x1000>; + interrupts = ; + clocks = <&topckgen CLK_TOP_EMMC_416M_SEL>, + <&infracfg CLK_INFRA_MSDC_HCK_CK>, + <&infracfg CLK_INFRA_MSDC_CK>, + <&infracfg CLK_INFRA_MSDC_133M_CK>, + <&infracfg CLK_INFRA_MSDC_66M_CK>; + clock-names = "source", "hclk", "source_cg", "bus_clk", + "sys_cg"; + status = "disabled"; + }; + usb_phy: t-phy@11e10000 { compatible = "mediatek,mt7986-tphy", "mediatek,generic-tphy-v2"; From patchwork Thu Dec 29 14:50:22 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Frank Wunderlich X-Patchwork-Id: 637662 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 31707C4167B for ; Thu, 29 Dec 2022 14:50:39 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233563AbiL2Oui (ORCPT ); Thu, 29 Dec 2022 09:50:38 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52680 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233491AbiL2Oug (ORCPT ); Thu, 29 Dec 2022 09:50:36 -0500 Received: from mxout2.routing.net (mxout2.routing.net [IPv6:2a03:2900:1:a::b]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E71C813DD4; Thu, 29 Dec 2022 06:50:34 -0800 (PST) Received: from mxbulk.masterlogin.de (unknown [192.168.10.85]) by mxout2.routing.net (Postfix) with ESMTP id 70E6360012; Thu, 29 Dec 2022 14:50:33 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=mailerdienst.de; s=20200217; t=1672325433; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=7w7+yEBl4vGwjIjE10iuV0TWKv2sdao0DcaahtfY9sY=; b=xQfqutAmpCYUjYaXe8wYVtEGuzewqzKqXtwxQQ3Ty/HfRF79fkv/kR2D0rGUAOwRsC03Ng ui4ltGOgqfRMNJ7jLslahSwrzkxS/bEM3aqfN4/KQucMgH3QgpY7zNLuHeMo0dibo6R1Bs 0zzAyxOrP3jqHb+q5AwFyQBcsMMftcs= Received: from frank-G5.. (fttx-pool-80.245.77.213.bambit.de [80.245.77.213]) by mxbulk.masterlogin.de (Postfix) with ESMTPSA id 37DC41226AC; Thu, 29 Dec 2022 14:50:33 +0000 (UTC) From: Frank Wunderlich To: linux-mediatek@lists.infradead.org Cc: Frank Wunderlich , Chunfeng Yun , Vinod Koul , Kishon Vijay Abraham I , Rob Herring , Krzysztof Kozlowski , Matthias Brugger , linux-arm-kernel@lists.infradead.org, linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Sam Shih , Jieyy Yang , AngeloGioacchino Del Regno Subject: [PATCH v8 4/5] arm64: dts: mt7986: add pcie related device nodes Date: Thu, 29 Dec 2022 15:50:22 +0100 Message-Id: <20221229145023.55713-5-linux@fw-web.de> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221229145023.55713-1-linux@fw-web.de> References: <20221229145023.55713-1-linux@fw-web.de> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Sam Shih This patch adds PCIe support for MT7986. Signed-off-by: Jieyy Yang Signed-off-by: Sam Shih Signed-off-by: Frank Wunderlich Reviewed-by: AngeloGioacchino Del Regno --- changes compared to sams original version: - add clock-names to pcie node - update clocks to new binding --- bindings-patches: https://patchwork.kernel.org/project/linux-mediatek/list/?series=690172 --- arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts | 16 ++++++ arch/arm64/boot/dts/mediatek/mt7986a.dtsi | 52 ++++++++++++++++++++ 2 files changed, 68 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts b/arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts index c7a2ac764a30..4f18b4a9a8c8 100644 --- a/arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts +++ b/arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts @@ -93,6 +93,15 @@ &mmc0 { non-removable; no-sd; no-sdio; +}; + +&pcie { + pinctrl-names = "default"; + pinctrl-0 = <&pcie_pins>; + status = "okay"; +}; + +&pcie_phy { status = "okay"; }; @@ -155,6 +164,13 @@ conf-rst { }; }; + pcie_pins: pcie-pins { + mux { + function = "pcie"; + groups = "pcie_clk", "pcie_wake", "pcie_pereset"; + }; + }; + spi_flash_pins: spi-flash-pins { mux { function = "spi"; diff --git a/arch/arm64/boot/dts/mediatek/mt7986a.dtsi b/arch/arm64/boot/dts/mediatek/mt7986a.dtsi index 9c552442c02d..f6e980771b69 100644 --- a/arch/arm64/boot/dts/mediatek/mt7986a.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt7986a.dtsi @@ -8,6 +8,7 @@ #include #include #include +#include / { compatible = "mediatek,mt7986a"; @@ -361,6 +362,57 @@ mmc0: mmc@11230000 { status = "disabled"; }; + pcie: pcie@11280000 { + compatible = "mediatek,mt7986-pcie", + "mediatek,mt8192-pcie"; + device_type = "pci"; + #address-cells = <3>; + #size-cells = <2>; + reg = <0x00 0x11280000 0x00 0x4000>; + reg-names = "pcie-mac"; + interrupts = ; + bus-range = <0x00 0xff>; + ranges = <0x82000000 0x00 0x20000000 0x00 + 0x20000000 0x00 0x10000000>; + clocks = <&infracfg CLK_INFRA_IPCIE_PIPE_CK>, + <&infracfg CLK_INFRA_IPCIE_CK>, + <&infracfg CLK_INFRA_IPCIER_CK>, + <&infracfg CLK_INFRA_IPCIEB_CK>; + clock-names = "pl_250m", "tl_26m", "peri_26m", "top_133m"; + status = "disabled"; + + phys = <&pcie_port PHY_TYPE_PCIE>; + phy-names = "pcie-phy"; + + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 0 0x7>; + interrupt-map = <0 0 0 1 &pcie_intc 0>, + <0 0 0 2 &pcie_intc 1>, + <0 0 0 3 &pcie_intc 2>, + <0 0 0 4 &pcie_intc 3>; + pcie_intc: interrupt-controller { + #address-cells = <0>; + #interrupt-cells = <1>; + interrupt-controller; + }; + }; + + pcie_phy: t-phy@11c00000 { + compatible = "mediatek,mt7986-tphy", + "mediatek,generic-tphy-v2"; + #address-cells = <2>; + #size-cells = <2>; + ranges; + status = "disabled"; + + pcie_port: pcie-phy@11c00000 { + reg = <0 0x11c00000 0 0x20000>; + clocks = <&clk40m>; + clock-names = "ref"; + #phy-cells = <1>; + }; + }; + usb_phy: t-phy@11e10000 { compatible = "mediatek,mt7986-tphy", "mediatek,generic-tphy-v2"; From patchwork Thu Dec 29 14:50:23 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Frank Wunderlich X-Patchwork-Id: 637661 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D18B6C3DA79 for ; Thu, 29 Dec 2022 14:50:41 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233572AbiL2Ouk (ORCPT ); Thu, 29 Dec 2022 09:50:40 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52682 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233556AbiL2Ouh (ORCPT ); Thu, 29 Dec 2022 09:50:37 -0500 Received: from mxout4.routing.net (mxout4.routing.net [IPv6:2a03:2900:1:a::9]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 23EF513DD5; Thu, 29 Dec 2022 06:50:35 -0800 (PST) Received: from mxbulk.masterlogin.de (unknown [192.168.10.85]) by mxout4.routing.net (Postfix) with ESMTP id AE94B10129B; Thu, 29 Dec 2022 14:50:33 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=mailerdienst.de; s=20200217; t=1672325433; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=EYeBEHGj6r9aQNNKYqra7OedE/5+ETQzcj2zhVwqHzI=; b=lwvS3DP9QHcSOpwoZ6+bfsyQ2PcA7V7EssbmeBAPMOCVlKusFLPDO8o3t+aTjj7ZpSk3rg Vvz76pfK74ljUIX91HJS8Uafc3UGTwMiTCl8Too+hZoPYc4LGClmy4HE6SyzkXPxz6c3LJ VksqAlBeooFuyJP6K64kQpr8p3za2sM= Received: from frank-G5.. (fttx-pool-80.245.77.213.bambit.de [80.245.77.213]) by mxbulk.masterlogin.de (Postfix) with ESMTPSA id 781A7122725; Thu, 29 Dec 2022 14:50:33 +0000 (UTC) From: Frank Wunderlich To: linux-mediatek@lists.infradead.org Cc: Frank Wunderlich , Chunfeng Yun , Vinod Koul , Kishon Vijay Abraham I , Rob Herring , Krzysztof Kozlowski , Matthias Brugger , linux-arm-kernel@lists.infradead.org, linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v8 5/5] arm64: dts: mt7986: add Bananapi R3 Date: Thu, 29 Dec 2022 15:50:23 +0100 Message-Id: <20221229145023.55713-6-linux@fw-web.de> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221229145023.55713-1-linux@fw-web.de> References: <20221229145023.55713-1-linux@fw-web.de> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Frank Wunderlich Add support for Bananapi R3 SBC. - SD/eMMC support (switching first 4 bits of data-bus with sw6/D) - SPI-NAND/NOR support (switched CS by sw5/C) - all rj45 ports and both SFP working (eth1/lan4) - all USB-Ports + SIM-Slot tested - i2c and all uarts tested - wifi tested (with eeprom calibration data) The device can boot from all 4 storage options. Both, SPI and MMC, can be switched using hardware switches on the board, see https://wiki.banana-pi.org/Banana_Pi_BPI-R3#Jumper_setting Signed-off-by: Frank Wunderlich --- changes: v8: - drop model string override in emmc-dtso - drop cs-gpios from spi-nodes - add interrupt-settings for mt7531 switch v7: - squashed overlay-patch and converted sd/emmc dts to overlay too - moved mmc-regulators to base dts - changed common dtsi to (base dts) and overlay extension to dtso v6: - drop usb 5v regulator from bpi-r3 based on chunfengs response it is only needed if regulator is switched (like for otg), usb works without it. v4: - add PCIe nodes - fix sfp-properties of sfp-1 (need to be plural) thx to Denis Odintsov for this v3: - rename factory-key to reset-key - add dcin regulator and add it as input for 3v3 (with renaming) - remove memory-node - dropped wifi eeprom (calibration) data - move mmc0 pinctrl to common dtsi and drop sdcard comment - change mmc pull-up/down to have generic bias-pull* v2: - remove pcie to be added later (discussion about clocks) - some fixes based on suggestions on ML - add key suffix like it's done in mt7622-bpi-r64 devicetree - add dash in sfp node names - use reg as unit for switch-node - drop "-3-4" suffix from i2c-pins node name - fix order in Makefile --- arch/arm64/boot/dts/mediatek/Makefile | 5 + .../mt7986a-bananapi-bpi-r3-emmc.dtso | 29 ++ .../mt7986a-bananapi-bpi-r3-nand.dtso | 55 +++ .../mediatek/mt7986a-bananapi-bpi-r3-nor.dtso | 68 +++ .../mediatek/mt7986a-bananapi-bpi-r3-sd.dtso | 24 + .../dts/mediatek/mt7986a-bananapi-bpi-r3.dts | 450 ++++++++++++++++++ 6 files changed, 631 insertions(+) create mode 100644 arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3-emmc.dtso create mode 100644 arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3-nand.dtso create mode 100644 arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3-nor.dtso create mode 100644 arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3-sd.dtso create mode 100644 arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3.dts diff --git a/arch/arm64/boot/dts/mediatek/Makefile b/arch/arm64/boot/dts/mediatek/Makefile index 813e735c5b96..d5cd7b3e09cf 100644 --- a/arch/arm64/boot/dts/mediatek/Makefile +++ b/arch/arm64/boot/dts/mediatek/Makefile @@ -8,6 +8,11 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += mt6797-evb.dtb dtb-$(CONFIG_ARCH_MEDIATEK) += mt6797-x20-dev.dtb dtb-$(CONFIG_ARCH_MEDIATEK) += mt7622-rfb1.dtb dtb-$(CONFIG_ARCH_MEDIATEK) += mt7622-bananapi-bpi-r64.dtb +dtb-$(CONFIG_ARCH_MEDIATEK) += mt7986a-bananapi-bpi-r3.dtb +dtb-$(CONFIG_ARCH_MEDIATEK) += mt7986a-bananapi-bpi-r3-emmc.dtbo +dtb-$(CONFIG_ARCH_MEDIATEK) += mt7986a-bananapi-bpi-r3-nand.dtbo +dtb-$(CONFIG_ARCH_MEDIATEK) += mt7986a-bananapi-bpi-r3-nor.dtbo +dtb-$(CONFIG_ARCH_MEDIATEK) += mt7986a-bananapi-bpi-r3-sd.dtbo dtb-$(CONFIG_ARCH_MEDIATEK) += mt7986a-rfb.dtb dtb-$(CONFIG_ARCH_MEDIATEK) += mt7986b-rfb.dtb dtb-$(CONFIG_ARCH_MEDIATEK) += mt8167-pumpkin.dtb diff --git a/arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3-emmc.dtso b/arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3-emmc.dtso new file mode 100644 index 000000000000..779dc6782bb1 --- /dev/null +++ b/arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3-emmc.dtso @@ -0,0 +1,29 @@ +// SPDX-License-Identifier: (GPL-2.0 OR MIT) +/* + * Copyright (C) 2021 MediaTek Inc. + * Author: Sam.Shih + */ + +/dts-v1/; +/plugin/; + +/ { + compatible = "bananapi,bpi-r3", "mediatek,mt7986a"; + + fragment@0 { + target-path = "/soc/mmc@11230000"; + __overlay__ { + bus-width = <8>; + max-frequency = <200000000>; + cap-mmc-highspeed; + mmc-hs200-1_8v; + mmc-hs400-1_8v; + hs400-ds-delay = <0x14014>; + non-removable; + no-sd; + no-sdio; + status = "okay"; + }; + }; +}; + diff --git a/arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3-nand.dtso b/arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3-nand.dtso new file mode 100644 index 000000000000..15ee8c568f3c --- /dev/null +++ b/arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3-nand.dtso @@ -0,0 +1,55 @@ +/* SPDX-License-Identifier: (GPL-2.0-only OR MIT) */ +/* + * Authors: Daniel Golle + * Frank Wunderlich + */ + +/dts-v1/; +/plugin/; + +/ { + compatible = "bananapi,bpi-r3", "mediatek,mt7986a"; + + fragment@0 { + target-path = "/soc/spi@1100a000"; + __overlay__ { + #address-cells = <1>; + #size-cells = <0>; + spi_nand: spi_nand@0 { + compatible = "spi-nand"; + reg = <0>; + spi-max-frequency = <10000000>; + spi-tx-buswidth = <4>; + spi-rx-buswidth = <4>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "bl2"; + reg = <0x0 0x80000>; + read-only; + }; + + partition@80000 { + label = "reserved"; + reg = <0x80000 0x300000>; + }; + + partition@380000 { + label = "fip"; + reg = <0x380000 0x200000>; + read-only; + }; + + partition@580000 { + label = "ubi"; + reg = <0x580000 0x7a80000>; + }; + }; + }; + }; + }; +}; diff --git a/arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3-nor.dtso b/arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3-nor.dtso new file mode 100644 index 000000000000..84aa229e80f3 --- /dev/null +++ b/arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3-nor.dtso @@ -0,0 +1,68 @@ +/* SPDX-License-Identifier: (GPL-2.0-only OR MIT) */ +/* + * Authors: Daniel Golle + * Frank Wunderlich + */ + +/dts-v1/; +/plugin/; + +/ { + compatible = "bananapi,bpi-r3", "mediatek,mt7986a"; + + fragment@0 { + target-path = "/soc/spi@1100a000"; + __overlay__ { + #address-cells = <1>; + #size-cells = <0>; + flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <10000000>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "bl2"; + reg = <0x0 0x20000>; + read-only; + }; + + partition@20000 { + label = "reserved"; + reg = <0x20000 0x20000>; + }; + + partition@40000 { + label = "u-boot-env"; + reg = <0x40000 0x40000>; + }; + + partition@80000 { + label = "reserved2"; + reg = <0x80000 0x80000>; + }; + + partition@100000 { + label = "fip"; + reg = <0x100000 0x80000>; + read-only; + }; + + partition@180000 { + label = "recovery"; + reg = <0x180000 0xa80000>; + }; + + partition@c00000 { + label = "fit"; + reg = <0xc00000 0x1400000>; + }; + }; + }; + }; + }; +}; diff --git a/arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3-sd.dtso b/arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3-sd.dtso new file mode 100644 index 000000000000..08af778d8adc --- /dev/null +++ b/arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3-sd.dtso @@ -0,0 +1,24 @@ +// SPDX-License-Identifier: (GPL-2.0 OR MIT) +/* + * Copyright (C) 2021 MediaTek Inc. + * Author: Sam.Shih + */ + +/dts-v1/; +/plugin/; + +/ { + compatible = "bananapi,bpi-r3", "mediatek,mt7986a"; + model = "Bananapi BPI-R3 (sdmmc)"; + + fragment@0 { + target-path = "/soc/mmc@11230000"; + __overlay__ { + bus-width = <4>; + max-frequency = <52000000>; + cap-sd-highspeed; + status = "okay"; + }; + }; +}; + diff --git a/arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3.dts b/arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3.dts new file mode 100644 index 000000000000..33bd6febc160 --- /dev/null +++ b/arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3.dts @@ -0,0 +1,450 @@ +// SPDX-License-Identifier: (GPL-2.0 OR MIT) +/* + * Copyright (C) 2021 MediaTek Inc. + * Authors: Sam.Shih + * Frank Wunderlich + * Daniel Golle + */ + +/dts-v1/; +#include +#include +#include +#include + +#include "mt7986a.dtsi" + +/ { + model = "Bananapi BPI-R3"; + compatible = "bananapi,bpi-r3", "mediatek,mt7986a"; + + aliases { + serial0 = &uart0; + ethernet0 = &gmac0; + ethernet1 = &gmac1; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + dcin: regulator-12vd { + compatible = "regulator-fixed"; + regulator-name = "12vd"; + regulator-min-microvolt = <12000000>; + regulator-max-microvolt = <12000000>; + regulator-boot-on; + regulator-always-on; + }; + + gpio-keys { + compatible = "gpio-keys"; + + reset-key { + label = "reset"; + linux,code = ; + gpios = <&pio 9 GPIO_ACTIVE_LOW>; + }; + + wps-key { + label = "wps"; + linux,code = ; + gpios = <&pio 10 GPIO_ACTIVE_LOW>; + }; + }; + + /* i2c of the left SFP cage (wan) */ + i2c_sfp1: i2c-gpio-0 { + compatible = "i2c-gpio"; + sda-gpios = <&pio 16 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + scl-gpios = <&pio 17 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + i2c-gpio,delay-us = <2>; + #address-cells = <1>; + #size-cells = <0>; + }; + + /* i2c of the right SFP cage (lan) */ + i2c_sfp2: i2c-gpio-1 { + compatible = "i2c-gpio"; + sda-gpios = <&pio 18 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + scl-gpios = <&pio 19 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + i2c-gpio,delay-us = <2>; + #address-cells = <1>; + #size-cells = <0>; + }; + + leds { + compatible = "gpio-leds"; + + green_led: led-0 { + color = ; + function = LED_FUNCTION_POWER; + gpios = <&pio 69 GPIO_ACTIVE_HIGH>; + default-state = "on"; + }; + + blue_led: led-1 { + color = ; + function = LED_FUNCTION_STATUS; + gpios = <&pio 86 GPIO_ACTIVE_HIGH>; + default-state = "off"; + }; + }; + + reg_1p8v: regulator-1p8v { + compatible = "regulator-fixed"; + regulator-name = "1.8vd"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-boot-on; + regulator-always-on; + vin-supply = <&dcin>; + }; + + reg_3p3v: regulator-3p3v { + compatible = "regulator-fixed"; + regulator-name = "3.3vd"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + regulator-always-on; + vin-supply = <&dcin>; + }; + + /* left SFP cage (wan) */ + sfp1: sfp-1 { + compatible = "sff,sfp"; + i2c-bus = <&i2c_sfp1>; + los-gpios = <&pio 46 GPIO_ACTIVE_HIGH>; + mod-def0-gpios = <&pio 49 GPIO_ACTIVE_LOW>; + tx-disable-gpios = <&pio 20 GPIO_ACTIVE_HIGH>; + tx-fault-gpios = <&pio 7 GPIO_ACTIVE_HIGH>; + }; + + /* right SFP cage (lan) */ + sfp2: sfp-2 { + compatible = "sff,sfp"; + i2c-bus = <&i2c_sfp2>; + los-gpios = <&pio 31 GPIO_ACTIVE_HIGH>; + mod-def0-gpios = <&pio 47 GPIO_ACTIVE_LOW>; + tx-disable-gpios = <&pio 15 GPIO_ACTIVE_HIGH>; + tx-fault-gpios = <&pio 48 GPIO_ACTIVE_HIGH>; + }; +}; + +&crypto { + status = "okay"; +}; + +ð { + status = "okay"; + + gmac0: mac@0 { + compatible = "mediatek,eth-mac"; + reg = <0>; + phy-mode = "2500base-x"; + + fixed-link { + speed = <2500>; + full-duplex; + pause; + }; + }; + + gmac1: mac@1 { + compatible = "mediatek,eth-mac"; + reg = <1>; + phy-mode = "2500base-x"; + sfp = <&sfp1>; + managed = "in-band-status"; + }; + + mdio: mdio-bus { + #address-cells = <1>; + #size-cells = <0>; + }; +}; + +&mdio { + switch: switch@31 { + compatible = "mediatek,mt7531"; + reg = <31>; + interrupt-controller; + #interrupt-cells = <1>; + interrupt-parent = <&pio>; + interrupts = <66 IRQ_TYPE_LEVEL_HIGH>; + reset-gpios = <&pio 5 GPIO_ACTIVE_HIGH>; + }; +}; + +&mmc0 { + pinctrl-names = "default", "state_uhs"; + pinctrl-0 = <&mmc0_pins_default>; + pinctrl-1 = <&mmc0_pins_uhs>; + vmmc-supply = <®_3p3v>; + vqmmc-supply = <®_1p8v>; +}; + +&i2c0 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c_pins>; + status = "okay"; +}; + +&pcie { + pinctrl-names = "default"; + pinctrl-0 = <&pcie_pins>; + status = "okay"; +}; + +&pcie_phy { + status = "okay"; +}; + +&pio { + i2c_pins: i2c-pins { + mux { + function = "i2c"; + groups = "i2c"; + }; + }; + + mmc0_pins_default: mmc0-pins { + mux { + function = "emmc"; + groups = "emmc_51"; + }; + conf-cmd-dat { + pins = "EMMC_DATA_0", "EMMC_DATA_1", "EMMC_DATA_2", + "EMMC_DATA_3", "EMMC_DATA_4", "EMMC_DATA_5", + "EMMC_DATA_6", "EMMC_DATA_7", "EMMC_CMD"; + input-enable; + drive-strength = <4>; + bias-pull-up = ; /* pull-up 10K */ + }; + conf-clk { + pins = "EMMC_CK"; + drive-strength = <6>; + bias-pull-down = ; /* pull-down 50K */ + }; + conf-ds { + pins = "EMMC_DSL"; + bias-pull-down = ; /* pull-down 50K */ + }; + conf-rst { + pins = "EMMC_RSTB"; + drive-strength = <4>; + bias-pull-up = ; /* pull-up 10K */ + }; + }; + + mmc0_pins_uhs: mmc0-uhs-pins { + mux { + function = "emmc"; + groups = "emmc_51"; + }; + conf-cmd-dat { + pins = "EMMC_DATA_0", "EMMC_DATA_1", "EMMC_DATA_2", + "EMMC_DATA_3", "EMMC_DATA_4", "EMMC_DATA_5", + "EMMC_DATA_6", "EMMC_DATA_7", "EMMC_CMD"; + input-enable; + drive-strength = <4>; + bias-pull-up = ; /* pull-up 10K */ + }; + conf-clk { + pins = "EMMC_CK"; + drive-strength = <6>; + bias-pull-down = ; /* pull-down 50K */ + }; + conf-ds { + pins = "EMMC_DSL"; + bias-pull-down = ; /* pull-down 50K */ + }; + conf-rst { + pins = "EMMC_RSTB"; + drive-strength = <4>; + bias-pull-up = ; /* pull-up 10K */ + }; + }; + + pcie_pins: pcie-pins { + mux { + function = "pcie"; + groups = "pcie_clk", "pcie_pereset"; + }; + }; + + spi_flash_pins: spi-flash-pins { + mux { + function = "spi"; + groups = "spi0", "spi0_wp_hold"; + }; + }; + + spic_pins: spic-pins { + mux { + function = "spi"; + groups = "spi1_0"; + }; + }; + + uart1_pins: uart1-pins { + mux { + function = "uart"; + groups = "uart1_rx_tx"; + }; + }; + + uart2_pins: uart2-pins { + mux { + function = "uart"; + groups = "uart2_0_rx_tx"; + }; + }; + + wf_2g_5g_pins: wf-2g-5g-pins { + mux { + function = "wifi"; + groups = "wf_2g", "wf_5g"; + }; + conf { + pins = "WF0_HB1", "WF0_HB2", "WF0_HB3", "WF0_HB4", + "WF0_HB0", "WF0_HB0_B", "WF0_HB5", "WF0_HB6", + "WF0_HB7", "WF0_HB8", "WF0_HB9", "WF0_HB10", + "WF0_TOP_CLK", "WF0_TOP_DATA", "WF1_HB1", + "WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0", + "WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8", + "WF1_TOP_CLK", "WF1_TOP_DATA"; + drive-strength = <4>; + }; + }; + + wf_dbdc_pins: wf-dbdc-pins { + mux { + function = "wifi"; + groups = "wf_dbdc"; + }; + conf { + pins = "WF0_HB1", "WF0_HB2", "WF0_HB3", "WF0_HB4", + "WF0_HB0", "WF0_HB0_B", "WF0_HB5", "WF0_HB6", + "WF0_HB7", "WF0_HB8", "WF0_HB9", "WF0_HB10", + "WF0_TOP_CLK", "WF0_TOP_DATA", "WF1_HB1", + "WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0", + "WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8", + "WF1_TOP_CLK", "WF1_TOP_DATA"; + drive-strength = <4>; + }; + }; + + wf_led_pins: wf-led-pins { + mux { + function = "led"; + groups = "wifi_led"; + }; + }; +}; + +&spi0 { + pinctrl-names = "default"; + pinctrl-0 = <&spi_flash_pins>; + status = "okay"; +}; + +&spi1 { + pinctrl-names = "default"; + pinctrl-0 = <&spic_pins>; + status = "okay"; +}; + +&ssusb { + status = "okay"; +}; + +&switch { + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + label = "wan"; + }; + + port@1 { + reg = <1>; + label = "lan0"; + }; + + port@2 { + reg = <2>; + label = "lan1"; + }; + + port@3 { + reg = <3>; + label = "lan2"; + }; + + port@4 { + reg = <4>; + label = "lan3"; + }; + + port5: port@5 { + reg = <5>; + label = "lan4"; + phy-mode = "2500base-x"; + sfp = <&sfp2>; + managed = "in-band-status"; + }; + + port@6 { + reg = <6>; + label = "cpu"; + ethernet = <&gmac0>; + phy-mode = "2500base-x"; + + fixed-link { + speed = <2500>; + full-duplex; + pause; + }; + }; + }; +}; + +&trng { + status = "okay"; +}; + +&uart0 { + status = "okay"; +}; + +&uart1 { + pinctrl-names = "default"; + pinctrl-0 = <&uart1_pins>; + status = "okay"; +}; + +&uart2 { + pinctrl-names = "default"; + pinctrl-0 = <&uart2_pins>; + status = "okay"; +}; + +&usb_phy { + status = "okay"; +}; + +&watchdog { + status = "okay"; +}; + +&wifi { + status = "okay"; + pinctrl-names = "default", "dbdc"; + pinctrl-0 = <&wf_2g_5g_pins>, <&wf_led_pins>; + pinctrl-1 = <&wf_dbdc_pins>, <&wf_led_pins>; +}; +