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[209.51.188.17]) by mx.google.com with ESMTPS id iv8-20020ad45ce8000000b00531a4ccf140si10648458qvb.456.2023.01.04.14.57.41 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Wed, 04 Jan 2023 14:57:41 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="V/sFf4E1"; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pDBt7-0008Tu-LL; Wed, 04 Jan 2023 17:05:33 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pDBsi-0008Gi-01 for qemu-devel@nongnu.org; Wed, 04 Jan 2023 17:05:10 -0500 Received: from mail-ej1-x62f.google.com ([2a00:1450:4864:20::62f]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1pDBse-0005Ct-UG for qemu-devel@nongnu.org; Wed, 04 Jan 2023 17:05:07 -0500 Received: by mail-ej1-x62f.google.com with SMTP id gh17so86056416ejb.6 for ; Wed, 04 Jan 2023 14:05:04 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=AymZEv+37B+jt/sn5PVP1oF6IqgH4PMlbkATZu7erfY=; b=V/sFf4E1NoHzdzE0y2hhEA6AF2IhFKc1USaCA+9mNcb1txQzd1RYTEwCU8aoYz5Sk6 lIH9/gFNBZO/3yRGixPD0j3uTLAAjCt0c5BmYAt8lpd7wGAigPHETbcyFxBhekOCPSgi u/c/avpkKQgljDC6miZAtV7aCmB6zNzyGwdy3w/UQh54KoUm/VbEmvSsTW4k+TNhLqXI A76NS9H/N2TI2GoBs6VIkSui55RNxbpTlB45g2LU9SIaDLGdJMKSx4jK+81P/wWVqzYS a6PqhtU6kUNsoMHF3y9qGYxLgxnm9udqN1I0qu4G9Bez23nfrPxgpf4lMUaaIvgb8+nL VX4A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=AymZEv+37B+jt/sn5PVP1oF6IqgH4PMlbkATZu7erfY=; b=KsQ9YOWBotj7TLM9jBfU/9tGee+4XEE1t1K6dbRYH8bgpGq8p6Z9zRqzc/H6VauXLg i6VTo2z/U+tCvcrWAdvlks6wIqKveZogjlNr1c3GDK4HnGgn6PsifLIFnrRLB1PsbssH qO+wHrOZLwcpjkpddh6VyHuXvHkVfH7wFYLqmScnVXdOuCKAgiwtghjyBHETHX+5FmXT uK/PAn5TH60h8jILt5sV0pidFKq5CV+0ioibzshyfOFIfUnit/e5uapZn+5MsPXBP8Jk Yj4YVS9Hsuu7FupCmaK+ttWyE0r/BCGT+T55VUKyPWJdsXYHts4y9GuKpCa3B53T9EB8 VAwA== X-Gm-Message-State: AFqh2komdotebDj2yP32JFQVGM/VhpBO5LwQ44D5/7XEmqtH8f/U4ybw C5/HtL63dy5DwuEHNZfbVuHf1hMfuOY3ZPJH X-Received: by 2002:a17:907:9394:b0:7b2:7ae8:3661 with SMTP id cm20-20020a170907939400b007b27ae83661mr44537804ejc.21.1672869903056; Wed, 04 Jan 2023 14:05:03 -0800 (PST) Received: from localhost.localdomain ([185.126.107.38]) by smtp.gmail.com with ESMTPSA id v9-20020a170906292900b0073dd8e5a39fsm15648723ejd.156.2023.01.04.14.04.59 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Wed, 04 Jan 2023 14:05:02 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Song Gao , Antony Pavlov , Jan Kiszka , Marcel Apfelbaum , Hanna Reitz , Bernhard Beschow , BALATON Zoltan , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Alistair Francis , Paolo Bonzini , qemu-ppc@nongnu.org, Mark Burton , Richard Henderson , Magnus Damm , "Michael S. Tsirkin" , Bin Meng , Max Filippov , Aurelien Jarno , Eduardo Habkost , Palmer Dabbelt , Radoslaw Biernacki , Jiaxun Yang , "Edgar E. Iglesias" , Xiaojuan Yang , Peter Maydell , qemu-block@nongnu.org, qemu-riscv@nongnu.org, Yoshinori Sato , Alistair Francis , qemu-arm@nongnu.org, Leif Lindholm , Kevin Wolf Subject: [PATCH 01/20] hw/block: Pass DeviceState to pflash_cfi01_get_blk() Date: Wed, 4 Jan 2023 23:04:30 +0100 Message-Id: <20230104220449.41337-2-philmd@linaro.org> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20230104220449.41337-1-philmd@linaro.org> References: <20230104220449.41337-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::62f; envelope-from=philmd@linaro.org; helo=mail-ej1-x62f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org The point of a getter() function is to not expose the structure internal fields. Otherwise callers could simply access the PFlashCFI01::blk field. Have the callers pass a DeviceState* argument. The QOM type check is done in the callee. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Bin Meng --- hw/arm/sbsa-ref.c | 2 +- hw/arm/virt.c | 2 +- hw/block/pflash_cfi01.c | 4 +++- hw/i386/pc_sysfw.c | 4 ++-- include/hw/block/flash.h | 2 +- 5 files changed, 8 insertions(+), 6 deletions(-) diff --git a/hw/arm/sbsa-ref.c b/hw/arm/sbsa-ref.c index 4bb444684f..65b9acba04 100644 --- a/hw/arm/sbsa-ref.c +++ b/hw/arm/sbsa-ref.c @@ -346,7 +346,7 @@ static bool sbsa_firmware_init(SBSAMachineState *sms, sbsa_flash_map(sms, sysmem, secure_sysmem); - pflash_blk0 = pflash_cfi01_get_blk(sms->flash[0]); + pflash_blk0 = pflash_cfi01_get_blk(DEVICE(sms->flash[0])); bios_name = MACHINE(sms)->firmware; if (bios_name) { diff --git a/hw/arm/virt.c b/hw/arm/virt.c index ea2413a0ba..954e3ca5ce 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -1233,7 +1233,7 @@ static bool virt_firmware_init(VirtMachineState *vms, virt_flash_map(vms, sysmem, secure_sysmem); - pflash_blk0 = pflash_cfi01_get_blk(vms->flash[0]); + pflash_blk0 = pflash_cfi01_get_blk(DEVICE(vms->flash[0])); bios_name = MACHINE(vms)->firmware; if (bios_name) { diff --git a/hw/block/pflash_cfi01.c b/hw/block/pflash_cfi01.c index 0cbc2fb4cb..458c50ec45 100644 --- a/hw/block/pflash_cfi01.c +++ b/hw/block/pflash_cfi01.c @@ -984,8 +984,10 @@ PFlashCFI01 *pflash_cfi01_register(hwaddr base, return PFLASH_CFI01(dev); } -BlockBackend *pflash_cfi01_get_blk(PFlashCFI01 *fl) +BlockBackend *pflash_cfi01_get_blk(DeviceState *dev) { + PFlashCFI01 *fl = PFLASH_CFI01(dev); + return fl->blk; } diff --git a/hw/i386/pc_sysfw.c b/hw/i386/pc_sysfw.c index c8d9e71b88..4b85c48ec8 100644 --- a/hw/i386/pc_sysfw.c +++ b/hw/i386/pc_sysfw.c @@ -152,7 +152,7 @@ static void pc_system_flash_map(PCMachineState *pcms, for (i = 0; i < ARRAY_SIZE(pcms->flash); i++) { system_flash = pcms->flash[i]; - blk = pflash_cfi01_get_blk(system_flash); + blk = pflash_cfi01_get_blk(DEVICE(system_flash)); if (!blk) { break; } @@ -216,7 +216,7 @@ void pc_system_firmware_init(PCMachineState *pcms, for (i = 0; i < ARRAY_SIZE(pcms->flash); i++) { pflash_cfi01_legacy_drive(pcms->flash[i], drive_get(IF_PFLASH, 0, i)); - pflash_blk[i] = pflash_cfi01_get_blk(pcms->flash[i]); + pflash_blk[i] = pflash_cfi01_get_blk(DEVICE(pcms->flash[i])); } /* Reject gaps */ diff --git a/include/hw/block/flash.h b/include/hw/block/flash.h index 86d8363bb0..961b6e9f74 100644 --- a/include/hw/block/flash.h +++ b/include/hw/block/flash.h @@ -21,7 +21,7 @@ PFlashCFI01 *pflash_cfi01_register(hwaddr base, uint16_t id0, uint16_t id1, uint16_t id2, uint16_t id3, int be); -BlockBackend *pflash_cfi01_get_blk(PFlashCFI01 *fl); +BlockBackend *pflash_cfi01_get_blk(DeviceState *dev); MemoryRegion *pflash_cfi01_get_memory(PFlashCFI01 *fl); void pflash_cfi01_legacy_drive(PFlashCFI01 *dev, DriveInfo *dinfo); From patchwork Wed Jan 4 22:04:31 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 639042 Delivered-To: patch@linaro.org Received: by 2002:a17:522:f3c4:b0:4b4:3859:abed with SMTP id in4csp1963328pvb; Wed, 4 Jan 2023 14:12:57 -0800 (PST) X-Google-Smtp-Source: AMrXdXthtyYrIBAP3+4PTlV5tXlngZ4zqzrxcOlfg9dhMRIr5OwhwSJkauReoXiVeodY5eoJIp6v X-Received: by 2002:a0c:e9c5:0:b0:531:a62f:69bd with SMTP id q5-20020a0ce9c5000000b00531a62f69bdmr31743443qvo.48.1672870377540; Wed, 04 Jan 2023 14:12:57 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1672870377; cv=none; d=google.com; s=arc-20160816; b=wlHofivFpThDpfeZ32l3yq/RzB2UR8nb9L/MpMm0pwaQfTl8oN2sH3zJOCQfyLP5Jb UMe9Sxepq0A3Cee/Cv4CeCz7veb24gbnBIgUvdIFSe7wifcWpgzGi5g1QiEeEhIj/4df MqUakfhQzhC7U2BMOI8l7p5hFA+6yWE73kHHp9XFRRSzuToPdU2tE+aBDuWiN9zEkdxL ZeFkijagzFjePrdOjtLrRSQ3EM8mOijCXoqZHo1fbLMToZejRROhjj+oQXSoSnnW6379 YL/1orrNOXKCaAimtL95jNvKAD7wwADkRyNroSOUYjacqhbSGrNBOjgqai0D5v92EVhX dqfw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=rkKzY1HM1SiWRLbXS14jWSBKvZcyQVWsRHeTd+kMCAQ=; b=GPhjMCAOYSa7rKmderhHCaHtpt8NjMJ4vKN5ALpiXkEwf3G8cd7WMdlTk0G/Y2+L9o UTgbz/AwTSsQQPhOU5+QNnOuJmYqci0T3Jn3RPNbgMP4w407BRrFRIMBkuXrBvWMqBRS FqxuPLAnSdqN5DlBZ/D80w1DghSXO/ktOJ9Al59c8p+nzxtSbjsgSlMg9P5LC0L5cQJl AHiiNGmzC/9mdSW1dDdUXgZXr71LXIM5onVeFcus7a19tcm6k1ZkzuYvuhZFCt6cyqoK rR0Migp8bNVIxPSUl3E5YHuKFU1pCk9GdroFfpiPTlk066Q6U1GPClL4n8C3OcNO8aoy tq1g== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=DarwSARF; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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Tsirkin" , Bin Meng , Max Filippov , Aurelien Jarno , Eduardo Habkost , Palmer Dabbelt , Radoslaw Biernacki , Jiaxun Yang , "Edgar E. Iglesias" , Xiaojuan Yang , Peter Maydell , qemu-block@nongnu.org, qemu-riscv@nongnu.org, Yoshinori Sato , Alistair Francis , qemu-arm@nongnu.org, Leif Lindholm , Kevin Wolf Subject: [PATCH 02/20] hw/block: Use pflash_cfi01_get_blk() in pflash_cfi01_legacy_drive() Date: Wed, 4 Jan 2023 23:04:31 +0100 Message-Id: <20230104220449.41337-3-philmd@linaro.org> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20230104220449.41337-1-philmd@linaro.org> References: <20230104220449.41337-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::630; envelope-from=philmd@linaro.org; helo=mail-ej1-x630.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org By using pflash_cfi01_get_blk(), pflash_cfi01_legacy_drive() doesn't require any knowledge of the PFlashCFI01 structure. Thus we can pass a generic DeviceState pointer. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Bin Meng --- hw/arm/sbsa-ref.c | 2 +- hw/arm/virt.c | 2 +- hw/block/pflash_cfi01.c | 6 +++--- hw/i386/pc_sysfw.c | 2 +- hw/riscv/virt.c | 2 +- include/hw/block/flash.h | 2 +- 6 files changed, 8 insertions(+), 8 deletions(-) diff --git a/hw/arm/sbsa-ref.c b/hw/arm/sbsa-ref.c index 65b9acba04..1d29e8ca7f 100644 --- a/hw/arm/sbsa-ref.c +++ b/hw/arm/sbsa-ref.c @@ -340,7 +340,7 @@ static bool sbsa_firmware_init(SBSAMachineState *sms, /* Map legacy -drive if=pflash to machine properties */ for (i = 0; i < ARRAY_SIZE(sms->flash); i++) { - pflash_cfi01_legacy_drive(sms->flash[i], + pflash_cfi01_legacy_drive(DEVICE(sms->flash[i]), drive_get(IF_PFLASH, 0, i)); } diff --git a/hw/arm/virt.c b/hw/arm/virt.c index 954e3ca5ce..57726b0f52 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -1227,7 +1227,7 @@ static bool virt_firmware_init(VirtMachineState *vms, /* Map legacy -drive if=pflash to machine properties */ for (i = 0; i < ARRAY_SIZE(vms->flash); i++) { - pflash_cfi01_legacy_drive(vms->flash[i], + pflash_cfi01_legacy_drive(DEVICE(vms->flash[i]), drive_get(IF_PFLASH, 0, i)); } diff --git a/hw/block/pflash_cfi01.c b/hw/block/pflash_cfi01.c index 458c50ec45..8beba24989 100644 --- a/hw/block/pflash_cfi01.c +++ b/hw/block/pflash_cfi01.c @@ -1002,7 +1002,7 @@ MemoryRegion *pflash_cfi01_get_memory(PFlashCFI01 *fl) * Else if @fl's property "drive" is already set, fatal error. * Else set it to the BlockBackend with @dinfo. */ -void pflash_cfi01_legacy_drive(PFlashCFI01 *fl, DriveInfo *dinfo) +void pflash_cfi01_legacy_drive(DeviceState *dev, DriveInfo *dinfo) { Location loc; @@ -1012,11 +1012,11 @@ void pflash_cfi01_legacy_drive(PFlashCFI01 *fl, DriveInfo *dinfo) loc_push_none(&loc); qemu_opts_loc_restore(dinfo->opts); - if (fl->blk) { + if (pflash_cfi01_get_blk(dev)) { error_report("clashes with -machine"); exit(1); } - qdev_prop_set_drive_err(DEVICE(fl), "drive", blk_by_legacy_dinfo(dinfo), + qdev_prop_set_drive_err(dev, "drive", blk_by_legacy_dinfo(dinfo), &error_fatal); loc_pop(&loc); } diff --git a/hw/i386/pc_sysfw.c b/hw/i386/pc_sysfw.c index 4b85c48ec8..c08cba6628 100644 --- a/hw/i386/pc_sysfw.c +++ b/hw/i386/pc_sysfw.c @@ -214,7 +214,7 @@ void pc_system_firmware_init(PCMachineState *pcms, /* Map legacy -drive if=pflash to machine properties */ for (i = 0; i < ARRAY_SIZE(pcms->flash); i++) { - pflash_cfi01_legacy_drive(pcms->flash[i], + pflash_cfi01_legacy_drive(DEVICE(pcms->flash[i]), drive_get(IF_PFLASH, 0, i)); pflash_blk[i] = pflash_cfi01_get_blk(DEVICE(pcms->flash[i])); } diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c index a5bc7353b4..400bd9329f 100644 --- a/hw/riscv/virt.c +++ b/hw/riscv/virt.c @@ -1517,7 +1517,7 @@ static void virt_machine_init(MachineState *machine) for (i = 0; i < ARRAY_SIZE(s->flash); i++) { /* Map legacy -drive if=pflash to machine properties */ - pflash_cfi01_legacy_drive(s->flash[i], + pflash_cfi01_legacy_drive(DEVICE(s->flash[i]), drive_get(IF_PFLASH, 0, i)); } virt_flash_map(s, system_memory); diff --git a/include/hw/block/flash.h b/include/hw/block/flash.h index 961b6e9f74..701a2c1701 100644 --- a/include/hw/block/flash.h +++ b/include/hw/block/flash.h @@ -23,7 +23,7 @@ PFlashCFI01 *pflash_cfi01_register(hwaddr base, int be); BlockBackend *pflash_cfi01_get_blk(DeviceState *dev); MemoryRegion *pflash_cfi01_get_memory(PFlashCFI01 *fl); -void pflash_cfi01_legacy_drive(PFlashCFI01 *dev, DriveInfo *dinfo); +void pflash_cfi01_legacy_drive(DeviceState *dev, DriveInfo *dinfo); /* pflash_cfi02.c */ From patchwork Wed Jan 4 22:04:32 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 639053 Delivered-To: patch@linaro.org Received: by 2002:a17:522:f3c4:b0:4b4:3859:abed with SMTP id in4csp1973398pvb; Wed, 4 Jan 2023 14:44:36 -0800 (PST) X-Google-Smtp-Source: AMrXdXuoOcCUHoaEt9/MWi+Fgeo4E/vX2EXPOeU4D/l+RIeDlH0keaM1j4DX2M+R9+v8g1nz/Kpq X-Received: by 2002:ac8:754d:0:b0:3a9:8b1a:fe22 with SMTP id b13-20020ac8754d000000b003a98b1afe22mr66153483qtr.4.1672872276597; Wed, 04 Jan 2023 14:44:36 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1672872276; cv=none; d=google.com; s=arc-20160816; b=G3BPPLSI31TWuZZuhQJZTxcyuxpVeXmL/iPeKv6ztdK5GQeXQ6aY/yHEy1qX9RzVUx qPI744xm4WyG8Mif97pTiCIMCAslFCTinl/fwTP8PX17pTEHf2rxwsMovGgb6HDcc9P8 I2ROyAmf5+75sH6jJJuPg8jQwMFHPVwv1WveFdYSr4ML7hBgGI4Zfbkd3XfwDwxXJ7x5 cJ3VOyJgWZX2b1UJljvETVJMDb8n5hg7CRFtaZM4w4JlODaQ3FmyAhLlOvQlhzhaLCjT A2j2/HlRexivB1DDpyL4BDoCTA7XaItL7CtJYGUHdQqRTR5iFViS/ggVdxJXSqIuXpZG sAbQ== ARC-Message-Signature: i=1; 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Tsirkin" , Bin Meng , Max Filippov , Aurelien Jarno , Eduardo Habkost , Palmer Dabbelt , Radoslaw Biernacki , Jiaxun Yang , "Edgar E. Iglesias" , Xiaojuan Yang , Peter Maydell , qemu-block@nongnu.org, qemu-riscv@nongnu.org, Yoshinori Sato , Alistair Francis , qemu-arm@nongnu.org, Leif Lindholm , Kevin Wolf Subject: [PATCH 03/20] hw/block: Pass DeviceState to pflash_cfi01_get_memory() Date: Wed, 4 Jan 2023 23:04:32 +0100 Message-Id: <20230104220449.41337-4-philmd@linaro.org> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20230104220449.41337-1-philmd@linaro.org> References: <20230104220449.41337-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::632; envelope-from=philmd@linaro.org; helo=mail-ej1-x632.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org The point of a getter() function is to not expose the structure internal fields. Otherwise callers could simply access the PFlashCFI01::mem field. Have the callers pass a DeviceState* argument. The QOM type check is done in the callee. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Bin Meng --- hw/block/pflash_cfi01.c | 4 +++- hw/i386/pc_sysfw.c | 2 +- hw/mips/malta.c | 3 ++- hw/ppc/e500.c | 2 +- hw/xtensa/xtfpga.c | 2 +- include/hw/block/flash.h | 2 +- 6 files changed, 9 insertions(+), 6 deletions(-) diff --git a/hw/block/pflash_cfi01.c b/hw/block/pflash_cfi01.c index 8beba24989..866ea596ea 100644 --- a/hw/block/pflash_cfi01.c +++ b/hw/block/pflash_cfi01.c @@ -991,8 +991,10 @@ BlockBackend *pflash_cfi01_get_blk(DeviceState *dev) return fl->blk; } -MemoryRegion *pflash_cfi01_get_memory(PFlashCFI01 *fl) +MemoryRegion *pflash_cfi01_get_memory(DeviceState *dev) { + PFlashCFI01 *fl = PFLASH_CFI01(dev); + return &fl->mem; } diff --git a/hw/i386/pc_sysfw.c b/hw/i386/pc_sysfw.c index c08cba6628..60db0efb41 100644 --- a/hw/i386/pc_sysfw.c +++ b/hw/i386/pc_sysfw.c @@ -187,7 +187,7 @@ static void pc_system_flash_map(PCMachineState *pcms, 0x100000000ULL - total_size); if (i == 0) { - flash_mem = pflash_cfi01_get_memory(system_flash); + flash_mem = pflash_cfi01_get_memory(DEVICE(system_flash)); pc_isa_bios_init(rom_memory, flash_mem, size); /* Encrypt the pflash boot ROM */ diff --git a/hw/mips/malta.c b/hw/mips/malta.c index c0a2e0ab04..43fbb97799 100644 --- a/hw/mips/malta.c +++ b/hw/mips/malta.c @@ -1291,7 +1291,8 @@ void mips_malta_init(MachineState *machine) dinfo ? blk_by_legacy_dinfo(dinfo) : NULL, 65536, 4, 0x0000, 0x0000, 0x0000, 0x0000, be); - bios = pflash_cfi01_get_memory(fl); + dev = DEVICE(fl); + bios = pflash_cfi01_get_memory(dev); fl_idx++; if (kernel_filename) { ram_low_size = MIN(ram_size, 256 * MiB); diff --git a/hw/ppc/e500.c b/hw/ppc/e500.c index 9fa1f8e6cf..b127068431 100644 --- a/hw/ppc/e500.c +++ b/hw/ppc/e500.c @@ -1144,7 +1144,7 @@ void ppce500_init(MachineState *machine) sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); memory_region_add_subregion(&pms->pbus_dev->mmio, 0, - pflash_cfi01_get_memory(PFLASH_CFI01(dev))); + pflash_cfi01_get_memory(dev)); } /* diff --git a/hw/xtensa/xtfpga.c b/hw/xtensa/xtfpga.c index 2a5556a35f..bce3a543b0 100644 --- a/hw/xtensa/xtfpga.c +++ b/hw/xtensa/xtfpga.c @@ -459,7 +459,7 @@ static void xtfpga_init(const XtfpgaBoardDesc *board, MachineState *machine) } } else { if (flash) { - MemoryRegion *flash_mr = pflash_cfi01_get_memory(flash); + MemoryRegion *flash_mr = pflash_cfi01_get_memory(DEVICE(flash)); MemoryRegion *flash_io = g_malloc(sizeof(*flash_io)); uint32_t size = env->config->sysrom.location[0].size; diff --git a/include/hw/block/flash.h b/include/hw/block/flash.h index 701a2c1701..25affdf7a5 100644 --- a/include/hw/block/flash.h +++ b/include/hw/block/flash.h @@ -22,7 +22,7 @@ PFlashCFI01 *pflash_cfi01_register(hwaddr base, uint16_t id2, uint16_t id3, int be); BlockBackend *pflash_cfi01_get_blk(DeviceState *dev); -MemoryRegion *pflash_cfi01_get_memory(PFlashCFI01 *fl); +MemoryRegion *pflash_cfi01_get_memory(DeviceState *dev); void pflash_cfi01_legacy_drive(DeviceState *dev, DriveInfo *dinfo); /* pflash_cfi02.c */ From patchwork Wed Jan 4 22:04:33 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 639046 Delivered-To: patch@linaro.org Received: by 2002:a17:522:f3c4:b0:4b4:3859:abed with SMTP id in4csp1966626pvb; Wed, 4 Jan 2023 14:23:09 -0800 (PST) X-Google-Smtp-Source: AMrXdXskvLE7QKxAoUnub1zM0JIUykbmNbcmbEpVfl46crZRB6xNs7tOUn9V3cVEyVsKv9SQmSc+ X-Received: by 2002:a0c:f792:0:b0:531:801d:8ef2 with SMTP id s18-20020a0cf792000000b00531801d8ef2mr48852272qvn.29.1672870989343; Wed, 04 Jan 2023 14:23:09 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1672870989; cv=none; d=google.com; s=arc-20160816; b=Gyu86CKvb45DMWrqfJf2f8Q4FOddqX4LphB1pNjD5AegwpCM1QkOTcuMsP0eD13Ngo LTHo4efzSPJR6R+rfZRCl92po7bKriEBT83GJ5Uk2heqZbbiBJoufNK5mJEYbf7aSHug 9+hIFc9NOwh+uJGOK9T86L4DEKQWD9dI+omBMJr8gOo2d7KxiF419bMqZU7LjU17QANN Lg6cPGfJz3HDtqNPAjJop6LBsLpPALxuiKRxpUHiKwk/DQF0Dn7ETproj7CFdULb881i qqOkCl4BFMEGiC+4B5ryey/ocYnOiLAEMOIF52gDNIYDj3w6HFd3htncOjgEwavDPOKB x5mA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=Qmw6mVPGSBueqZ8PeN/WPt3EaFW2iGA5QNW2jlN+kis=; b=F3w3Aw/xujj50mBG7Sw31j3DoZ58YDG/M+lb7qj08o2mQlGKJ7KS8hVM5DUZnReGj+ dDVTdy7mhvBGVMsInJDv4mhIC004YtJqDO1nsEd39k2ubvpYXsv0QQ0eB1ITLis6BDQQ c6+pKvXJA9Mf0rkZCYE+CGBit78TqJmkxfS5I/uBzAobn3IYNDNRaqIjCvNIbadOJOCY AnBYgnLiNyIh+O5OVEG+emk/3kf4n4pSxpDfKl44VElnPwf9XBAjkJceMnK5ol7fGwLy rJBxDTWfg7tMGx4CSGt9+wLxYyuvGCG1TuPKhx46UVEMH40tdQHhQHp1mEoI1uYNY0Cg cfqw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Cn18Ln+r; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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Tsirkin" , Bin Meng , Max Filippov , Aurelien Jarno , Eduardo Habkost , Palmer Dabbelt , Radoslaw Biernacki , Jiaxun Yang , "Edgar E. Iglesias" , Xiaojuan Yang , Peter Maydell , qemu-block@nongnu.org, qemu-riscv@nongnu.org, Yoshinori Sato , Alistair Francis , qemu-arm@nongnu.org, Leif Lindholm , Kevin Wolf Subject: [PATCH 04/20] hw/arm: Use generic DeviceState instead of PFlashCFI01 Date: Wed, 4 Jan 2023 23:04:33 +0100 Message-Id: <20230104220449.41337-5-philmd@linaro.org> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20230104220449.41337-1-philmd@linaro.org> References: <20230104220449.41337-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::52f; envelope-from=philmd@linaro.org; helo=mail-ed1-x52f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Nothing here requires access to PFlashCFI01 internal fields: use the inherited generic DeviceState. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Bin Meng --- hw/arm/sbsa-ref.c | 12 ++++++------ hw/arm/vexpress.c | 12 +++++------- hw/arm/virt.c | 10 +++++----- include/hw/arm/virt.h | 3 +-- 4 files changed, 17 insertions(+), 20 deletions(-) diff --git a/hw/arm/sbsa-ref.c b/hw/arm/sbsa-ref.c index 1d29e8ca7f..8e60e0e58d 100644 --- a/hw/arm/sbsa-ref.c +++ b/hw/arm/sbsa-ref.c @@ -91,7 +91,7 @@ struct SBSAMachineState { int fdt_size; int psci_conduit; DeviceState *gic; - PFlashCFI01 *flash[2]; + DeviceState *flash[2]; }; #define TYPE_SBSA_MACHINE MACHINE_TYPE_NAME("sbsa-ref") @@ -264,7 +264,7 @@ static void create_fdt(SBSAMachineState *sms) #define SBSA_FLASH_SECTOR_SIZE (256 * KiB) -static PFlashCFI01 *sbsa_flash_create1(SBSAMachineState *sms, +static DeviceState *sbsa_flash_create1(SBSAMachineState *sms, const char *name, const char *alias_prop_name) { @@ -286,7 +286,7 @@ static PFlashCFI01 *sbsa_flash_create1(SBSAMachineState *sms, object_property_add_child(OBJECT(sms), name, OBJECT(dev)); object_property_add_alias(OBJECT(sms), alias_prop_name, OBJECT(dev), "drive"); - return PFLASH_CFI01(dev); + return dev; } static void sbsa_flash_create(SBSAMachineState *sms) @@ -295,7 +295,7 @@ static void sbsa_flash_create(SBSAMachineState *sms) sms->flash[1] = sbsa_flash_create1(sms, "sbsa.flash1", "pflash1"); } -static void sbsa_flash_map1(PFlashCFI01 *flash, +static void sbsa_flash_map1(DeviceState *flash, hwaddr base, hwaddr size, MemoryRegion *sysmem) { @@ -340,13 +340,13 @@ static bool sbsa_firmware_init(SBSAMachineState *sms, /* Map legacy -drive if=pflash to machine properties */ for (i = 0; i < ARRAY_SIZE(sms->flash); i++) { - pflash_cfi01_legacy_drive(DEVICE(sms->flash[i]), + pflash_cfi01_legacy_drive(sms->flash[i], drive_get(IF_PFLASH, 0, i)); } sbsa_flash_map(sms, sysmem, secure_sysmem); - pflash_blk0 = pflash_cfi01_get_blk(DEVICE(sms->flash[0])); + pflash_blk0 = pflash_cfi01_get_blk(sms->flash[0]); bios_name = MACHINE(sms)->firmware; if (bios_name) { diff --git a/hw/arm/vexpress.c b/hw/arm/vexpress.c index e1d1983ae6..94eeff73d9 100644 --- a/hw/arm/vexpress.c +++ b/hw/arm/vexpress.c @@ -508,7 +508,7 @@ static void vexpress_modify_dtb(const struct arm_boot_info *info, void *fdt) /* Open code a private version of pflash registration since we * need to set non-default device width for VExpress platform. */ -static PFlashCFI01 *ve_pflash_cfi01_register(hwaddr base, const char *name, +static DeviceState *ve_pflash_cfi01_register(hwaddr base, const char *name, DriveInfo *di) { DeviceState *dev = qdev_new(TYPE_PFLASH_CFI01); @@ -531,7 +531,7 @@ static PFlashCFI01 *ve_pflash_cfi01_register(hwaddr base, const char *name, sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base); - return PFLASH_CFI01(dev); + return dev; } static void vexpress_common_init(MachineState *machine) @@ -543,7 +543,6 @@ static void vexpress_common_init(MachineState *machine) qemu_irq pic[64]; uint32_t sys_id; DriveInfo *dinfo; - PFlashCFI01 *pflash0; I2CBus *i2c; ram_addr_t vram_size, sram_size; MemoryRegion *sysmem = get_system_memory(); @@ -657,16 +656,15 @@ static void vexpress_common_init(MachineState *machine) sysbus_create_simple("pl111", map[VE_CLCD], pic[14]); dinfo = drive_get(IF_PFLASH, 0, 0); - pflash0 = ve_pflash_cfi01_register(map[VE_NORFLASH0], "vexpress.flash0", - dinfo); - if (!pflash0) { + dev = ve_pflash_cfi01_register(map[VE_NORFLASH0], "vexpress.flash0", dinfo); + if (!dev) { error_report("vexpress: error registering flash 0"); exit(1); } if (map[VE_NORFLASHALIAS] != -1) { /* Map flash 0 as an alias into low memory */ - flash0mem = sysbus_mmio_get_region(SYS_BUS_DEVICE(pflash0), 0); + flash0mem = sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), 0); memory_region_init_alias(flashalias, NULL, "vexpress.flashalias", flash0mem, 0, VEXPRESS_FLASH_SIZE); memory_region_add_subregion(sysmem, map[VE_NORFLASHALIAS], flashalias); diff --git a/hw/arm/virt.c b/hw/arm/virt.c index 57726b0f52..e47070105d 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -1105,7 +1105,7 @@ static void create_virtio_devices(const VirtMachineState *vms) #define VIRT_FLASH_SECTOR_SIZE (256 * KiB) -static PFlashCFI01 *virt_flash_create1(VirtMachineState *vms, +static DeviceState *virt_flash_create1(VirtMachineState *vms, const char *name, const char *alias_prop_name) { @@ -1127,7 +1127,7 @@ static PFlashCFI01 *virt_flash_create1(VirtMachineState *vms, object_property_add_child(OBJECT(vms), name, OBJECT(dev)); object_property_add_alias(OBJECT(vms), alias_prop_name, OBJECT(dev), "drive"); - return PFLASH_CFI01(dev); + return dev; } static void virt_flash_create(VirtMachineState *vms) @@ -1136,7 +1136,7 @@ static void virt_flash_create(VirtMachineState *vms) vms->flash[1] = virt_flash_create1(vms, "virt.flash1", "pflash1"); } -static void virt_flash_map1(PFlashCFI01 *flash, +static void virt_flash_map1(DeviceState *flash, hwaddr base, hwaddr size, MemoryRegion *sysmem) { @@ -1227,13 +1227,13 @@ static bool virt_firmware_init(VirtMachineState *vms, /* Map legacy -drive if=pflash to machine properties */ for (i = 0; i < ARRAY_SIZE(vms->flash); i++) { - pflash_cfi01_legacy_drive(DEVICE(vms->flash[i]), + pflash_cfi01_legacy_drive(vms->flash[i], drive_get(IF_PFLASH, 0, i)); } virt_flash_map(vms, sysmem, secure_sysmem); - pflash_blk0 = pflash_cfi01_get_blk(DEVICE(vms->flash[0])); + pflash_blk0 = pflash_cfi01_get_blk(vms->flash[0]); bios_name = MACHINE(vms)->firmware; if (bios_name) { diff --git a/include/hw/arm/virt.h b/include/hw/arm/virt.h index c7dd59d7f1..817b43b248 100644 --- a/include/hw/arm/virt.h +++ b/include/hw/arm/virt.h @@ -34,7 +34,6 @@ #include "qemu/notify.h" #include "hw/boards.h" #include "hw/arm/boot.h" -#include "hw/block/flash.h" #include "sysemu/kvm.h" #include "hw/intc/arm_gicv3_common.h" #include "qom/object.h" @@ -142,7 +141,7 @@ struct VirtMachineState { Notifier machine_done; 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Tsirkin" , Bin Meng , Max Filippov , Aurelien Jarno , Eduardo Habkost , Palmer Dabbelt , Radoslaw Biernacki , Jiaxun Yang , "Edgar E. Iglesias" , Xiaojuan Yang , Peter Maydell , qemu-block@nongnu.org, qemu-riscv@nongnu.org, Yoshinori Sato , Alistair Francis , qemu-arm@nongnu.org, Leif Lindholm , Kevin Wolf Subject: [PATCH 05/20] hw/loongarch: Use generic DeviceState instead of PFlashCFI01 Date: Wed, 4 Jan 2023 23:04:34 +0100 Message-Id: <20230104220449.41337-6-philmd@linaro.org> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20230104220449.41337-1-philmd@linaro.org> References: <20230104220449.41337-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::629; envelope-from=philmd@linaro.org; helo=mail-ej1-x629.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Nothing here requires access to PFlashCFI01 internal fields: use the inherited generic DeviceState. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Bin Meng --- hw/loongarch/virt.c | 9 ++++----- include/hw/loongarch/virt.h | 3 +-- 2 files changed, 5 insertions(+), 7 deletions(-) diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c index c8a495ea30..cd5aa26f49 100644 --- a/hw/loongarch/virt.c +++ b/hw/loongarch/virt.c @@ -45,7 +45,7 @@ #include "sysemu/block-backend.h" #include "hw/block/flash.h" -static void virt_flash_create(LoongArchMachineState *lams) +static DeviceState *virt_flash_create(LoongArchMachineState *lams) { DeviceState *dev = qdev_new(TYPE_PFLASH_CFI01); @@ -62,14 +62,13 @@ static void virt_flash_create(LoongArchMachineState *lams) object_property_add_alias(OBJECT(lams), "pflash", OBJECT(dev), "drive"); - lams->flash = PFLASH_CFI01(dev); + return dev; } static void virt_flash_map(LoongArchMachineState *lams, MemoryRegion *sysmem) { - PFlashCFI01 *flash = lams->flash; - DeviceState *dev = DEVICE(flash); + DeviceState *dev = lams->flash; hwaddr base = VIRT_FLASH_BASE; hwaddr size = VIRT_FLASH_SIZE; @@ -899,7 +898,7 @@ static void loongarch_machine_initfn(Object *obj) lams->acpi = ON_OFF_AUTO_AUTO; lams->oem_id = g_strndup(ACPI_BUILD_APPNAME6, 6); lams->oem_table_id = g_strndup(ACPI_BUILD_APPNAME8, 8); - virt_flash_create(lams); + lams->flash = virt_flash_create(lams); } static bool memhp_type_supported(DeviceState *dev) diff --git a/include/hw/loongarch/virt.h b/include/hw/loongarch/virt.h index f5f818894e..519b25c722 100644 --- a/include/hw/loongarch/virt.h +++ b/include/hw/loongarch/virt.h @@ -12,7 +12,6 @@ #include "hw/boards.h" #include "qemu/queue.h" #include "hw/intc/loongarch_ipi.h" -#include "hw/block/flash.h" #define LOONGARCH_MAX_VCPUS 4 @@ -52,7 +51,7 @@ struct LoongArchMachineState { int fdt_size; DeviceState *platform_bus_dev; PCIBus *pci_bus; - PFlashCFI01 *flash; + DeviceState *flash; }; #define TYPE_LOONGARCH_MACHINE MACHINE_TYPE_NAME("virt") From patchwork Wed Jan 4 22:04:35 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 639054 Delivered-To: patch@linaro.org Received: by 2002:a17:522:f3c4:b0:4b4:3859:abed with SMTP id in4csp1973688pvb; Wed, 4 Jan 2023 14:45:37 -0800 (PST) X-Google-Smtp-Source: AMrXdXulFGJ9sAxpJh5e0VadVwwIhyFW9bucWoxCBvsmk1z/j2bG+nc4HHnOL+2CF4+UMzvDsJS3 X-Received: by 2002:a05:622a:4d48:b0:3a6:258d:4387 with SMTP id fe8-20020a05622a4d4800b003a6258d4387mr81688029qtb.13.1672872337697; Wed, 04 Jan 2023 14:45:37 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1672872337; cv=none; d=google.com; s=arc-20160816; b=n9VK3vhddA97OVG8KfDIxRAvAE8xymVjxUFdP8PPzKCb2J3amxB2Th5M+/VqZ4nRtC SjRA+ZTlrPXqwn9W6FeUbpOe2qkuJNp6U6QE1UhF52W7IN7pQ9UxFzn1leDRAJdrVH6q FdT5p2ICNYfyRH6THmza9M2eXfikD+9XWGMyI/4Pl0AuLOrwaWf4o6JXxKarAXErKXkb go7PEMjoREB213Qy36FXvp90P2/cEWVwjn79zJmc61pVjAwXhfz44m/XfyNLbv5UcSks 9wKoV0jvBMAF2WXFJXscz6FmusNo05hWmO7o3otMvmT7SGFNjtxUzVrsZrKUPayvq+Yw xfbg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=ostFdFduA8VJQbdYun/a8v7V9oLZ2nQ4qLyqomH/nUo=; b=UeejIzONJheAZU1OIQf6gj3Iy1m+b761zORN82zIMLeoxO1VrGVLfoRmp2YqfbFB2h 6BioFAVSLfUDOuqm5CVergLdyWQ9B+WDusz1ixbrpToiJz/SzexnDz4YdvJD5f3QVzbL 3Tqdbw3MBclobe0niYSRw+DFCkx0VK15hfhmipBEVKkO9sxXsyqC2e5vFaUJTRu8+XCA Y9PSn7kLHyjk5g/WkyKtAp/bE3GuKyUcNBfsNf8DmOumjmF94Bb/esoFNz0lC709WKoj qkNvn70qgtRKo3qX8z2zoMmJZYD8e4ZwJ87rZGPnPrq3rYX6YpmARovBrxl+yTpaaolr P5Xg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=cZ1cbmjQ; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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Tsirkin" , Bin Meng , Max Filippov , Aurelien Jarno , Eduardo Habkost , Palmer Dabbelt , Radoslaw Biernacki , Jiaxun Yang , "Edgar E. Iglesias" , Xiaojuan Yang , Peter Maydell , qemu-block@nongnu.org, qemu-riscv@nongnu.org, Yoshinori Sato , Alistair Francis , qemu-arm@nongnu.org, Leif Lindholm , Kevin Wolf Subject: [PATCH 06/20] hw/riscv: Use generic DeviceState instead of PFlashCFI01 Date: Wed, 4 Jan 2023 23:04:35 +0100 Message-Id: <20230104220449.41337-7-philmd@linaro.org> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20230104220449.41337-1-philmd@linaro.org> References: <20230104220449.41337-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::636; envelope-from=philmd@linaro.org; helo=mail-ej1-x636.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Nothing here requires access to PFlashCFI01 internal fields: use the inherited generic DeviceState. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Daniel Henrique Barboza Reviewed-by: Bin Meng --- hw/riscv/virt.c | 9 +++++---- include/hw/riscv/virt.h | 3 +-- 2 files changed, 6 insertions(+), 6 deletions(-) diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c index 400bd9329f..b421a9dc12 100644 --- a/hw/riscv/virt.c +++ b/hw/riscv/virt.c @@ -46,6 +46,7 @@ #include "sysemu/sysemu.h" #include "sysemu/kvm.h" #include "sysemu/tpm.h" +#include "hw/block/flash.h" #include "hw/pci/pci.h" #include "hw/pci-host/gpex.h" #include "hw/display/ramfb.h" @@ -106,7 +107,7 @@ static MemMapEntry virt_high_pcie_memmap; #define VIRT_FLASH_SECTOR_SIZE (256 * KiB) -static PFlashCFI01 *virt_flash_create1(RISCVVirtState *s, +static DeviceState *virt_flash_create1(RISCVVirtState *s, const char *name, const char *alias_prop_name) { @@ -130,7 +131,7 @@ static PFlashCFI01 *virt_flash_create1(RISCVVirtState *s, object_property_add_alias(OBJECT(s), alias_prop_name, OBJECT(dev), "drive"); - return PFLASH_CFI01(dev); + return dev; } static void virt_flash_create(RISCVVirtState *s) @@ -139,7 +140,7 @@ static void virt_flash_create(RISCVVirtState *s) s->flash[1] = virt_flash_create1(s, "virt.flash1", "pflash1"); } -static void virt_flash_map1(PFlashCFI01 *flash, +static void virt_flash_map1(DeviceState *flash, hwaddr base, hwaddr size, MemoryRegion *sysmem) { @@ -1517,7 +1518,7 @@ static void virt_machine_init(MachineState *machine) for (i = 0; i < ARRAY_SIZE(s->flash); i++) { /* Map legacy -drive if=pflash to machine properties */ - pflash_cfi01_legacy_drive(DEVICE(s->flash[i]), + pflash_cfi01_legacy_drive(s->flash[i], drive_get(IF_PFLASH, 0, i)); } virt_flash_map(s, system_memory); diff --git a/include/hw/riscv/virt.h b/include/hw/riscv/virt.h index be4ab8fe7f..b700a46763 100644 --- a/include/hw/riscv/virt.h +++ b/include/hw/riscv/virt.h @@ -21,7 +21,6 @@ #include "hw/riscv/riscv_hart.h" #include "hw/sysbus.h" -#include "hw/block/flash.h" #include "qom/object.h" #define VIRT_CPUS_MAX_BITS 9 @@ -49,7 +48,7 @@ struct RISCVVirtState { DeviceState *platform_bus_dev; RISCVHartArrayState soc[VIRT_SOCKETS_MAX]; DeviceState *irqchip[VIRT_SOCKETS_MAX]; - PFlashCFI01 *flash[2]; + DeviceState *flash[2]; FWCfgState *fw_cfg; int fdt_size; From patchwork Wed Jan 4 22:04:36 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 639047 Delivered-To: patch@linaro.org Received: by 2002:a17:522:f3c4:b0:4b4:3859:abed with SMTP id in4csp1967576pvb; Wed, 4 Jan 2023 14:26:06 -0800 (PST) X-Google-Smtp-Source: AMrXdXtB4VV6ZINWD6eCqXXVOs59hPHqj3ZhuBWXzRCDJDbza1+u/d4yw/fQB/Gci9IOkHf/P9m+ X-Received: by 2002:a05:6214:aae:b0:531:8668:1919 with SMTP id ew14-20020a0562140aae00b0053186681919mr47710770qvb.49.1672871166372; Wed, 04 Jan 2023 14:26:06 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1672871166; cv=none; d=google.com; s=arc-20160816; b=q/MK8QtG7wqDtsSnmjJDBAPZyp5azo5vI5AKJzcfQciCYPEAnCTxFwkPPGLGxSC3dU E3+1EcP+z7aMFQuhM1WSurvKvRjvaWCbyQr1+uyqIVA4FiaMjgG6Uj6QF0ru3NdIDMHR hKqUc3X9xn6EiXSJQfXSlXIlMZwpjmdhpMJCIHFw9EvzzouS8u2A4fZ8dneIZ5K0tBf5 xGW+wgcYwH/d0p2hcE+nl3yzGVIoi1wssxANulbPPa9kAEinJdKKnlRA5j8EH3gYMk3X Vxbmuv2eoRGUXhPc/CpKt8Vyc6ruOlDGNXfAXTOlJDyCEUvuNlP5CM34yx639bRNqmu9 sSBg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=x61H7egSNuZgElN8gUrBWk1wkFnRoVuCr6783O6GJXk=; b=xIml/p79k0zDUkAj6r2LikwpXC6Nxe7IOD2nqKVptGL8mpG/nclbKcG0Yz/N198aGt a7W5gR9aGsbVWPUlmgf3b4btc/bzEk6g0GKZb7reN1O5HRteNJadKrbg7VJkq1b1OeC+ +qbGTwuAcTE8deZa/bk6CiI1s/1NqMw00o0d7//p7qCtYTDPm9KyIkHvLCkQ6G03mLIL dWx6eWzzUfryhxWbaCUYpbiLuchHm/FBDb4p0jR0hU9yL5B/06jViw1jyybwL37nLql6 TS+9bCilh4oY3iyXCPQQhukIZ171duDV472KoE7yXJO51n8bL+0zt0Ie+fAf+NGN6h28 n7EQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Th4FBs4U; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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Tsirkin" , Bin Meng , Max Filippov , Aurelien Jarno , Eduardo Habkost , Palmer Dabbelt , Radoslaw Biernacki , Jiaxun Yang , "Edgar E. Iglesias" , Xiaojuan Yang , Peter Maydell , qemu-block@nongnu.org, qemu-riscv@nongnu.org, Yoshinori Sato , Alistair Francis , qemu-arm@nongnu.org, Leif Lindholm , Kevin Wolf Subject: [PATCH 07/20] hw/i386: Use generic DeviceState instead of PFlashCFI01 Date: Wed, 4 Jan 2023 23:04:36 +0100 Message-Id: <20230104220449.41337-8-philmd@linaro.org> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20230104220449.41337-1-philmd@linaro.org> References: <20230104220449.41337-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::535; envelope-from=philmd@linaro.org; helo=mail-ed1-x535.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Nothing here requires access to PFlashCFI01 internal fields: use the inherited generic DeviceState. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Bin Meng --- hw/i386/pc_sysfw.c | 14 +++++++------- include/hw/i386/pc.h | 3 +-- 2 files changed, 8 insertions(+), 9 deletions(-) diff --git a/hw/i386/pc_sysfw.c b/hw/i386/pc_sysfw.c index 60db0efb41..1a12207dd1 100644 --- a/hw/i386/pc_sysfw.c +++ b/hw/i386/pc_sysfw.c @@ -71,7 +71,7 @@ static void pc_isa_bios_init(MemoryRegion *rom_memory, memory_region_set_readonly(isa_bios, true); } -static PFlashCFI01 *pc_pflash_create(PCMachineState *pcms, +static DeviceState *pc_pflash_create(PCMachineState *pcms, const char *name, const char *alias_prop_name) { @@ -88,7 +88,7 @@ static PFlashCFI01 *pc_pflash_create(PCMachineState *pcms, * will be removed with object_unparent. */ object_unref(OBJECT(dev)); - return PFLASH_CFI01(dev); + return dev; } void pc_system_flash_create(PCMachineState *pcms) @@ -143,7 +143,7 @@ static void pc_system_flash_map(PCMachineState *pcms, int i; BlockBackend *blk; int64_t size; - PFlashCFI01 *system_flash; + DeviceState *system_flash; MemoryRegion *flash_mem; void *flash_ptr; int flash_size; @@ -152,7 +152,7 @@ static void pc_system_flash_map(PCMachineState *pcms, for (i = 0; i < ARRAY_SIZE(pcms->flash); i++) { system_flash = pcms->flash[i]; - blk = pflash_cfi01_get_blk(DEVICE(system_flash)); + blk = pflash_cfi01_get_blk(system_flash); if (!blk) { break; } @@ -187,7 +187,7 @@ static void pc_system_flash_map(PCMachineState *pcms, 0x100000000ULL - total_size); if (i == 0) { - flash_mem = pflash_cfi01_get_memory(DEVICE(system_flash)); + flash_mem = pflash_cfi01_get_memory(system_flash); pc_isa_bios_init(rom_memory, flash_mem, size); /* Encrypt the pflash boot ROM */ @@ -214,9 +214,9 @@ void pc_system_firmware_init(PCMachineState *pcms, /* Map legacy -drive if=pflash to machine properties */ for (i = 0; i < ARRAY_SIZE(pcms->flash); i++) { - pflash_cfi01_legacy_drive(DEVICE(pcms->flash[i]), + pflash_cfi01_legacy_drive(pcms->flash[i], drive_get(IF_PFLASH, 0, i)); - pflash_blk[i] = pflash_cfi01_get_blk(DEVICE(pcms->flash[i])); + pflash_blk[i] = pflash_cfi01_get_blk(pcms->flash[i]); } /* Reject gaps */ diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h index 991f905f5d..70abe61805 100644 --- a/include/hw/i386/pc.h +++ b/include/hw/i386/pc.h @@ -6,7 +6,6 @@ #include "qemu/uuid.h" #include "hw/boards.h" #include "hw/block/fdc.h" -#include "hw/block/flash.h" #include "hw/i386/x86.h" #include "hw/acpi/acpi_dev_interface.h" @@ -35,7 +34,7 @@ typedef struct PCMachineState { /* Pointers to devices and objects: */ PCIBus *bus; I2CBus *smbus; - PFlashCFI01 *flash[2]; + DeviceState *flash[2]; ISADevice *pcspk; DeviceState *iommu; From patchwork Wed Jan 4 22:04:37 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 639051 Delivered-To: patch@linaro.org Received: by 2002:a17:522:f3c4:b0:4b4:3859:abed with SMTP id in4csp1973083pvb; Wed, 4 Jan 2023 14:43:31 -0800 (PST) X-Google-Smtp-Source: AMrXdXue6NvxWTSytkfcsM667k9LC5UvCc3LGcoNvDUzc+pzy92xRscpMfOcZ9mksNIgkeMZUlgu X-Received: by 2002:a05:6214:449b:b0:531:d615:9145 with SMTP id on27-20020a056214449b00b00531d6159145mr13004021qvb.5.1672872211484; Wed, 04 Jan 2023 14:43:31 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1672872211; cv=none; d=google.com; s=arc-20160816; b=QajwAScO6cR7fXffHpK9Qrvog8jqzGzraYv/+aT5wFwW4Bh9MpYI5q8TaMglcGS4mC 35ec7+NBUFtbIeg2bCDjARjFHZnJ1EnTnqHWUF8AvDdJRs49QBA5/axVY1pZTj6yokGa GFuLkHHwJmyILrdh25yuEaUrvdlXRsESGZ6nOUYRp5T7nIO8a1B5AV6yNW1RLhHNfwgo n/6cxAYCWRVWMyCHgXwDHPaJrVY+kbc2qUV7e8SKinNjLk9c3DZbgUwGRXqEK8D9EITZ mkZ4ZU8MnR0NXhDCZlSph6QX+p45YLbdGl1zVlIRRuS5WQ/Jga3UYC6TaomubCNvmZon 1yFA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=ML6wRiyFlYJ0aSJ3m/RlR9qnqnqYeCYdx+C4vqE1q1o=; b=FQdRc/9JyhGKEfPwHqn8EviwVqsY9fuucb4Nlv3obNLczlqtoioV0RXMVTqPX49ysV 7pWFrQIksEve3kQTF8rZzTRFnThfMP7HAlTSeTDNmzO8O8/y0Zop1IBp1mSETJC9Qz18 pqMp1HukagsrYMVMPkMBKpEq6SXxVRDxtOaTOUoLZV9dhDPHZJkVZbnP04QGyV4ZdesO 646uT2EgKpqXLhYGcc5iqNK0bu/IuBvjDodk+XOWQ30H6dGAxo7LsvzdoKIsEABttktN E+Z/m32KJMhEZ0lpymBJw0rns0WQNaCR8F4ZxAamjFnHu4mwDhqNpSl6qaWRfWu02blt LpfA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="tOcrrXr/"; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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Tsirkin" , Bin Meng , Max Filippov , Aurelien Jarno , Eduardo Habkost , Palmer Dabbelt , Radoslaw Biernacki , Jiaxun Yang , "Edgar E. Iglesias" , Xiaojuan Yang , Peter Maydell , qemu-block@nongnu.org, qemu-riscv@nongnu.org, Yoshinori Sato , Alistair Francis , qemu-arm@nongnu.org, Leif Lindholm , Kevin Wolf Subject: [PATCH 08/20] hw/xtensa: Use generic DeviceState instead of PFlashCFI01 Date: Wed, 4 Jan 2023 23:04:37 +0100 Message-Id: <20230104220449.41337-9-philmd@linaro.org> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20230104220449.41337-1-philmd@linaro.org> References: <20230104220449.41337-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::52e; envelope-from=philmd@linaro.org; helo=mail-ed1-x52e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Nothing here requires access to PFlashCFI01 internal fields: use the inherited generic DeviceState. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Bin Meng --- hw/xtensa/xtfpga.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/hw/xtensa/xtfpga.c b/hw/xtensa/xtfpga.c index bce3a543b0..b039416fde 100644 --- a/hw/xtensa/xtfpga.c +++ b/hw/xtensa/xtfpga.c @@ -165,7 +165,7 @@ static void xtfpga_net_init(MemoryRegion *address_space, memory_region_add_subregion(address_space, buffers, ram); } -static PFlashCFI01 *xtfpga_flash_init(MemoryRegion *address_space, +static DeviceState *xtfpga_flash_init(MemoryRegion *address_space, const XtfpgaBoardDesc *board, DriveInfo *dinfo, int be) { @@ -183,7 +183,7 @@ static PFlashCFI01 *xtfpga_flash_init(MemoryRegion *address_space, sysbus_realize_and_unref(s, &error_fatal); memory_region_add_subregion(address_space, board->flash->base, sysbus_mmio_get_region(s, 0)); - return PFLASH_CFI01(dev); + return dev; } static uint64_t translate_phys_addr(void *opaque, uint64_t addr) @@ -231,7 +231,7 @@ static void xtfpga_init(const XtfpgaBoardDesc *board, MachineState *machine) XtensaMxPic *mx_pic = NULL; qemu_irq *extints; DriveInfo *dinfo; - PFlashCFI01 *flash = NULL; + DeviceState *flash = NULL; const char *kernel_filename = machine->kernel_filename; const char *kernel_cmdline = machine->kernel_cmdline; const char *dtb_filename = machine->dtb; @@ -459,7 +459,7 @@ static void xtfpga_init(const XtfpgaBoardDesc *board, MachineState *machine) } } else { if (flash) { - MemoryRegion *flash_mr = pflash_cfi01_get_memory(DEVICE(flash)); + MemoryRegion *flash_mr = pflash_cfi01_get_memory(flash); MemoryRegion *flash_io = g_malloc(sizeof(*flash_io)); uint32_t size = env->config->sysrom.location[0].size; From patchwork Wed Jan 4 22:04:38 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 639045 Delivered-To: patch@linaro.org Received: by 2002:a17:522:f3c4:b0:4b4:3859:abed with SMTP id in4csp1966030pvb; Wed, 4 Jan 2023 14:21:14 -0800 (PST) X-Google-Smtp-Source: AMrXdXtYW2+kcQ3SBooNbbC09MtTE7Si8Nfu3G1cV7ESy7F1B4pmfDAlDTI4Zav5v1P/B8bWUpDN X-Received: by 2002:ac8:5483:0:b0:3a8:10c2:1eaf with SMTP id h3-20020ac85483000000b003a810c21eafmr68604547qtq.2.1672870874135; Wed, 04 Jan 2023 14:21:14 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1672870874; cv=none; d=google.com; s=arc-20160816; b=DYyjWszXYQiGZdpNPqACOs9hiDHXU6FGYiJCwQzeBMW79TGwpg453LNakqCFETU8yS cF7n7UdFyg/Xq6wqgwTmGWEWT6E0rOI1pcdLRRxGzlMVlbMwy9vAvlObFDFrJkFS3yDr OWZE+JoIY2tiypDTsdf2KNqoBMqPpIJVucdKmn+RoWvDIUqoPNvnEo4yK29KJt6lPopj Y6MxWWscpgfgApurFTL6vByymb2J03+6pgUOFKhkm0Bc/CG5rg4GJ2l51XH+e8o2DkR6 EInczqn5zqtovDDJbtmihb5Zce0sFj5mObZFt9NYIAXU0uw+cQxwFrOLY95ugWIm8grR RdIA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=Z2g0/bIHuF6JENINR0ukwrslIoZo+6BphJxXJPFuUoA=; b=rrOSToDhK1qfwp+0bs2zgcI/Hh6chElGAjQF9nuFOJ8+KQ4tlkzdS+ydhbxUUEI8Xd BxN1MMAsU28s4Nna1NTiWzU/cilrSFxK9TuZTVg7nflsHhP4J6RmRhbygVa4glTZQwKV +X1NFMMpP6qtFlojT2l8IJVI5JEQhcs9o16vk+zj/UhP2wv2f3p515LQ4Ys63GkY+i2l ZHxS8t9ViycWr0epMjlfMi4OZz3skETe55MhGkle6YD6bCvc87apuu53Zedtn8TkJOa9 FKQsqy3IX5DSwabcBnbwoMCbRtl/w3mrq2vlvrkCsBIf8WN0c1WihhkBspfXzOImVZbi QjlA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="cHbFn/dI"; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id bi17-20020a05620a319100b007053ced95c4si8060837qkb.57.2023.01.04.14.21.14 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Wed, 04 Jan 2023 14:21:14 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="cHbFn/dI"; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pDBtv-00018S-CU; Wed, 04 Jan 2023 17:06:23 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pDBtr-00013d-JM for qemu-devel@nongnu.org; Wed, 04 Jan 2023 17:06:19 -0500 Received: from mail-ej1-x62e.google.com ([2a00:1450:4864:20::62e]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1pDBtl-0005ax-5G for qemu-devel@nongnu.org; Wed, 04 Jan 2023 17:06:15 -0500 Received: by mail-ej1-x62e.google.com with SMTP id m18so85784123eji.5 for ; Wed, 04 Jan 2023 14:06:12 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=Z2g0/bIHuF6JENINR0ukwrslIoZo+6BphJxXJPFuUoA=; b=cHbFn/dI7fHDxK0+Cvs0oyq556Oz3wGu7uHHU6r+Qd8AasfMWlllthzE00jKPqqy72 QzkTgUBdFqEc0koPdE1mgQiwTcn+ST40jN9eYR9Zm4xFJgb8MkYG1xBl9jO/0muUJC4e irHCUS7u+zebYjNmSmTpn8mIAurnMUGzcxkbiQS3nlpl+F/Rtb5ct+Lb3B2ZMc6+v7q7 o3pDMCmHyKs7JT/iO4WgvhBbZDYpLLGA+NpuFxfCA+kjHjlQimNpSkKDyXyTqy9fRywy ym4apnExO41EBzYdtNdVyxrw3vN1CpXjdaYXJgumfU2D0EkpjSHTLL1p/nOAmOoPll1/ Cmvg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=Z2g0/bIHuF6JENINR0ukwrslIoZo+6BphJxXJPFuUoA=; b=e5K6eMCxx+QqmIr1FomvLTH/Fq7Q0xvrG5raSbEt7fUEmJqrPev9Vg5CYMFQNsD+TO k2YiMsB1y2K090l+ZQ0ctbD5JuCeBrFB2FCvHyjVAUX7capnSEJkiuXb0e2eBJ8L5Ztf IDIkxlhzQjOApe4GA1Eb4EQMgf4WWARDVdx+CmA7nflA+hJwwzmgg7vDbsRvaDT62Qwk hHQWBpu1vgxAj2YA2jXNoHzHS+s6k0n7CtK/dZJRkuXClPhvAOoSjwn/Yoi30IfmN7+c k/kWfdtWzxaDeSzFmTUuox8f50ioSe93ccW5aedPdEb/XdzuCvkI9DGC5U2fq0cDjHOw xVjQ== X-Gm-Message-State: AFqh2kpyzfBIeMd2OGgPsTXAoAfnURc0QeW7OUEmcwTdWOrkcPUTsmRh Vew1Np6wUSZ260FAL5XWLz4Ouw3vD50eczpr X-Received: by 2002:a17:906:ecf7:b0:7c4:f6e4:3e92 with SMTP id qt23-20020a170906ecf700b007c4f6e43e92mr49876646ejb.31.1672869971229; Wed, 04 Jan 2023 14:06:11 -0800 (PST) Received: from localhost.localdomain ([185.126.107.38]) by smtp.gmail.com with ESMTPSA id ky14-20020a170907778e00b007c4f8bc322asm15644296ejc.196.2023.01.04.14.06.06 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Wed, 04 Jan 2023 14:06:10 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Song Gao , Antony Pavlov , Jan Kiszka , Marcel Apfelbaum , Hanna Reitz , Bernhard Beschow , BALATON Zoltan , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Alistair Francis , Paolo Bonzini , qemu-ppc@nongnu.org, Mark Burton , Richard Henderson , Magnus Damm , "Michael S. Tsirkin" , Bin Meng , Max Filippov , Aurelien Jarno , Eduardo Habkost , Palmer Dabbelt , Radoslaw Biernacki , Jiaxun Yang , "Edgar E. Iglesias" , Xiaojuan Yang , Peter Maydell , qemu-block@nongnu.org, qemu-riscv@nongnu.org, Yoshinori Sato , Alistair Francis , qemu-arm@nongnu.org, Leif Lindholm , Kevin Wolf Subject: [PATCH 09/20] hw/block: Factor pflash_cfi01_create() out of pflash_cfi01_register() Date: Wed, 4 Jan 2023 23:04:38 +0100 Message-Id: <20230104220449.41337-10-philmd@linaro.org> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20230104220449.41337-1-philmd@linaro.org> References: <20230104220449.41337-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::62e; envelope-from=philmd@linaro.org; helo=mail-ej1-x62e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Currently pflash_cfi01_register(): 1/ creates a TYPE_PFLASH_CFI01 qdev instance 2/ maps the first MMIO region to the system bus The first minor issue is the implicit sysbus mapping is not obvious (the function name could mention it), and the function is not documented. Another issue is we are forced to map on sysbus, thus code wanting to simply instantiate this device are forced to open code the qdev creation. This is a problem in a heterogeneous system where not all cores has access to the sysbus, or if we want to map the pflash on different address spaces. To clarify this API, extract the qdev creation in a new helper named pflash_cfi01_create(). We don't document pflash_cfi01_register() because we are going to remove it in a few commits. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Bin Meng --- hw/block/pflash_cfi01.c | 34 +++++++++++++++++++++++++--------- include/hw/block/flash.h | 14 +++++++++++++- 2 files changed, 38 insertions(+), 10 deletions(-) diff --git a/hw/block/pflash_cfi01.c b/hw/block/pflash_cfi01.c index 866ea596ea..6a8f9e6319 100644 --- a/hw/block/pflash_cfi01.c +++ b/hw/block/pflash_cfi01.c @@ -953,15 +953,13 @@ static void pflash_cfi01_register_types(void) type_init(pflash_cfi01_register_types) -PFlashCFI01 *pflash_cfi01_register(hwaddr base, - const char *name, - hwaddr size, - BlockBackend *blk, - uint32_t sector_len, - int bank_width, - uint16_t id0, uint16_t id1, - uint16_t id2, uint16_t id3, - int be) +DeviceState *pflash_cfi01_create(const char *name, + hwaddr size, + BlockBackend *blk, uint32_t sector_len, + int bank_width, + uint16_t id0, uint16_t id1, + uint16_t id2, uint16_t id3, + int be) { DeviceState *dev = qdev_new(TYPE_PFLASH_CFI01); @@ -980,7 +978,25 @@ PFlashCFI01 *pflash_cfi01_register(hwaddr base, qdev_prop_set_string(dev, "name", name); sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); + return dev; +} + +PFlashCFI01 *pflash_cfi01_register(hwaddr base, + const char *name, + hwaddr size, + BlockBackend *blk, + uint32_t sector_len, + int bank_width, + uint16_t id0, uint16_t id1, + uint16_t id2, uint16_t id3, + int be) +{ + DeviceState *dev; + + dev = pflash_cfi01_create(name, size, blk, sector_len, bank_width, + id0, id1, id2, id3, be); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base); + return PFLASH_CFI01(dev); } diff --git a/include/hw/block/flash.h b/include/hw/block/flash.h index 25affdf7a5..40ba857f69 100644 --- a/include/hw/block/flash.h +++ b/include/hw/block/flash.h @@ -11,7 +11,19 @@ #define TYPE_PFLASH_CFI01 "cfi.pflash01" OBJECT_DECLARE_SIMPLE_TYPE(PFlashCFI01, PFLASH_CFI01) - +/** + * Create and realize a parallel NOR flash (CFI type 1) on the heap. + * + * Create the device state structure, initialize it, and drop the + * reference to it (the device is realized). + */ +DeviceState *pflash_cfi01_create(const char *name, + hwaddr size, + BlockBackend *blk, uint32_t sector_len, + int bank_width, + uint16_t id0, uint16_t id1, + uint16_t id2, uint16_t id3, + int be); PFlashCFI01 *pflash_cfi01_register(hwaddr base, const char *name, hwaddr size, From patchwork Wed Jan 4 22:04:39 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 639048 Delivered-To: patch@linaro.org Received: by 2002:a17:522:f3c4:b0:4b4:3859:abed with SMTP id in4csp1971520pvb; Wed, 4 Jan 2023 14:38:05 -0800 (PST) X-Google-Smtp-Source: AMrXdXtvKwnZT0ieOJ9o3HQ/dYYqCBKj1JC/evxGOOht1Jitc2ecVRALCzXFZuZU3IBsq9j3Hqae X-Received: by 2002:a0c:e50f:0:b0:4c7:1c35:22f2 with SMTP id l15-20020a0ce50f000000b004c71c3522f2mr64284726qvm.32.1672871885055; Wed, 04 Jan 2023 14:38:05 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1672871885; cv=none; d=google.com; s=arc-20160816; b=SriccptaGASkksDmYrWbNjM22cwaZUrF7gMcVu+nd99peYSZvFd4juWp0MKaEwHZ8I Ke1XgeRXCWtSlB9CjyTnklT5xKBDzWjyT0NnfX0KnDgNkSfSXimm5MBu/oZQBheMqDuD kNf5obGrIWn6lRAiayNqi1XbqCRHJwmn5DgNUGdPIoHALIT3AZqPldS0jnfJGC8KlhcG B3TuDoYnC6QRL3noNwhMsWbM1Vx1YqHIG/8Ic5hD9QsCNFBbFNL9wdqT0Zdixo4cN+hP cksa6vkmnxJzwHtypXC4BmiwryQwS3WLl6eWf+veVBhyl8LevSZuzgXI2gyWfz74Hb6A eixg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=aHv6Wehw0g+45GGNmqAyiTzJjY7rKpnoc/CB10RjduA=; b=GDBKJuAI7eiVXfDT2neJ4wNu5x/YGVJD2VffvLr9q4Wn/qNQES8M428F0VhtlzSEq/ vXSgaihhPs3P4jr8WqfpG/45owmjCN310TdVu9Dx11I8V5PC934IxtR1c2COJ4xv9Fp+ HLhC5SAbTLo2lqa3ywfwMvhUoopS7GZJnvUlcEanQqqg+VYr4mEuxUwUZAuTxn6YvBVg R62Ss41QyduG3dJsQxtg22X7DOgM1EUzh9LB/7wejcHkqvmIxzqCwRUhmDnq7sHUFTTi Q8My4oZ43UK55rVcLshrEQJcc5tQrZ9PdS8r8/QSw/BGdrXxB/hAJZs/9HEa7msxU/3R 0hLg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=YXqVHRuR; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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Tsirkin" , Bin Meng , Max Filippov , Aurelien Jarno , Eduardo Habkost , Palmer Dabbelt , Radoslaw Biernacki , Jiaxun Yang , "Edgar E. Iglesias" , Xiaojuan Yang , Peter Maydell , qemu-block@nongnu.org, qemu-riscv@nongnu.org, Yoshinori Sato , Alistair Francis , qemu-arm@nongnu.org, Leif Lindholm , Kevin Wolf Subject: [PATCH 10/20] hw/arm: Open-code pflash_cfi01_register() Date: Wed, 4 Jan 2023 23:04:39 +0100 Message-Id: <20230104220449.41337-11-philmd@linaro.org> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20230104220449.41337-1-philmd@linaro.org> References: <20230104220449.41337-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::62c; envelope-from=philmd@linaro.org; helo=mail-ej1-x62c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org pflash_cfi01_register() hides an implicit sysbus mapping of MMIO region #0. This is not practical in a heterogeneous world where multiple cores use different address spaces. In order to remove to remove pflash_cfi01_register() from the pflash API, open-code it as a qdev creation call followed by an explicit sysbus mapping. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Bin Meng --- hw/arm/collie.c | 15 +++++++++------ hw/arm/gumstix.c | 19 +++++++++++++------ hw/arm/mainstone.c | 13 ++++++++----- hw/arm/omap_sx1.c | 22 ++++++++++++++-------- hw/arm/versatilepb.c | 13 ++++++++----- hw/arm/z2.c | 10 +++++++--- 6 files changed, 59 insertions(+), 33 deletions(-) diff --git a/hw/arm/collie.c b/hw/arm/collie.c index 8df31e2793..1fbb1a5773 100644 --- a/hw/arm/collie.c +++ b/hw/arm/collie.c @@ -39,6 +39,7 @@ static void collie_init(MachineState *machine) DriveInfo *dinfo; MachineClass *mc = MACHINE_GET_CLASS(machine); CollieMachineState *cms = COLLIE_MACHINE(machine); + DeviceState *dev; if (machine->ram_size != mc->default_ram_size) { char *sz = size_to_str(mc->default_ram_size); @@ -52,14 +53,16 @@ static void collie_init(MachineState *machine) memory_region_add_subregion(get_system_memory(), SA_SDCS0, machine->ram); dinfo = drive_get(IF_PFLASH, 0, 0); - pflash_cfi01_register(SA_CS0, "collie.fl1", 0x02000000, - dinfo ? blk_by_legacy_dinfo(dinfo) : NULL, - 64 * KiB, 4, 0x00, 0x00, 0x00, 0x00, 0); + dev = pflash_cfi01_create("collie.fl1", 0x02000000, + dinfo ? blk_by_legacy_dinfo(dinfo) : NULL, + 64 * KiB, 4, 0x00, 0x00, 0x00, 0x00, 0); + sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, SA_CS0); dinfo = drive_get(IF_PFLASH, 0, 1); - pflash_cfi01_register(SA_CS1, "collie.fl2", 0x02000000, - dinfo ? blk_by_legacy_dinfo(dinfo) : NULL, - 64 * KiB, 4, 0x00, 0x00, 0x00, 0x00, 0); + dev = pflash_cfi01_create("collie.fl2", 0x02000000, + dinfo ? blk_by_legacy_dinfo(dinfo) : NULL, + 64 * KiB, 4, 0x00, 0x00, 0x00, 0x00, 0); + sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, SA_CS1); sysbus_create_simple("scoop", 0x40800000, NULL); diff --git a/hw/arm/gumstix.c b/hw/arm/gumstix.c index 3a4bc332c4..7b80a7d0a4 100644 --- a/hw/arm/gumstix.c +++ b/hw/arm/gumstix.c @@ -40,6 +40,7 @@ #include "net/net.h" #include "hw/block/flash.h" #include "hw/net/smc91c111.h" +#include "hw/sysbus.h" #include "hw/boards.h" #include "exec/address-spaces.h" #include "sysemu/qtest.h" @@ -51,6 +52,7 @@ static void connex_init(MachineState *machine) { PXA2xxState *cpu; DriveInfo *dinfo; + DeviceState *dev; MemoryRegion *address_space_mem = get_system_memory(); uint32_t connex_rom = 0x01000000; @@ -65,12 +67,14 @@ static void connex_init(MachineState *machine) exit(1); } - if (!pflash_cfi01_register(0x00000000, "connext.rom", connex_rom, - dinfo ? blk_by_legacy_dinfo(dinfo) : NULL, - sector_len, 2, 0, 0, 0, 0, 0)) { + dev = pflash_cfi01_create("connext.rom", connex_rom, + dinfo ? blk_by_legacy_dinfo(dinfo) : NULL, + sector_len, 2, 0, 0, 0, 0, 0); + if (!dev) { error_report("Error registering flash memory"); exit(1); } + sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, 0x00000000); /* Interrupt line of NIC is connected to GPIO line 36 */ smc91c111_init(&nd_table[0], 0x04000300, @@ -81,6 +85,7 @@ static void verdex_init(MachineState *machine) { PXA2xxState *cpu; DriveInfo *dinfo; + DeviceState *dev; MemoryRegion *address_space_mem = get_system_memory(); uint32_t verdex_rom = 0x02000000; @@ -95,12 +100,14 @@ static void verdex_init(MachineState *machine) exit(1); } - if (!pflash_cfi01_register(0x00000000, "verdex.rom", verdex_rom, - dinfo ? blk_by_legacy_dinfo(dinfo) : NULL, - sector_len, 2, 0, 0, 0, 0, 0)) { + dev = pflash_cfi01_create("verdex.rom", verdex_rom, + dinfo ? blk_by_legacy_dinfo(dinfo) : NULL, + sector_len, 2, 0, 0, 0, 0, 0); + if (!dev) { error_report("Error registering flash memory"); exit(1); } + sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, 0x00000000); /* Interrupt line of NIC is connected to GPIO line 99 */ smc91c111_init(&nd_table[0], 0x04000300, diff --git a/hw/arm/mainstone.c b/hw/arm/mainstone.c index 8454b65458..ac34be3709 100644 --- a/hw/arm/mainstone.c +++ b/hw/arm/mainstone.c @@ -129,15 +129,18 @@ static void mainstone_common_init(MemoryRegion *address_space_mem, /* There are two 32MiB flash devices on the board */ for (i = 0; i < 2; i ++) { + DeviceState *dev; + dinfo = drive_get(IF_PFLASH, 0, i); - if (!pflash_cfi01_register(mainstone_flash_base[i], - i ? "mainstone.flash1" : "mainstone.flash0", - MAINSTONE_FLASH, - dinfo ? blk_by_legacy_dinfo(dinfo) : NULL, - sector_len, 4, 0, 0, 0, 0, 0)) { + dev = pflash_cfi01_create(i ? "mainstone.flash1" : "mainstone.flash0", + MAINSTONE_FLASH, + dinfo ? blk_by_legacy_dinfo(dinfo) : NULL, + sector_len, 4, 0, 0, 0, 0, 0); + if (!dev) { error_report("Error registering flash memory"); exit(1); } + sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, mainstone_flash_base[i]); } mst_irq = sysbus_create_simple("mainstone-fpga", MST_FPGA_PHYS, diff --git a/hw/arm/omap_sx1.c b/hw/arm/omap_sx1.c index 57829b3744..718e50c062 100644 --- a/hw/arm/omap_sx1.c +++ b/hw/arm/omap_sx1.c @@ -30,6 +30,7 @@ #include "ui/console.h" #include "hw/arm/omap.h" #include "hw/boards.h" +#include "hw/sysbus.h" #include "hw/arm/boot.h" #include "hw/block/flash.h" #include "sysemu/qtest.h" @@ -114,6 +115,7 @@ static void sx1_init(MachineState *machine, const int version) DriveInfo *dinfo; int fl_idx; uint32_t flash_size = flash0_size; + DeviceState *dev; if (machine->ram_size != mc->default_ram_size) { char *sz = size_to_str(mc->default_ram_size); @@ -153,10 +155,12 @@ static void sx1_init(MachineState *machine, const int version) fl_idx = 0; if ((dinfo = drive_get(IF_PFLASH, 0, fl_idx)) != NULL) { - if (!pflash_cfi01_register(OMAP_CS0_BASE, - "omap_sx1.flash0-1", flash_size, - blk_by_legacy_dinfo(dinfo), - sector_size, 4, 0, 0, 0, 0, 0)) { + dev = pflash_cfi01_create("omap_sx1.flash0-1", flash_size, + blk_by_legacy_dinfo(dinfo), + sector_size, 4, 0, 0, 0, 0, 0); + if (dev) { + sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, OMAP_CS0_BASE); + } else { fprintf(stderr, "qemu: Error registering flash memory %d.\n", fl_idx); } @@ -175,10 +179,12 @@ static void sx1_init(MachineState *machine, const int version) memory_region_add_subregion(address_space, OMAP_CS1_BASE + flash1_size, &cs[1]); - if (!pflash_cfi01_register(OMAP_CS1_BASE, - "omap_sx1.flash1-1", flash1_size, - blk_by_legacy_dinfo(dinfo), - sector_size, 4, 0, 0, 0, 0, 0)) { + dev = pflash_cfi01_create("omap_sx1.flash1-1", flash1_size, + blk_by_legacy_dinfo(dinfo), + sector_size, 4, 0, 0, 0, 0, 0); + if (dev) { + sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, OMAP_CS1_BASE); + } else { fprintf(stderr, "qemu: Error registering flash memory %d.\n", fl_idx); } diff --git a/hw/arm/versatilepb.c b/hw/arm/versatilepb.c index ecc1f6cf74..c5c7cf6dde 100644 --- a/hw/arm/versatilepb.c +++ b/hw/arm/versatilepb.c @@ -385,11 +385,14 @@ static void versatile_init(MachineState *machine, int board_id) /* 0x34000000 NOR Flash */ dinfo = drive_get(IF_PFLASH, 0, 0); - if (!pflash_cfi01_register(VERSATILE_FLASH_ADDR, "versatile.flash", - VERSATILE_FLASH_SIZE, - dinfo ? blk_by_legacy_dinfo(dinfo) : NULL, - VERSATILE_FLASH_SECT_SIZE, - 4, 0x0089, 0x0018, 0x0000, 0x0, 0)) { + dev = pflash_cfi01_create("versatile.flash", + VERSATILE_FLASH_SIZE, + dinfo ? blk_by_legacy_dinfo(dinfo) : NULL, + VERSATILE_FLASH_SECT_SIZE, + 4, 0x0089, 0x0018, 0x0000, 0x0, 0); + if (dev) { + sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, VERSATILE_FLASH_ADDR); + } else { fprintf(stderr, "qemu: Error registering flash memory.\n"); } diff --git a/hw/arm/z2.c b/hw/arm/z2.c index 9c1e876207..d28d75aa0f 100644 --- a/hw/arm/z2.c +++ b/hw/arm/z2.c @@ -18,6 +18,7 @@ #include "hw/irq.h" #include "hw/ssi/ssi.h" #include "migration/vmstate.h" +#include "hw/sysbus.h" #include "hw/boards.h" #include "hw/block/flash.h" #include "ui/console.h" @@ -306,17 +307,20 @@ static void z2_init(MachineState *machine) void *z2_lcd; I2CBus *bus; DeviceState *wm; + DeviceState *dev; /* Setup CPU & memory */ mpu = pxa270_init(address_space_mem, z2_binfo.ram_size, machine->cpu_type); dinfo = drive_get(IF_PFLASH, 0, 0); - if (!pflash_cfi01_register(Z2_FLASH_BASE, "z2.flash0", Z2_FLASH_SIZE, - dinfo ? blk_by_legacy_dinfo(dinfo) : NULL, - sector_len, 4, 0, 0, 0, 0, 0)) { + dev = pflash_cfi01_create("z2.flash0", Z2_FLASH_SIZE, + dinfo ? blk_by_legacy_dinfo(dinfo) : NULL, + sector_len, 4, 0, 0, 0, 0, 0); + if (!dev) { error_report("Error registering flash memory"); exit(1); } + sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, Z2_FLASH_BASE); /* setup keypad */ pxa27x_register_keypad(mpu->kp, map, 0x100); From patchwork Wed Jan 4 22:04:40 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 639049 Delivered-To: patch@linaro.org Received: by 2002:a17:522:f3c4:b0:4b4:3859:abed with SMTP id in4csp1971533pvb; Wed, 4 Jan 2023 14:38:07 -0800 (PST) X-Google-Smtp-Source: AMrXdXuQpn5srGMoQGTU62HIAhCPmwmrB5bcl/90SYp+b8rvur2lDdslFm3clP0zEc7Wusxx4bg8 X-Received: by 2002:a05:6214:5f8a:b0:4c7:1d2c:bd93 with SMTP id ls10-20020a0562145f8a00b004c71d2cbd93mr25170736qvb.47.1672871887193; Wed, 04 Jan 2023 14:38:07 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1672871887; cv=none; d=google.com; s=arc-20160816; b=RPGFHVbNM0IlwUIbGYrjLKdwo34KaTXnLhxcIjpBewMlD/+IxJZaZqK+CNLWQZSD8d VGbhKnXyaSxQLokh/ZF6l48mfi0oNrq5K8sr04y3PqD0vI/4OMryNK7Y7y5T8QSeB69t IgNd7THrZzuO5Aj7imrdj9aw3qv/CMwUbKd7Asib60Ry/844jFVV2eWcDB4hZ0kTS4vE S2Wn+OWx6f46HDQyeH+29L35f/j7+4PEDpaLb4sPmOlErSNcepwgwZtabljJ+d5lc/Jb I/T+BKRaENfR+l76weHIsXnOP7e3vL7u0IlmHjG+XkhKhi9ELt/rk3xBBVIS/CZlSGAI 0Vng== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=eRH2/Q6+taaY1C0mf1jUv5OrxulMB7iM/Sfo6HL2IVQ=; b=v5zMZSI8diSCEAMb3zH5PbT8ofd3ZdkYxxy87Jve5UGdd5N+s5L1N6TYRfMkI6h0QN w/bPubuD7Wfq6+ZJYgJo/k7bUlrd85bRfcLzpVhsHsycwcvp9OXypipdbgJU+krmCGtg 04InosMgpJqblRi+zfK+SdqgY1hCpEmsRNjn2bYxXZNv3ghsKCan1IkaQjhgld3ehNQ8 4ISojOIdqQI87nMRD/7RAef8nIkFcpPh2taN/JQtMfUaBVabIBBz0H+93Db9jdEV5HtH LAlnQ6rnyEaLjTal8GE2z+muSq967aUMV2Y/m6dkRa+pl3k1FrPD1z5l21sXP8nTNgnk mxHQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=nEDbMFtY; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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Tsirkin" , Bin Meng , Max Filippov , Aurelien Jarno , Eduardo Habkost , Palmer Dabbelt , Radoslaw Biernacki , Jiaxun Yang , "Edgar E. Iglesias" , Xiaojuan Yang , Peter Maydell , qemu-block@nongnu.org, qemu-riscv@nongnu.org, Yoshinori Sato , Alistair Francis , qemu-arm@nongnu.org, Leif Lindholm , Kevin Wolf Subject: [PATCH 11/20] hw/microblaze: Open-code pflash_cfi01_register() Date: Wed, 4 Jan 2023 23:04:40 +0100 Message-Id: <20230104220449.41337-12-philmd@linaro.org> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20230104220449.41337-1-philmd@linaro.org> References: <20230104220449.41337-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::62d; envelope-from=philmd@linaro.org; helo=mail-ej1-x62d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org pflash_cfi01_register() hides an implicit sysbus mapping of MMIO region #0. This is not practical in a heterogeneous world where multiple cores use different address spaces. In order to remove to remove pflash_cfi01_register() from the pflash API, open-code it as a qdev creation call followed by an explicit sysbus mapping. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Bin Meng --- hw/microblaze/petalogix_ml605_mmu.c | 8 ++++---- hw/microblaze/petalogix_s3adsp1800_mmu.c | 8 ++++---- 2 files changed, 8 insertions(+), 8 deletions(-) diff --git a/hw/microblaze/petalogix_ml605_mmu.c b/hw/microblaze/petalogix_ml605_mmu.c index a24fadddca..d5ff71218d 100644 --- a/hw/microblaze/petalogix_ml605_mmu.c +++ b/hw/microblaze/petalogix_ml605_mmu.c @@ -105,10 +105,10 @@ petalogix_ml605_init(MachineState *machine) dinfo = drive_get(IF_PFLASH, 0, 0); /* 5th parameter 2 means bank-width * 10th paremeter 0 means little-endian */ - pflash_cfi01_register(FLASH_BASEADDR, "petalogix_ml605.flash", FLASH_SIZE, - dinfo ? blk_by_legacy_dinfo(dinfo) : NULL, - 64 * KiB, 2, 0x89, 0x18, 0x0000, 0x0, 0); - + dev = pflash_cfi01_create("petalogix_ml605.flash", FLASH_SIZE, + dinfo ? blk_by_legacy_dinfo(dinfo) : NULL, + 64 * KiB, 2, 0x89, 0x18, 0x0000, 0x0, 0); + sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, FLASH_BASEADDR); dev = qdev_new("xlnx.xps-intc"); qdev_prop_set_uint32(dev, "kind-of-intr", 1 << TIMER_IRQ); diff --git a/hw/microblaze/petalogix_s3adsp1800_mmu.c b/hw/microblaze/petalogix_s3adsp1800_mmu.c index 9d959d1ad8..426ff1de93 100644 --- a/hw/microblaze/petalogix_s3adsp1800_mmu.c +++ b/hw/microblaze/petalogix_s3adsp1800_mmu.c @@ -84,10 +84,10 @@ petalogix_s3adsp1800_init(MachineState *machine) memory_region_add_subregion(sysmem, ddr_base, phys_ram); dinfo = drive_get(IF_PFLASH, 0, 0); - pflash_cfi01_register(FLASH_BASEADDR, - "petalogix_s3adsp1800.flash", FLASH_SIZE, - dinfo ? blk_by_legacy_dinfo(dinfo) : NULL, - 64 * KiB, 1, 0x89, 0x18, 0x0000, 0x0, 1); + dev = pflash_cfi01_create("petalogix_s3adsp1800.flash", FLASH_SIZE, + dinfo ? blk_by_legacy_dinfo(dinfo) : NULL, + 64 * KiB, 1, 0x89, 0x18, 0x0000, 0x0, 1); + sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, FLASH_BASEADDR); dev = qdev_new("xlnx.xps-intc"); qdev_prop_set_uint32(dev, "kind-of-intr", From patchwork Wed Jan 4 22:04:41 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 639059 Delivered-To: patch@linaro.org Received: by 2002:a17:522:f3c4:b0:4b4:3859:abed with SMTP id in4csp1975656pvb; Wed, 4 Jan 2023 14:52:23 -0800 (PST) X-Google-Smtp-Source: AMrXdXtZp6LT7iMLT+u5DGEUuo8UYnYgw/wBsMWDjHLC3rUtbaOVRpbKzX0HUfXE8oJXy+agR6XV X-Received: by 2002:a05:6214:1383:b0:531:a8f3:e8db with SMTP id pp3-20020a056214138300b00531a8f3e8dbmr29114093qvb.47.1672872743523; Wed, 04 Jan 2023 14:52:23 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1672872743; cv=none; d=google.com; s=arc-20160816; b=fsWLSyNIAeFceWBrU2OWm3/18H3fskEKw9hp8Decn2m6qyUdbwRVMqgggP9IBmF5ET vstLxb2k+RUqyjyCh2eRDSDMOL5SIiV7PiK7oCNJvRW39uQCYv2xoIb6eZIf59Ca0IRd AR2L/51tH3MQSqle73PaHTN3AggAEwzA47Vw69gIFI6upfbtige3WlOHam1mXPbnVXp3 LcqgAyKN8iteBWk5DKIufzS8tHl4wFMXItN97jXdcS12TDcmSVd9nsmG5EhbbYPHhm3K SUNM9zNvGC5ePOcSsgGpScW+znjSShIiG4ZubEDWzI2owg6gVgoMOmU/NQSIPq32B4n4 qfkw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=KN4KqLlugVC+0veh/qHwh2dos/FPn9LDhOhs/UvtQDw=; b=o2BXhhD5vVx6ITngJD1KW2GUaFIOOdO2BuYf/JgcOFE41wdRNWSVYw7mQmfqpuW/vL /w/TT5ESX5b0shWjehElOSYSdksVe57ii1dcbaP+5DdkedTRTpeoLyjt2a7uhQGhf/L6 6JKWzOG1ChNbH2/yQ7v/OGOhaz4pIeEJGKAiSMubEw3Hu7BioYJwe3zIimX0l4+aOlq7 0ujjWr9CMti1xONY1X9PG8OxDkXieWahMQ9uUsvD3I7TqQtKyRlMWEiB5HpK6jWMyQU2 Q5FrhaYkBY5qMp7nZiq+Og4vKDbk0omDQDietRgQ1eAo7ajMXImWupvWlgRRrpBCLI2X +GWQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=z1BU4aoI; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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Tsirkin" , Bin Meng , Max Filippov , Aurelien Jarno , Eduardo Habkost , Palmer Dabbelt , Radoslaw Biernacki , Jiaxun Yang , "Edgar E. Iglesias" , Xiaojuan Yang , Peter Maydell , qemu-block@nongnu.org, qemu-riscv@nongnu.org, Yoshinori Sato , Alistair Francis , qemu-arm@nongnu.org, Leif Lindholm , Kevin Wolf Subject: [PATCH 12/20] hw/mips: Open-code pflash_cfi01_register() Date: Wed, 4 Jan 2023 23:04:41 +0100 Message-Id: <20230104220449.41337-13-philmd@linaro.org> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20230104220449.41337-1-philmd@linaro.org> References: <20230104220449.41337-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::631; envelope-from=philmd@linaro.org; helo=mail-ej1-x631.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org pflash_cfi01_register() hides an implicit sysbus mapping of MMIO region #0. This is not practical in a heterogeneous world where multiple cores use different address spaces. In order to remove to remove pflash_cfi01_register() from the pflash API, open-code it as a qdev creation call followed by an explicit sysbus mapping. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Bin Meng --- hw/mips/malta.c | 12 +++++------- 1 file changed, 5 insertions(+), 7 deletions(-) diff --git a/hw/mips/malta.c b/hw/mips/malta.c index 43fbb97799..e690f13bdb 100644 --- a/hw/mips/malta.c +++ b/hw/mips/malta.c @@ -1222,7 +1222,6 @@ void mips_malta_init(MachineState *machine) const char *kernel_cmdline = machine->kernel_cmdline; const char *initrd_filename = machine->initrd_filename; char *filename; - PFlashCFI01 *fl; MemoryRegion *system_memory = get_system_memory(); MemoryRegion *ram_low_preio = g_new(MemoryRegion, 1); MemoryRegion *ram_low_postio; @@ -1286,12 +1285,11 @@ void mips_malta_init(MachineState *machine) /* Load firmware in flash / BIOS. */ dinfo = drive_get(IF_PFLASH, 0, fl_idx); - fl = pflash_cfi01_register(FLASH_ADDRESS, "mips_malta.bios", - FLASH_SIZE, - dinfo ? blk_by_legacy_dinfo(dinfo) : NULL, - 65536, - 4, 0x0000, 0x0000, 0x0000, 0x0000, be); - dev = DEVICE(fl); + dev = pflash_cfi01_create("mips_malta.bios", FLASH_SIZE, + dinfo ? blk_by_legacy_dinfo(dinfo) : NULL, + 65536, 4, + 0x0000, 0x0000, 0x0000, 0x0000, be); + sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, FLASH_ADDRESS); bios = pflash_cfi01_get_memory(dev); fl_idx++; if (kernel_filename) { From patchwork Wed Jan 4 22:04:42 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 639060 Delivered-To: patch@linaro.org Received: by 2002:a17:522:f3c4:b0:4b4:3859:abed with SMTP id in4csp1975814pvb; Wed, 4 Jan 2023 14:52:53 -0800 (PST) X-Google-Smtp-Source: AMrXdXtBSHsVP22hTntPbGRsjy7zy97IXho8PPLLf5zoYdKFG/+uPo0+o6f3jM+zISbFBBz735aS X-Received: by 2002:a0c:e702:0:b0:4c6:edca:1d0a with SMTP id d2-20020a0ce702000000b004c6edca1d0amr62507392qvn.22.1672872773160; Wed, 04 Jan 2023 14:52:53 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1672872773; cv=none; d=google.com; s=arc-20160816; b=wxX7kyS8SGaSNAupvejKdWP3FxvKWjQa5piH4fhlgrr9sTi4gNOw75oAjtrSTwN3Py /H1TVXVKnRth6GcRfWoMZiid9oHIu6ETvWIejvZdMaVxthzmoWQm/9mjaMj8Tlh2dWUj y9gF4duWgs7w47uDdzqu8f11LfRbun50yBPzEAVBotMEwcCG8cnwiYEN6/EPQuwyIiGH 1EyeZB7fvOSxKNbVr2JM5XdgAgIT4D0LVT1EtKO4UCrPXlE8x7ZP72cjMmh8LDhxxNMQ 1yJRAuyRVXCa5PqWsQt+JyDOdyEkXRi/zy/Iou/+GB/tSX4GkB2LFObAxuKUWViyaJs2 aWGw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=zslv5ettm0BZ6lahZKOwlTaXvhF8s2DyuA1mWPRzCMs=; b=t+iLel6hUemhFPxUtF1P0PfUIf6LzIgkX/TIZXBB+1CCeQMQwUt4ymIKBdH0IUzugX B6XNoKnlc2GUpxncPaLKhLuCuYGmGLY/njaGpIlvQKG3pzJC++OzL82OpOBmBrcyIIlD w5VlbS6S/rRZ4F+zoP5ojJD96l01/ThbsIjllwa1nY8mmU2zE0uc6F2pakDJM/S9qnAr Xgf8qk/kPoMpSO/MInpI8yZYZkv4Q14q6PL4McVzBzncfWk0t6QRULSa0Xr2s84PpZba IkpBLbr1RQciP/gKl2Wxl1nEY75AAZT/+SMVmsvxhnLAfVzHwdv5wNaSl5VLQ/uWQv2/ 0ChA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Nxbffoqp; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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Tsirkin" , Bin Meng , Max Filippov , Aurelien Jarno , Eduardo Habkost , Palmer Dabbelt , Radoslaw Biernacki , Jiaxun Yang , "Edgar E. Iglesias" , Xiaojuan Yang , Peter Maydell , qemu-block@nongnu.org, qemu-riscv@nongnu.org, Yoshinori Sato , Alistair Francis , qemu-arm@nongnu.org, Leif Lindholm , Kevin Wolf Subject: [PATCH 13/20] hw/ppc: Open-code pflash_cfi01_register() Date: Wed, 4 Jan 2023 23:04:42 +0100 Message-Id: <20230104220449.41337-14-philmd@linaro.org> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20230104220449.41337-1-philmd@linaro.org> References: <20230104220449.41337-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::636; envelope-from=philmd@linaro.org; helo=mail-ej1-x636.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org pflash_cfi01_register() hides an implicit sysbus mapping of MMIO region #0. This is not practical in a heterogeneous world where multiple cores use different address spaces. In order to remove to remove pflash_cfi01_register() from the pflash API, open-code it as a qdev creation call followed by an explicit sysbus mapping. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Bin Meng --- hw/ppc/sam460ex.c | 12 ++++++++---- hw/ppc/virtex_ml507.c | 7 ++++--- 2 files changed, 12 insertions(+), 7 deletions(-) diff --git a/hw/ppc/sam460ex.c b/hw/ppc/sam460ex.c index 4a22ce3761..a82c9e0642 100644 --- a/hw/ppc/sam460ex.c +++ b/hw/ppc/sam460ex.c @@ -82,6 +82,8 @@ struct boot_info { static int sam460ex_load_uboot(void) { + DeviceState *dev; + /* * This first creates 1MiB of flash memory mapped at the end of * the 32-bit address space (0xFFF00000..0xFFFFFFFF). @@ -103,14 +105,16 @@ static int sam460ex_load_uboot(void) DriveInfo *dinfo; dinfo = drive_get(IF_PFLASH, 0, 0); - if (!pflash_cfi01_register(FLASH_BASE | ((hwaddr)FLASH_BASE_H << 32), - "sam460ex.flash", FLASH_SIZE, - dinfo ? blk_by_legacy_dinfo(dinfo) : NULL, - 64 * KiB, 1, 0x89, 0x18, 0x0000, 0x0, 1)) { + dev = pflash_cfi01_create("sam460ex.flash", FLASH_SIZE, + dinfo ? blk_by_legacy_dinfo(dinfo) : NULL, + 64 * KiB, 1, 0x89, 0x18, 0x0000, 0x0, 1); + if (!dev) { error_report("Error registering flash memory"); /* XXX: return an error instead? */ exit(1); } + sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, + FLASH_BASE | ((hwaddr)FLASH_BASE_H << 32)); if (!dinfo) { /*error_report("No flash image given with the 'pflash' parameter," diff --git a/hw/ppc/virtex_ml507.c b/hw/ppc/virtex_ml507.c index f2f81bd425..ee211664a8 100644 --- a/hw/ppc/virtex_ml507.c +++ b/hw/ppc/virtex_ml507.c @@ -233,9 +233,10 @@ static void virtex_init(MachineState *machine) memory_region_add_subregion(address_space_mem, ram_base, machine->ram); dinfo = drive_get(IF_PFLASH, 0, 0); - pflash_cfi01_register(PFLASH_BASEADDR, "virtex.flash", FLASH_SIZE, - dinfo ? blk_by_legacy_dinfo(dinfo) : NULL, - 64 * KiB, 1, 0x89, 0x18, 0x0000, 0x0, 1); + dev = pflash_cfi01_create("virtex.flash", FLASH_SIZE, + dinfo ? blk_by_legacy_dinfo(dinfo) : NULL, + 64 * KiB, 1, 0x89, 0x18, 0x0000, 0x0, 1); + sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, PFLASH_BASEADDR); cpu_irq = qdev_get_gpio_in(DEVICE(cpu), PPC40x_INPUT_INT); dev = qdev_new("xlnx.xps-intc"); From patchwork Wed Jan 4 22:04:43 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 639056 Delivered-To: patch@linaro.org Received: by 2002:a17:522:f3c4:b0:4b4:3859:abed with SMTP id in4csp1975098pvb; Wed, 4 Jan 2023 14:50:14 -0800 (PST) X-Google-Smtp-Source: AMrXdXt/qyMBHa74kIaPjvDhS1Nj2n9ve0c1fDR/EcGjO6/pLTbMNlUiJkgNSxMknwRZ3UNO2Bt8 X-Received: by 2002:ac8:4646:0:b0:3ab:6e0e:3b78 with SMTP id f6-20020ac84646000000b003ab6e0e3b78mr62699462qto.38.1672872614436; Wed, 04 Jan 2023 14:50:14 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1672872614; cv=none; d=google.com; s=arc-20160816; b=mjUzrkWhYKt7nhhaX6NuOHoHKMaNaN+nK4PxyBoWZnhts+/JjqzPfZuus/sHS9upc+ DIPSuQD9PWhcr0Q8eSWda4KhdeXfrXTDx5y9Q8quAxMtLNeDd3eHUQTizwPbD2HR3Yxs HXakPLB2OPB0nzvciYz115w6mnhhwUksFyzMdbAHhg7M23UuvdImGNhYi1MYP6SYVsXg WCeL6XWTDHhTtweW+3PD7v9W3fLfdsvNUhgTTs7QgdLwtuHgJjeqU7xsLVOKSTSpZLK0 15F+d/velwimBOMHyRUT6JJMiAiWwKuFlEx7KRr1TqApcmTOrEhv6adAxhzb2i+T5M9D xBMg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=/hYs50GwFMyuZfrImrAOFNvNLwGPKhd/4T6LtSg8+5M=; b=hR9GOryMYSzcKZGejm1xGW0e1aJ1V8/ufhB6XuheL/Z7CVEOE8Hnb5Y9xVIxwtwTlz OTfLtClkzsPV/B+UFWz+4x4IYmh84MAm2bKN8CnfOIQmTzDsUQRwfFFFuhDNUbINkhIS j7ucO4U6RQJ4kNx5B6l8J3N+d7nq9bRcHf4vk2LXU5vCnXjElGDvKi2V9k8BjtH6fcCC BsQcfICC0MPJh9k5ahVcsXgiHVlIflpdqiUj4P04RF7kXpsA2ikzUG/yD1EQ/NpGib0/ tpR/wwti3UKzCb7kZUrdJmYIxiat5Pqzr7AOLXnWyNl9t3eLhEkaLlrWKXdfEj6KOHiY AUsg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Qz7J1Aaz; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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Tsirkin" , Bin Meng , Max Filippov , Aurelien Jarno , Eduardo Habkost , Palmer Dabbelt , Radoslaw Biernacki , Jiaxun Yang , "Edgar E. Iglesias" , Xiaojuan Yang , Peter Maydell , qemu-block@nongnu.org, qemu-riscv@nongnu.org, Yoshinori Sato , Alistair Francis , qemu-arm@nongnu.org, Leif Lindholm , Kevin Wolf Subject: [PATCH 14/20] hw/block: Remove unused pflash_cfi01_register() Date: Wed, 4 Jan 2023 23:04:43 +0100 Message-Id: <20230104220449.41337-15-philmd@linaro.org> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20230104220449.41337-1-philmd@linaro.org> References: <20230104220449.41337-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::62e; envelope-from=philmd@linaro.org; helo=mail-ej1-x62e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org We converted all caller of pflash_cfi01_register() by open coding a call to pflash_cfi01_create() followed by an explicit call to sysbus_mmio_map(); we can now remove it. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Bin Meng --- hw/block/pflash_cfi01.c | 19 ------------------- include/hw/block/flash.h | 9 --------- 2 files changed, 28 deletions(-) diff --git a/hw/block/pflash_cfi01.c b/hw/block/pflash_cfi01.c index 6a8f9e6319..9df79b102b 100644 --- a/hw/block/pflash_cfi01.c +++ b/hw/block/pflash_cfi01.c @@ -981,25 +981,6 @@ DeviceState *pflash_cfi01_create(const char *name, return dev; } -PFlashCFI01 *pflash_cfi01_register(hwaddr base, - const char *name, - hwaddr size, - BlockBackend *blk, - uint32_t sector_len, - int bank_width, - uint16_t id0, uint16_t id1, - uint16_t id2, uint16_t id3, - int be) -{ - DeviceState *dev; - - dev = pflash_cfi01_create(name, size, blk, sector_len, bank_width, - id0, id1, id2, id3, be); - sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base); - - return PFLASH_CFI01(dev); -} - BlockBackend *pflash_cfi01_get_blk(DeviceState *dev) { PFlashCFI01 *fl = PFLASH_CFI01(dev); diff --git a/include/hw/block/flash.h b/include/hw/block/flash.h index 40ba857f69..858c0a1b6e 100644 --- a/include/hw/block/flash.h +++ b/include/hw/block/flash.h @@ -24,15 +24,6 @@ DeviceState *pflash_cfi01_create(const char *name, uint16_t id0, uint16_t id1, uint16_t id2, uint16_t id3, int be); -PFlashCFI01 *pflash_cfi01_register(hwaddr base, - const char *name, - hwaddr size, - BlockBackend *blk, - uint32_t sector_len, - int width, - uint16_t id0, uint16_t id1, - uint16_t id2, uint16_t id3, - int be); BlockBackend *pflash_cfi01_get_blk(DeviceState *dev); MemoryRegion *pflash_cfi01_get_memory(DeviceState *dev); void pflash_cfi01_legacy_drive(DeviceState *dev, DriveInfo *dinfo); From patchwork Wed Jan 4 22:04:44 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 639055 Delivered-To: patch@linaro.org Received: by 2002:a17:522:f3c4:b0:4b4:3859:abed with SMTP id in4csp1975026pvb; Wed, 4 Jan 2023 14:50:04 -0800 (PST) X-Google-Smtp-Source: AMrXdXuKI9pIUvgbUJrrQjOMH4ByPI9ZJF795m6/s2gAlL0uvfYNwPvxELCkplE5cFAuQMLQjKBm X-Received: by 2002:ac8:5646:0:b0:3a7:f599:220e with SMTP id 6-20020ac85646000000b003a7f599220emr77299062qtt.55.1672872603868; Wed, 04 Jan 2023 14:50:03 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1672872603; cv=none; d=google.com; s=arc-20160816; b=thbnhXYcjp3M9UKHqjGDRust9lEDC1gqQDv9dprUOscc+TVnT9CUiIVRpdUPKuVCec 6JytrOg/mPlrrnj4hATb4pYdI0eFSTyvVreJVfJMHyQfl4qR9tq/8tl98frz6DHbjGx/ s46u0JwWsFCLusBnSL5H6/5WCWWKuVVCrPwzdKe0mGGlVKkF+AIQQjEi0UxVKtSzlBtO ENBUUKMk3k6f2CEGy5rhHEoENW7UCfyVsIzCDz4TATaSd4b8bvTx366HpLoxDZ5S14GJ +YA/VKkfModBxSzrob23spbGELG5hz5FpZ0gvMk+6SVJw8QQe1RZEz55/H0G//o6UcXI CBBA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=aSPCaBssOqcI16x2eeMpiNddAyoEtVRJPGPKXdjNpIQ=; b=IQzVppkwMkiA3tObjSKGS8+1WStU2qDkiQv0RbwIHhIS8BA/ATTeFa2WB3mUHNaFFL O1zM5PEb5+XlYwq/LW7DjYSj4HL1mcphyCucLuuzGDQQ5C70CkvmUL0gWDOFp5F9uaeJ 9eNEiAJdKDrUBTR3aH1Sy9peMI37XcdkF+zsTTsMN05BNfluPN9sr3P+4bnP+wJrv08N uhWH7qmxTkczJGKRHINmjkOl8WxNfr2P3EQGHyPdosnuPPrfEBd3VmSyPS0JY+7Xm//t MzBCmRnFteOA6mizL5/D/yGsLWoD7s72jwmwUf7/fhVxXVd9R+RBGIYrBs9m8UCbiH3Y yZSQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=aCZaH0vh; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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Tsirkin" , Bin Meng , Max Filippov , Aurelien Jarno , Eduardo Habkost , Palmer Dabbelt , Radoslaw Biernacki , Jiaxun Yang , "Edgar E. Iglesias" , Xiaojuan Yang , Peter Maydell , qemu-block@nongnu.org, qemu-riscv@nongnu.org, Yoshinori Sato , Alistair Francis , qemu-arm@nongnu.org, Leif Lindholm , Kevin Wolf Subject: [PATCH 15/20] hw/block: Make PFlashCFI01 QOM declaration internal Date: Wed, 4 Jan 2023 23:04:44 +0100 Message-Id: <20230104220449.41337-16-philmd@linaro.org> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20230104220449.41337-1-philmd@linaro.org> References: <20230104220449.41337-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::631; envelope-from=philmd@linaro.org; helo=mail-ej1-x631.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Convert the QOM PFlashCFI01 to a forward/opaque pointer declaration. Only pflash_cfi01.c is able to poke at the internal fields. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Bin Meng --- hw/block/pflash_cfi01.c | 2 ++ include/hw/block/flash.h | 1 - 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/hw/block/pflash_cfi01.c b/hw/block/pflash_cfi01.c index 9df79b102b..2af9273fc1 100644 --- a/hw/block/pflash_cfi01.c +++ b/hw/block/pflash_cfi01.c @@ -59,6 +59,8 @@ #define PFLASH_BE 0 #define PFLASH_SECURE 1 +OBJECT_DECLARE_SIMPLE_TYPE(PFlashCFI01, PFLASH_CFI01) + struct PFlashCFI01 { /*< private >*/ SysBusDevice parent_obj; diff --git a/include/hw/block/flash.h b/include/hw/block/flash.h index 858c0a1b6e..321aede8ef 100644 --- a/include/hw/block/flash.h +++ b/include/hw/block/flash.h @@ -9,7 +9,6 @@ /* pflash_cfi01.c */ #define TYPE_PFLASH_CFI01 "cfi.pflash01" -OBJECT_DECLARE_SIMPLE_TYPE(PFlashCFI01, PFLASH_CFI01) /** * Create and realize a parallel NOR flash (CFI type 1) on the heap. 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Tsirkin" , Bin Meng , Max Filippov , Aurelien Jarno , Eduardo Habkost , Palmer Dabbelt , Radoslaw Biernacki , Jiaxun Yang , "Edgar E. Iglesias" , Xiaojuan Yang , Peter Maydell , qemu-block@nongnu.org, qemu-riscv@nongnu.org, Yoshinori Sato , Alistair Francis , qemu-arm@nongnu.org, Leif Lindholm , Kevin Wolf Subject: [PATCH 16/20] hw/block: Factor pflash_cfi02_create() out of pflash_cfi02_register() Date: Wed, 4 Jan 2023 23:04:45 +0100 Message-Id: <20230104220449.41337-17-philmd@linaro.org> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20230104220449.41337-1-philmd@linaro.org> References: <20230104220449.41337-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::62f; envelope-from=philmd@linaro.org; helo=mail-ej1-x62f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Currently pflash_cfi02_register(): 1/ creates a TYPE_PFLASH_CFI02 qdev instance 2/ maps the first MMIO region to the system bus The first minor issue is the implicit sysbus mapping is not obvious (the function name could mention it), and the function is not documented. Another issue is we are forced to map on sysbus, thus code wanting to simply instantiate this device are forced to open code the qdev creation. This is a problem in a heterogeneous system where not all cores has access to the sysbus, or if we want to map the pflash on different address spaces. To clarify this API, extract the qdev creation in a new helper named pflash_cfi02_create(). We don't document pflash_cfi02_register() because we are going to remove it in a pair of commits. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Bin Meng --- hw/block/pflash_cfi02.c | 55 ++++++++++++++++++++++++++-------------- include/hw/block/flash.h | 14 +++++++++- 2 files changed, 49 insertions(+), 20 deletions(-) diff --git a/hw/block/pflash_cfi02.c b/hw/block/pflash_cfi02.c index 2a99b286b0..176f93b512 100644 --- a/hw/block/pflash_cfi02.c +++ b/hw/block/pflash_cfi02.c @@ -994,6 +994,37 @@ static void pflash_cfi02_register_types(void) type_init(pflash_cfi02_register_types) +DeviceState *pflash_cfi02_create(const char *name, hwaddr size, + BlockBackend *blk, uint32_t sector_len, + int nb_mappings, int bank_width, + uint16_t id0, uint16_t id1, + uint16_t id2, uint16_t id3, + uint16_t unlock_addr0, uint16_t unlock_addr1, + int be) +{ + DeviceState *dev = qdev_new(TYPE_PFLASH_CFI02); + + if (blk) { + qdev_prop_set_drive(dev, "drive", blk); + } + assert(QEMU_IS_ALIGNED(size, sector_len)); + qdev_prop_set_uint32(dev, "num-blocks", size / sector_len); + qdev_prop_set_uint32(dev, "sector-length", sector_len); + qdev_prop_set_uint8(dev, "width", bank_width); + qdev_prop_set_uint8(dev, "mappings", nb_mappings); + qdev_prop_set_uint8(dev, "big-endian", !!be); + qdev_prop_set_uint16(dev, "id0", id0); + qdev_prop_set_uint16(dev, "id1", id1); + qdev_prop_set_uint16(dev, "id2", id2); + qdev_prop_set_uint16(dev, "id3", id3); + qdev_prop_set_uint16(dev, "unlock-addr0", unlock_addr0); + qdev_prop_set_uint16(dev, "unlock-addr1", unlock_addr1); + qdev_prop_set_string(dev, "name", name); + sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); + + return dev; +} + PFlashCFI02 *pflash_cfi02_register(hwaddr base, const char *name, hwaddr size, @@ -1006,26 +1037,12 @@ PFlashCFI02 *pflash_cfi02_register(hwaddr base, uint16_t unlock_addr1, int be) { - DeviceState *dev = qdev_new(TYPE_PFLASH_CFI02); - - if (blk) { - qdev_prop_set_drive(dev, "drive", blk); - } - assert(QEMU_IS_ALIGNED(size, sector_len)); - qdev_prop_set_uint32(dev, "num-blocks", size / sector_len); - qdev_prop_set_uint32(dev, "sector-length", sector_len); - qdev_prop_set_uint8(dev, "width", width); - qdev_prop_set_uint8(dev, "mappings", nb_mappings); - qdev_prop_set_uint8(dev, "big-endian", !!be); - qdev_prop_set_uint16(dev, "id0", id0); - qdev_prop_set_uint16(dev, "id1", id1); - qdev_prop_set_uint16(dev, "id2", id2); - qdev_prop_set_uint16(dev, "id3", id3); - qdev_prop_set_uint16(dev, "unlock-addr0", unlock_addr0); - qdev_prop_set_uint16(dev, "unlock-addr1", unlock_addr1); - qdev_prop_set_string(dev, "name", name); - sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); + DeviceState *dev; + dev = pflash_cfi02_create(name, size, blk, sector_len, + nb_mappings, width, id0, id1, id2, id3, + unlock_addr0, unlock_addr1, be); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base); + return PFLASH_CFI02(dev); } diff --git a/include/hw/block/flash.h b/include/hw/block/flash.h index 321aede8ef..78b078955e 100644 --- a/include/hw/block/flash.h +++ b/include/hw/block/flash.h @@ -32,7 +32,19 @@ void pflash_cfi01_legacy_drive(DeviceState *dev, DriveInfo *dinfo); #define TYPE_PFLASH_CFI02 "cfi.pflash02" OBJECT_DECLARE_SIMPLE_TYPE(PFlashCFI02, PFLASH_CFI02) - +/** + * Create and realize a parallel NOR flash (CFI type 2) on the heap. + * + * Create the device state structure, initialize it, and drop the + * reference to it (the device is realized). + */ +DeviceState *pflash_cfi02_create(const char *name, hwaddr size, + BlockBackend *blk, uint32_t sector_len, + int nb_mappings, int bank_width, + uint16_t id0, uint16_t id1, + uint16_t id2, uint16_t id3, + uint16_t unlock_addr0, uint16_t unlock_addr1, + int be); PFlashCFI02 *pflash_cfi02_register(hwaddr base, const char *name, hwaddr size, From patchwork Wed Jan 4 22:04:46 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 639050 Delivered-To: patch@linaro.org Received: by 2002:a17:522:f3c4:b0:4b4:3859:abed with SMTP id in4csp1972824pvb; Wed, 4 Jan 2023 14:42:33 -0800 (PST) X-Google-Smtp-Source: AMrXdXvoeKcAuYZ++c1lgPVqYbB7WcA2C/JLoc83OodIy+LpRsuKNBb5nmyVm9P6VC1YLCowj0gB X-Received: by 2002:a0c:f842:0:b0:532:f87:7538 with SMTP id g2-20020a0cf842000000b005320f877538mr1457212qvo.40.1672872153619; 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Tsirkin" , Bin Meng , Max Filippov , Aurelien Jarno , Eduardo Habkost , Palmer Dabbelt , Radoslaw Biernacki , Jiaxun Yang , "Edgar E. Iglesias" , Xiaojuan Yang , Peter Maydell , qemu-block@nongnu.org, qemu-riscv@nongnu.org, Yoshinori Sato , Alistair Francis , qemu-arm@nongnu.org, Leif Lindholm , Kevin Wolf Subject: [PATCH 17/20] hw/arm: Open-code pflash_cfi02_register() Date: Wed, 4 Jan 2023 23:04:46 +0100 Message-Id: <20230104220449.41337-18-philmd@linaro.org> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20230104220449.41337-1-philmd@linaro.org> References: <20230104220449.41337-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::536; envelope-from=philmd@linaro.org; helo=mail-ed1-x536.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org pflash_cfi02_register() hides an implicit sysbus mapping of MMIO region #0. This is not practical in a heterogeneous world where multiple cores use different address spaces. In order to remove to remove pflash_cfi02_register() from the pflash API, open-code it as a qdev creation call followed by an explicit sysbus mapping. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Bin Meng --- hw/arm/digic_boards.c | 14 ++++++++------ hw/arm/musicpal.c | 13 +++++++------ hw/arm/xilinx_zynq.c | 10 +++++----- 3 files changed, 20 insertions(+), 17 deletions(-) diff --git a/hw/arm/digic_boards.c b/hw/arm/digic_boards.c index 4093af09cb..98b0002d16 100644 --- a/hw/arm/digic_boards.c +++ b/hw/arm/digic_boards.c @@ -115,13 +115,15 @@ static void digic4_add_k8p3215uqb_rom(DigicState *s, hwaddr addr, { #define FLASH_K8P3215UQB_SIZE (4 * 1024 * 1024) #define FLASH_K8P3215UQB_SECTOR_SIZE (64 * 1024) + DeviceState *dev; - pflash_cfi02_register(addr, "pflash", FLASH_K8P3215UQB_SIZE, - NULL, FLASH_K8P3215UQB_SECTOR_SIZE, - DIGIC4_ROM_MAX_SIZE / FLASH_K8P3215UQB_SIZE, - 4, - 0x00EC, 0x007E, 0x0003, 0x0001, - 0x0555, 0x2aa, 0); + dev = pflash_cfi02_create("pflash", FLASH_K8P3215UQB_SIZE, + NULL, FLASH_K8P3215UQB_SECTOR_SIZE, + DIGIC4_ROM_MAX_SIZE / FLASH_K8P3215UQB_SIZE, + 4, + 0x00EC, 0x007E, 0x0003, 0x0001, + 0x0555, 0x2aa, 0); + sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, addr); digic_load_rom(s, addr, FLASH_K8P3215UQB_SIZE, filename); } diff --git a/hw/arm/musicpal.c b/hw/arm/musicpal.c index b65c020115..9f75d69b7f 100644 --- a/hw/arm/musicpal.c +++ b/hw/arm/musicpal.c @@ -1275,12 +1275,13 @@ static void musicpal_init(MachineState *machine) * 0xFF800000 (if there is 8 MB flash). So remap flash access if the * image is smaller than 32 MB. */ - pflash_cfi02_register(0x100000000ULL - MP_FLASH_SIZE_MAX, - "musicpal.flash", flash_size, - blk, 0x10000, - MP_FLASH_SIZE_MAX / flash_size, - 2, 0x00BF, 0x236D, 0x0000, 0x0000, - 0x5555, 0x2AAA, 0); + dev = pflash_cfi02_create("musicpal.flash", flash_size, + blk, 0x10000, + MP_FLASH_SIZE_MAX / flash_size, + 2, 0x00BF, 0x236D, 0x0000, 0x0000, + 0x5555, 0x2AAA, 0); + sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, + 0x100000000ULL - MP_FLASH_SIZE_MAX); } sysbus_create_simple(TYPE_MV88W8618_FLASHCFG, MP_FLASHCFG_BASE, NULL); diff --git a/hw/arm/xilinx_zynq.c b/hw/arm/xilinx_zynq.c index 3190cc0b8d..e55aff5532 100644 --- a/hw/arm/xilinx_zynq.c +++ b/hw/arm/xilinx_zynq.c @@ -218,11 +218,11 @@ static void zynq_init(MachineState *machine) DriveInfo *dinfo = drive_get(IF_PFLASH, 0, 0); /* AMD */ - pflash_cfi02_register(0xe2000000, "zynq.pflash", FLASH_SIZE, - dinfo ? blk_by_legacy_dinfo(dinfo) : NULL, - FLASH_SECTOR_SIZE, 1, - 1, 0x0066, 0x0022, 0x0000, 0x0000, 0x0555, 0x2aa, - 0); + dev = pflash_cfi02_create("zynq.pflash", FLASH_SIZE, + dinfo ? blk_by_legacy_dinfo(dinfo) : NULL, + FLASH_SECTOR_SIZE, 1, 1, + 0x0066, 0x0022, 0x0000, 0x0000, 0x0555, 0x2aa, 0); + sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, 0xe2000000); /* Create the main clock source, and feed slcr with it */ zynq_machine->ps_clk = CLOCK(object_new(TYPE_CLOCK)); From patchwork Wed Jan 4 22:04:47 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 639058 Delivered-To: patch@linaro.org Received: by 2002:a17:522:f3c4:b0:4b4:3859:abed with SMTP id in4csp1975592pvb; Wed, 4 Jan 2023 14:52:11 -0800 (PST) X-Google-Smtp-Source: AMrXdXtbbieyN6/vHNtReF+JiSe4vaPhmlP+vK83lzFGv4f2RJd0d8EY/yWxXmj71XJbLH1TxoUl X-Received: by 2002:ac8:481a:0:b0:3a6:8b5a:7d02 with SMTP id g26-20020ac8481a000000b003a68b5a7d02mr75314179qtq.30.1672872731238; Wed, 04 Jan 2023 14:52:11 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1672872731; cv=none; d=google.com; s=arc-20160816; b=Jx2KH+H5kj32lpoQiHOTpN09JAO1W+b3UIR6K1YHr71k2y5HO14/AVh2+F2L9KCG5q ZgxfwnIbzhrike7dT+kbq2TaVP4HSbSipelQRQ3fifIFdFJn41FyWtfHLtac+BqpGHqu zb0DWUnkGZ/PoHGf0uGFI8/cmDAtcAh36ECoN8mBLe0vz60+itG+Mdi98ai8JBpdax+3 1c+7DEWk8xrfX0TWqWz3oa3z0AdNiVxOOr87XKbrnftMPKHCf5ODLzWEyHT8+yFZ8qnP iOPrLwQ6Ey6nCvlfQEWsDksel9S8dz8bmxOeO+X5BxvdpkogxUa9b2yqnYhtRZ4wCLGL YDsA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=wmavs6sB32iuk0P3966mjPd+ATivEhkJqHU5LgWaQJM=; b=L6Cd4CcwqqBXNhEvymsUBi1Q/XpVKrIpHi/ZDMDNEQWh4/tLDX7v+XCCo/zoi+zHL2 nY09yYVS3mO1qbxxcq6ahXjtc0dJDJbT3QQQYb0arTmQ5Qh4uR2W0QngZWtDxT96MX9K Qy0btUjoaWTxzW4sCR05aSYPt0XGtfpwmasVi33wcD+NSD7bm2aUz2MozBj14Q0hf6nF pF6ZuDTcD4dDZ4+qfTrXQoIa3GAiFs417ZrpUM9RF6vkcGVOng8Sy4CX4R4cIzdSB20s yAi33Rm2A0FBy8UcA7X/JZhcITYOqBT3toWhdop3onhfVOs12h6F8VZueQmVE85J5pJa GnHw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=ZTzMbgFd; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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Tsirkin" , Bin Meng , Max Filippov , Aurelien Jarno , Eduardo Habkost , Palmer Dabbelt , Radoslaw Biernacki , Jiaxun Yang , "Edgar E. Iglesias" , Xiaojuan Yang , Peter Maydell , qemu-block@nongnu.org, qemu-riscv@nongnu.org, Yoshinori Sato , Alistair Francis , qemu-arm@nongnu.org, Leif Lindholm , Kevin Wolf Subject: [PATCH 18/20] hw/sh4: Open-code pflash_cfi02_register() Date: Wed, 4 Jan 2023 23:04:47 +0100 Message-Id: <20230104220449.41337-19-philmd@linaro.org> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20230104220449.41337-1-philmd@linaro.org> References: <20230104220449.41337-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::631; envelope-from=philmd@linaro.org; helo=mail-ej1-x631.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org pflash_cfi02_register() hides an implicit sysbus mapping of MMIO region #0. This is not practical in a heterogeneous world where multiple cores use different address spaces. In order to remove to remove pflash_cfi02_register() from the pflash API, open-code it as a qdev creation call followed by an explicit sysbus mapping. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Bin Meng --- hw/sh4/r2d.c | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/hw/sh4/r2d.c b/hw/sh4/r2d.c index 39fc4f19d9..43a8c56d14 100644 --- a/hw/sh4/r2d.c +++ b/hw/sh4/r2d.c @@ -302,10 +302,11 @@ static void r2d_init(MachineState *machine) * addressable in words of 16bit. */ dinfo = drive_get(IF_PFLASH, 0, 0); - pflash_cfi02_register(0x0, "r2d.flash", FLASH_SIZE, - dinfo ? blk_by_legacy_dinfo(dinfo) : NULL, - 64 * KiB, 1, 2, 0x0001, 0x227e, 0x2220, 0x2200, - 0x555, 0x2aa, 0); + dev = pflash_cfi02_create("r2d.flash", FLASH_SIZE, + dinfo ? blk_by_legacy_dinfo(dinfo) : NULL, + 64 * KiB, 1, 2, 0x0001, 0x227e, 0x2220, 0x2200, + 0x555, 0x2aa, 0); + sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, 0x00000000); /* NIC: rtl8139 on-board, and 2 slots. */ for (i = 0; i < nb_nics; i++) From patchwork Wed Jan 4 22:04:48 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 639044 Delivered-To: patch@linaro.org Received: by 2002:a17:522:f3c4:b0:4b4:3859:abed with SMTP id in4csp1965493pvb; Wed, 4 Jan 2023 14:19:33 -0800 (PST) X-Google-Smtp-Source: AMrXdXv2iY4v4rn7S8Anp52msV2VPk8m7CY6/PadflvlyyuKf11ZBIR+TLmU9/FXdmyv1qyW2m4k X-Received: by 2002:ad4:4e8c:0:b0:52d:2224:5660 with SMTP id dy12-20020ad44e8c000000b0052d22245660mr63579955qvb.37.1672870772900; Wed, 04 Jan 2023 14:19:32 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1672870772; cv=none; d=google.com; s=arc-20160816; b=OJNCujIpv3DuyeOiIFc4yHasbtLBDChvYyoJsTFFfbyJiWrdjiz3RAUlE3XMLk/g3K YfKxM8htVbHK0G3wLTf7sLYqemtbCBBIK7JKko32DoRXEWm531ZJIA0sXJ26Ogosk5i3 gSAm+EsTsR1Kspxk2LdeqkThqbJrLoOa2l+ixXvRHUeJEmLzGCMgoJ7uDY8S/G1RqQy3 Vy6rjOZldwvBULN67ZBTzNOtmORZCDEom+KNvENsmFkEBTQepdPH9n9wjY2kSad0Yxc5 gVSgWuE5K5B2FX1gqziWQzEudx+aK7AI7uLzajddD8r9syoujRU4bOktyo8vAPslxTkP NrDQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=1aa33f3a7n9BSTQqA7U/LbCvTvRWLOt7Nts6p8HXsEU=; b=Nx7KpA9ERXRhp3V6VPp8gE84tG4wdlw9OhHX2wpgDjexA1khV4xtQTuH78kKuARAgf Ymr9Iw89x5osa8NWEgScsdKdUBLi53eT0JOsfgWAmgKRCwMfdioNMEG+9hpqZBDwCBKO j51Ww74qFaq8mcz3kXKrNvS+Hga7fqU6HskTSAUte7u5l+PlrrsshEEACVR9/7/hpEUW hbjK3J7EQ78KHUdc2OtcdrbHT7d6ME1SIO0vcRGDE9cUof+kpP5pzKICR7HIK/uq7ZMG R3A81rELImtElSKdQNmBbYMhy2K6wS4/oufyUluGYNPbn/gKPZz8kQkC8Xc6DSkppK/z gxlA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=HF8qRByT; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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Tsirkin" , Bin Meng , Max Filippov , Aurelien Jarno , Eduardo Habkost , Palmer Dabbelt , Radoslaw Biernacki , Jiaxun Yang , "Edgar E. Iglesias" , Xiaojuan Yang , Peter Maydell , qemu-block@nongnu.org, qemu-riscv@nongnu.org, Yoshinori Sato , Alistair Francis , qemu-arm@nongnu.org, Leif Lindholm , Kevin Wolf Subject: [PATCH 19/20] hw/block: Remove unused pflash_cfi02_register() Date: Wed, 4 Jan 2023 23:04:48 +0100 Message-Id: <20230104220449.41337-20-philmd@linaro.org> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20230104220449.41337-1-philmd@linaro.org> References: <20230104220449.41337-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::631; envelope-from=philmd@linaro.org; helo=mail-ej1-x631.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org We converted all caller of pflash_cfi02_register() by open coding a call to pflash_cfi02_create() followed by an explicit call to sysbus_mmio_map(); we can now remove it. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Bin Meng --- hw/block/pflash_cfi02.c | 22 ---------------------- include/hw/block/flash.h | 12 ------------ 2 files changed, 34 deletions(-) diff --git a/hw/block/pflash_cfi02.c b/hw/block/pflash_cfi02.c index 176f93b512..a9dcabdeb2 100644 --- a/hw/block/pflash_cfi02.c +++ b/hw/block/pflash_cfi02.c @@ -1024,25 +1024,3 @@ DeviceState *pflash_cfi02_create(const char *name, hwaddr size, return dev; } - -PFlashCFI02 *pflash_cfi02_register(hwaddr base, - const char *name, - hwaddr size, - BlockBackend *blk, - uint32_t sector_len, - int nb_mappings, int width, - uint16_t id0, uint16_t id1, - uint16_t id2, uint16_t id3, - uint16_t unlock_addr0, - uint16_t unlock_addr1, - int be) -{ - DeviceState *dev; - - dev = pflash_cfi02_create(name, size, blk, sector_len, - nb_mappings, width, id0, id1, id2, id3, - unlock_addr0, unlock_addr1, be); - sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base); - - return PFLASH_CFI02(dev); -} diff --git a/include/hw/block/flash.h b/include/hw/block/flash.h index 78b078955e..64ee40c561 100644 --- a/include/hw/block/flash.h +++ b/include/hw/block/flash.h @@ -45,18 +45,6 @@ DeviceState *pflash_cfi02_create(const char *name, hwaddr size, uint16_t id2, uint16_t id3, uint16_t unlock_addr0, uint16_t unlock_addr1, int be); -PFlashCFI02 *pflash_cfi02_register(hwaddr base, - const char *name, - hwaddr size, - BlockBackend *blk, - uint32_t sector_len, - int nb_mappings, - int width, - uint16_t id0, uint16_t id1, - uint16_t id2, uint16_t id3, - uint16_t unlock_addr0, - uint16_t unlock_addr1, - int be); /* nand.c */ DeviceState *nand_init(BlockBackend *blk, int manf_id, int chip_id); From patchwork Wed Jan 4 22:04:49 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 639052 Delivered-To: patch@linaro.org Received: by 2002:a17:522:f3c4:b0:4b4:3859:abed with SMTP id in4csp1973237pvb; Wed, 4 Jan 2023 14:44:07 -0800 (PST) X-Google-Smtp-Source: AMrXdXvkk3KU2aw6I0M5lV2w0AaoyKv9CnXvnMFjxRlpHtVIQEN56kjw4UimkUig3vXVTSSByXa+ X-Received: by 2002:a05:622a:4f:b0:3ab:b632:e64c with SMTP id y15-20020a05622a004f00b003abb632e64cmr26738613qtw.18.1672872247576; Wed, 04 Jan 2023 14:44:07 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1672872247; cv=none; d=google.com; s=arc-20160816; b=Jd04HqSV8VZ57DHp5UF+s7bCuZb21lCfhtjTtSHjmF5Sq1C62rJJNSawBdqLl3M+Mc cPkK54Jc2o8ii6C3tGp2OQOcs0z4lTHriek7XDNYKNcQ81b50lBYeEly6w6q2221hcHn 5v1HZF0Npu0b3tmVz00JrlgnqeoB56ChIb+g2htU7BvvsZjnhzL4tNahYlCuWeOd105v xZ3W06+TevfGdC6T2zrT4i8b9RB8FJSum+6auajs9dRAaPjQEz+gG3pzm/ctqqZCkzOW 78Oz4qXCGnS8qRHuHhwQBA/jJh65BDEHCQUPjXFM/Wtahpnymkl3wL/ggTFW+5qeymIJ 61eg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=ZjXAofq2INlxh6v+H74awaoGQiZxjj50d0Z5Ts91LMc=; b=JUiN9C3j3RER3eJocn3DFQsaTqp8HzYHLJF1zZzGRnO7rxCSz61ET3ENHOoD32K0jq enM8M3UxthtIiH9LD/qxoRnExkdK9JAeeD5zeGx5G2eYqRYonN1xhjt44rEc4UyhLkjz yuO3rerwq/vIaZhlyh4MBEKCVZGgQRgk0m5LSTB1x6LzwZBInTgtGNiH2zneDRAOxnne G5lCIl3rlhLGhSCXvYopOLPbcQXMN1hsRxAnnlgYQThHvdTYthlyS3m3DYTunGx+cry/ KWM0GrJJXdynT+TJsTSkrQ3P3cX2uAhR6P7gGJ6roLs+JUz5K4h4E6wXd4iu1zVQ9JsM kCNA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="YuZ/Rbge"; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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Tsirkin" , Bin Meng , Max Filippov , Aurelien Jarno , Eduardo Habkost , Palmer Dabbelt , Radoslaw Biernacki , Jiaxun Yang , "Edgar E. Iglesias" , Xiaojuan Yang , Peter Maydell , qemu-block@nongnu.org, qemu-riscv@nongnu.org, Yoshinori Sato , Alistair Francis , qemu-arm@nongnu.org, Leif Lindholm , Kevin Wolf Subject: [PATCH 20/20] hw/block: Make PFlashCFI02 QOM declaration internal Date: Wed, 4 Jan 2023 23:04:49 +0100 Message-Id: <20230104220449.41337-21-philmd@linaro.org> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20230104220449.41337-1-philmd@linaro.org> References: <20230104220449.41337-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::62d; envelope-from=philmd@linaro.org; helo=mail-ej1-x62d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Convert the QOM PFlashCFI02 to a forward/opaque pointer declaration. Only pflash_cfi02.c is able to poke at the internal fields. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Bin Meng --- hw/block/pflash_cfi02.c | 2 ++ include/hw/block/flash.h | 1 - 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/hw/block/pflash_cfi02.c b/hw/block/pflash_cfi02.c index a9dcabdeb2..90b5feb36c 100644 --- a/hw/block/pflash_cfi02.c +++ b/hw/block/pflash_cfi02.c @@ -63,6 +63,8 @@ enum { WCYCLE_AUTOSELECT_CFI = 8, }; +OBJECT_DECLARE_SIMPLE_TYPE(PFlashCFI02, PFLASH_CFI02) + struct PFlashCFI02 { /*< private >*/ SysBusDevice parent_obj; diff --git a/include/hw/block/flash.h b/include/hw/block/flash.h index 64ee40c561..aefbaa9493 100644 --- a/include/hw/block/flash.h +++ b/include/hw/block/flash.h @@ -30,7 +30,6 @@ void pflash_cfi01_legacy_drive(DeviceState *dev, DriveInfo *dinfo); /* pflash_cfi02.c */ #define TYPE_PFLASH_CFI02 "cfi.pflash02" -OBJECT_DECLARE_SIMPLE_TYPE(PFlashCFI02, PFLASH_CFI02) /** * Create and realize a parallel NOR flash (CFI type 2) on the heap.