From patchwork Wed Jan 4 16:21:34 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Srinivasa Rao Mandadapu X-Patchwork-Id: 639373 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 54B50C7112B for ; Wed, 4 Jan 2023 16:22:49 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235103AbjADQWr (ORCPT ); Wed, 4 Jan 2023 11:22:47 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45732 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235253AbjADQWQ (ORCPT ); Wed, 4 Jan 2023 11:22:16 -0500 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3552F4085C; Wed, 4 Jan 2023 08:22:15 -0800 (PST) Received: from pps.filterd (m0279868.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 304G257B031845; Wed, 4 Jan 2023 16:22:08 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=qcppdkim1; bh=qVxLVNi1vjauSf0iGsvDfnimrpo5LpqH79zwOIt7/GY=; b=iffvpJ2u8YNT5awhj1uWrUlYld6nsHfpX4UzCIBEF/HZ0NMOm9BRt7O+8uw+4/HVzxB6 dB6hlpdHDkSKoKTAeCEMbN75/W6hfj03z6XHIdwJH8j3dy1MNbcwwKr41THAQBhB/q/g XRJHnqprDyXVHNv09R/5VyaGTn5ht3YCA7AbF1wkL/+K0CDTDecBWj+ef7dkrM6eHAAR QYo2fXEXYkhCWAHOLi11lWpo0PdDRva7r7xKWg3XHhT/9Wpame1XmXk++OmgFL/H4RVw e5RD/jACxiNTE7Pf4WtEAyg06/SCeDLgD2mxz+/U/la22d6/T8aQxuS1DsMEXeTsPRUh sw== Received: from nalasppmta02.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3mvsvxta5f-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 04 Jan 2023 16:22:08 +0000 Received: from nalasex01a.na.qualcomm.com (nalasex01a.na.qualcomm.com [10.47.209.196]) by NALASPPMTA02.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 304GM7Iw027208 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 4 Jan 2023 16:22:07 GMT Received: from hu-srivasam-hyd.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.36; Wed, 4 Jan 2023 08:22:02 -0800 From: Srinivasa Rao Mandadapu To: , , , , , , , , , , , , , CC: Srinivasa Rao Mandadapu Subject: [RESEND v3 1/4] dt-bindings: clock: qcom,sc7280-lpasscc: Add qcom,adsp-pil-mode property Date: Wed, 4 Jan 2023 21:51:34 +0530 Message-ID: <1672849297-3116-2-git-send-email-quic_srivasam@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1672849297-3116-1-git-send-email-quic_srivasam@quicinc.com> References: <1672849297-3116-1-git-send-email-quic_srivasam@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: V9aOv9mUu05jz2SxJs-E47ocJkf71tZp X-Proofpoint-GUID: V9aOv9mUu05jz2SxJs-E47ocJkf71tZp X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.923,Hydra:6.0.545,FMLib:17.11.122.1 definitions=2023-01-04_07,2023-01-04_02,2022-06-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 adultscore=32 bulkscore=0 suspectscore=0 malwarescore=0 impostorscore=0 lowpriorityscore=0 clxscore=1015 priorityscore=1501 spamscore=0 mlxlogscore=999 phishscore=0 mlxscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2212070000 definitions=main-2301040136 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org When this property is set, the remoteproc is used to boot the LPASS and therefore qdsp6ss clocks would be used to bring LPASS out of reset, hence they are directly controlled by the remoteproc. This is a cleanup done to handle overlap of regmap of lpasscc and adsp remoteproc blocks. Signed-off-by: Srinivasa Rao Mandadapu Tested-by: Mohammad Rafi Shaik Reviewed-by: Krzysztof Kozlowski --- Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscc.yaml | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscc.yaml b/Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscc.yaml index 6151fde..97c6bd9 100644 --- a/Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscc.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscc.yaml @@ -41,6 +41,12 @@ properties: - const: qdsp6ss - const: top_cc + qcom,adsp-pil-mode: + description: + Indicates if the LPASS would be brought out of reset using + remoteproc peripheral loader. + type: boolean + required: - compatible - reg @@ -60,6 +66,7 @@ examples: reg-names = "qdsp6ss", "top_cc"; clocks = <&gcc GCC_CFG_NOC_LPASS_CLK>; clock-names = "iface"; + qcom,adsp-pil-mode; #clock-cells = <1>; }; ... From patchwork Wed Jan 4 16:21:35 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Srinivasa Rao Mandadapu X-Patchwork-Id: 639374 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7D327C4708D for ; Wed, 4 Jan 2023 16:22:47 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230198AbjADQWp (ORCPT ); Wed, 4 Jan 2023 11:22:45 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45840 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S239634AbjADQWU (ORCPT ); Wed, 4 Jan 2023 11:22:20 -0500 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 90BFC42E35; Wed, 4 Jan 2023 08:22:19 -0800 (PST) Received: from pps.filterd (m0279871.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 304Dx1q8031849; Wed, 4 Jan 2023 16:22:13 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=qcppdkim1; bh=nLEGtR3xX/fAobQiHP8Fq1vCYtn2NPDHBpPXNLpRiNE=; b=Iv3wo3XylX48q4TlGKLgVnej6OplRG3tQovKik2nQwAcLtVoG2moRaUTFC8M4OYQzrdL ZXA/6Cx0f80s+LD5Xzm7wRBWcWiu4Og42FdqfkeeqeH6fjjiZngVRkRbtKdn5gC+F2XX gvOQEfXNLUKB+hflfrLDlqAsKtj4Yc0Zuzhpq5T9NyCoQbYIfE1VjbKcbhh/EjEXx0ZY wPk68VBm5GbHzYpPATdtWEe4Re+j87+WaowC/j56JCtLBJso4Vc+7kpy/lZeMdZ5RQ8S NXxPqPEuI8pMA5nae420af4BJq3qCIG4rFz01fHxau1Q9psRyRVqhRy/QoVdj0B8Kcpo Kg== Received: from nalasppmta03.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3mvsvvaagc-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 04 Jan 2023 16:22:13 +0000 Received: from nalasex01a.na.qualcomm.com (nalasex01a.na.qualcomm.com [10.47.209.196]) by NALASPPMTA03.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 304GMCJT005016 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 4 Jan 2023 16:22:12 GMT Received: from hu-srivasam-hyd.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.36; Wed, 4 Jan 2023 08:22:07 -0800 From: Srinivasa Rao Mandadapu To: , , , , , , , , , , , , , CC: Srinivasa Rao Mandadapu Subject: [RESEND v3 2/4] dt-bindings: clock: qcom,sc7280-lpasscc: Add resets for audioreach Date: Wed, 4 Jan 2023 21:51:35 +0530 Message-ID: <1672849297-3116-3-git-send-email-quic_srivasam@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1672849297-3116-1-git-send-email-quic_srivasam@quicinc.com> References: <1672849297-3116-1-git-send-email-quic_srivasam@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: g4eTRnP9Y9GGRQuyiR98iUCzsP2c0HCg X-Proofpoint-GUID: g4eTRnP9Y9GGRQuyiR98iUCzsP2c0HCg X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.923,Hydra:6.0.545,FMLib:17.11.122.1 definitions=2023-01-04_07,2023-01-04_02,2022-06-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 spamscore=0 lowpriorityscore=0 mlxscore=0 malwarescore=0 suspectscore=0 impostorscore=0 adultscore=0 bulkscore=0 mlxlogscore=999 priorityscore=1501 phishscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2212070000 definitions=main-2301040136 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add support for LPASS audio clock gating for RX/TX/SWA core bus clocks for audioreach based SC7280 platforms. Signed-off-by: Srinivasa Rao Mandadapu Tested-by: Mohammad Rafi Shaik Reviewed-by: Krzysztof Kozlowski --- .../devicetree/bindings/clock/qcom,sc7280-lpasscc.yaml | 12 ++++++++++-- 1 file changed, 10 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscc.yaml b/Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscc.yaml index 97c6bd9..054c496 100644 --- a/Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscc.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscc.yaml @@ -31,15 +31,20 @@ properties: '#clock-cells': const: 1 + '#reset-cells': + const: 1 + reg: items: - description: LPASS qdsp6ss register - description: LPASS top-cc register + - description: LPASS reset-cgcr register reg-names: items: - const: qdsp6ss - const: top_cc + - const: reset_cgcr qcom,adsp-pil-mode: description: @@ -62,11 +67,14 @@ examples: #include clock-controller@3000000 { compatible = "qcom,sc7280-lpasscc"; - reg = <0x03000000 0x40>, <0x03c04000 0x4>; - reg-names = "qdsp6ss", "top_cc"; + reg = <0x03000000 0x40>, + <0x03c04000 0x4>, + <0x032a9000 0x1000>; + reg-names = "qdsp6ss", "top_cc", "reset_cgcr"; clocks = <&gcc GCC_CFG_NOC_LPASS_CLK>; clock-names = "iface"; qcom,adsp-pil-mode; #clock-cells = <1>; + #reset-cells = <1>; }; ...