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Thu, 12 Jan 2023 02:24:44 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org, Richard Henderson Cc: Laurent Vivier , Peter Maydell , Fabiano Rosas , qemu-arm@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH v2 1/7] target/arm/sme: Reorg SME access handling in handle_msr_i() Date: Thu, 12 Jan 2023 11:24:30 +0100 Message-Id: <20230112102436.1913-2-philmd@linaro.org> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20230112102436.1913-1-philmd@linaro.org> References: <20230112102436.1913-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::434; envelope-from=philmd@linaro.org; helo=mail-wr1-x434.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Richard Henderson Signed-off-by: Richard Henderson Message-Id: <20230112004322.161330-1-richard.henderson@linaro.org> [PMD: Split patch in multiple tiny steps] Signed-off-by: Philippe Mathieu-Daudé --- target/arm/translate-a64.c | 24 +++++++++++++----------- 1 file changed, 13 insertions(+), 11 deletions(-) diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c index 2ee171f249..35cc851246 100644 --- a/target/arm/translate-a64.c +++ b/target/arm/translate-a64.c @@ -1841,18 +1841,20 @@ static void handle_msr_i(DisasContext *s, uint32_t insn, goto do_unallocated; } if (sme_access_check(s)) { - bool i = crm & 1; - bool changed = false; + int old = s->pstate_sm | (s->pstate_za << 1); + int new = (crm & 1) * 3; + int msk = (crm >> 1) & 3; - if ((crm & 2) && i != s->pstate_sm) { - gen_helper_set_pstate_sm(cpu_env, tcg_constant_i32(i)); - changed = true; - } - if ((crm & 4) && i != s->pstate_za) { - gen_helper_set_pstate_za(cpu_env, tcg_constant_i32(i)); - changed = true; - } - if (changed) { + if ((old ^ new) & msk) { + /* At least one bit changes. */ + bool i = crm & 1; + + if ((crm & 2) && i != s->pstate_sm) { + gen_helper_set_pstate_sm(cpu_env, tcg_constant_i32(i)); + } + if ((crm & 4) && i != s->pstate_za) { + gen_helper_set_pstate_za(cpu_env, tcg_constant_i32(i)); + } gen_rebuild_hflags(s); } else { s->base.is_jmp = DISAS_NEXT; From patchwork Thu Jan 12 10:24:31 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 641646 Delivered-To: patch@linaro.org Received: by 2002:a17:522:f3c4:b0:4b4:3859:abed with SMTP id in4csp3723607pvb; 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Thu, 12 Jan 2023 02:24:48 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org, Richard Henderson Cc: Laurent Vivier , Peter Maydell , Fabiano Rosas , qemu-arm@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH v2 2/7] target/arm/sme: Rebuild hflags in set_pstate() helpers Date: Thu, 12 Jan 2023 11:24:31 +0100 Message-Id: <20230112102436.1913-3-philmd@linaro.org> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20230112102436.1913-1-philmd@linaro.org> References: <20230112102436.1913-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32b; envelope-from=philmd@linaro.org; helo=mail-wm1-x32b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Richard Henderson Signed-off-by: Richard Henderson Message-Id: <20230112004322.161330-1-richard.henderson@linaro.org> [PMD: Split patch in multiple tiny steps] Signed-off-by: Philippe Mathieu-Daudé --- target/arm/sme_helper.c | 2 ++ target/arm/translate-a64.c | 1 - 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/target/arm/sme_helper.c b/target/arm/sme_helper.c index f891306bb9..b5aefa3eda 100644 --- a/target/arm/sme_helper.c +++ b/target/arm/sme_helper.c @@ -45,6 +45,7 @@ void helper_set_pstate_sm(CPUARMState *env, uint32_t i) } env->svcr ^= R_SVCR_SM_MASK; arm_reset_sve_state(env); + arm_rebuild_hflags(env); } void helper_set_pstate_za(CPUARMState *env, uint32_t i) @@ -65,6 +66,7 @@ void helper_set_pstate_za(CPUARMState *env, uint32_t i) if (i) { memset(env->zarray, 0, sizeof(env->zarray)); } + arm_rebuild_hflags(env); } void helper_sme_zero(CPUARMState *env, uint32_t imm, uint32_t svl) diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c index 35cc851246..035e63bdc5 100644 --- a/target/arm/translate-a64.c +++ b/target/arm/translate-a64.c @@ -1855,7 +1855,6 @@ static void handle_msr_i(DisasContext *s, uint32_t insn, if ((crm & 4) && i != s->pstate_za) { gen_helper_set_pstate_za(cpu_env, tcg_constant_i32(i)); } - gen_rebuild_hflags(s); } else { s->base.is_jmp = DISAS_NEXT; } From patchwork Thu Jan 12 10:24:32 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 641650 Delivered-To: patch@linaro.org Received: by 2002:a17:522:f3c4:b0:4b4:3859:abed with SMTP id in4csp3729062pvb; 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Thu, 12 Jan 2023 02:24:53 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org, Richard Henderson Cc: Laurent Vivier , Peter Maydell , Fabiano Rosas , qemu-arm@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH v2 3/7] target/arm/sme: Introduce aarch64_set_svcr() Date: Thu, 12 Jan 2023 11:24:32 +0100 Message-Id: <20230112102436.1913-4-philmd@linaro.org> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20230112102436.1913-1-philmd@linaro.org> References: <20230112102436.1913-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::42b; envelope-from=philmd@linaro.org; helo=mail-wr1-x42b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Richard Henderson Signed-off-by: Richard Henderson Message-Id: <20230112004322.161330-1-richard.henderson@linaro.org> [PMD: Split patch in multiple tiny steps] Signed-off-by: Philippe Mathieu-Daudé --- linux-user/aarch64/cpu_loop.c | 2 +- linux-user/aarch64/signal.c | 2 +- target/arm/cpu.h | 1 + target/arm/helper.c | 8 ++++++++ target/arm/sme_helper.c | 4 ++-- 5 files changed, 13 insertions(+), 4 deletions(-) diff --git a/linux-user/aarch64/cpu_loop.c b/linux-user/aarch64/cpu_loop.c index 9875d609a9..d53742e10b 100644 --- a/linux-user/aarch64/cpu_loop.c +++ b/linux-user/aarch64/cpu_loop.c @@ -93,8 +93,8 @@ void cpu_loop(CPUARMState *env) * On syscall, PSTATE.ZA is preserved, along with the ZA matrix. * PSTATE.SM is cleared, per SMSTOP, which does ResetSVEState. */ + aarch64_set_svcr(env, 0, R_SVCR_SM_MASK); if (FIELD_EX64(env->svcr, SVCR, SM)) { - env->svcr = FIELD_DP64(env->svcr, SVCR, SM, 0); arm_rebuild_hflags(env); arm_reset_sve_state(env); } diff --git a/linux-user/aarch64/signal.c b/linux-user/aarch64/signal.c index 6a2c6e06d2..b6e4dcb494 100644 --- a/linux-user/aarch64/signal.c +++ b/linux-user/aarch64/signal.c @@ -669,11 +669,11 @@ static void target_setup_frame(int usig, struct target_sigaction *ka, * Invoke the signal handler with both SM and ZA disabled. * When clearing SM, ResetSVEState, per SMSTOP. */ + aarch64_set_svcr(env, 0, R_SVCR_SM_MASK | R_SVCR_ZA_MASK); if (FIELD_EX64(env->svcr, SVCR, SM)) { arm_reset_sve_state(env); } if (env->svcr) { - env->svcr = 0; arm_rebuild_hflags(env); } diff --git a/target/arm/cpu.h b/target/arm/cpu.h index bf2bce046d..0484da3322 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -1123,6 +1123,7 @@ int aarch64_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg); void aarch64_sve_narrow_vq(CPUARMState *env, unsigned vq); void aarch64_sve_change_el(CPUARMState *env, int old_el, int new_el, bool el0_a64); +void aarch64_set_svcr(CPUARMState *env, uint64_t new, uint64_t mask); void arm_reset_sve_state(CPUARMState *env); /* diff --git a/target/arm/helper.c b/target/arm/helper.c index cee3804354..b5626627a1 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -6722,11 +6722,19 @@ static CPAccessResult access_esm(CPUARMState *env, const ARMCPRegInfo *ri, return CP_ACCESS_OK; } +void aarch64_set_svcr(CPUARMState *env, uint64_t new, uint64_t mask) +{ + uint64_t change = (env->svcr ^ new) & mask; + + env->svcr ^= change; +} + static void svcr_write(CPUARMState *env, const ARMCPRegInfo *ri, uint64_t value) { helper_set_pstate_sm(env, FIELD_EX64(value, SVCR, SM)); helper_set_pstate_za(env, FIELD_EX64(value, SVCR, ZA)); + aarch64_set_svcr(env, value, -1); arm_rebuild_hflags(env); } diff --git a/target/arm/sme_helper.c b/target/arm/sme_helper.c index b5aefa3eda..94dc084135 100644 --- a/target/arm/sme_helper.c +++ b/target/arm/sme_helper.c @@ -43,7 +43,7 @@ void helper_set_pstate_sm(CPUARMState *env, uint32_t i) if (i == FIELD_EX64(env->svcr, SVCR, SM)) { return; } - env->svcr ^= R_SVCR_SM_MASK; + aarch64_set_svcr(env, 0, R_SVCR_SM_MASK); arm_reset_sve_state(env); arm_rebuild_hflags(env); } @@ -53,7 +53,7 @@ void helper_set_pstate_za(CPUARMState *env, uint32_t i) if (i == FIELD_EX64(env->svcr, SVCR, ZA)) { return; } - env->svcr ^= R_SVCR_ZA_MASK; + aarch64_set_svcr(env, 0, R_SVCR_ZA_MASK); /* * ResetSMEState. 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Signed-off-by: Richard Henderson Message-Id: <20230112004322.161330-1-richard.henderson@linaro.org> [PMD: Split patch in multiple tiny steps] Signed-off-by: Philippe Mathieu-Daudé --- linux-user/aarch64/cpu_loop.c | 1 - linux-user/aarch64/signal.c | 8 +------- target/arm/cpu.h | 1 - target/arm/helper.c | 13 +++++++++++++ target/arm/sme_helper.c | 10 ---------- 5 files changed, 14 insertions(+), 19 deletions(-) diff --git a/linux-user/aarch64/cpu_loop.c b/linux-user/aarch64/cpu_loop.c index d53742e10b..5e93d27d8f 100644 --- a/linux-user/aarch64/cpu_loop.c +++ b/linux-user/aarch64/cpu_loop.c @@ -96,7 +96,6 @@ void cpu_loop(CPUARMState *env) aarch64_set_svcr(env, 0, R_SVCR_SM_MASK); if (FIELD_EX64(env->svcr, SVCR, SM)) { arm_rebuild_hflags(env); - arm_reset_sve_state(env); } ret = do_syscall(env, env->xregs[8], diff --git a/linux-user/aarch64/signal.c b/linux-user/aarch64/signal.c index b6e4dcb494..a326a6def5 100644 --- a/linux-user/aarch64/signal.c +++ b/linux-user/aarch64/signal.c @@ -665,14 +665,8 @@ static void target_setup_frame(int usig, struct target_sigaction *ka, env->btype = 2; } - /* - * Invoke the signal handler with both SM and ZA disabled. - * When clearing SM, ResetSVEState, per SMSTOP. - */ + /* Invoke the signal handler with both SM and ZA disabled. */ aarch64_set_svcr(env, 0, R_SVCR_SM_MASK | R_SVCR_ZA_MASK); - if (FIELD_EX64(env->svcr, SVCR, SM)) { - arm_reset_sve_state(env); - } if (env->svcr) { arm_rebuild_hflags(env); } diff --git a/target/arm/cpu.h b/target/arm/cpu.h index 0484da3322..a471add499 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -1124,7 +1124,6 @@ void aarch64_sve_narrow_vq(CPUARMState *env, unsigned vq); void aarch64_sve_change_el(CPUARMState *env, int old_el, int new_el, bool el0_a64); void aarch64_set_svcr(CPUARMState *env, uint64_t new, uint64_t mask); -void arm_reset_sve_state(CPUARMState *env); /* * SVE registers are encoded in KVM's memory in an endianness-invariant format. diff --git a/target/arm/helper.c b/target/arm/helper.c index b5626627a1..b655dde27d 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -6722,11 +6722,24 @@ static CPAccessResult access_esm(CPUARMState *env, const ARMCPRegInfo *ri, return CP_ACCESS_OK; } +/* ResetSVEState */ +static void arm_reset_sve_state(CPUARMState *env) +{ + memset(env->vfp.zregs, 0, sizeof(env->vfp.zregs)); + /* Recall that FFR is stored as pregs[16]. */ + memset(env->vfp.pregs, 0, sizeof(env->vfp.pregs)); + vfp_set_fpcr(env, 0x0800009f); +} + void aarch64_set_svcr(CPUARMState *env, uint64_t new, uint64_t mask) { uint64_t change = (env->svcr ^ new) & mask; env->svcr ^= change; + + if (change & R_SVCR_SM_MASK) { + arm_reset_sve_state(env); + } } static void svcr_write(CPUARMState *env, const ARMCPRegInfo *ri, diff --git a/target/arm/sme_helper.c b/target/arm/sme_helper.c index 94dc084135..f73bf4d285 100644 --- a/target/arm/sme_helper.c +++ b/target/arm/sme_helper.c @@ -29,22 +29,12 @@ #include "vec_internal.h" #include "sve_ldst_internal.h" -/* ResetSVEState */ -void arm_reset_sve_state(CPUARMState *env) -{ - memset(env->vfp.zregs, 0, sizeof(env->vfp.zregs)); - /* Recall that FFR is stored as pregs[16]. */ - memset(env->vfp.pregs, 0, sizeof(env->vfp.pregs)); - vfp_set_fpcr(env, 0x0800009f); -} - void helper_set_pstate_sm(CPUARMState *env, uint32_t i) { if (i == FIELD_EX64(env->svcr, SVCR, SM)) { return; } aarch64_set_svcr(env, 0, R_SVCR_SM_MASK); - arm_reset_sve_state(env); arm_rebuild_hflags(env); } From patchwork Thu Jan 12 10:24:34 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 641652 Delivered-To: patch@linaro.org Received: by 2002:a17:522:f3c4:b0:4b4:3859:abed with SMTP id in4csp3730289pvb; Thu, 12 Jan 2023 02:45:53 -0800 (PST) X-Google-Smtp-Source: AMrXdXsrlc3qUDUTZrzIY02kYzwX3piezZ40AyVvV7df5N0pcsgVFF2dwe5haN9HZsgIDdvVTf4v X-Received: by 2002:ad4:4152:0:b0:532:2d6c:5deb with SMTP id z18-20020ad44152000000b005322d6c5debmr19491069qvp.27.1673520353743; Thu, 12 Jan 2023 02:45:53 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1673520353; cv=none; d=google.com; s=arc-20160816; b=TJYQkNN/1Jqoy4jfUMuFAR8LpPkLDjdebmB6sdPPuD7wEjq35QdRwBIhYnARcPkbNw sd08lQ6CiVeh2yvnNsMW+8KKf8Mbp+dCQaDobkZjVOViahXnF46a78FaMHIObp8RddNW YAzshPt0hFomG2rqGmXKoT6JwhrP4qjqJ2ux8VEPCeai8pHpuedThhclwwTsTR1LCqbD qDSw/RsVh+C4RBuhYDpeCKMye98v/lRygy6iq535EB/0mK7soy9haJGSDQXQ0oQkHujX B5X70vkxHy1dogZHT4VQs1EOkdsLvSx5xoaNWxhVScn9tuO2bREE+9XElFo59L5o3Fe+ jS1A== ARC-Message-Signature: i=1; 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Thu, 12 Jan 2023 02:25:03 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org, Richard Henderson Cc: Laurent Vivier , Peter Maydell , Fabiano Rosas , qemu-arm@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH v2 5/7] target/arm/sme: Reset ZA state in aarch64_set_svcr() Date: Thu, 12 Jan 2023 11:24:34 +0100 Message-Id: <20230112102436.1913-6-philmd@linaro.org> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20230112102436.1913-1-philmd@linaro.org> References: <20230112102436.1913-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::433; envelope-from=philmd@linaro.org; helo=mail-wr1-x433.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Richard Henderson Signed-off-by: Richard Henderson Message-Id: <20230112004322.161330-1-richard.henderson@linaro.org> [PMD: Split patch in multiple tiny steps] Signed-off-by: Philippe Mathieu-Daudé --- target/arm/helper.c | 12 ++++++++++++ target/arm/sme_helper.c | 12 ------------ 2 files changed, 12 insertions(+), 12 deletions(-) diff --git a/target/arm/helper.c b/target/arm/helper.c index b655dde27d..26c3bb4cdf 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -6740,6 +6740,18 @@ void aarch64_set_svcr(CPUARMState *env, uint64_t new, uint64_t mask) if (change & R_SVCR_SM_MASK) { arm_reset_sve_state(env); } + + /* + * ResetSMEState. + * + * SetPSTATE_ZA zeros on enable and disable. We can zero this only + * on enable: while disabled, the storage is inaccessible and the + * value does not matter. We're not saving the storage in vmstate + * when disabled either. + */ + if (change & new & R_SVCR_ZA_MASK) { + memset(env->zarray, 0, sizeof(env->zarray)); + } } static void svcr_write(CPUARMState *env, const ARMCPRegInfo *ri, diff --git a/target/arm/sme_helper.c b/target/arm/sme_helper.c index f73bf4d285..e146c17ba1 100644 --- a/target/arm/sme_helper.c +++ b/target/arm/sme_helper.c @@ -44,18 +44,6 @@ void helper_set_pstate_za(CPUARMState *env, uint32_t i) return; } aarch64_set_svcr(env, 0, R_SVCR_ZA_MASK); - - /* - * ResetSMEState. - * - * SetPSTATE_ZA zeros on enable and disable. We can zero this only - * on enable: while disabled, the storage is inaccessible and the - * value does not matter. We're not saving the storage in vmstate - * when disabled either. - */ - if (i) { - memset(env->zarray, 0, sizeof(env->zarray)); - } arm_rebuild_hflags(env); } From patchwork Thu Jan 12 10:24:35 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 641648 Delivered-To: patch@linaro.org Received: by 2002:a17:522:f3c4:b0:4b4:3859:abed with SMTP id in4csp3727490pvb; Thu, 12 Jan 2023 02:36:55 -0800 (PST) X-Google-Smtp-Source: AMrXdXuTwyMQcl9m62sH+mQQrZcIOZqV4MCOZxwXAXzvileTwYJcGYgYf2C14vSoDocBcQUEHBzM X-Received: by 2002:ac8:41c5:0:b0:3b0:3043:669c with SMTP id o5-20020ac841c5000000b003b03043669cmr9180666qtm.46.1673519815522; Thu, 12 Jan 2023 02:36:55 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1673519815; cv=none; d=google.com; s=arc-20160816; b=NKw5HgbN575XHzqn5UucpWrjmb53u3XllpC7b2//aBCsuBzsbv41g2smsc+xWkcXbu 2dfCmxxecOwmSTxV40Fh1Gs8vUg9TaUE7rWQqDuzuAGUe9n29n5QKTTpL/mtrOUnKT2+ UwPwM2LrKUJx2jJ1H9eD7DeSdkTPFHGMLM8qDg8lCM3w8S71/QoY4jezs+KL2xGoHULH GABDV7B/aGrHTFMoGWZcbbCqzJNoJABem4mbwR7UvtMK1SEHEYnuIGlpZioJpWFlWFlA 5/5kF349AOD3bzWMgdbsSjAJtT/rdOrnuJKPYhgKSZTo+QEccnATDeojVpeoGjDoUFPV KNmQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=8CuYXoXmL7ijt24wyfbq14oA67+HiirVzpTtqD3Youw=; b=fGCcgKQ0oun6g8VRUonupOMnbghjMWF9z/n8lptBQWNG1JnR4xz3bE/i4HxnrXN3Jx 6tnMMpuKHxD1y005DyN6tiex473Rexuubu40tciC+O5SR6a9kwLi9otrjqDWLPk1Mvd6 /iCg2XmlcDosLhZJuySNq42kuWU4y43p11U5E2Ye5OOipnn6fiJ7ry/fySqVxmkSEpIO d+OTs6j+dYTmS5Oqdx8EwQmurgyWYwNPmVdqoAm3kt27qLwohzchNNnU+dfOla49d+Ae 7UZoirXJ2BQb7f49Gn0eGkWZBoLZqe7MArhfA1NfEVUeC1269qPgYrQBp5pFZKC8GKW6 uCzA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=qXH6pT4W; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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Thu, 12 Jan 2023 02:25:08 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org, Richard Henderson Cc: Laurent Vivier , Peter Maydell , Fabiano Rosas , qemu-arm@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH v2 6/7] target/arm/sme: Rebuild hflags in aarch64_set_svcr() Date: Thu, 12 Jan 2023 11:24:35 +0100 Message-Id: <20230112102436.1913-7-philmd@linaro.org> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20230112102436.1913-1-philmd@linaro.org> References: <20230112102436.1913-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::333; envelope-from=philmd@linaro.org; helo=mail-wm1-x333.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Richard Henderson Signed-off-by: Richard Henderson Message-Id: <20230112004322.161330-1-richard.henderson@linaro.org> [PMD: Split patch in multiple tiny steps] Signed-off-by: Philippe Mathieu-Daudé --- linux-user/aarch64/cpu_loop.c | 8 +------- linux-user/aarch64/signal.c | 3 --- target/arm/helper.c | 6 +++++- target/arm/sme_helper.c | 8 -------- 4 files changed, 6 insertions(+), 19 deletions(-) diff --git a/linux-user/aarch64/cpu_loop.c b/linux-user/aarch64/cpu_loop.c index 5e93d27d8f..2e2f7cf218 100644 --- a/linux-user/aarch64/cpu_loop.c +++ b/linux-user/aarch64/cpu_loop.c @@ -89,14 +89,8 @@ void cpu_loop(CPUARMState *env) switch (trapnr) { case EXCP_SWI: - /* - * On syscall, PSTATE.ZA is preserved, along with the ZA matrix. - * PSTATE.SM is cleared, per SMSTOP, which does ResetSVEState. - */ + /* On syscall, PSTATE.ZA is preserved, PSTATE.SM is cleared. */ aarch64_set_svcr(env, 0, R_SVCR_SM_MASK); - if (FIELD_EX64(env->svcr, SVCR, SM)) { - arm_rebuild_hflags(env); - } ret = do_syscall(env, env->xregs[8], env->xregs[0], diff --git a/linux-user/aarch64/signal.c b/linux-user/aarch64/signal.c index a326a6def5..b265cfd470 100644 --- a/linux-user/aarch64/signal.c +++ b/linux-user/aarch64/signal.c @@ -667,9 +667,6 @@ static void target_setup_frame(int usig, struct target_sigaction *ka, /* Invoke the signal handler with both SM and ZA disabled. */ aarch64_set_svcr(env, 0, R_SVCR_SM_MASK | R_SVCR_ZA_MASK); - if (env->svcr) { - arm_rebuild_hflags(env); - } if (info) { tswap_siginfo(&frame->info, info); diff --git a/target/arm/helper.c b/target/arm/helper.c index 26c3bb4cdf..cf77bdd378 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -6735,6 +6735,9 @@ void aarch64_set_svcr(CPUARMState *env, uint64_t new, uint64_t mask) { uint64_t change = (env->svcr ^ new) & mask; + if (change == 0) { + return; + } env->svcr ^= change; if (change & R_SVCR_SM_MASK) { @@ -6752,6 +6755,8 @@ void aarch64_set_svcr(CPUARMState *env, uint64_t new, uint64_t mask) if (change & new & R_SVCR_ZA_MASK) { memset(env->zarray, 0, sizeof(env->zarray)); } + + arm_rebuild_hflags(env); } static void svcr_write(CPUARMState *env, const ARMCPRegInfo *ri, @@ -6760,7 +6765,6 @@ static void svcr_write(CPUARMState *env, const ARMCPRegInfo *ri, helper_set_pstate_sm(env, FIELD_EX64(value, SVCR, SM)); helper_set_pstate_za(env, FIELD_EX64(value, SVCR, ZA)); aarch64_set_svcr(env, value, -1); - arm_rebuild_hflags(env); } static void smcr_write(CPUARMState *env, const ARMCPRegInfo *ri, diff --git a/target/arm/sme_helper.c b/target/arm/sme_helper.c index e146c17ba1..3abe03e4cb 100644 --- a/target/arm/sme_helper.c +++ b/target/arm/sme_helper.c @@ -31,20 +31,12 @@ void helper_set_pstate_sm(CPUARMState *env, uint32_t i) { - if (i == FIELD_EX64(env->svcr, SVCR, SM)) { - return; - } aarch64_set_svcr(env, 0, R_SVCR_SM_MASK); - arm_rebuild_hflags(env); } void helper_set_pstate_za(CPUARMState *env, uint32_t i) { - if (i == FIELD_EX64(env->svcr, SVCR, ZA)) { - return; - } aarch64_set_svcr(env, 0, R_SVCR_ZA_MASK); - arm_rebuild_hflags(env); } void helper_sme_zero(CPUARMState *env, uint32_t imm, uint32_t svl) From patchwork Thu Jan 12 10:24:36 2023 Content-Type: text/plain; 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Do not call helper_* functions from svcr_write. Signed-off-by: Richard Henderson Message-Id: <20230112004322.161330-1-richard.henderson@linaro.org> [PMD: Split patch in multiple tiny steps] Signed-off-by: Philippe Mathieu-Daudé --- target/arm/helper-sme.h | 3 +-- target/arm/helper.c | 2 -- target/arm/sme_helper.c | 9 ++------- target/arm/translate-a64.c | 10 ++-------- 4 files changed, 5 insertions(+), 19 deletions(-) diff --git a/target/arm/helper-sme.h b/target/arm/helper-sme.h index d2d544a696..27eef49a11 100644 --- a/target/arm/helper-sme.h +++ b/target/arm/helper-sme.h @@ -17,8 +17,7 @@ * License along with this library; if not, see . */ -DEF_HELPER_FLAGS_2(set_pstate_sm, TCG_CALL_NO_RWG, void, env, i32) -DEF_HELPER_FLAGS_2(set_pstate_za, TCG_CALL_NO_RWG, void, env, i32) +DEF_HELPER_FLAGS_3(set_svcr, TCG_CALL_NO_RWG, void, env, i32, i32) DEF_HELPER_FLAGS_3(sme_zero, TCG_CALL_NO_RWG, void, env, i32, i32) diff --git a/target/arm/helper.c b/target/arm/helper.c index cf77bdd378..1d74b95971 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -6762,8 +6762,6 @@ void aarch64_set_svcr(CPUARMState *env, uint64_t new, uint64_t mask) static void svcr_write(CPUARMState *env, const ARMCPRegInfo *ri, uint64_t value) { - helper_set_pstate_sm(env, FIELD_EX64(value, SVCR, SM)); - helper_set_pstate_za(env, FIELD_EX64(value, SVCR, ZA)); aarch64_set_svcr(env, value, -1); } diff --git a/target/arm/sme_helper.c b/target/arm/sme_helper.c index 3abe03e4cb..1e67fcac30 100644 --- a/target/arm/sme_helper.c +++ b/target/arm/sme_helper.c @@ -29,14 +29,9 @@ #include "vec_internal.h" #include "sve_ldst_internal.h" -void helper_set_pstate_sm(CPUARMState *env, uint32_t i) +void helper_set_svcr(CPUARMState *env, uint32_t val, uint32_t mask) { - aarch64_set_svcr(env, 0, R_SVCR_SM_MASK); -} - -void helper_set_pstate_za(CPUARMState *env, uint32_t i) -{ - aarch64_set_svcr(env, 0, R_SVCR_ZA_MASK); + aarch64_set_svcr(env, val, mask); } void helper_sme_zero(CPUARMState *env, uint32_t imm, uint32_t svl) diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c index 035e63bdc5..19cf371c4c 100644 --- a/target/arm/translate-a64.c +++ b/target/arm/translate-a64.c @@ -1847,14 +1847,8 @@ static void handle_msr_i(DisasContext *s, uint32_t insn, if ((old ^ new) & msk) { /* At least one bit changes. */ - bool i = crm & 1; - - if ((crm & 2) && i != s->pstate_sm) { - gen_helper_set_pstate_sm(cpu_env, tcg_constant_i32(i)); - } - if ((crm & 4) && i != s->pstate_za) { - gen_helper_set_pstate_za(cpu_env, tcg_constant_i32(i)); - } + gen_helper_set_svcr(cpu_env, tcg_constant_i32(new), + tcg_constant_i32(msk)); } else { s->base.is_jmp = DISAS_NEXT; }