From patchwork Fri Jan 20 17:22:29 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 644693 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 90FCCC05027 for ; Fri, 20 Jan 2023 17:22:45 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229461AbjATRWo (ORCPT ); Fri, 20 Jan 2023 12:22:44 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35226 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229515AbjATRWn (ORCPT ); Fri, 20 Jan 2023 12:22:43 -0500 Received: from mail-ed1-x533.google.com (mail-ed1-x533.google.com [IPv6:2a00:1450:4864:20::533]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8716B2005C for ; Fri, 20 Jan 2023 09:22:42 -0800 (PST) Received: by mail-ed1-x533.google.com with SMTP id v30so7560137edb.9 for ; Fri, 20 Jan 2023 09:22:42 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=UTk/tR/tYl/KCS8N+SRDUWNSvwfDXiBMlwXtmH5gaEc=; b=YbR4ogtIlbSVc1u3jnY1YBF74m+ZBlifo5clT1CFPy1Tb3Z/Exs2k40fyU4F6Z0HzP Lp8Q/lndOGXNeXcIpktSqHhYb77BdaDyxMXXU5su6dqm9b2M/HHotEBAosBNIcrKRNzh Sc6caoppnZ9ReFwJkwlzmNjybToHDpI0mAdUnVtFEg4cH996zCCu9h1p2cIexmOGtRH8 rAic1cOwKcldZRCLVbP4tn3DPzvu6nL0j46zEYtkK5LWgxRbX+xdSvq/XGEoQe9xgoOz glqS7yz/DPyZ5ijAP5GNsmDbhOqwPp7ITOIv0Kyi9n+7CM9vEtQAqyIoqFmGWb+UjZYc JA2w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=UTk/tR/tYl/KCS8N+SRDUWNSvwfDXiBMlwXtmH5gaEc=; b=jcq/ktjepx6HetHDTe5JDDevKSuEzGPS+M2+UpFr4cmQHXI2eAR6QX6NOTpDLeKEE/ C11SSbOsJbp3EBHvm1K/3sMF9bU6Pca67l6B/HzL3EruZtsG5SNQnGBXeHho76fi4hHR bK3n7Eq1pfD+5lUNwQg3n96/RYffw26sKoweDvsZR63ZBugYRBa5rn6Y2rnoVfjxL9xk ZUDAccIefFBkq+gPnbrp+jBfKjORmPvXtqh2qAABR01X+837gbC1MsUO+cvf6B7GtR7h mQmhuJj2UzgR31yPtcY9CzRVpgDH5M6HLUz3qIXKvtGJ60gcyJ516E+uQjVvpoMKDvqu 4RnQ== X-Gm-Message-State: AFqh2ko/ofBSDssr/hWyx6AzKUqKyY7VQLpbg9Jwk01VSPfxhDALJTAx +Jjr8D8uwhOksu65VPmFeAxH0twrJXQ2NF2n X-Google-Smtp-Source: AMrXdXthABXCdiT9cLDMkuBkDpMVfezZjlIi4Sc+A7GxntmCeVxSoxYgIir09PgnJz6TiGQQWMCuEw== X-Received: by 2002:aa7:ccd3:0:b0:49d:f44f:7ef1 with SMTP id y19-20020aa7ccd3000000b0049df44f7ef1mr17648565edt.14.1674235360898; Fri, 20 Jan 2023 09:22:40 -0800 (PST) Received: from localhost.localdomain (abyk37.neoplus.adsl.tpnet.pl. [83.9.30.37]) by smtp.gmail.com with ESMTPSA id s17-20020a1709060c1100b0084d21db0691sm18313857ejf.179.2023.01.20.09.22.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 20 Jan 2023 09:22:40 -0800 (PST) From: Konrad Dybcio To: linux-arm-msm@vger.kernel.org, andersson@kernel.org, agross@kernel.org, krzysztof.kozlowski@linaro.org Cc: marijn.suijten@somainline.org, Konrad Dybcio , Akhil P Oommen , Rob Clark , Abhinav Kumar , Dmitry Baryshkov , Sean Paul , David Airlie , Daniel Vetter , Chia-I Wu , dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 1/5] drm/msm/a6xx: Add support for A640 speed binning Date: Fri, 20 Jan 2023 18:22:29 +0100 Message-Id: <20230120172233.1905761-2-konrad.dybcio@linaro.org> X-Mailer: git-send-email 2.39.1 In-Reply-To: <20230120172233.1905761-1-konrad.dybcio@linaro.org> References: <20230120172233.1905761-1-konrad.dybcio@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add support for matching QFPROM fuse values to get the correct speed bin on A640 (SM8150) GPUs. Reviewed-by: Akhil P Oommen Signed-off-by: Konrad Dybcio --- drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c index aae60cbd9164..0ee8cb3e490c 100644 --- a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c +++ b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c @@ -1884,6 +1884,16 @@ static u32 a619_get_speed_bin(u32 fuse) return UINT_MAX; } +static u32 a640_get_speed_bin(u32 fuse) +{ + if (fuse == 0) + return 0; + else if (fuse == 1) + return 1; + + return UINT_MAX; +} + static u32 adreno_7c3_get_speed_bin(u32 fuse) { if (fuse == 0) @@ -1909,6 +1919,9 @@ static u32 fuse_to_supp_hw(struct device *dev, struct adreno_rev rev, u32 fuse) if (adreno_cmp_rev(ADRENO_REV(6, 3, 5, ANY_ID), rev)) val = adreno_7c3_get_speed_bin(fuse); + if (adreno_cmp_rev(ADRENO_REV(6, 4, 0, ANY_ID), rev)) + val = a640_get_speed_bin(fuse); + if (val == UINT_MAX) { DRM_DEV_ERROR(dev, "missing support for speed-bin: %u. Some OPPs may not be supported by hardware\n", From patchwork Fri Jan 20 17:22:30 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 645116 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C6EBEC05027 for ; Fri, 20 Jan 2023 17:22:48 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229675AbjATRWr (ORCPT ); Fri, 20 Jan 2023 12:22:47 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35290 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229660AbjATRWq (ORCPT ); Fri, 20 Jan 2023 12:22:46 -0500 Received: from mail-ej1-x630.google.com (mail-ej1-x630.google.com [IPv6:2a00:1450:4864:20::630]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 813E229437 for ; Fri, 20 Jan 2023 09:22:45 -0800 (PST) Received: by mail-ej1-x630.google.com with SMTP id mg12so15699718ejc.5 for ; Fri, 20 Jan 2023 09:22:45 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=30fedTZc83Sm2sS1XquRpkhmYzf9pEDy2MIMxTC2sH8=; b=n9ESsmpquDCARkLAYw8VIHoOPjt5o5luYSoGg3/ZbL6gJVQIHxt8RS4CHZme9E4L/m Q5YWyf9dZpop1oJCQZzL6djrLzN+jjbP0wcSheBxibusL6zAGPYuYGCsfrd8ibRdOTpz D1DL32AEM20rzlRu8zkrbH6kzCynw6P5E/478OqrrZhFVgaG0cFIoyTCXPoACwtbi7Vc UvkT5e7ckDUM6ACl8x219OjrmaXqvg5wM48Uf62m3dX3W1NwgIf2WOcX5ANHxrDKhD7w IIXiaDgZDaWTYAuI+9N1FobbysIPMM8cX4sKtvloriJVvnBEicE66AKNOCdnyG0DQOoy slOg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=30fedTZc83Sm2sS1XquRpkhmYzf9pEDy2MIMxTC2sH8=; b=r1THYwv6FJAz0Ue504n87XlDRFJ5bsCN/N3RlC+F+NQSpL1uAG6FQis9hImz1wEVek WUQiaOahme/xMR6SwMKpHey7+YAfwrU/+l9KEZJ2oiISN3INR34kBPYxUHLWWe9RbE7q lNLt1e3DRnBCCmTTt9aa3LocqwuILkz04NW5bPNWjY+vKWSnMDtgecq8Ymy0vdHDk7i5 5i+iZOT/zpBp1IK4vbNuMWQSdkgvAxa5S/WNRlPCayryAjKrZpHeN6jopWD+z9tDVeR5 FEZ3zxOgu9jE9OWygJVP4Hnbl0Z7SxZoZnSsZKl1J8Ji+T/jY6whqRlTmDBGajkUru8z MMLg== X-Gm-Message-State: AFqh2kq+sczc6dnUh9iCUsx2Awc1TDs/ZnbqUuyFxaiYbAmmG9pn2O1q 7hbblJx0K30Trno9q36yaEnhP5QzFLJhw4T7 X-Google-Smtp-Source: AMrXdXtxZiKqmrJNEiSXFu269RBrI85UAuiJlqn4HLOioNg+vq3aXiinKmNRgKPDkuI8uVKOrFWhOQ== X-Received: by 2002:a17:907:1257:b0:86c:a3fc:597c with SMTP id wc23-20020a170907125700b0086ca3fc597cmr13748446ejb.27.1674235363924; Fri, 20 Jan 2023 09:22:43 -0800 (PST) Received: from localhost.localdomain (abyk37.neoplus.adsl.tpnet.pl. [83.9.30.37]) by smtp.gmail.com with ESMTPSA id s17-20020a1709060c1100b0084d21db0691sm18313857ejf.179.2023.01.20.09.22.41 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 20 Jan 2023 09:22:43 -0800 (PST) From: Konrad Dybcio To: linux-arm-msm@vger.kernel.org, andersson@kernel.org, agross@kernel.org, krzysztof.kozlowski@linaro.org Cc: marijn.suijten@somainline.org, Konrad Dybcio , Rob Clark , Abhinav Kumar , Dmitry Baryshkov , Sean Paul , David Airlie , Daniel Vetter , Akhil P Oommen , Chia-I Wu , dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 2/5] drm/msm/a6xx: Add support for A650 speed binning Date: Fri, 20 Jan 2023 18:22:30 +0100 Message-Id: <20230120172233.1905761-3-konrad.dybcio@linaro.org> X-Mailer: git-send-email 2.39.1 In-Reply-To: <20230120172233.1905761-1-konrad.dybcio@linaro.org> References: <20230120172233.1905761-1-konrad.dybcio@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add support for matching QFPROM fuse values to get the correct speed bin on A650 (SM8250) GPUs. Signed-off-by: Konrad Dybcio Reviewed-by: Dmitry Baryshkov --- drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c index 0ee8cb3e490c..c5f5d0bb3fdc 100644 --- a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c +++ b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c @@ -1894,6 +1894,20 @@ static u32 a640_get_speed_bin(u32 fuse) return UINT_MAX; } +static u32 a650_get_speed_bin(u32 fuse) +{ + if (fuse == 0) + return 0; + else if (fuse == 1) + return 1; + else if (fuse == 2) + return 2; + else if (fuse == 3) + return 3; + + return UINT_MAX; +} + static u32 adreno_7c3_get_speed_bin(u32 fuse) { if (fuse == 0) @@ -1922,6 +1936,9 @@ static u32 fuse_to_supp_hw(struct device *dev, struct adreno_rev rev, u32 fuse) if (adreno_cmp_rev(ADRENO_REV(6, 4, 0, ANY_ID), rev)) val = a640_get_speed_bin(fuse); + if (adreno_cmp_rev(ADRENO_REV(6, 5, 0, ANY_ID), rev)) + val = a650_get_speed_bin(fuse); + if (val == UINT_MAX) { DRM_DEV_ERROR(dev, "missing support for speed-bin: %u. Some OPPs may not be supported by hardware\n", From patchwork Fri Jan 20 17:22:31 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 645115 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4C59EC38159 for ; Fri, 20 Jan 2023 17:22:52 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229703AbjATRWv (ORCPT ); Fri, 20 Jan 2023 12:22:51 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35386 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229752AbjATRWt (ORCPT ); Fri, 20 Jan 2023 12:22:49 -0500 Received: from mail-ej1-x62f.google.com (mail-ej1-x62f.google.com [IPv6:2a00:1450:4864:20::62f]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 99267474ED for ; Fri, 20 Jan 2023 09:22:47 -0800 (PST) Received: by mail-ej1-x62f.google.com with SMTP id v6so15698666ejg.6 for ; Fri, 20 Jan 2023 09:22:47 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=cuRLDN/glhJQ7GASrPrMhpcVHUOd0R6gamJVh5QWzXY=; b=t3C4aHzUpfTSbrHBxARUemK3hlWb7HSv9HTveDnh/gRkjGV1lB/7l/9TzmbgMLYQZb /EMVe3MB2qzQECrMaQKAxvv/Nn12GDlfKTxb/YNPwn/MZ0KBT38kKvN5GYWkgKxn2tW+ l/AOuBfUd059izKdsHMfICoN0a8mwv5ZtxX47sG7ZYy4OO7x+j5zMHi0wq0cq1K4brRu Q/QJSRbjcyo4Prph9XBBhl9wQMDo99w4cGS14mYXDKk3hu8/rl/Wl30bC045MRUYXm9x YQx4kqAmdvpS/XMB4or/pYSRLJHf4YXikEeSaXfGGhzyVaXf/SGx8/UVhcJ2UDvEoaU2 Livw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=cuRLDN/glhJQ7GASrPrMhpcVHUOd0R6gamJVh5QWzXY=; b=lJonrou8ozGihf3waIg1Vqh12cHviGav624um2NXIUIh9ixHf9qxZTTF/KABxqPrhv d/juWKi10aJJjsyGjwWVV0LNs7FeeU3zL/su3Ms5OywXyJzFI5wvUD1qRdggXQOEj2Mg QAvR+gVQc9CzfmR9QWS2opMpcLPfgNy2jJ0p2ZB8L3bTGdv2Wau821nVrGxrjGT5zgQ5 tUmIJn50b3nZxiWixZ9uoJyjkUiiXCGwtL+J+NdAf9EghmlNLtsostbasNbNqQsUX5sv dXCDeuC+pgQhLfV1UWtgJz/gz53w5t/3uYcC1KVm9zNzK4ki+HTBbsEzpibfmt30KRys wzaA== X-Gm-Message-State: AFqh2kq3eWyPoN5VEMX+OMFXh2DF76gd6qrCuewhO8mZ38CEBqJA5eEx zQhwrVcPv+T45kk1CBaHJVBIsruw3VbdcCDR X-Google-Smtp-Source: AMrXdXuR4MwX/4MKfmHMcj8DvWsjJcN1ttHIQoE/8GEawN5qxRWie4s7Yhda11io3YlL6Fjvtq49zw== X-Received: by 2002:a17:906:1851:b0:86e:4067:b699 with SMTP id w17-20020a170906185100b0086e4067b699mr21112294eje.4.1674235365947; Fri, 20 Jan 2023 09:22:45 -0800 (PST) Received: from localhost.localdomain (abyk37.neoplus.adsl.tpnet.pl. [83.9.30.37]) by smtp.gmail.com with ESMTPSA id s17-20020a1709060c1100b0084d21db0691sm18313857ejf.179.2023.01.20.09.22.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 20 Jan 2023 09:22:45 -0800 (PST) From: Konrad Dybcio To: linux-arm-msm@vger.kernel.org, andersson@kernel.org, agross@kernel.org, krzysztof.kozlowski@linaro.org Cc: marijn.suijten@somainline.org, Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 3/5] arm64: dts: qcom: sm8150: Don't start Adreno in headless mode Date: Fri, 20 Jan 2023 18:22:31 +0100 Message-Id: <20230120172233.1905761-4-konrad.dybcio@linaro.org> X-Mailer: git-send-email 2.39.1 In-Reply-To: <20230120172233.1905761-1-konrad.dybcio@linaro.org> References: <20230120172233.1905761-1-konrad.dybcio@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Now that there's display support, there is no reason to assume the default mode for Adreno should be headless. Keep it like that for boards that previously enabled it, so as not to create regressions though. Tested-by: Marijn Suijten # On Sony Xperia 5 Reviewed-by: Marijn Suijten Signed-off-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/sm8150-hdk.dts | 5 +++++ arch/arm64/boot/dts/qcom/sm8150-mtp.dts | 5 +++++ arch/arm64/boot/dts/qcom/sm8150.dtsi | 10 +--------- 3 files changed, 11 insertions(+), 9 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sm8150-hdk.dts b/arch/arm64/boot/dts/qcom/sm8150-hdk.dts index 3331ee957d64..0ee5309408b9 100644 --- a/arch/arm64/boot/dts/qcom/sm8150-hdk.dts +++ b/arch/arm64/boot/dts/qcom/sm8150-hdk.dts @@ -359,6 +359,11 @@ &gmu { }; &gpu { + /* + * NOTE: "amd,imageon" makes Adreno start in headless mode, remove it + * after display support is added on this board. + */ + compatible = "qcom,adreno-640.1", "qcom,adreno", "amd,imageon"; status = "okay"; }; diff --git a/arch/arm64/boot/dts/qcom/sm8150-mtp.dts b/arch/arm64/boot/dts/qcom/sm8150-mtp.dts index 46b5cf9a1192..9dfecbf89b21 100644 --- a/arch/arm64/boot/dts/qcom/sm8150-mtp.dts +++ b/arch/arm64/boot/dts/qcom/sm8150-mtp.dts @@ -354,6 +354,11 @@ &gmu { }; &gpu { + /* + * NOTE: "amd,imageon" makes Adreno start in headless mode, remove it + * after display support is added on this board. + */ + compatible = "qcom,adreno-640.1", "qcom,adreno", "amd,imageon"; status = "okay"; }; diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi index fd20096cfc6e..e3059f9b98de 100644 --- a/arch/arm64/boot/dts/qcom/sm8150.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi @@ -2133,15 +2133,7 @@ compute-cb@3 { }; gpu: gpu@2c00000 { - /* - * note: the amd,imageon compatible makes it possible - * to use the drm/msm driver without the display node, - * make sure to remove it when display node is added - */ - compatible = "qcom,adreno-640.1", - "qcom,adreno", - "amd,imageon"; - + compatible = "qcom,adreno-640.1", "qcom,adreno"; reg = <0 0x02c00000 0 0x40000>; reg-names = "kgsl_3d0_reg_memory"; From patchwork Fri Jan 20 17:22:32 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 644692 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 668A7C38141 for ; Fri, 20 Jan 2023 17:22:52 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230003AbjATRWv (ORCPT ); Fri, 20 Jan 2023 12:22:51 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35398 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229888AbjATRWt (ORCPT ); Fri, 20 Jan 2023 12:22:49 -0500 Received: from mail-ej1-x62f.google.com (mail-ej1-x62f.google.com [IPv6:2a00:1450:4864:20::62f]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 042F14ABC4 for ; Fri, 20 Jan 2023 09:22:48 -0800 (PST) Received: by mail-ej1-x62f.google.com with SMTP id bk15so15640245ejb.9 for ; Fri, 20 Jan 2023 09:22:47 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=yV0xY/b/Sej2+XZC7CtxW6ZSr+OVfA842ua4UMfkNUo=; b=NDLPUMjOYz1z+rmJxzxO2bXojXdfvuEFt1H8X0sLAMQB3rbRiOueeLkXtMlHLr0dnM EvygGxTwqnAHDaZc/h3GirJBfgjtXvNepEmm4KUoFFsAeKGwABv0VdP39ZerZWFgOU+p i0s+9XB5u11H6LmqoGQaO3YYZhDBUkQWndMfrq+0u/KIvVcuMKlWQrzdvetV79A9/xTg LLZ5jPmXoAQRqRsqpbw9vBpysdLdNOo69vRDAg7iMdu6YcDRTiR/mptrtgEve/lo+fw7 gVbZV1BKl1vElqgKWTkg5n3YrJQ47AX7VRRZqiik5f/JyMP2AlwmbLqejVObFavxF1HF GInw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=yV0xY/b/Sej2+XZC7CtxW6ZSr+OVfA842ua4UMfkNUo=; b=RzkoRoixkbYE5sQZaMylXM5ou+3nTG9+4NOEQVqy3rizF1u3QRittCcBSVHlLGXiE5 aaJI9M4YpNDnNAJTihHW42YvrAe+RtaLySe9Bc4ugxj9IsLOwevktNTebFAuiRTx73MQ VOItVxqhZWwKm4porJKmkvPzF9QDY6sBxjR5bQqKjpABkCbEHTjhg6fV8eDuzHbv3uAf Hq3rnX2tyJWc/5sNEphdRKN7kWs1Cc0cQ939cBhUjc/fZUJX1nADRRmF/Adq7UXVSyRt 3nCiTc2cHGKFDmw97WOYAHanLoKL/iU8Zj1YzGc5ds/iV58xoGkzBTIU2At8cVZMNZ00 qd+w== X-Gm-Message-State: AFqh2kpKnB3C2ICzFoE6GMrZCyJIiUKFvrb3nEOqAoOXosGHTaCpZ8r7 Oxp62GxngOStyqZA+xWqbR21zxIaQTopW/OT X-Google-Smtp-Source: AMrXdXugRcDVabHRSqs7oYYrnZ3bsAcSex0kM3FsefO+XUEGZJFZroBlFD8aXPQfA4t+Pn1bZdhIjg== X-Received: by 2002:a17:907:961b:b0:872:8e48:3b91 with SMTP id gb27-20020a170907961b00b008728e483b91mr20109875ejc.52.1674235367436; Fri, 20 Jan 2023 09:22:47 -0800 (PST) Received: from localhost.localdomain (abyk37.neoplus.adsl.tpnet.pl. [83.9.30.37]) by smtp.gmail.com with ESMTPSA id s17-20020a1709060c1100b0084d21db0691sm18313857ejf.179.2023.01.20.09.22.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 20 Jan 2023 09:22:47 -0800 (PST) From: Konrad Dybcio To: linux-arm-msm@vger.kernel.org, andersson@kernel.org, agross@kernel.org, krzysztof.kozlowski@linaro.org Cc: marijn.suijten@somainline.org, Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 4/5] arm64: dts: qcom: sm8150: Add GPU speedbin support Date: Fri, 20 Jan 2023 18:22:32 +0100 Message-Id: <20230120172233.1905761-5-konrad.dybcio@linaro.org> X-Mailer: git-send-email 2.39.1 In-Reply-To: <20230120172233.1905761-1-konrad.dybcio@linaro.org> References: <20230120172233.1905761-1-konrad.dybcio@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org SM8150 has (at least) two GPU speed bins. With the support added on the driver side, wire up bin detection in the DTS to restrict lower-quality SKUs from running at frequencies they were not validated at. Tested-by: Marijn Suijten # On Sony Xperia 5 (speed bin 0x3) Reviewed-by: Marijn Suijten Signed-off-by: Konrad Dybcio Reviewed-by: Dmitry Baryshkov --- arch/arm64/boot/dts/qcom/sm8150.dtsi | 21 ++++++++++++++++++++- 1 file changed, 20 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi index e3059f9b98de..1c7ee0cd816d 100644 --- a/arch/arm64/boot/dts/qcom/sm8150.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi @@ -945,6 +945,17 @@ ethernet: ethernet@20000 { status = "disabled"; }; + qfprom: efuse@784000 { + compatible = "qcom,sm8150-qfprom", "qcom,qfprom"; + reg = <0 0x00784000 0 0x8ff>; + #address-cells = <1>; + #size-cells = <1>; + + gpu_speed_bin: gpu_speed_bin@133 { + reg = <0x133 0x1>; + bits = <5 3>; + }; + }; qupv3_id_0: geniqup@8c0000 { compatible = "qcom,geni-se-qup"; @@ -2145,44 +2156,52 @@ gpu: gpu@2c00000 { qcom,gmu = <&gmu>; + nvmem-cells = <&gpu_speed_bin>; + nvmem-cell-names = "speed_bin"; + status = "disabled"; zap-shader { memory-region = <&gpu_mem>; }; - /* note: downstream checks gpu binning for 675 Mhz */ gpu_opp_table: opp-table { compatible = "operating-points-v2"; opp-675000000 { opp-hz = /bits/ 64 <675000000>; opp-level = ; + opp-supported-hw = <0x2>; }; opp-585000000 { opp-hz = /bits/ 64 <585000000>; opp-level = ; + opp-supported-hw = <0x3>; }; opp-499200000 { opp-hz = /bits/ 64 <499200000>; opp-level = ; + opp-supported-hw = <0x3>; }; opp-427000000 { opp-hz = /bits/ 64 <427000000>; opp-level = ; + opp-supported-hw = <0x3>; }; opp-345000000 { opp-hz = /bits/ 64 <345000000>; opp-level = ; + opp-supported-hw = <0x3>; }; opp-257000000 { opp-hz = /bits/ 64 <257000000>; opp-level = ; + opp-supported-hw = <0x3>; }; }; }; From patchwork Fri Jan 20 17:22:33 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 644691 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2247AC38141 for ; Fri, 20 Jan 2023 17:23:01 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230078AbjATRXA (ORCPT ); Fri, 20 Jan 2023 12:23:00 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35554 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230012AbjATRWw (ORCPT ); Fri, 20 Jan 2023 12:22:52 -0500 Received: from mail-ej1-x62b.google.com (mail-ej1-x62b.google.com [IPv6:2a00:1450:4864:20::62b]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A0D8740C7 for ; Fri, 20 Jan 2023 09:22:50 -0800 (PST) Received: by mail-ej1-x62b.google.com with SMTP id az20so15731762ejc.1 for ; Fri, 20 Jan 2023 09:22:50 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=P0ezJCiejYKH3mHjjOi3D4bAnLIutlLPwGAfzv+fbpQ=; b=g13LZ40zbQtq1kR0e2MKIJwJyHXgoa0hMLRRDRQw91OP3YOoSOmR6a7eALnD8Z1tQE ipyaeJaBmjP83JhEziARP4SVSnWtggAatHwHH/3rLqJ9cYWsvedUqo7PE91bdwhF6ihY MDO9S3thXGpajBtKNJMdBnoy0LZ9UDJ2SX2KByUnFMWoMyxbvfNfn7fRUk6CI3pO7ZY5 jyFAkHzbYseDhAEcRu/qL4IwufIoM3Y6CpqTtkz8joRVMwLwhjsbJoGPBV9AxHi5cj8f uZcznvRe45QG6nE9Yn5HfZ824BZtPRXb/ivebY+pdQRrYnE2739AekENceva2VA1bM97 nsew== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=P0ezJCiejYKH3mHjjOi3D4bAnLIutlLPwGAfzv+fbpQ=; b=io95/qB7LSCcdVK61GM6M0axEg2wCAFdyGTYy2XvZpxn3Qj9pwYE1HH5aa2bi3ukyE DmwRdBNXry9HZmqGLuWxYfsA9MD+jBfj8HKu+aFDoo/nG2XkHF8PwjK5Evs2aNSL+5iK 0X3TfJ+/vSVV13WvO6xC4vjgUB2Hyq84KZL2lwTjSMOVmGPub79MDdL897xnN/xKMb8a YlYaK+wePdLxXNqGFzJywo8Qy2i2Qmot+1cBINyr9/1RzuvolaOf/h1uCv/TAvgm/Cbg sPC4ISG0zyHrZy8BKQ/4+cTAJ7MYaiEAgYOCKeV/ToIHJ/GJAqWcw00IYDRas/AAT5uL mC3g== X-Gm-Message-State: AFqh2koJIEhtdk+N2HNipsmaRSdlQWygN4cFVcAc+dghEP/bSh7nokzK 2Q7H4jz08RPwDzTKkYtgozUwCEe11io4WSQT X-Google-Smtp-Source: AMrXdXtx8X/yBlmU7Fn46+gnHPnWsfBg6M83EWkjsFYdNYROQddqutpTfrlJF4gWuidhWPJdJCqhKQ== X-Received: by 2002:a17:906:29d8:b0:86f:a1fe:237a with SMTP id y24-20020a17090629d800b0086fa1fe237amr16070806eje.54.1674235368997; Fri, 20 Jan 2023 09:22:48 -0800 (PST) Received: from localhost.localdomain (abyk37.neoplus.adsl.tpnet.pl. [83.9.30.37]) by smtp.gmail.com with ESMTPSA id s17-20020a1709060c1100b0084d21db0691sm18313857ejf.179.2023.01.20.09.22.47 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 20 Jan 2023 09:22:48 -0800 (PST) From: Konrad Dybcio To: linux-arm-msm@vger.kernel.org, andersson@kernel.org, agross@kernel.org, krzysztof.kozlowski@linaro.org Cc: marijn.suijten@somainline.org, Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 5/5] arm64: dts: qcom: sm8250: Add GPU speedbin support Date: Fri, 20 Jan 2023 18:22:33 +0100 Message-Id: <20230120172233.1905761-6-konrad.dybcio@linaro.org> X-Mailer: git-send-email 2.39.1 In-Reply-To: <20230120172233.1905761-1-konrad.dybcio@linaro.org> References: <20230120172233.1905761-1-konrad.dybcio@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org SM8250 has (at least) four GPU speed bins. With the support added on the driver side, wire up bin detection in the DTS to restrict lower-quality SKUs from running at frequencies they were not validated at. Tested-by: Marijn Suijten # On Sony Xperia 5 II (speed bin 0x7) Reviewed-by: Marijn Suijten Signed-off-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/sm8250.dtsi | 23 ++++++++++++++++++++++- 1 file changed, 22 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi index 059c83003fb6..95f1a6afcd43 100644 --- a/arch/arm64/boot/dts/qcom/sm8250.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi @@ -981,6 +981,18 @@ ipcc: mailbox@408000 { #mbox-cells = <2>; }; + qfprom: efuse@784000 { + compatible = "qcom,sm8250-qfprom", "qcom,qfprom"; + reg = <0 0x00784000 0 0x8ff>; + #address-cells = <1>; + #size-cells = <1>; + + gpu_speed_bin: gpu_speed_bin@19b { + reg = <0x19b 0x1>; + bits = <5 3>; + }; + }; + rng: rng@793000 { compatible = "qcom,prng-ee"; reg = <0 0x00793000 0 0x1000>; @@ -2576,49 +2588,58 @@ gpu: gpu@3d00000 { qcom,gmu = <&gmu>; + nvmem-cells = <&gpu_speed_bin>; + nvmem-cell-names = "speed_bin"; + status = "disabled"; zap-shader { memory-region = <&gpu_mem>; }; - /* note: downstream checks gpu binning for 670 Mhz */ gpu_opp_table: opp-table { compatible = "operating-points-v2"; opp-670000000 { opp-hz = /bits/ 64 <670000000>; opp-level = ; + opp-supported-hw = <0x6>; }; opp-587000000 { opp-hz = /bits/ 64 <587000000>; opp-level = ; + opp-supported-hw = <0x7>; }; opp-525000000 { opp-hz = /bits/ 64 <525000000>; opp-level = ; + opp-supported-hw = <0xf>; }; opp-490000000 { opp-hz = /bits/ 64 <490000000>; opp-level = ; + opp-supported-hw = <0xf>; }; opp-441600000 { opp-hz = /bits/ 64 <441600000>; opp-level = ; + opp-supported-hw = <0xf>; }; opp-400000000 { opp-hz = /bits/ 64 <400000000>; opp-level = ; + opp-supported-hw = <0xf>; }; opp-305000000 { opp-hz = /bits/ 64 <305000000>; opp-level = ; + opp-supported-hw = <0xf>; }; }; };